* [PATCH] ARM: stm32: Select DMA, DMAMUX and MDMA support on STM32MP157C
From: Olof Johansson @ 2018-05-14 8:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1525438907-17190-1-git-send-email-alexandre.torgue@st.com>
On Fri, May 04, 2018 at 03:01:47PM +0200, Alexandre Torgue wrote:
> From: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
>
> This patch select DMA, DMAMUX and MDMA support for STM32MP157C machine.
>
> Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
>
> ---
>
> Hi Arnd, Kevin and Olof,
>
> I merged several patchs in one so I just have this patch for STM32 SoC update,
> so please consider it as my STM32 SOC pull request for v4.18.
Merged, thanks!
-Olof
^ permalink raw reply
* [GIT PULL] STM32 DT changes for v4.18 #1
From: Olof Johansson @ 2018-05-14 8:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <28c73dd0-fa87-83c1-5a93-217124e0f484@st.com>
On Fri, May 04, 2018 at 03:46:51PM +0200, Alexandre Torgue wrote:
> Hi Arnd, Olof and Kevin,
>
> Please consider this first round of STM32 DT updates for v4.18. As you will
> see, main part of patches concerns support for STM32MP157 platform.
> I didn't squash DT patches (as I like the way there are split) but let me
> know if for next time you prefer I do it.
>
> Regards
> Alex
>
>
> The following changes since commit 60cc43fc888428bb2f18f08997432d426a243338:
>
> Linux 4.17-rc1 (2018-04-15 18:24:20 -0700)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32.git
> tags/stm32-dt-for-v4.18-1
>
> for you to fetch changes up to 0a84a00094eea4080288f5c62aff8a90e510a252:
>
> ARM: dts: stm32: update pwm-cells for LPTimer on stm32h743 (2018-05-04
> 09:45:54 +0200)
Merged, thanks!
-Olof
^ permalink raw reply
* [GIT PULL 1/3] ti-sysc driver changes for v4.18 merge window
From: Olof Johansson @ 2018-05-14 8:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <pull-1525450571-674978@atomide.com>
On Fri, May 04, 2018 at 09:17:31AM -0700, Tony Lindgren wrote:
> From: "Tony Lindgren" <tony@atomide.com>
>
> The following changes since commit 60cc43fc888428bb2f18f08997432d426a243338:
>
> Linux 4.17-rc1 (2018-04-15 18:24:20 -0700)
>
> are available in the Git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap tags/omap-for-v4.18/ti-sysc-signed
>
> for you to fetch changes up to dc4c85eac6bc8cfe25144936c5636aa1415bbc12:
>
> bus: ti-sysc: Show module information for suspend if DEBUG is enabled (2018-05-01 06:54:17 -0700)
>
> ----------------------------------------------------------------
> ti-sysc driver related changes for omap variants
>
> This series improves the ti-sysc interconnect target module driver to
> the point where a most of SoC can be booted with interconnect target
> module data configured in device tree instead of legacy platform data.
> The related device tree changes need some more work though, and can
> wait for v4.19. Also some drivers using nested interconnects like DSS
> need more work.
>
> We can now remove the unused pm-noop code that is not doing anything
> any longer. And we can now initialize things for PM and display pdata
> later to prepare things for using ti-sysc driver.
>
> We also need to add some more quirk handling so we can boot both with
> platform data and dts data.
Merged, thanks!
-Olof
^ permalink raw reply
* [GIT PULL 2/3] omap dts changes for v4.18 merge window
From: Olof Johansson @ 2018-05-14 8:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <pull-1525450571-674978@atomide.com-2>
On Fri, May 04, 2018 at 09:17:32AM -0700, Tony Lindgren wrote:
> From: "Tony Lindgren" <tony@atomide.com>
>
> The following changes since commit 60cc43fc888428bb2f18f08997432d426a243338:
>
> Linux 4.17-rc1 (2018-04-15 18:24:20 -0700)
>
> are available in the Git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap tags/omap-for-v4.18/dt-signed
>
> for you to fetch changes up to 8dfa75524a0e0e2b4eaf2a3dc178f6b4d8db85d9:
>
> ARM: dts: correct invalid I/O definition for MMC/SD card detect on T410 (2018-05-03 10:03:01 -0700)
>
> ----------------------------------------------------------------
> Device tree changes for omap variants for v4.18 merge window
>
> This series adds support for am335x-pockebeagle and also add missing
> pinctrl configuration for am335x evm and beagle bone variants.
>
> There are also changes to add missing omap3 oscillator clocks for audio,
> and fixes am437x tps65218 irq type used for various board specific
> files.
>
> There are also few minor fixes included that are not urgent. The
> fixes for n8x0 audio also depend on driver changes, and the hp t410
> mmc card detect mux typo is harmless.
Merged, thanks!
-Olof
^ permalink raw reply
* [PATCH 03/21] clk: sunxi-ng: Enable DE2_CCU for Allwinner 64-bit SoCs
From: Jagan Teki @ 2018-05-14 8:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAGb2v66MKooAAroCzYdsXZDY0Oh66Dydpy59xj80QfiY+5mz_A@mail.gmail.com>
On Tue, May 1, 2018 at 9:53 PM, Chen-Yu Tsai <wens@csie.org> wrote:
> On Mon, Apr 30, 2018 at 7:40 PM, Jagan Teki <jagan@amarulasolutions.com> wrote:
>> Allwinner 64-bit SoC like H5/A64 has DE2 CCU so enable them
>> as default.
>>
>> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
>> ---
>> drivers/clk/sunxi-ng/Kconfig | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git a/drivers/clk/sunxi-ng/Kconfig b/drivers/clk/sunxi-ng/Kconfig
>> index 79dfd296c3d1..1fffd3bf6ff3 100644
>> --- a/drivers/clk/sunxi-ng/Kconfig
>> +++ b/drivers/clk/sunxi-ng/Kconfig
>> @@ -58,6 +58,8 @@ config SUN8I_V3S_CCU
>>
>> config SUN8I_DE2_CCU
>> bool "Support for the Allwinner SoCs DE2 CCU"
>> + default ARM64 && ARCH_SUNXI
>> + depends on (DRM_SUN4I && (ARM64 && ARCH_SUNXI)) || COMPILE_TEST
>
> There is no reason to depend on DRM_SUN4I. There is no compile dependency.
Since this CCU is for DE2 I've make DRM_SUN4I for that matter, any problem?
>
> Also, this is needed on SUN8I as well, pretty much anything with DE 2.0.
> So you shouldn't limit it to ARM64. That pretty much breaks things for
> people with A83T's or H3's. In fact you should enable it by default for
> these as well.
True, I've skipped SUN8I since this series for A64.
Jagan.
--
Jagan Teki
Senior Linux Kernel Engineer | Amarula Solutions
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
^ permalink raw reply
* [GIT PULL 3/3] omap sdhci dts changes for v4.18 merge window
From: Olof Johansson @ 2018-05-14 8:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <pull-1525450571-674978@atomide.com-3>
On Fri, May 04, 2018 at 09:17:33AM -0700, Tony Lindgren wrote:
> From: "Tony Lindgren" <tony@atomide.com>
>
> The following changes since commit 3f4028780287ff5a7308f40e10bbba9a42b993aa:
>
> mmc: sdhci-omap: Get IODelay values for 3.3v DDR mode (2018-05-03 09:37:13 +0200)
>
> are available in the Git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap tags/omap-for-v4.18/dt-sdhci-signed
>
> for you to fetch changes up to 24a6f1f65ea567d017c598faf1374ee443f73851:
>
> Documentation: ARM: Add new MMC requirements for DRA7/K2G (2018-05-03 10:32:20 -0700)
>
> ----------------------------------------------------------------
> Device tree changes for omap variants for SDHCI
>
> This series adds the devicetree configuration needed for pinctrl on
> dra7 variants to use the SDHCI SDIO driver instead of mmc-omap-hs
> driver. To use SDHCI, both the pins and the iodelay needs to be
> configured.
>
> This series is based on the related SDHCI drivers changes on a branch
> set up by Ulf.
Hi Tony,
Just to make sure Ulf isn't taken by surprise (since I didn't see the initial
agreement of a stable branch), it's a good idea to include him on the pull
request.
Also, the diffstat doesn't take that branch into consideration so it doesn't
match with what I've merged with. Having the URL of Ulf's branch helps, in that
case I'd just merge that branch first and get the dependency documented.
Ulf, does the above sound OK with you, and said branch is 100% guaranteed to
not be rebased?
Thanks,
-Olof
^ permalink raw reply
* [PATCH v3] bus: arm-cci: remove unnecessary unreachable()
From: Olof Johansson @ 2018-05-14 8:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180508142726.11646-1-stefan@agner.ch>
On Tue, May 08, 2018 at 04:27:26PM +0200, Stefan Agner wrote:
> Mixing asm and C code is not recommended in a naked function by
> gcc and leads to an error when using clang:
> drivers/bus/arm-cci.c:2107:2: error: non-ASM statement in naked
> function is not supported
> unreachable();
> ^
>
> While the function is marked __naked it actually properly return
> in asm. There is no need for the unreachable() call.
>
> GCC 7.2 generates identical object files before and after, other
> than (for obvious reasons) the line numbers generated by
> WANT_WARN_ON_SLOWPATH for all the WARN()s appearing later in the
> file.
>
> Suggested-by: Russell King <linux@arm.linux.org.uk>
> Signed-off-by: Stefan Agner <stefan@agner.ch>
> Acked-by: Nicolas Pitre <nico@linaro.org>
> Reviewed-by: Robin Murphy <robin.murphy@arm.com>
> ---
> Changes in v3:
> - Fix subject and enhance commit message
> Changes in v2:
> - Don't add assembly ASM_UNREACHABLE, just drop unreachable()
Applied to next/drivers for v4.18 merge window now. Thanks!
-Olof
^ permalink raw reply
* [GIT PULL 1/2] ARM: SOC driver update v4.18
From: Olof Johansson @ 2018-05-14 8:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1525815697-6338-1-git-send-email-santosh.shilimkar@oracle.com>
On Tue, May 08, 2018 at 02:41:36PM -0700, Santosh Shilimkar wrote:
> The following changes since commit 60cc43fc888428bb2f18f08997432d426a243338:
>
> Linux 4.17-rc1 (2018-04-15 18:24:20 -0700)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone.git tags/soc_drivers_for_4.18
>
> for you to fetch changes up to 1e0a601437a6111ecf384df010812c53cada6497:
>
> firmware: ti_sci: Switch to SPDX Licensing (2018-05-04 23:10:23 -0700)
>
> ----------------------------------------------------------------
> ARM: SOC driver update for 4.18
>
> - AEMIF driver update to support board files and remove
> need of mach-davinci aemif code
> - Use percpu counters for qmss datapath stats
> - License update for TI SCI
Merged, thanks.
-Olof
^ permalink raw reply
* Allwinner A64: Issue on external rtc clock to wifi chip
From: Maxime Ripard @ 2018-05-14 8:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAMty3ZDew=+zytKUx5+nX27CjCe0UfJpyYOy2s07NoJvbe57mQ@mail.gmail.com>
On Mon, May 14, 2018 at 01:34:56PM +0530, Jagan Teki wrote:
> On Mon, May 14, 2018 at 1:27 PM, Maxime Ripard
> <maxime.ripard@bootlin.com> wrote:
> > Hi,
> >
> > On Mon, May 14, 2018 at 12:37:49PM +0530, Jagan Teki wrote:
> >> Hi Maxime and All,
> >>
> >> We are trying to bring-up AP6330 Wifi chip for A64 board. We noticed
> >> to have an external rtc clock has driven from wifi chip.
> >>
> >> So the devicetree is configured according to this as below.
> >>
> >> / {
> >> wifi_pwrseq: wifi-pwrseq {
> >> compatible = "mmc-pwrseq-simple";
> >> clocks = <&rtc 1>;
> >> clock-names = "ext_clock";
> >> reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
> >> post-power-on-delay-ms = <400>;
> >> };
> >> };
> >>
> >> &rtc {
> >> clock-output-names = "rtc-osc32k", "rtc-osc32k-out";
> >> clocks = <&osc32k>;
> >> #clock-cells = <1>;
> >> };
> >>
> >> &mmc1 {
> >> pinctrl-names = "default";
> >> pinctrl-0 = <&mmc1_pins>;
> >> vmmc-supply = <®_dcdc1>;
> >> vqmmc-supply = <®_eldo1>;
> >> mmc-pwrseq = <&wifi_pwrseq>;
> >> bus-width = <4>;
> >> non-removable;
> >> status = "okay";
> >>
> >> brcmf: wifi at 1 {
> >> reg = <1>;
> >> compatible = "brcm,bcm4329-fmac";
> >> interrupt-parent = <&r_pio>;
> >> interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* WL-WAKE-AP: PL3 */
> >> interrupt-names = "host-wake";
> >> };
> >> };
> >>
> >> And observed rtc-osc32k-out clock is never enabled[1] and the value of
> >> LOSC_OUT_GATING is 0x0 which eventually not enabling
> >> LOSC_OUT_GATING_EN
> >>
> >> Pls. let us know if we miss anything here?
> >>
> >> [1] https://paste.ubuntu.com/p/X2By4q8kD2/
> >
> > Could you paste your config and the logs from a boot to?
>
> .config
> https://paste.ubuntu.com/p/w9w2KB7RFc/
>
> dmesg
> https://paste.ubuntu.com/p/mrZGk5bWRR/
This is kind of weird. Have you tested with a 4.17 kernel? We have
runtime_pm changes lined up in next, so that might be a regression
there, even though we tested it with Quentin at some point.
Maxime
--
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
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^ permalink raw reply
* [GIT PULL 1/2] ARM: SOC driver update v4.18
From: Olof Johansson @ 2018-05-14 8:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1525815697-6338-1-git-send-email-santosh.shilimkar@oracle.com>
Hi Santosh,
On Tue, May 08, 2018 at 02:41:36PM -0700, Santosh Shilimkar wrote:
> The following changes since commit 60cc43fc888428bb2f18f08997432d426a243338:
>
> Linux 4.17-rc1 (2018-04-15 18:24:20 -0700)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone.git tags/soc_drivers_for_4.18
>
> for you to fetch changes up to 1e0a601437a6111ecf384df010812c53cada6497:
>
> firmware: ti_sci: Switch to SPDX Licensing (2018-05-04 23:10:23 -0700)
>
> ----------------------------------------------------------------
> ARM: SOC driver update for 4.18
>
> - AEMIF driver update to support board files and remove
> need of mach-davinci aemif code
> - Use percpu counters for qmss datapath stats
> - License update for TI SCI
Merged!
-Olof
^ permalink raw reply
* [GIT PULL] omap-gpmc updates for v4.18
From: Olof Johansson @ 2018-05-14 8:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <75040f4e-9499-55a4-fad6-f27cab0bb224@ti.com>
On Fri, May 11, 2018 at 07:28:51AM +0300, Roger Quadros wrote:
> Hi Olof/Arnd,
>
> The following changes since commit 60cc43fc888428bb2f18f08997432d426a243338:
>
> Linux 4.17-rc1 (2018-04-15 18:24:20 -0700)
>
> are available in the git repository at:
>
> https://github.com/rogerq/linux.git tags/gpmc-omap-for-v4.18
>
> for you to fetch changes up to d507178f2ebb7bde5b3f64557f1c8f80e7b82541:
>
> memory: omap-gpmc: Avoid redundant NULL check (2018-04-24 10:30:52 +0300)
>
> ----------------------------------------------------------------
> OMAP-GPMC: driver updates for v4.18
> * get rid of a redundant NULL check in gpmc_probe_dt_children()
Merged, thanks.
-Olof
^ permalink raw reply
* [GIT PULL] ARM: mvebu: fixes for v4.17 (#1)
From: Gregory CLEMENT @ 2018-05-14 8:33 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
Here is the first pull request for fixes for mvebu for v4.17.
Gregory
The following changes since commit 60cc43fc888428bb2f18f08997432d426a243338:
Linux 4.17-rc1 (2018-04-15 18:24:20 -0700)
are available in the Git repository at:
git://git.infradead.org/linux-mvebu.git tags/mvebu-fixes-4.17-1
for you to fetch changes up to f43194c1447c9536efb0859c2f3f46f6bf2b9154:
ARM64: dts: marvell: armada-cp110: Add mg_core_clk for ethernet node (2018-04-27 17:47:24 +0200)
----------------------------------------------------------------
mvebu fixes for 4.17 (part 1)
Declare missing clocks needed for network on Armada 8040 base boards
(such as the McBin)
----------------------------------------------------------------
Maxime Chevallier (2):
ARM64: dts: marvell: armada-cp110: Add clocks for the xmdio node
ARM64: dts: marvell: armada-cp110: Add mg_core_clk for ethernet node
Documentation/devicetree/bindings/net/marvell-pp2.txt | 9 +++++----
arch/arm64/boot/dts/marvell/armada-cp110.dtsi | 7 +++++--
2 files changed, 10 insertions(+), 6 deletions(-)
^ permalink raw reply
* [PATCH 09/21] arm64: dts: allwinner: a64: Add HDMI support
From: Jagan Teki @ 2018-05-14 8:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180502113413.vv2r3ubfoh7gm3ms@flea>
On Wed, May 2, 2018 at 5:04 PM, Maxime Ripard <maxime.ripard@bootlin.com> wrote:
> Hi,
>
> On Mon, Apr 30, 2018 at 05:10:46PM +0530, Jagan Teki wrote:
>> + hdmi_phy: hdmi-phy at 1ef0000 {
>> + compatible = "allwinner,sun50i-a64-hdmi-phy",
>> + "allwinner,sun8i-h3-hdmi-phy";
>> + reg = <0x01ef0000 0x10000>;
>> + clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>,
>> + <&ccu CLK_PLL_VIDEO1>;
>
> You were discussing that the PLL0 could also be used to clock the PHY,
> has that been figured out?
This is what I understand from Fig: 3-3. Module Clock Diagram, both
tcon0 and tcon1 are using HDMI. I'm thinking based on the tcon
configuration we need use proper PLL or some logic to get common PLL
don't know yet. Since this series adding tcon1 I've attached PLL1.
Jagan.
--
Jagan Teki
Senior Linux Kernel Engineer | Amarula Solutions
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
^ permalink raw reply
* [PATCH 1/3] thermal: imx: remove cpufreq cooling registration
From: Daniel Lezcano @ 2018-05-14 8:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1526285359-17978-1-git-send-email-Anson.Huang@nxp.com>
On Mon, May 14, 2018 at 04:09:17PM +0800, Anson Huang wrote:
> This patch removes cpufreq cooling registration in
> thermal .probe function, cpufreq cooling should be
> done in cpufreq driver when it is ready.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> ---
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
--
<http://www.linaro.org/> Linaro.org ? Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply
* [PATCH net-next v2 06/13] phy: add 2.5G SGMII mode to the phy_mode enum
From: Antoine Tenart @ 2018-05-14 8:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180508123408.GK16141@n2100.armlinux.org.uk>
Hi Russell,
On Tue, May 08, 2018 at 01:34:08PM +0100, Russell King - ARM Linux wrote:
> On Fri, May 04, 2018 at 03:56:36PM +0200, Antoine Tenart wrote:
> > This patch adds one more generic PHY mode to the phy_mode enum, to allow
> > configuring generic PHYs to the 2.5G SGMII mode by using the set_mode
> > callback.
> >
> > Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
> > Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
>
> Would it be possible to get the 2.5G SGMII comphy support merged
> ahead of the rest of this series please - I don't think there's been
> any objections to it, and having it in mainline would then mean I can
> drop the Marvell Comphy code from my tree and transition to the bootlin
> Comphy code instead.
>
> Of course, the perfect solution would be to get the whole series merged,
> but I'm just thinking about the situation where we're still discussing
> points when the next merge window opens.
That would be great, and there are no dependency issue if patches 6 and
7 are taken ahead.
Kishon: since there are no objection to these two phy patches, could you
take them?
Thanks!
Antoine
--
Antoine T?nart, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply
* [PATCH 1/3] thermal: imx: remove cpufreq cooling registration
From: Bastian Stender @ 2018-05-14 8:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1526285359-17978-1-git-send-email-Anson.Huang@nxp.com>
Hi,
On 05/14/2018 10:09 AM, Anson Huang wrote:
> This patch removes cpufreq cooling registration in
> thermal .probe function, cpufreq cooling should be
> done in cpufreq driver when it is ready.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
It seems you are trying to achieve something similar to a patch I sent a
couple of month ago. Unfortunately I did not have the time to rework it yet:
https://patchwork.kernel.org/patch/10059085/
Some of the comments might apply here too.
Regards,
Bastian
> ---
> drivers/thermal/imx_thermal.c | 16 ----------------
> 1 file changed, 16 deletions(-)
>
> diff --git a/drivers/thermal/imx_thermal.c b/drivers/thermal/imx_thermal.c
> index c30dc21..8eedb97 100644
> --- a/drivers/thermal/imx_thermal.c
> +++ b/drivers/thermal/imx_thermal.c
> @@ -9,7 +9,6 @@
>
> #include <linux/clk.h>
> #include <linux/cpufreq.h>
> -#include <linux/cpu_cooling.h>
> #include <linux/delay.h>
> #include <linux/device.h>
> #include <linux/init.h>
> @@ -207,7 +206,6 @@ static struct thermal_soc_data thermal_imx7d_data = {
> struct imx_thermal_data {
> struct cpufreq_policy *policy;
> struct thermal_zone_device *tz;
> - struct thermal_cooling_device *cdev;
> enum thermal_device_mode mode;
> struct regmap *tempmon;
> u32 c1, c2; /* See formula in imx_init_calib() */
> @@ -729,22 +727,12 @@ static int imx_thermal_probe(struct platform_device *pdev)
> return -EPROBE_DEFER;
> }
>
> - data->cdev = cpufreq_cooling_register(data->policy);
> - if (IS_ERR(data->cdev)) {
> - ret = PTR_ERR(data->cdev);
> - dev_err(&pdev->dev,
> - "failed to register cpufreq cooling device: %d\n", ret);
> - cpufreq_cpu_put(data->policy);
> - return ret;
> - }
> -
> data->thermal_clk = devm_clk_get(&pdev->dev, NULL);
> if (IS_ERR(data->thermal_clk)) {
> ret = PTR_ERR(data->thermal_clk);
> if (ret != -EPROBE_DEFER)
> dev_err(&pdev->dev,
> "failed to get thermal clk: %d\n", ret);
> - cpufreq_cooling_unregister(data->cdev);
> cpufreq_cpu_put(data->policy);
> return ret;
> }
> @@ -759,7 +747,6 @@ static int imx_thermal_probe(struct platform_device *pdev)
> ret = clk_prepare_enable(data->thermal_clk);
> if (ret) {
> dev_err(&pdev->dev, "failed to enable thermal clk: %d\n", ret);
> - cpufreq_cooling_unregister(data->cdev);
> cpufreq_cpu_put(data->policy);
> return ret;
> }
> @@ -775,7 +762,6 @@ static int imx_thermal_probe(struct platform_device *pdev)
> dev_err(&pdev->dev,
> "failed to register thermal zone device %d\n", ret);
> clk_disable_unprepare(data->thermal_clk);
> - cpufreq_cooling_unregister(data->cdev);
> cpufreq_cpu_put(data->policy);
> return ret;
> }
> @@ -811,7 +797,6 @@ static int imx_thermal_probe(struct platform_device *pdev)
> dev_err(&pdev->dev, "failed to request alarm irq: %d\n", ret);
> clk_disable_unprepare(data->thermal_clk);
> thermal_zone_device_unregister(data->tz);
> - cpufreq_cooling_unregister(data->cdev);
> cpufreq_cpu_put(data->policy);
> return ret;
> }
> @@ -831,7 +816,6 @@ static int imx_thermal_remove(struct platform_device *pdev)
> clk_disable_unprepare(data->thermal_clk);
>
> thermal_zone_device_unregister(data->tz);
> - cpufreq_cooling_unregister(data->cdev);
> cpufreq_cpu_put(data->policy);
>
> return 0;
>
--
Pengutronix e.K.
Industrial Linux Solutions
http://www.pengutronix.de/
Peiner Str. 6-8, 31137 Hildesheim, Germany
Amtsgericht Hildesheim, HRA 2686
^ permalink raw reply
* [PATCH 09/21] arm64: dts: allwinner: a64: Add HDMI support
From: Maxime Ripard @ 2018-05-14 8:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAMty3ZBheurXewQ8R53G_0gNLgv1jQkZbjAbaN30JQ6_ZVn7Eg@mail.gmail.com>
On Mon, May 14, 2018 at 02:03:36PM +0530, Jagan Teki wrote:
> On Wed, May 2, 2018 at 5:04 PM, Maxime Ripard <maxime.ripard@bootlin.com> wrote:
> > Hi,
> >
> > On Mon, Apr 30, 2018 at 05:10:46PM +0530, Jagan Teki wrote:
> >> + hdmi_phy: hdmi-phy at 1ef0000 {
> >> + compatible = "allwinner,sun50i-a64-hdmi-phy",
> >> + "allwinner,sun8i-h3-hdmi-phy";
> >> + reg = <0x01ef0000 0x10000>;
> >> + clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>,
> >> + <&ccu CLK_PLL_VIDEO1>;
> >
> > You were discussing that the PLL0 could also be used to clock the PHY,
> > has that been figured out?
>
> This is what I understand from Fig: 3-3. Module Clock Diagram, both
> tcon0 and tcon1 are using HDMI. I'm thinking based on the tcon
> configuration we need use proper PLL or some logic to get common PLL
> don't know yet. Since this series adding tcon1 I've attached PLL1.
You're not describing the TCON node here though, but the HDMI one, and
the HDMI block is listed in both the PLL video 0 and 1.
Maxime
--
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
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^ permalink raw reply
* clk: stm32mp1: Fix a memory leak in 'clk_stm32_register_gate_ops()'
From: Gabriel FERNANDEZ @ 2018-05-14 8:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180513111704.31842-1-christophe.jaillet@wanadoo.fr>
Hi Christophe,
Many thanks !
Acked-by: Gabriel Fernandez <gabriel.fernandez@st.com>
On 05/13/2018 01:17 PM, Christophe Jaillet wrote:
> We allocate some memory which is neither used, nor referenced by anything.
> So axe it.
>
> Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
> ---
> This patch as not been compile-tested, I don't have the corresponding arch
> and have not taken time to cross-compile it.
> ---
> drivers/clk/clk-stm32mp1.c | 9 +--------
> 1 file changed, 1 insertion(+), 8 deletions(-)
>
> diff --git a/drivers/clk/clk-stm32mp1.c b/drivers/clk/clk-stm32mp1.c
> index edd3cf451401..dfb9cb5bd0c4 100644
> --- a/drivers/clk/clk-stm32mp1.c
> +++ b/drivers/clk/clk-stm32mp1.c
> @@ -579,14 +579,9 @@ clk_stm32_register_gate_ops(struct device *dev,
> spinlock_t *lock)
> {
> struct clk_init_data init = { NULL };
> - struct clk_gate *gate;
> struct clk_hw *hw;
> int ret;
>
> - gate = kzalloc(sizeof(*gate), GFP_KERNEL);
> - if (!gate)
> - return ERR_PTR(-ENOMEM);
> -
> init.name = name;
> init.parent_names = &parent_name;
> init.num_parents = 1;
> @@ -604,10 +599,8 @@ clk_stm32_register_gate_ops(struct device *dev,
> hw->init = &init;
>
> ret = clk_hw_register(dev, hw);
> - if (ret) {
> - kfree(gate);
> + if (ret)
> hw = ERR_PTR(ret);
> - }
>
> return hw;
> }
^ permalink raw reply
* [RFC PATCH 00/10] Add persistent clock support
From: Baolin Wang @ 2018-05-14 8:55 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
We will meet below issues when compensating the suspend time for the timekeeping.
1. We have too many different ways of dealing with persistent timekeeping
across architectures, so it is hard for one driver to compatable with different
architectures.
2. On some platforms (such as Spreadtrum platform), we registered the high
resolution timer as one clocksource to update the OS time, but the high
resolution timer will be stopped in suspend state. So we use another one
always-on timer (but low resolution) to calculate the suspend time to
compensate the OS time. Though we can register the always-on timer as one
clocksource, we need re-calculate the mult/shift with one larger conversion
range to calculate the suspend time and need update the clock in case of
running over the always-on timer.
More duplicate code will be added if other platforms meet this case.
3. Now we have 3 sources that could be used to compensate the OS time:
Nonstop clocksource during suspend, persistent clock and rtc device,
which is complicated. Another hand is that the nonstop clocksource can
risk wrapping if the suspend time is too long, so we need one mechanism
to wake up the system before the nonstop clocksource wrapping.
According to above issues, we can introduce one common persistent clock
framework to compatable with different architectures, in future we will
remove the persistent clock implementation for each architecture. Also
this framework will implement common code to help drivers to register easily.
Moreover if we converted all SUSPEND_NONSTOP clocksource to register to
be one persistent clock, we can remove the SUSPEND_NONSTOP clocksource
accounting in timekeeping, which means we can only compensate the OS time
from persistent clock and RTC.
Will be appreciated for any comments. Thank you all.
Arnd posted some comments as below last time, but we did not get a general
consensus, so I post them again.
Arnd said:
"I was planning to discuss this with Daniel and John during Linaro Connect,
but that didn't happen, so I'd like to bring up the bigger picture here again.
Today, we have a number of subsystem-type interfaces that deal with
time keeping in the wider sense (I might be missing some):
- clock source
- clock event
- sched clock
- real time clock
- ptp clock
- persistent clock
The first five have separate registration interfaces and may all refer
to different hardware blocks, or (more commonly) have some overlap
in the hardware. The fifth one is generalized by your series, without it
it's really architecture specific (as the other ones were one one point).
Are we happy with that structure in the long run? One of my earlier
comments on this series was that I thought it should be combined with
the clocksource registration, but upon talking to Baolin about it more,
I realized that this just follows the same structure that we have for the
others.
In theory, we could have a more abstract way of registering a clock
hardware that interfaces with any combination of the six subsystems
I mentioned above, with a superset of the subsystem specific structures
and a set of flags that indicate what a particular device is usable for.
Combining all six might be a bit too much (in particular rtc, though
it clearly overlaps the persistent-clk case), but what your general
ideas on where we should be heading? Is it worth reworking the
core kernel portion of the subsystems to simplify the individual
drivers?"
Baolin Wang (10):
time: Add persistent clock support
clocksource: sprd: Add one persistent timer for Spreadtrum platform
arm: omap: Convert 32K counter to use persistent clock
clocksource: tegra20_timer: Remove register_persistent_clock() API
arm: time: Remove the persistent clock support for ARM
clocksource: arm_arch_timer: Register the persistent clock
clocksource: timer-ti-32k: Register the persistent clock
clocksource: time-pistachio: Register the persistent clock
x86: tsc: Register the persistent clock
time: timekeeping: Remove time compensating from nonstop clocksources
arch/arm/include/asm/mach/time.h | 4 -
arch/arm/kernel/time.c | 36 -------
arch/arm/plat-omap/Kconfig | 1 +
arch/arm/plat-omap/counter_32k.c | 44 ++-------
arch/x86/Kconfig | 1 +
arch/x86/kernel/tsc.c | 16 +++
drivers/clocksource/Kconfig | 4 +
drivers/clocksource/arm_arch_timer.c | 10 ++
drivers/clocksource/tegra20_timer.c | 12 ++-
drivers/clocksource/time-pistachio.c | 3 +
drivers/clocksource/timer-sprd.c | 80 +++++++++++++++
drivers/clocksource/timer-ti-32k.c | 4 +
include/linux/persistent_clock.h | 21 ++++
kernel/time/Kconfig | 4 +
kernel/time/Makefile | 1 +
kernel/time/persistent_clock.c | 180 ++++++++++++++++++++++++++++++++++
kernel/time/timekeeping.c | 19 +---
17 files changed, 345 insertions(+), 95 deletions(-)
create mode 100644 include/linux/persistent_clock.h
create mode 100644 kernel/time/persistent_clock.c
--
1.7.9.5
^ permalink raw reply
* [RFC PATCH 01/10] time: Add persistent clock support
From: Baolin Wang @ 2018-05-14 8:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526285602.git.baolin.wang@linaro.org>
On our Spreadtrum SC9860 platform, we registered the high resolution
ARM generic timer as one clocksource to update the OS time, but the
ARM generic timer will be stopped in suspend state. So we use one 64bit
always-on timer (but low resolution) of Spreadtrum to calculate the
suspend time to compensate the OS time. Though we can register the
always-on timer as one clocksource, we need re-calculate the
mult/shift with one larger conversion range to calculate the suspend
time.
But now we have too many different ways of dealing with persistent
timekeeping across architectures, and there will be many duplicate
code if we register one timer to be one persistent clock. Thus it
will be more helpful if we add one common framework for timer drivers
to be registered as one persistent clock and implement the common
read_persistent_clock64() to compensate the OS time.
Moreover we can register the clocksource with CLOCK_SOURCE_SUSPEND_NONSTOP
to be one persistent clock, then we can simplify the suspend/resume
accounting by removing CLOCK_SOURCE_SUSPEND_NONSTOP timing. After that
we can only compensate the OS time by persistent clock or RTC.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
---
include/linux/persistent_clock.h | 21 +++++
kernel/time/Kconfig | 4 +
kernel/time/Makefile | 1 +
kernel/time/persistent_clock.c | 180 ++++++++++++++++++++++++++++++++++++++
4 files changed, 206 insertions(+)
create mode 100644 include/linux/persistent_clock.h
create mode 100644 kernel/time/persistent_clock.c
diff --git a/include/linux/persistent_clock.h b/include/linux/persistent_clock.h
new file mode 100644
index 0000000..4917980
--- /dev/null
+++ b/include/linux/persistent_clock.h
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0
+#ifndef __PERSISTENT_CLOCK_H__
+#define __PERSISTENT_CLOCK_H__
+
+#ifdef CONFIG_PERSISTENT_CLOCK
+extern int __init persistent_clock_init_and_register(u64 (*read)(void),
+ u64 mask, u32 freq,
+ u64 maxsec);
+extern void __init persistent_clock_cleanup(void);
+#else
+static inline int persistent_clock_init_and_register(u64 (*read)(void),
+ u64 mask, u32 freq,
+ u64 maxsec)
+{
+ return 0;
+}
+
+static inline void persistent_clock_cleanup(void) { }
+#endif
+
+#endif
diff --git a/kernel/time/Kconfig b/kernel/time/Kconfig
index 78eabc4..7188600 100644
--- a/kernel/time/Kconfig
+++ b/kernel/time/Kconfig
@@ -47,6 +47,10 @@ config GENERIC_CLOCKEVENTS_MIN_ADJUST
config GENERIC_CMOS_UPDATE
bool
+# Persistent clock support
+config PERSISTENT_CLOCK
+ bool
+
if GENERIC_CLOCKEVENTS
menu "Timers subsystem"
diff --git a/kernel/time/Makefile b/kernel/time/Makefile
index f1e46f3..f6d368f 100644
--- a/kernel/time/Makefile
+++ b/kernel/time/Makefile
@@ -18,3 +18,4 @@ obj-$(CONFIG_GENERIC_SCHED_CLOCK) += sched_clock.o
obj-$(CONFIG_TICK_ONESHOT) += tick-oneshot.o tick-sched.o
obj-$(CONFIG_DEBUG_FS) += timekeeping_debug.o
obj-$(CONFIG_TEST_UDELAY) += test_udelay.o
+obj-$(CONFIG_PERSISTENT_CLOCK) += persistent_clock.o
diff --git a/kernel/time/persistent_clock.c b/kernel/time/persistent_clock.c
new file mode 100644
index 0000000..1410cb3
--- /dev/null
+++ b/kernel/time/persistent_clock.c
@@ -0,0 +1,180 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2018 Linaro, Inc.
+ *
+ * Author: Baolin Wang <baolin.wang@linaro.org>
+ */
+
+#include <linux/alarmtimer.h>
+#include <linux/clocksource.h>
+#include <linux/persistent_clock.h>
+
+/**
+ * persistent_clock_read_data - data required to read persistent clock
+ * @read: Returns a cycle value from persistent clock.
+ * @last_cycles: Clock cycle value at last update.
+ * @last_ns: Time value (nanoseconds) at last update.
+ * @mask: Bitmask for two's complement subtraction of non 64bit clocks.
+ * @mult: Cycle to nanosecond multiplier.
+ * @shift: Cycle to nanosecond divisor.
+ */
+struct persistent_clock_read_data {
+ u64 (*read)(void);
+ u64 last_cycles;
+ u64 last_ns;
+ u64 mask;
+ u32 mult;
+ u32 shift;
+};
+
+/**
+ * persistent_clock - represent the persistent clock
+ * @read_data: Data required to read from persistent clock.
+ * @seq: Sequence counter for protecting updates.
+ * @freq: The frequency of the persistent clock.
+ * @wrap: Duration for persistent clock can run before wrapping.
+ * @alarm: Update timeout for persistent clock wrap.
+ */
+struct persistent_clock {
+ struct persistent_clock_read_data read_data;
+ seqcount_t seq;
+ u32 freq;
+ ktime_t wrap;
+ struct alarm alarm;
+};
+
+static struct persistent_clock p;
+
+void read_persistent_clock64(struct timespec64 *ts)
+{
+ struct persistent_clock_read_data *read_data = &p.read_data;
+ unsigned long seq;
+ u64 delta, nsecs;
+
+ if (!read_data->read) {
+ ts->tv_sec = 0;
+ ts->tv_nsec = 0;
+ return;
+ }
+
+ do {
+ seq = read_seqcount_begin(&p.seq);
+ delta = (read_data->read() - read_data->last_cycles) &
+ read_data->mask;
+
+ nsecs = read_data->last_ns +
+ clocksource_cyc2ns(delta, read_data->mult,
+ read_data->shift);
+ *ts = ns_to_timespec64(nsecs);
+ } while (read_seqcount_retry(&p.seq, seq));
+}
+
+static void persistent_clock_update(void)
+{
+ struct persistent_clock_read_data *read_data = &p.read_data;
+ u64 cycles, delta;
+
+ write_seqcount_begin(&p.seq);
+
+ cycles = read_data->read();
+ delta = (cycles - read_data->last_cycles) & read_data->mask;
+ read_data->last_ns += clocksource_cyc2ns(delta, read_data->mult,
+ read_data->shift);
+ read_data->last_cycles = cycles;
+
+ write_seqcount_end(&p.seq);
+}
+
+static enum alarmtimer_restart persistent_clock_alarm_fired(struct alarm *alarm,
+ ktime_t now)
+{
+ persistent_clock_update();
+
+ alarm_forward(&p.alarm, now, p.wrap);
+ return ALARMTIMER_RESTART;
+}
+
+int __init persistent_clock_init_and_register(u64 (*read)(void), u64 mask,
+ u32 freq, u64 maxsec)
+{
+ struct persistent_clock_read_data *read_data = &p.read_data;
+ u64 wrap, res, secs = maxsec;
+
+ if (!read || !mask || !freq)
+ return -EINVAL;
+
+ if (!secs) {
+ /*
+ * If the timer driver did not specify the maximum conversion
+ * seconds of the persistent clock, then we calculate the
+ * conversion range with the persistent clock's bits and
+ * frequency.
+ */
+ secs = mask;
+ do_div(secs, freq);
+
+ /*
+ * Some persistent counter can be larger than 32bit, so we
+ * need limit the max suspend time to have a good conversion
+ * precision. So 24 hours may be enough usually.
+ */
+ if (secs > 86400)
+ secs = 86400;
+ }
+
+ /* Calculate the mult/shift to convert cycles to ns. */
+ clocks_calc_mult_shift(&read_data->mult, &read_data->shift, freq,
+ NSEC_PER_SEC, (u32)secs);
+
+ /* Calculate how many nanoseconds until we risk wrapping. */
+ wrap = clocks_calc_max_nsecs(read_data->mult, read_data->shift, 0,
+ mask, NULL);
+ p.wrap = ns_to_ktime(wrap);
+
+ p.freq = freq;
+ read_data->mask = mask;
+ read_data->read = read;
+
+ persistent_clock_update();
+
+ /* Calculate the ns resolution of this persistent clock. */
+ res = clocksource_cyc2ns(1ULL, read_data->mult, read_data->shift);
+
+ pr_info("persistent clock: mask %llu at %uHz, resolution %lluns, wraps every %lluns\n",
+ mask, freq, res, wrap);
+ return 0;
+}
+
+void __init persistent_clock_cleanup(void)
+{
+ p.read_data.read = NULL;
+ alarm_cancel(&p.alarm);
+}
+
+static int __init persistent_clock_start_alarmtimer(void)
+{
+ struct persistent_clock_read_data *read_data = &p.read_data;
+ ktime_t now;
+
+ /*
+ * If no persistent clock function has been provided at that point,
+ * just return.
+ */
+ if (!read_data->read)
+ return 0;
+
+ persistent_clock_update();
+
+ /*
+ * Since the persistent clock will not be stopped when system enters the
+ * suspend state, thus we need start one alarmtimer to wakeup the system
+ * to update the persistent clock before wrapping. We should start the
+ * update alarmtimer after the alarmtimer subsystem was initialized.
+ */
+ alarm_init(&p.alarm, ALARM_BOOTTIME, persistent_clock_alarm_fired);
+ now = ktime_get_boottime();
+ alarm_start(&p.alarm, ktime_add(now, p.wrap));
+
+ return 0;
+}
+late_initcall(persistent_clock_start_alarmtimer);
--
1.7.9.5
^ permalink raw reply related
* [RFC PATCH 02/10] clocksource: sprd: Add one persistent timer for Spreadtrum platform
From: Baolin Wang @ 2018-05-14 8:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526285602.git.baolin.wang@linaro.org>
On Spreadtrum SC9860 platform, we need one persistent timer to calculate
the suspend time to compensate the OS time.
This patch registers one Spreadtrum AON timer as persistent timer, which
runs at 32bit and periodic mode.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
---
drivers/clocksource/Kconfig | 1 +
drivers/clocksource/timer-sprd.c | 80 ++++++++++++++++++++++++++++++++++++++
2 files changed, 81 insertions(+)
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 8e8a097..d7dddcc 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -453,6 +453,7 @@ config SPRD_TIMER
bool "Spreadtrum timer driver" if COMPILE_TEST
depends on HAS_IOMEM
select TIMER_OF
+ select PERSISTENT_CLOCK
help
Enables support for the Spreadtrum timer driver.
diff --git a/drivers/clocksource/timer-sprd.c b/drivers/clocksource/timer-sprd.c
index ef9ebea..c6f657a 100644
--- a/drivers/clocksource/timer-sprd.c
+++ b/drivers/clocksource/timer-sprd.c
@@ -3,8 +3,11 @@
* Copyright (C) 2017 Spreadtrum Communications Inc.
*/
+#include <linux/clk.h>
#include <linux/init.h>
#include <linux/interrupt.h>
+#include <linux/of_address.h>
+#include <linux/persistent_clock.h>
#include "timer-of.h"
@@ -157,3 +160,80 @@ static int __init sprd_timer_init(struct device_node *np)
}
TIMER_OF_DECLARE(sc9860_timer, "sprd,sc9860-timer", sprd_timer_init);
+
+void __iomem *pbase;
+
+static u64 sprd_persistent_timer_read(void)
+{
+ return ~(u64)readl_relaxed(pbase + TIMER_VALUE_SHDW_LO) &
+ CLOCKSOURCE_MASK(32);
+}
+
+static void sprd_persistent_timer_disable(void)
+{
+ sprd_timer_disable(pbase);
+}
+
+static void sprd_persistent_timer_enable(void)
+{
+ sprd_timer_disable(pbase);
+ sprd_timer_update_counter(pbase, TIMER_VALUE_LO_MASK);
+ sprd_timer_enable(pbase, TIMER_CTL_PERIOD_MODE);
+}
+
+static int __init sprd_persistent_timer_init(struct device_node *np)
+{
+ struct clk *clk;
+ u32 freq;
+ int ret;
+
+ clk = of_clk_get(np, 0);
+ if (IS_ERR(clk)) {
+ pr_err("Can't get timer clock for %pOF\n", np);
+ return PTR_ERR(clk);
+ }
+
+ ret = clk_prepare_enable(clk);
+ if (ret) {
+ pr_err("Failed to enable clock for %pOF\n", np);
+ clk_put(clk);
+ return ret;
+ }
+
+ freq = clk_get_rate(clk);
+ if (!freq) {
+ pr_err("Failed to get clock rate for %pOF\n", np);
+ ret = -EINVAL;
+ goto clk_rate_err;
+ }
+
+ pbase = of_io_request_and_map(np, 0, of_node_full_name(np));
+ if (IS_ERR(pbase)) {
+ pr_err("Can't map timer registers for %pOF\n", np);
+ ret = PTR_ERR(pbase);
+ goto clk_rate_err;
+ }
+
+ sprd_persistent_timer_enable();
+
+ ret = persistent_clock_init_and_register(sprd_persistent_timer_read,
+ CLOCKSOURCE_MASK(32), freq, 0);
+ if (ret) {
+ pr_err("Failed to register persistent clock for %pOF\n", np);
+ goto persist_err;
+ }
+
+ return 0;
+
+persist_err:
+ sprd_persistent_timer_disable();
+ iounmap(pbase);
+clk_rate_err:
+ clk_disable_unprepare(clk);
+ clk_put(clk);
+
+ return ret;
+}
+
+TIMER_OF_DECLARE(sc9860_persistent_timer, "sprd,sc9860-persistent-timer",
+ sprd_persistent_timer_init);
--
1.7.9.5
^ permalink raw reply related
* [RFC PATCH 03/10] arm: omap: Convert 32K counter to use persistent clock
From: Baolin Wang @ 2018-05-14 8:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526285602.git.baolin.wang@linaro.org>
We have introduced the persistent clock framework to support the OS time
compensating from persistent clock, so this patch converts the 32k counter
to use persistent clock framework to save lots of duplicate code.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
---
arch/arm/plat-omap/Kconfig | 1 +
arch/arm/plat-omap/counter_32k.c | 44 ++++++--------------------------------
2 files changed, 8 insertions(+), 37 deletions(-)
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index afc1a1d..0e4e385 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -1,5 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
config ARCH_OMAP
+ select PERSISTENT_CLOCK
bool
if ARCH_OMAP
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index 2438b96..5d52f7c 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -19,8 +19,7 @@
#include <linux/io.h>
#include <linux/clocksource.h>
#include <linux/sched_clock.h>
-
-#include <asm/mach/time.h>
+#include <linux/persistent_clock.h>
#include <plat/counter-32k.h>
@@ -44,33 +43,6 @@ static u64 notrace omap_32k_read_sched_clock(void)
}
/**
- * omap_read_persistent_clock64 - Return time from a persistent clock.
- *
- * Reads the time from a source which isn't disabled during PM, the
- * 32k sync timer. Convert the cycles elapsed since last read into
- * nsecs and adds to a monotonically increasing timespec64.
- */
-static struct timespec64 persistent_ts;
-static cycles_t cycles;
-static unsigned int persistent_mult, persistent_shift;
-
-static void omap_read_persistent_clock64(struct timespec64 *ts)
-{
- unsigned long long nsecs;
- cycles_t last_cycles;
-
- last_cycles = cycles;
- cycles = sync32k_cnt_reg ? readl_relaxed(sync32k_cnt_reg) : 0;
-
- nsecs = clocksource_cyc2ns(cycles - last_cycles,
- persistent_mult, persistent_shift);
-
- timespec64_add_ns(&persistent_ts, nsecs);
-
- *ts = persistent_ts;
-}
-
-/**
* omap_init_clocksource_32k - setup and register counter 32k as a
* kernel clocksource
* @pbase: base addr of counter_32k module
@@ -95,13 +67,6 @@ int __init omap_init_clocksource_32k(void __iomem *vbase)
else
sync32k_cnt_reg = vbase + OMAP2_32KSYNCNT_CR_OFF_LOW;
- /*
- * 120000 rough estimate from the calculations in
- * __clocksource_update_freq_scale.
- */
- clocks_calc_mult_shift(&persistent_mult, &persistent_shift,
- 32768, NSEC_PER_SEC, 120000);
-
ret = clocksource_mmio_init(sync32k_cnt_reg, "32k_counter", 32768,
250, 32, clocksource_mmio_readl_up);
if (ret) {
@@ -110,7 +75,12 @@ int __init omap_init_clocksource_32k(void __iomem *vbase)
}
sched_clock_register(omap_32k_read_sched_clock, 32, 32768);
- register_persistent_clock(NULL, omap_read_persistent_clock64);
+ /*
+ * 120000 rough estimate from the calculations in
+ * __clocksource_update_freq_scale.
+ */
+ persistent_clock_init_and_register(omap_32k_read_sched_clock,
+ CLOCKSOURCE_MASK(32), 32768, 120000);
pr_info("OMAP clocksource: 32k_counter at 32768 Hz\n");
return 0;
--
1.7.9.5
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* [RFC PATCH 04/10] clocksource: tegra20_timer: Remove register_persistent_clock() API
From: Baolin Wang @ 2018-05-14 8:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526285602.git.baolin.wang@linaro.org>
We will convert all drivers to use persistent clock framework to compensate
the suspend time for OS time, instead of using the register_persistent_clock()
API in ARM architecture.
So this patch removes the register_persistent_clock() and implement its
function to read persistent clock.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
---
drivers/clocksource/tegra20_timer.c | 12 +++++++++---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/clocksource/tegra20_timer.c b/drivers/clocksource/tegra20_timer.c
index c337a81..97a34cb 100644
--- a/drivers/clocksource/tegra20_timer.c
+++ b/drivers/clocksource/tegra20_timer.c
@@ -124,7 +124,7 @@ static u64 tegra_rtc_read_ms(void)
}
/*
- * tegra_read_persistent_clock64 - Return time from a persistent clock.
+ * read_persistent_clock64 - Return time from a persistent clock.
*
* Reads the time from a source which isn't disabled during PM, the
* 32k sync timer. Convert the cycles elapsed since last read into
@@ -133,10 +133,16 @@ static u64 tegra_rtc_read_ms(void)
* tegra_rtc driver could be executing to avoid race conditions
* on the RTC shadow register
*/
-static void tegra_read_persistent_clock64(struct timespec64 *ts)
+void read_persistent_clock64(struct timespec64 *ts)
{
u64 delta;
+ if (!rtc_base) {
+ ts->tv_sec = 0;
+ ts->tv_nsec = 0;
+ return;
+ }
+
last_persistent_ms = persistent_ms;
persistent_ms = tegra_rtc_read_ms();
delta = persistent_ms - last_persistent_ms;
@@ -259,6 +265,6 @@ static int __init tegra20_init_rtc(struct device_node *np)
else
clk_prepare_enable(clk);
- return register_persistent_clock(NULL, tegra_read_persistent_clock64);
+ return 0;
}
TIMER_OF_DECLARE(tegra20_rtc, "nvidia,tegra20-rtc", tegra20_init_rtc);
--
1.7.9.5
^ permalink raw reply related
* [RFC PATCH 05/10] arm: time: Remove the persistent clock support for ARM
From: Baolin Wang @ 2018-05-14 8:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526285602.git.baolin.wang@linaro.org>
We have converted all drivers to use common persistent clock framework
to compensate the suspend time, so we can remove the persistent clock,
which only supports the ARM architecture.
Moreover there are no drivers will register read_boot_clock64(), so
remove it too.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
---
arch/arm/include/asm/mach/time.h | 4 ----
arch/arm/kernel/time.c | 36 ------------------------------------
2 files changed, 40 deletions(-)
diff --git a/arch/arm/include/asm/mach/time.h b/arch/arm/include/asm/mach/time.h
index 0f79e4d..3cbcafc 100644
--- a/arch/arm/include/asm/mach/time.h
+++ b/arch/arm/include/asm/mach/time.h
@@ -12,8 +12,4 @@
extern void timer_tick(void);
-typedef void (*clock_access_fn)(struct timespec64 *);
-extern int register_persistent_clock(clock_access_fn read_boot,
- clock_access_fn read_persistent);
-
#endif
diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c
index cf2701c..713905c 100644
--- a/arch/arm/kernel/time.c
+++ b/arch/arm/kernel/time.c
@@ -76,42 +76,6 @@ void timer_tick(void)
}
#endif
-static void dummy_clock_access(struct timespec64 *ts)
-{
- ts->tv_sec = 0;
- ts->tv_nsec = 0;
-}
-
-static clock_access_fn __read_persistent_clock = dummy_clock_access;
-static clock_access_fn __read_boot_clock = dummy_clock_access;
-
-void read_persistent_clock64(struct timespec64 *ts)
-{
- __read_persistent_clock(ts);
-}
-
-void read_boot_clock64(struct timespec64 *ts)
-{
- __read_boot_clock(ts);
-}
-
-int __init register_persistent_clock(clock_access_fn read_boot,
- clock_access_fn read_persistent)
-{
- /* Only allow the clockaccess functions to be registered once */
- if (__read_persistent_clock == dummy_clock_access &&
- __read_boot_clock == dummy_clock_access) {
- if (read_boot)
- __read_boot_clock = read_boot;
- if (read_persistent)
- __read_persistent_clock = read_persistent;
-
- return 0;
- }
-
- return -EINVAL;
-}
-
void __init time_init(void)
{
if (machine_desc->init_time) {
--
1.7.9.5
^ permalink raw reply related
* [RFC PATCH 06/10] clocksource: arm_arch_timer: Register the persistent clock
From: Baolin Wang @ 2018-05-14 8:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1526285602.git.baolin.wang@linaro.org>
Register the persistent clock to compensate the suspend time for OS time,
if the ARM counter clocksource will not be stopped in suspend state.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
---
drivers/clocksource/Kconfig | 1 +
drivers/clocksource/arm_arch_timer.c | 10 ++++++++++
2 files changed, 11 insertions(+)
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index d7dddcc..884719c 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -308,6 +308,7 @@ config ARC_TIMERS_64BIT
config ARM_ARCH_TIMER
bool
+ select PERSISTENT_CLOCK
select TIMER_OF if OF
select TIMER_ACPI if ACPI
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index 57cb2f0..671be63 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -32,6 +32,7 @@
#include <asm/virt.h>
#include <clocksource/arm_arch_timer.h>
+#include <linux/persistent_clock.h>
#undef pr_fmt
#define pr_fmt(fmt) "arch_timer: " fmt
@@ -950,6 +951,15 @@ static void __init arch_counter_register(unsigned type)
/* 56 bits minimum, so we assume worst case rollover */
sched_clock_register(arch_timer_read_counter, 56, arch_timer_rate);
+
+ /*
+ * Register the persistent clock if the clocksource will not be stopped
+ * in suspend state.
+ */
+ if (!arch_counter_suspend_stop)
+ persistent_clock_init_and_register(arch_timer_read_counter,
+ CLOCKSOURCE_MASK(56),
+ arch_timer_rate, 0);
}
static void arch_timer_stop(struct clock_event_device *clk)
--
1.7.9.5
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