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* Re: [PATCH v2] KVM: arm64: Add KVM_CAP to control WFx trapping
From: Colton Lewis @ 2024-03-25 20:12 UTC (permalink / raw)
  To: Quentin Perret
  Cc: kvm, maz, oliver.upton, james.morse, suzuki.poulose, yuzenghui,
	catalin.marinas, will, pbonzini, mingo, peterz, juri.lelli,
	vincent.guittot, dietmar.eggemann, rostedt, bsegall, mgorman,
	bristot, vschneid, linux-arm-kernel, kvmarm, linux-kernel
In-Reply-To: <Zf2W-8duBlCk5LVm@google.com>

Thanks for the feedback.

Quentin Perret <qperret@google.com> writes:

> On Friday 22 Mar 2024 at 14:24:35 (+0000), Quentin Perret wrote:
>> On Tuesday 19 Mar 2024 at 16:43:41 (+0000), Colton Lewis wrote:
>> > Add a KVM_CAP to control WFx (WFI or WFE) trapping based on scheduler
>> > runqueue depth. This is so they can be passed through if the runqueue
>> > is shallow or the CPU has support for direct interrupt injection. They
>> > may be always trapped by setting this value to 0. Technically this
>> > means traps will be cleared when the runqueue depth is 0, but that
>> > implies nothing is running anyway so there is no reason to care. The
>> > default value is 1 to preserve previous behavior before adding this
>> > option.

>> I recently discovered that this was enabled by default, but it's not
>> obvious to me everyone will want this enabled, so I'm in favour of
>> figuring out a way to turn it off (in fact we might want to make this
>> feature opt in as the status quo used to be to always trap).

Setting the introduced threshold to zero will cause it to trap whenever
something is running. Is there a problem with doing it that way?

I'd also be interested to get more input before changing the current
default behavior.


>> There are a few potential issues I see with having this enabled:

>>   - a lone vcpu thread on a CPU will completely screw up the host
>>     scheduler's load tracking metrics if the vCPU actually spends a
>>     significant amount of time in WFI (the PELT signal will no longer
>>     be a good proxy for "how much CPU time does this task need");

>>   - the scheduler's decision will impact massively the behaviour of the
>>     vcpu task itself. Co-scheduling a task with a vcpu task (or not) will
>>     impact massively the perceived behaviour of the vcpu task in a way
>>     that is entirely unpredictable to the scheduler;

>>   - while the above problems might be OK for some users, I don't think
>>     this will always be true, e.g. when running on big.LITTLE systems the
>>     above sounds nightmare-ish;

>>   - the guest spending long periods of time in WFI prevents the host from
>>     being able to enter deeper idle states, which will impact power very
>>     negatively;

>> And probably a whole bunch of other things.

>> > Think about his option as a threshold. The instruction will be trapped
>> > if the runqueue depth is higher than the threshold.

>> So talking about the exact interface, I'm not sure exposing this to
>> userspace is really appropriate. The current rq depth is next to
>> impossible for userspace to control well.

Using runqueue depth is going off of a suggestion from Oliver [1], who I've
also talked to internally at Google a few times about this.

But hearing your comment makes me lean more towards having some
enumeration of behaviors like TRAP_ALWAYS, TRAP_NEVER,
TRAP_IF_MULTIPLE_TASKS.

>> My gut feeling tells me we might want to gate all of this on
>> PREEMPT_FULL instead, since PREEMPT_FULL is pretty much a way to say
>> "I'm willing to give up scheduler tracking accuracy to gain throughput
>> when I've got a task running alone on a CPU". Thoughts?

> And obviously I meant s/PREEMPT_FULL/NOHZ_FULL, but hopefully that was
> clear :-)

Sounds good to me but I've not touched anything scheduling related before.

[1] https://lore.kernel.org/kvmarm/Zbgx8hZgWCmtzMjH@linux.dev/

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* Re: [PATCH 1/2] dt-bindings: arm64: marvell: add solidrun cn9130 clearfog boards
From: Josua Mayer @ 2024-03-25 20:12 UTC (permalink / raw)
  To: Krzysztof Kozlowski, Andrew Lunn, Gregory Clement,
	Sebastian Hesselbarth, Rob Herring, Krzysztof Kozlowski,
	Conor Dooley
  Cc: Yazan Shhady, linux-arm-kernel@lists.infradead.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
In-Reply-To: <e1836cb6-64cd-4866-9c0a-f0dda096aa18@linaro.org>

Am 25.03.24 um 20:34 schrieb Krzysztof Kozlowski:
> On 22/03/2024 11:08, Josua Mayer wrote:
>> Am 21.03.24 um 22:47 schrieb Josua Mayer:
>>> Add bindings for SolidRun Clearfog boards, using a new SoM based on
>>> CN9130 SoC.
>>> The carrier boards are identical to the older Armada 388 based Clearfog
>>> boards. For consistency the carrier part of compatible strings are
>>> copied, including the established "-a1" suffix.
>>>
>>> Signed-off-by: Josua Mayer <josua@solid-run.com>
>>> ---
>>>  .../devicetree/bindings/arm/marvell/armada-7k-8k.yaml        | 12 ++++++++++++
>>>  1 file changed, 12 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml b/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
>>> index 16d2e132d3d1..36bdfd1bedd9 100644
>>> --- a/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
>>> +++ b/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
>>> @@ -82,4 +82,16 @@ properties:
>>>            - const: marvell,armada-ap807-quad
>>>            - const: marvell,armada-ap807
>>>  
>>> +      - description:
>>> +          SolidRun CN9130 clearfog family single-board computers
>>> +        items:
>>> +          - enum:
>>> +              - solidrun,clearfog-base-a1
>>> +              - solidrun,clearfog-pro-a1
>>> +          - const: solidrun,clearfog-a1
>>> +          - const: solidrun,cn9130-sr-som
>>> +          - const: marvell,cn9130
>>> +          - const: marvell,armada-ap807-quad
>>> +          - const: marvell,armada-ap807
>>> +
>>>  additionalProperties: true
>> Before merging I would like some feedback about adding
>> another product later, to ensure the compatibles above
>> are adequate? In particular:
>> - sequence of soc, cp, carrier compatibles
>> - name of som compatible
>>
>> Draft for future bindings:
>>       - description:
>>           SolidRun CN9130 SoM based single-board computers
>>           with 1 external CP on the Carrier.
>>         items:
>>           - enum:
>>               - solidrun,cn9131-solidwan
>>           - const: marvell,cn9131
>>           - const: solidrun,cn9130-sr-som
> This does not look correct. cn9131 is not compatible with your som.
This is partially my question.
I considered changing the som to "cn913x-sr-som".

The SoM itself is always 9130, it contains the base SoC
with 1x AP and 1x CP in a single chip.
9131 and 9132 <happen> on the carrier boards.

>
>>           - const: marvell,cn9130
> SoCs are compatible only in some cases, e.g. one is a subset of another
> like stripped out of modem. Are you sure this is your case?
This is more complex, CN9131 and CN9132 are not single SoCs.
A "9132" is instantiated by connecting two southbridge chips
via a Marvell defined bus, each providing additional IO
such as network, i2c, gpio.

Note that even the first, "9130", while a single chip, contains two dies:
An "AP" (Application Processor I assume) with very limited IO (1xsdio, 1xi2c),
and a "CP" (Communication Processor I assume) with lots of IO.
This CP as far as I know today is identical to the southbridges
mentioned above.

>>           - const: marvell,armada-ap807-quad
>>           - const: marvell,armada-ap807
> Anyway, 6 compatibles is beyond useful amount. What are you expressing
> here?
I copied this part from the examples earlier in the file, such as:
      - description: Armada CN9132 SoC with two external CPs
        items:
          - const: marvell,cn9132
          - const: marvell,cn9131
          - const: marvell,cn9130
          - const: marvell,armada-ap807-quad
          - const: marvell,armada-ap807
>  Why is this even armada ap807?
We noticed ap807 != ap806 (cn913x != 8040),
because the thermal sensor coefficients converting
raw values to celsius differed.
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* Re: [PATCH 2/2] ARM: dts: qcom: Add support for Motorola Moto G (2013)
From: Stanislav Jakubek @ 2024-03-25 20:25 UTC (permalink / raw)
  To: Konrad Dybcio
  Cc: Bjorn Andersson, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
	linux-arm-msm, devicetree, linux-arm-kernel, phone-devel,
	linux-kernel
In-Reply-To: <ffa93b4a-608a-4cf5-b111-0d1f8520afdd@linaro.org>

On Mon, Mar 25, 2024 at 08:28:27PM +0100, Konrad Dybcio wrote:
> On 24.03.2024 3:04 PM, Stanislav Jakubek wrote:
> > Add a device tree for the Motorola Moto G (2013) smartphone based
> > on the Qualcomm MSM8226 SoC.
> > 
> > Initially supported features:
> >   - Buttons (Volume Down/Up, Power)
> >   - eMMC
> >   - Hall Effect Sensor
> >   - SimpleFB display
> >   - TMP108 temperature sensor
> >   - Vibrator
> > 
> > Signed-off-by: Stanislav Jakubek <stano.jakubek@gmail.com>
> > ---
> 
> [...]
> 
> > +		hob-ram@f500000 {
> > +			reg = <0x0f500000 0x40000>,
> > +			      <0x0f540000 0x2000>;
> > +			no-map;
> > +		};
> 
> Any reason it's in two parts? Should it be one contiguous region, or
> two separate nodes?
> 
> lgtm otherwise

Hi Konrad, I copied this from downstream as-is.
According to the downstream docs [1]:

HOB RAM MMAP Device provides ability for userspace to access the
hand over block memory to read out modem related parameters.

And the two regs are the "DHOB partition" and "SHOB partition".

I suppose this is something Motorola (firmware?) specific (since the
downstream compatible is mmi,hob_ram [2]).
Should I split this into 2 nodes - dhob@f500000 and shob@f540000?

Stanislav

[1] https://github.com/LineageOS/android_kernel_motorola_msm8226/blob/cm-14.1/Documentation/devicetree/bindings/misc/hob_ram.txt
[2] https://github.com/LineageOS/android_kernel_motorola_msm8226/blob/cm-14.1/arch/arm/boot/dts/msm8226-moto-common.dtsi#L258

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* [PATCH 1/5] dt-bindings: iio: dac: ti,dac5571: Add DAC081C081 support
From: Laurent Pinchart @ 2024-03-25 20:32 UTC (permalink / raw)
  To: devicetree, imx, linux-arm-kernel
  Cc: Trevor Zaharichuk, Greg Lytle, Jonathan Cameron,
	Lars-Peter Clausen, Rob Herring, Krzysztof Kozlowski,
	Conor Dooley, Sean Nyekjaer, linux-iio
In-Reply-To: <20240325203245.31660-1-laurent.pinchart@ideasonboard.com>

The DAC081C081 is a TI DAC whose software interface is compatible with
the DAC5571. It is the 8-bit version of the DAC121C081, already
supported by the DAC5571 bindings. Extends the bindings to support this
chip.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
 Documentation/devicetree/bindings/iio/dac/ti,dac5571.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/iio/dac/ti,dac5571.yaml b/Documentation/devicetree/bindings/iio/dac/ti,dac5571.yaml
index 79da0323c327..e59db861e2eb 100644
--- a/Documentation/devicetree/bindings/iio/dac/ti,dac5571.yaml
+++ b/Documentation/devicetree/bindings/iio/dac/ti,dac5571.yaml
@@ -21,6 +21,7 @@ properties:
       - ti,dac5573
       - ti,dac6573
       - ti,dac7573
+      - ti,dac081c081
       - ti,dac121c081
 
   reg:
-- 
Regards,

Laurent Pinchart


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* [PATCH 2/5] iio: dac: ti-dac5571: Add DAC081C081 support
From: Laurent Pinchart @ 2024-03-25 20:32 UTC (permalink / raw)
  To: devicetree, imx, linux-arm-kernel
  Cc: Trevor Zaharichuk, Greg Lytle, Jonathan Cameron,
	Lars-Peter Clausen, Sean Nyekjaer, linux-iio
In-Reply-To: <20240325203245.31660-1-laurent.pinchart@ideasonboard.com>

The DAC081C081 is a TI DAC whose software interface is compatible with
the DAC5571. It is the 8-bit version of the DAC121C081, already
supported by the DAC5571 driver. Extends the driver to support this
chip.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
 drivers/iio/dac/ti-dac5571.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/iio/dac/ti-dac5571.c b/drivers/iio/dac/ti-dac5571.c
index efb1269a77c1..c5162b72951a 100644
--- a/drivers/iio/dac/ti-dac5571.c
+++ b/drivers/iio/dac/ti-dac5571.c
@@ -13,6 +13,7 @@
  * https://www.ti.com/lit/ds/symlink/dac5573.pdf
  * https://www.ti.com/lit/ds/symlink/dac6573.pdf
  * https://www.ti.com/lit/ds/symlink/dac7573.pdf
+ * https://www.ti.com/lit/ds/symlink/dac081c081.pdf
  * https://www.ti.com/lit/ds/symlink/dac121c081.pdf
  */
 
@@ -386,6 +387,7 @@ static void dac5571_remove(struct i2c_client *i2c)
 }
 
 static const struct of_device_id dac5571_of_id[] = {
+	{.compatible = "ti,dac081c081", .data = &dac5571_spec[single_8bit] },
 	{.compatible = "ti,dac121c081", .data = &dac5571_spec[single_12bit] },
 	{.compatible = "ti,dac5571", .data = &dac5571_spec[single_8bit] },
 	{.compatible = "ti,dac6571", .data = &dac5571_spec[single_10bit] },
@@ -401,6 +403,7 @@ static const struct of_device_id dac5571_of_id[] = {
 MODULE_DEVICE_TABLE(of, dac5571_of_id);
 
 static const struct i2c_device_id dac5571_id[] = {
+	{"dac081c081", (kernel_ulong_t)&dac5571_spec[single_8bit] },
 	{"dac121c081", (kernel_ulong_t)&dac5571_spec[single_12bit] },
 	{"dac5571", (kernel_ulong_t)&dac5571_spec[single_8bit] },
 	{"dac6571", (kernel_ulong_t)&dac5571_spec[single_10bit] },
-- 
Regards,

Laurent Pinchart


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* [PATCH 3/5] dt-bindings: vendor-prefix: Add prefix for Au-Zone Technologies
From: Laurent Pinchart @ 2024-03-25 20:32 UTC (permalink / raw)
  To: devicetree, imx, linux-arm-kernel
  Cc: Trevor Zaharichuk, Greg Lytle, Rob Herring, Krzysztof Kozlowski,
	Conor Dooley
In-Reply-To: <20240325203245.31660-1-laurent.pinchart@ideasonboard.com>

Au-Zone Technologies is a company that designs and manufactures products
for AI vision applications. Add a DT vendor prefix for it.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
 Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index b97d298b3eb6..fce3d80c3d34 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -180,6 +180,8 @@ patternProperties:
     description: AU Optronics Corporation
   "^auvidea,.*":
     description: Auvidea GmbH
+  "^au-zone,.*":
+    description: Au-Zone Technologies
   "^avago,.*":
     description: Avago Technologies
   "^avia,.*":
-- 
Regards,

Laurent Pinchart


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* [PATCH 4/5] dt-bindings: arm: Add Au-Zone Maivin AI Vision Starter Kit
From: Laurent Pinchart @ 2024-03-25 20:32 UTC (permalink / raw)
  To: devicetree, imx, linux-arm-kernel
  Cc: Trevor Zaharichuk, Greg Lytle, Rob Herring, Krzysztof Kozlowski,
	Conor Dooley, Shawn Guo, Li Yang
In-Reply-To: <20240325203245.31660-1-laurent.pinchart@ideasonboard.com>

The Maivin board is an AI vision starter kit sold by Au-Zone
Technologies, developed in collaboration with Toradex and Vision
Components. It is based on a Toradex Verdin i.MX8MP SoM.

Add a corresponding compatible string.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
 Documentation/devicetree/bindings/arm/fsl.yaml | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
index 0027201e19f8..d892c4f9fda3 100644
--- a/Documentation/devicetree/bindings/arm/fsl.yaml
+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
@@ -1064,6 +1064,13 @@ properties:
               - toradex,verdin-imx8mp-wifi  # Verdin iMX8M Plus Wi-Fi / BT Modules
           - const: fsl,imx8mp
 
+      - description: Au-Zone Technologies i.MX8MP-based boards
+        items:
+          - const: au-zone,maivin-starter-kit        # Au-Zone Maivin AI Vision Starter Kit
+          - const: toradex,verdin-imx8mp-nonwifi     # Verdin iMX8M Plus Module without Wi-Fi / BT
+          - const: toradex,verdin-imx8mp             # Verdin iMX8M Plus Module
+          - const: fsl,imx8mp
+
       - description: Avnet (MSC Branded) Boards with SM2S i.MX8M Plus Modules
         items:
           - const: avnet,sm2s-imx8mp-14N0600E-ep1 # SM2S-IMX8PLUS-14N0600E on SM2-MB-EP1 Carrier Board
-- 
Regards,

Laurent Pinchart


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* [PATCH 0/5] arm64: dts: Add device tree source for the Au-Zone Maivin AI Vision Starter Kit
From: Laurent Pinchart @ 2024-03-25 20:32 UTC (permalink / raw)
  To: devicetree, imx, linux-arm-kernel
  Cc: Trevor Zaharichuk, Greg Lytle, Conor Dooley, Fabio Estevam,
	Jonathan Cameron, Krzysztof Kozlowski, Lars-Peter Clausen,
	linux-iio, Li Yang, Pengutronix Kernel Team, Rob Herring,
	Sascha Hauer, Sean Nyekjaer, Shawn Guo

Hello,

This patch series adds device tree sources for the Maivin AI Vision
Starter Kit developed by Au-Zone Technologies in collaboration with
Toradex and Vision Components ([1]).

The first two patches add a new compatible string for the DAC081C081
present on the board to the dac5571 DT bindings and driver. Patch 3/5
then adds a new vendor prefix for Au-Zone, and patch 4/5 adds the board
to the arm/fsl.yaml DT bindings. Finally, patch 5/5 adds support for the
board.

[1] https://www.toradex.com/maivin-modular-full-stack-ai-vision-system

Laurent Pinchart (5):
  dt-bindings: iio: dac: ti,dac5571: Add DAC081C081 support
  iio: dac: ti-dac5571: Add DAC081C081 support
  dt-bindings: vendor-prefix: Add prefix for Au-Zone Technologies
  dt-bindings: arm: Add Au-Zone Maivin AI Vision Starter Kit
  arm64: dts: Add device tree source for the Au-Zone Maivin Starter Kit

 .../devicetree/bindings/arm/fsl.yaml          |   7 +
 .../bindings/iio/dac/ti,dac5571.yaml          |   1 +
 .../devicetree/bindings/vendor-prefixes.yaml  |   2 +
 arch/arm64/boot/dts/freescale/Makefile        |   1 +
 .../boot/dts/freescale/imx8mp-maivin.dts      | 236 ++++++++++++++++++
 drivers/iio/dac/ti-dac5571.c                  |   3 +
 6 files changed, 250 insertions(+)
 create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-maivin.dts


base-commit: 4cece764965020c22cff7665b18a012006359095
-- 
Regards,

Laurent Pinchart


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* [PATCH 5/5] arm64: dts: Add device tree source for the Au-Zone Maivin Starter Kit
From: Laurent Pinchart @ 2024-03-25 20:32 UTC (permalink / raw)
  To: devicetree, imx, linux-arm-kernel
  Cc: Trevor Zaharichuk, Greg Lytle, Shawn Guo, Sascha Hauer,
	Pengutronix Kernel Team, Fabio Estevam, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley
In-Reply-To: <20240325203245.31660-1-laurent.pinchart@ideasonboard.com>

The Maivin board is an AI vision starter kit sold by Au-Zone
Technologies, developed in collaboration with Toradex and Vision
Components. It is based on a Toradex Verdin i.MX8MP SoM.

Add a device tree that covers the base set the peripherals found on the
board:

- Ethernet
- USB
- SD card slot
- CAN and serial ports (RS232 and RS485)
- DACs, EEPROMs, temperature sensor
- PCI M.2 and CSI regulators

An additional pinctrl group is included for the M.2 modem, but hasn't
been tested due to lack of compatible hardware.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
 arch/arm64/boot/dts/freescale/Makefile        |   1 +
 .../boot/dts/freescale/imx8mp-maivin.dts      | 236 ++++++++++++++++++
 2 files changed, 237 insertions(+)
 create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-maivin.dts

diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 045250d0a040..03af8c242649 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -165,6 +165,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk2.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk3.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-icore-mx8mp-edimm2.2.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8mp-maivin.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-msc-sm2s-ep1.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-hdmi.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-maivin.dts b/arch/arm64/boot/dts/freescale/imx8mp-maivin.dts
new file mode 100644
index 000000000000..2d1c8e782465
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-maivin.dts
@@ -0,0 +1,236 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Copyright 2021 Au-Zone Technologies
+ * Copyright 2024 Ideas on Board
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/linux-event-codes.h>
+#include <dt-bindings/leds/common.h>
+
+#include "imx8mp-verdin.dtsi"
+#include "imx8mp-verdin-nonwifi.dtsi"
+
+/ {
+	model = "Au-Zone Maivin AI Vision Starter Kit";
+	compatible = "au-zone,maivin-starter-kit",
+		     "toradex,verdin-imx8mp-nonwifi",
+		     "toradex,verdin-imx8mp",
+		     "fsl,imx8mp";
+
+	gpio-keys {
+		compatible = "gpio-keys";
+		pinctrl-0 = <&pinctrl_sw1>;
+
+		button-0 {
+			label = "SW1";
+			linux,code = <BTN_MISC>;
+			interrupts-extended = <&gpio3 16 IRQ_TYPE_LEVEL_LOW>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		pinctrl-0 = <&pinctrl_led>;
+
+		led-0 {
+			color = <LED_COLOR_ID_BLUE>;
+			function = LED_FUNCTION_STATUS;
+			linux,default-trigger = "heartbeat";
+			gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	csi_3v3: regulator-csi-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "CSI_3V3";
+		pinctrl-0 = <&pinctrl_csi_3v3>;
+		gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		startup-delay-us = <50000>;	/* TODO: Determine the right value */
+	};
+
+	m2_3v3: regulator-m2-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "M2_3V3";
+		regulator-max-microvolt = <3300000>;
+		regulator-min-microvolt = <3300000>;
+		pinctrl-0 = <&pinctrl_m2_3v3>;
+		gpio = <&gpio3 1 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+
+	/* Carrier Board Supply 3V3_SW */
+	reg_3v3: regulator-3v3-sw {
+		compatible = "regulator-fixed";
+		regulator-max-microvolt = <3300000>;
+		regulator-min-microvolt = <3300000>;
+		regulator-name = "3V3_SW";
+	};
+};
+
+&eqos {
+	status = "okay";
+};
+
+/* Verdin CAN_1 */
+&flexcan1 {
+	status = "okay";
+};
+
+/* Verdin CAN_2 */
+&flexcan2 {
+	status = "okay";
+};
+
+/* Verdin I2C_2_DSI */
+&i2c2 {
+	status = "okay";
+
+	clock-frequency = <400000>;
+	scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+	sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+
+	dac@d {
+		compatible = "ti,dac081c081";
+		reg = <0x0d>;
+		vref-supply = <&csi_3v3>;
+	};
+};
+
+/* Verdin I2C_4_CSI */
+&i2c3 {
+	status = "okay";
+
+	dac@d {
+		compatible = "ti,dac081c081";
+		reg = <0x0d>;
+		vref-supply = <&csi_3v3>;
+	};
+};
+
+/* Verdin I2C_1 */
+&i2c4 {
+	status = "okay";
+
+	temp-sensor@4b {
+		compatible = "ti,tmp102";
+		reg = <0x4b>;
+	};
+
+	/* EEPROM on the rear connector interface */
+	eeprom@54 {
+		compatible = "st,24c02", "atmel,24c02";
+		pagesize = <16>;
+		reg = <0x54>;
+	};
+};
+
+/* EEPROM on the carrier board */
+&eeprom_carrier_board {
+	status = "okay";
+};
+
+&iomuxc {
+	pinctrl_csi_3v3: csi-3v3-grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_NAND_DATA01__GPIO3_IO07		0x184	/* SODIMM 58 */
+		>;
+	};
+
+	gpio7grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03		0x82	/* SODIMM 220 */
+		>;
+	};
+
+	gpio8grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01		0x82	/* SODIMM 222 */
+		>;
+	};
+
+	pinctrl_led: ledgrp {
+		fsl,pins = <
+			MX8MP_IOMUXC_NAND_DQS__GPIO3_IO14		0x82	/* SODIMM 66 */
+		>;
+	};
+
+	/* M.2 power off and reset */
+	pinctrl_m2: m2grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_NAND_DATA00__GPIO3_IO06		0x82	/* SODIMM 56 */
+			MX8MP_IOMUXC_NAND_DATA03__GPIO3_IO09		0x82	/* SODIMM 62 */
+		>;
+	};
+
+	pinctrl_m2_3v3: m2-3v3-grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_NAND_CE0_B__GPIO3_IO01		0x82	/* SODIMM 54 */
+		>;
+	};
+
+	pinctrl_sw1: sw1grp {
+		fsl,pins = <
+			/*
+			 * SW1 shortens the pin to ground when pressed, enable
+			 * the internal pull-up.
+			 */
+			MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16		0x1c0	/* SODIMM 64 */
+		>;
+	};
+};
+
+&reg_usdhc2_vmmc {
+	vin-supply = <&reg_3v3>;
+};
+
+/* Verdin UART_1 */
+/* Enabling RS-485 operation */
+&uart1 {
+	fsl,uart-has-rtscts;
+	linux,rs485-enabled-at-boot-time;
+};
+
+/* Verdin UART_2, for M.2 card slot */
+&uart2 {
+	status = "okay";
+};
+
+/* Verdin UART_3, used as the Linux Console */
+&uart3 {
+	status = "okay";
+};
+
+/* Verdin USB_1, USB recovery */
+&usb3_phy0 {
+	status = "okay";
+};
+
+&usb3_0 {
+	status = "okay";
+};
+
+&usb_dwc3_0 {
+	status = "okay";
+};
+
+/* Verdin USB_2, for M.2 card slot */
+&usb3_phy1 {
+	status = "okay";
+};
+
+&usb3_1 {
+	status = "okay";
+};
+
+&usb_dwc3_1 {
+	status = "okay";
+};
+
+/* Verdin SD_1, for SD card slot */
+&usdhc2 {
+	status = "okay";
+};
-- 
Regards,

Laurent Pinchart


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* [PATCH v2 3/5] firmware: arm_scmi: Add message dump traces for bad and unexpected replies
From: Cristian Marussi @ 2024-03-25 20:46 UTC (permalink / raw)
  To: linux-kernel, linux-arm-kernel; +Cc: sudeep.holla, Cristian Marussi
In-Reply-To: <20240325204620.1437237-1-cristian.marussi@arm.com>

Trace also late-timed-out, out-of-order and unexpected/spurious messages.

Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
---
 drivers/firmware/arm_scmi/driver.c  | 10 ++++++++++
 drivers/firmware/arm_scmi/mailbox.c |  4 +++-
 2 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/drivers/firmware/arm_scmi/driver.c b/drivers/firmware/arm_scmi/driver.c
index 7fc1c5b1a2a4..207ed1a52d69 100644
--- a/drivers/firmware/arm_scmi/driver.c
+++ b/drivers/firmware/arm_scmi/driver.c
@@ -861,6 +861,9 @@ scmi_xfer_command_acquire(struct scmi_chan_info *cinfo, u32 msg_hdr)
 			"Message for %d type %d is not expected!\n",
 			xfer_id, msg_type);
 		spin_unlock_irqrestore(&minfo->xfer_lock, flags);
+
+		scmi_bad_message_trace(cinfo, msg_hdr, MSG_UNEXPECTED);
+
 		return xfer;
 	}
 	refcount_inc(&xfer->users);
@@ -885,6 +888,9 @@ scmi_xfer_command_acquire(struct scmi_chan_info *cinfo, u32 msg_hdr)
 		dev_err(cinfo->dev,
 			"Invalid message type:%d for %d - HDR:0x%X  state:%d\n",
 			msg_type, xfer_id, msg_hdr, xfer->state);
+
+		scmi_bad_message_trace(cinfo, msg_hdr, MSG_INVALID);
+
 		/* On error the refcount incremented above has to be dropped */
 		__scmi_xfer_put(minfo, xfer);
 		xfer = ERR_PTR(-EINVAL);
@@ -921,6 +927,9 @@ static void scmi_handle_notification(struct scmi_chan_info *cinfo,
 	if (IS_ERR(xfer)) {
 		dev_err(dev, "failed to get free message slot (%ld)\n",
 			PTR_ERR(xfer));
+
+		scmi_bad_message_trace(cinfo, msg_hdr, MSG_NOMEM);
+
 		scmi_clear_channel(info, cinfo);
 		return;
 	}
@@ -1040,6 +1049,7 @@ void scmi_rx_callback(struct scmi_chan_info *cinfo, u32 msg_hdr, void *priv)
 		break;
 	default:
 		WARN_ONCE(1, "received unknown msg_type:%d\n", msg_type);
+		scmi_bad_message_trace(cinfo, msg_hdr, MSG_UNKNOWN);
 		break;
 	}
 }
diff --git a/drivers/firmware/arm_scmi/mailbox.c b/drivers/firmware/arm_scmi/mailbox.c
index b8d470417e8f..fb0824af7180 100644
--- a/drivers/firmware/arm_scmi/mailbox.c
+++ b/drivers/firmware/arm_scmi/mailbox.c
@@ -56,7 +56,9 @@ static void rx_callback(struct mbox_client *cl, void *m)
 	 */
 	if (cl->knows_txdone && !shmem_channel_free(smbox->shmem)) {
 		dev_warn(smbox->cinfo->dev, "Ignoring spurious A2P IRQ !\n");
-		return;
+		return scmi_bad_message_trace(smbox->cinfo,
+				     shmem_read_header(smbox->shmem),
+				     MSG_MBOX_SPURIOUS);
 	}
 
 	scmi_rx_callback(smbox->cinfo, shmem_read_header(smbox->shmem), NULL);
-- 
2.44.0


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* [PATCH v2 1/5] include: trace: Widen the tag buffer in trace_scmi_dump_msg
From: Cristian Marussi @ 2024-03-25 20:46 UTC (permalink / raw)
  To: linux-kernel, linux-arm-kernel; +Cc: sudeep.holla, Cristian Marussi
In-Reply-To: <20240325204620.1437237-1-cristian.marussi@arm.com>

A bigger buffer allow for more diverse tag names.

Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
---
 include/trace/events/scmi.h | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/include/trace/events/scmi.h b/include/trace/events/scmi.h
index 422c1ad9484d..127300481123 100644
--- a/include/trace/events/scmi.h
+++ b/include/trace/events/scmi.h
@@ -7,6 +7,8 @@
 
 #include <linux/tracepoint.h>
 
+#define TRACE_SCMI_MAX_TAG_LEN	6
+
 TRACE_EVENT(scmi_fc_call,
 	TP_PROTO(u8 protocol_id, u8 msg_id, u32 res_id, u32 val1, u32 val2),
 	TP_ARGS(protocol_id, msg_id, res_id, val1, val2),
@@ -150,7 +152,7 @@ TRACE_EVENT(scmi_msg_dump,
 		__field(u8, channel_id)
 		__field(u8, protocol_id)
 		__field(u8, msg_id)
-		__array(char, tag, 5)
+		__array(char, tag, TRACE_SCMI_MAX_TAG_LEN)
 		__field(u16, seq)
 		__field(int, status)
 		__field(size_t, len)
@@ -162,7 +164,7 @@ TRACE_EVENT(scmi_msg_dump,
 		__entry->channel_id = channel_id;
 		__entry->protocol_id = protocol_id;
 		__entry->msg_id = msg_id;
-		strscpy(__entry->tag, tag, 5);
+		strscpy(__entry->tag, tag, TRACE_SCMI_MAX_TAG_LEN);
 		__entry->seq = seq;
 		__entry->status = status;
 		__entry->len = len;
-- 
2.44.0


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* [PATCH v2 2/5] firmware: arm_scmi: Add helper to trace bad messages
From: Cristian Marussi @ 2024-03-25 20:46 UTC (permalink / raw)
  To: linux-kernel, linux-arm-kernel; +Cc: sudeep.holla, Cristian Marussi
In-Reply-To: <20240325204620.1437237-1-cristian.marussi@arm.com>

Upon reception of malformed and unexpected timed-out SCMI messages, it is
not possible to trace those bad messages in their entirety, because usually
we cannot even retrieve the payload, or it is just not reliable.

Add a helper to trace at least the content of the header of the received
message while associating a meaningful tag and error code.

Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
---
 drivers/firmware/arm_scmi/common.h | 11 +++++++++
 drivers/firmware/arm_scmi/driver.c | 39 ++++++++++++++++++++++++++++++
 2 files changed, 50 insertions(+)

diff --git a/drivers/firmware/arm_scmi/common.h b/drivers/firmware/arm_scmi/common.h
index 6affbfdd1dec..b5ac25dbc1ca 100644
--- a/drivers/firmware/arm_scmi/common.h
+++ b/drivers/firmware/arm_scmi/common.h
@@ -301,6 +301,17 @@ extern const struct scmi_desc scmi_optee_desc;
 
 void scmi_rx_callback(struct scmi_chan_info *cinfo, u32 msg_hdr, void *priv);
 
+enum scmi_bad_msg {
+	MSG_UNEXPECTED = -1,
+	MSG_INVALID = -2,
+	MSG_UNKNOWN = -3,
+	MSG_NOMEM = -4,
+	MSG_MBOX_SPURIOUS = -5,
+};
+
+void scmi_bad_message_trace(struct scmi_chan_info *cinfo, u32 msg_hdr,
+			    enum scmi_bad_msg err);
+
 /* shmem related declarations */
 struct scmi_shared_mem;
 
diff --git a/drivers/firmware/arm_scmi/driver.c b/drivers/firmware/arm_scmi/driver.c
index 2709598f3008..7fc1c5b1a2a4 100644
--- a/drivers/firmware/arm_scmi/driver.c
+++ b/drivers/firmware/arm_scmi/driver.c
@@ -696,6 +696,45 @@ scmi_xfer_lookup_unlocked(struct scmi_xfers_info *minfo, u16 xfer_id)
 	return xfer ?: ERR_PTR(-EINVAL);
 }
 
+/**
+ * scmi_bad_message_trace  - A helper to trace weird messages
+ *
+ * @cinfo: A reference to the channel descriptor on which the message was
+ *	   received
+ * @msg_hdr: Message header to track
+ * @err: A specific error code used as a status value in traces.
+ *
+ * This helper can be used to trace any kind of weird, incomplete, unexpected,
+ * timed-out message that arrives and as such, can be traced only referring to
+ * the header content, since the payload is missing/unreliable.
+ */
+void scmi_bad_message_trace(struct scmi_chan_info *cinfo, u32 msg_hdr,
+			    enum scmi_bad_msg err)
+{
+	char *tag;
+	struct scmi_info *info = handle_to_scmi_info(cinfo->handle);
+
+	switch (MSG_XTRACT_TYPE(msg_hdr)) {
+	case MSG_TYPE_COMMAND:
+		tag = "!RESP";
+		break;
+	case MSG_TYPE_DELAYED_RESP:
+		tag = "!DLYD";
+		break;
+	case MSG_TYPE_NOTIFICATION:
+		tag = "!NOTI";
+		break;
+	default:
+		tag = "!UNKN";
+		break;
+	}
+
+	trace_scmi_msg_dump(info->id, cinfo->id,
+			    MSG_XTRACT_PROT_ID(msg_hdr),
+			    MSG_XTRACT_ID(msg_hdr), tag,
+			    MSG_XTRACT_TOKEN(msg_hdr), err, NULL, 0);
+}
+
 /**
  * scmi_msg_response_validate  - Validate message type against state of related
  * xfer
-- 
2.44.0


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* [PATCH v2 0/5] SCMI misc small-updates
From: Cristian Marussi @ 2024-03-25 20:46 UTC (permalink / raw)
  To: linux-kernel, linux-arm-kernel; +Cc: sudeep.holla, Cristian Marussi

Hi,

a bunch of small SCMI updates based on v6.9-rc1.
Mainly adding traces for weird SCMI messages like late timed-out replies,
out of order unexpected messages and malformed messages due to spurious
mbox IRQs.

Thanks,
Cristian

V2:
 - rebased on v6.9-rc1
 - added a common trace helper for weird messages
 - added traces for spurious MBOX IRQs

Cristian Marussi (5):
  include: trace: Widen the tag buffer in trace_scmi_dump_msg
  firmware: arm_scmi: Add helper to trace bad messages
  firmware: arm_scmi: Add message dump traces for bad and unexpected
    replies
  firmware: arm_scmi: Simplify scmi_devm_notifier_unregister
  firmware: arm_scmi: Use dev_err_probe to bail out

 drivers/firmware/arm_scmi/common.h  | 11 ++++
 drivers/firmware/arm_scmi/driver.c  | 83 ++++++++++++++++++++++++++---
 drivers/firmware/arm_scmi/mailbox.c |  4 +-
 drivers/firmware/arm_scmi/notify.c  | 30 ++---------
 include/linux/scmi_protocol.h       |  2 -
 include/trace/events/scmi.h         |  6 ++-
 6 files changed, 97 insertions(+), 39 deletions(-)

-- 
2.44.0


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* [PATCH v2 5/5] firmware: arm_scmi: Use dev_err_probe to bail out
From: Cristian Marussi @ 2024-03-25 20:46 UTC (permalink / raw)
  To: linux-kernel, linux-arm-kernel; +Cc: sudeep.holla, Cristian Marussi
In-Reply-To: <20240325204620.1437237-1-cristian.marussi@arm.com>

Use dev_err_probe on the failure path of SCMI core probing.

Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
---
 drivers/firmware/arm_scmi/driver.c | 34 +++++++++++++++++++++++-------
 1 file changed, 26 insertions(+), 8 deletions(-)

diff --git a/drivers/firmware/arm_scmi/driver.c b/drivers/firmware/arm_scmi/driver.c
index 207ed1a52d69..d0091459a276 100644
--- a/drivers/firmware/arm_scmi/driver.c
+++ b/drivers/firmware/arm_scmi/driver.c
@@ -2540,6 +2540,10 @@ scmi_txrx_setup(struct scmi_info *info, struct device_node *of_node,
 			ret = 0;
 	}
 
+	if (ret)
+		dev_err(info->dev,
+			"failed to setup channel for protocol:0x%X\n", prot_id);
+
 	return ret;
 }
 
@@ -2809,6 +2813,7 @@ static int scmi_debugfs_raw_mode_setup(struct scmi_info *info)
 static int scmi_probe(struct platform_device *pdev)
 {
 	int ret;
+	char *err_str = "probe failure\n";
 	struct scmi_handle *handle;
 	const struct scmi_desc *desc;
 	struct scmi_info *info;
@@ -2859,27 +2864,37 @@ static int scmi_probe(struct platform_device *pdev)
 
 	if (desc->ops->link_supplier) {
 		ret = desc->ops->link_supplier(dev);
-		if (ret)
+		if (ret) {
+			err_str = "transport not ready\n";
 			goto clear_ida;
+		}
 	}
 
 	/* Setup all channels described in the DT at first */
 	ret = scmi_channels_setup(info);
-	if (ret)
+	if (ret) {
+		err_str = "failed to setup channels\n";
 		goto clear_ida;
+	}
 
 	ret = bus_register_notifier(&scmi_bus_type, &info->bus_nb);
-	if (ret)
+	if (ret) {
+		err_str = "failed to register bus notifier\n";
 		goto clear_txrx_setup;
+	}
 
 	ret = blocking_notifier_chain_register(&scmi_requested_devices_nh,
 					       &info->dev_req_nb);
-	if (ret)
+	if (ret) {
+		err_str = "failed to register device notifier\n";
 		goto clear_bus_notifier;
+	}
 
 	ret = scmi_xfer_info_init(info);
-	if (ret)
+	if (ret) {
+		err_str = "failed to init xfers pool\n";
 		goto clear_dev_req_notifier;
+	}
 
 	if (scmi_top_dentry) {
 		info->dbg = scmi_debugfs_common_setup(info);
@@ -2916,9 +2931,11 @@ static int scmi_probe(struct platform_device *pdev)
 	 */
 	ret = scmi_protocol_acquire(handle, SCMI_PROTOCOL_BASE);
 	if (ret) {
-		dev_err(dev, "unable to communicate with SCMI\n");
-		if (coex)
+		err_str = "unable to communicate with SCMI\n";
+		if (coex) {
+			dev_err(dev, err_str);
 			return 0;
+		}
 		goto notification_exit;
 	}
 
@@ -2972,7 +2989,8 @@ static int scmi_probe(struct platform_device *pdev)
 	scmi_cleanup_txrx_channels(info);
 clear_ida:
 	ida_free(&scmi_id, info->id);
-	return ret;
+
+	return dev_err_probe(dev, ret, err_str);
 }
 
 static void scmi_remove(struct platform_device *pdev)
-- 
2.44.0


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* [PATCH v2 4/5] firmware: arm_scmi: Simplify scmi_devm_notifier_unregister
From: Cristian Marussi @ 2024-03-25 20:46 UTC (permalink / raw)
  To: linux-kernel, linux-arm-kernel; +Cc: sudeep.holla, Cristian Marussi
In-Reply-To: <20240325204620.1437237-1-cristian.marussi@arm.com>

Unregistering SCMI notifications using the managed devres interface can be
done providing as a reference simply the previously successfully registered
notification block since it could have been registered only on one kernel
notification_chain: drop any reference to SCMI protocol, events and
sources.

Devres internal helpers can search for the provided notification block
reference and, once found, the associated devres object will already
provide the above SCMI references for the event.

Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
---
 drivers/firmware/arm_scmi/notify.c | 30 ++++--------------------------
 include/linux/scmi_protocol.h      |  2 --
 2 files changed, 4 insertions(+), 28 deletions(-)

diff --git a/drivers/firmware/arm_scmi/notify.c b/drivers/firmware/arm_scmi/notify.c
index 27c52531194d..e160ecb22948 100644
--- a/drivers/firmware/arm_scmi/notify.c
+++ b/drivers/firmware/arm_scmi/notify.c
@@ -1513,17 +1513,12 @@ static int scmi_devm_notifier_register(struct scmi_device *sdev,
 static int scmi_devm_notifier_match(struct device *dev, void *res, void *data)
 {
 	struct scmi_notifier_devres *dres = res;
-	struct scmi_notifier_devres *xres = data;
+	struct notifier_block *nb = data;
 
-	if (WARN_ON(!dres || !xres))
+	if (WARN_ON(!dres || !nb))
 		return 0;
 
-	return dres->proto_id == xres->proto_id &&
-		dres->evt_id == xres->evt_id &&
-		dres->nb == xres->nb &&
-		((!dres->src_id && !xres->src_id) ||
-		  (dres->src_id && xres->src_id &&
-		   dres->__src_id == xres->__src_id));
+	return dres->nb == nb;
 }
 
 /**
@@ -1531,10 +1526,6 @@ static int scmi_devm_notifier_match(struct device *dev, void *res, void *data)
  * notifier_block for an event
  * @sdev: A reference to an scmi_device whose embedded struct device is to
  *	  be used for devres accounting.
- * @proto_id: Protocol ID
- * @evt_id: Event ID
- * @src_id: Source ID, when NULL register for events coming form ALL possible
- *	    sources
  * @nb: A standard notifier block to register for the specified event
  *
  * Generic devres managed helper to explicitly un-register a notifier_block
@@ -1544,25 +1535,12 @@ static int scmi_devm_notifier_match(struct device *dev, void *res, void *data)
  * Return: 0 on Success
  */
 static int scmi_devm_notifier_unregister(struct scmi_device *sdev,
-					 u8 proto_id, u8 evt_id,
-					 const u32 *src_id,
 					 struct notifier_block *nb)
 {
 	int ret;
-	struct scmi_notifier_devres dres;
-
-	dres.handle = sdev->handle;
-	dres.proto_id = proto_id;
-	dres.evt_id = evt_id;
-	if (src_id) {
-		dres.__src_id = *src_id;
-		dres.src_id = &dres.__src_id;
-	} else {
-		dres.src_id = NULL;
-	}
 
 	ret = devres_release(&sdev->dev, scmi_devm_release_notifier,
-			     scmi_devm_notifier_match, &dres);
+			     scmi_devm_notifier_match, nb);
 
 	WARN_ON(ret);
 
diff --git a/include/linux/scmi_protocol.h b/include/linux/scmi_protocol.h
index b807141acc14..a3addb07e00a 100644
--- a/include/linux/scmi_protocol.h
+++ b/include/linux/scmi_protocol.h
@@ -783,8 +783,6 @@ struct scmi_notify_ops {
 					    const u32 *src_id,
 					    struct notifier_block *nb);
 	int (*devm_event_notifier_unregister)(struct scmi_device *sdev,
-					      u8 proto_id, u8 evt_id,
-					      const u32 *src_id,
 					      struct notifier_block *nb);
 	int (*event_notifier_register)(const struct scmi_handle *handle,
 				       u8 proto_id, u8 evt_id,
-- 
2.44.0


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* Re: [PATCH 1/5] dt-bindings: iio: dac: ti,dac5571: Add DAC081C081 support
From: Jonathan Cameron @ 2024-03-25 20:48 UTC (permalink / raw)
  To: Laurent Pinchart
  Cc: devicetree, imx, linux-arm-kernel, Trevor Zaharichuk, Greg Lytle,
	Lars-Peter Clausen, Rob Herring, Krzysztof Kozlowski,
	Conor Dooley, Sean Nyekjaer, linux-iio
In-Reply-To: <20240325203245.31660-2-laurent.pinchart@ideasonboard.com>

On Mon, 25 Mar 2024 22:32:41 +0200
Laurent Pinchart <laurent.pinchart@ideasonboard.com> wrote:

> The DAC081C081 is a TI DAC whose software interface is compatible with
> the DAC5571. It is the 8-bit version of the DAC121C081, already
> supported by the DAC5571 bindings. Extends the bindings to support this
> chip.
> 
> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Hi Laurent,

Given it's a part number where no one is going to guess it is compatible
with the DAC5571 and that we don't have a history of fallback compatibles
I'm fine with this change, but just wanted to ask is a fallback compatible
useful to you to run with older kernels?

I should have noticed when Peter added the dac121c081. If we add a fallback
should do that one as well.

Jonathan
> ---
>  Documentation/devicetree/bindings/iio/dac/ti,dac5571.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/iio/dac/ti,dac5571.yaml b/Documentation/devicetree/bindings/iio/dac/ti,dac5571.yaml
> index 79da0323c327..e59db861e2eb 100644
> --- a/Documentation/devicetree/bindings/iio/dac/ti,dac5571.yaml
> +++ b/Documentation/devicetree/bindings/iio/dac/ti,dac5571.yaml
> @@ -21,6 +21,7 @@ properties:
>        - ti,dac5573
>        - ti,dac6573
>        - ti,dac7573
> +      - ti,dac081c081
>        - ti,dac121c081
>  
>    reg:


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* Re: [PATCH v2] arm64: dts: imx8mp: Add DT nodes for the two ISPs
From: Laurent Pinchart @ 2024-03-25 20:49 UTC (permalink / raw)
  To: Alexander Stein
  Cc: imx, linux-arm-kernel, Paul Elder, Adam Ford, Conor Dooley,
	Fabio Estevam, Krzysztof Kozlowski, Marek Vasut,
	Pengutronix Kernel Team, Rob Herring, Sascha Hauer, Shawn Guo,
	devicetree, linux-media
In-Reply-To: <4879631.GXAFRqVoOG@steina-w>

Hi Alexander,

On Mon, Mar 25, 2024 at 04:52:21PM +0100, Alexander Stein wrote:
> Am Montag, 25. März 2024, 16:13:39 CET schrieb Laurent Pinchart:
> > From: Paul Elder <paul.elder@ideasonboard.com>
> > 
> > The ISP supports both CSI and parallel interfaces, where port 0
> > corresponds to the former and port 1 corresponds to the latter. Since
> > the i.MX8MP's ISPs are connected by the parallel interface to the CSI
> > receiver, set them both to port 1.
> > 
> > Signed-off-by: Paul Elder <paul.elder@ideasonboard.com>
> > Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> > ---
> > Changes since v1:
> > 
> > - Fix clock ordering
> > - Add #address-cells and #size-cells to ports nodes
> > ---
> >  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 50 +++++++++++++++++++++++
> >  1 file changed, 50 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > index bfc5c81a5bd4..1d2670b91b53 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > @@ -1616,6 +1616,56 @@ isi_in_1: endpoint {
> >  				};
> >  			};
> >  
> > +			isp_0: isp@32e10000 {
> > +				compatible = "fsl,imx8mp-isp";
> > +				reg = <0x32e10000 0x10000>;
> > +				interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
> > +				clocks = <&clk IMX8MP_CLK_MEDIA_ISP_ROOT>,
> > +					 <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>,
> > +					 <&clk IMX8MP_CLK_MEDIA_APB_ROOT>;
> > +				clock-names = "isp", "aclk", "hclk";
> > +				assigned-clocks = <&clk IMX8MP_CLK_MEDIA_ISP>;
> > +				assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>;
> > +				assigned-clock-rates = <500000000>;
> > +				power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_ISP>;
> > +				fsl,blk-ctrl = <&media_blk_ctrl 0>;
> > +				status = "disabled";
> > +
> > +				ports {
> > +					#address-cells = <1>;
> > +					#size-cells = <0>;
> > +
> > +					port@1 {
> > +						reg = <1>;
> > +					};
> > +				};
> > +			};
> > +
> > +			isp_1: isp@32e20000 {
> > +				compatible = "fsl,imx8mp-isp";
> > +				reg = <0x32e20000 0x10000>;
> > +				interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
> > +				clocks = <&clk IMX8MP_CLK_MEDIA_ISP_ROOT>,
> > +					 <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>,
> > +					 <&clk IMX8MP_CLK_MEDIA_APB_ROOT>;
> > +				clock-names = "isp", "aclk", "hclk";
> > +				assigned-clocks = <&clk IMX8MP_CLK_MEDIA_ISP>;
> > +				assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>;
> > +				assigned-clock-rates = <500000000>;
> > +				power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_ISP>;
> > +				fsl,blk-ctrl = <&media_blk_ctrl 1>;
> > +				status = "disabled";
> > +
> > +				ports {
> > +					#address-cells = <1>;
> > +					#size-cells = <0>;
> > +
> > +					port@1 {
> > +						reg = <1>;
> > +					};
> > +				};
> > +			};
> > +
> 
> The patch itself is okay. But you might not be able to
> configure the parent of IMX8MP_CLK_MEDIA_ISP if dewarp is enabled before.
> This is due to IMX8MP_CLK_MEDIA_ISP_ROOT being enabled in 'pgc_ispdwp'
> power domain. Reparenting is not possible anymore in this case.

Good point. 

> Something like
> ---8<---
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -1837,11 +1837,13 @@ media_blk_ctrl: blk-ctrl@32ec0000 {
>                                                   <&clk IMX8MP_CLK_MEDIA_APB>,
>                                                   <&clk IMX8MP_CLK_MEDIA_DISP1_PIX>,
>                                                   <&clk IMX8MP_CLK_MEDIA_DISP2_PIX>,
> +                                                 <&clk IMX8MP_CLK_MEDIA_ISP>,
>                                                   <&clk IMX8MP_VIDEO_PLL1>;
>                                 assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
>                                                          <&clk IMX8MP_SYS_PLL1_800M>,
>                                                          <&clk IMX8MP_VIDEO_PLL1_OUT>,
> -                                                        <&clk IMX8MP_VIDEO_PLL1_OUT>;
> +                                                        <&clk IMX8MP_VIDEO_PLL1_OUT>,
> +                                                        <&clk IMX8MP_SYS_PLL2_500M>;
>                                 assigned-clock-rates = <500000000>, <200000000>,
>                                                        <0>, <0>, <1039500000>;

With an assigned clock rate here too then ?

>                                 #power-domain-cells = <1>;
> ---8<---
> is needed.

Sascha, are you OK with this approach ?

> >  			dewarp: dwe@32e30000 {
> >  				compatible = "nxp,imx8mp-dw100";
> >  				reg = <0x32e30000 0x10000>;
> > 
> > base-commit: 4cece764965020c22cff7665b18a012006359095

-- 
Regards,

Laurent Pinchart

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* Re: [PATCH 1/5] dt-bindings: iio: dac: ti,dac5571: Add DAC081C081 support
From: Laurent Pinchart @ 2024-03-25 20:56 UTC (permalink / raw)
  To: Jonathan Cameron
  Cc: devicetree, imx, linux-arm-kernel, Trevor Zaharichuk, Greg Lytle,
	Lars-Peter Clausen, Rob Herring, Krzysztof Kozlowski,
	Conor Dooley, Sean Nyekjaer, linux-iio
In-Reply-To: <20240325204857.4f2fd468@jic23-huawei>

Hi Jonathan,

On Mon, Mar 25, 2024 at 08:48:57PM +0000, Jonathan Cameron wrote:
> On Mon, 25 Mar 2024 22:32:41 +0200 Laurent Pinchart wrote:
> 
> > The DAC081C081 is a TI DAC whose software interface is compatible with
> > the DAC5571. It is the 8-bit version of the DAC121C081, already
> > supported by the DAC5571 bindings. Extends the bindings to support this
> > chip.
> > 
> > Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> 
> Hi Laurent,
> 
> Given it's a part number where no one is going to guess it is compatible
> with the DAC5571 and that we don't have a history of fallback compatibles
> I'm fine with this change, but just wanted to ask is a fallback compatible
> useful to you to run with older kernels?
> 
> I should have noticed when Peter added the dac121c081. If we add a fallback
> should do that one as well.

I've indeed noticed that there should have been a fallback for
dac121c081, but didn't stop to ponder why that wasn't the case, and just
went along with the flow :-) I agree a fallback could be useful, which
would then allow dropping patch 2/5 from this series (*). I can do so if
you prefer.

* This is not entirely true. While the DAC1081C081 is largely compatible
with the DAC5573, they have different values for one of the power-down
resistors (2.5kΩ instead of 1kΩ if I recall correctly). To be completely
accurate, the driver should report that. We could still use the fallback
compatible, reporting the wrong power-down resistor value.

> > ---
> >  Documentation/devicetree/bindings/iio/dac/ti,dac5571.yaml | 1 +
> >  1 file changed, 1 insertion(+)
> > 
> > diff --git a/Documentation/devicetree/bindings/iio/dac/ti,dac5571.yaml b/Documentation/devicetree/bindings/iio/dac/ti,dac5571.yaml
> > index 79da0323c327..e59db861e2eb 100644
> > --- a/Documentation/devicetree/bindings/iio/dac/ti,dac5571.yaml
> > +++ b/Documentation/devicetree/bindings/iio/dac/ti,dac5571.yaml
> > @@ -21,6 +21,7 @@ properties:
> >        - ti,dac5573
> >        - ti,dac6573
> >        - ti,dac7573
> > +      - ti,dac081c081
> >        - ti,dac121c081
> >  
> >    reg:

-- 
Regards,

Laurent Pinchart

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* Re: [WIP 0/3] Memory model and atomic API in Rust
From: Boqun Feng @ 2024-03-25 20:59 UTC (permalink / raw)
  To: Mark Rutland
  Cc: rust-for-linux, linux-kernel, linux-arch, llvm, Miguel Ojeda,
	Alex Gaynor, Wedson Almeida Filho, Gary Guo, Bj"orn Roy Baron,
	Benno Lossin, Andreas Hindborg, Alice Ryhl, Alan Stern,
	Andrea Parri, Will Deacon, Peter Zijlstra, Nicholas Piggin,
	David Howells, Jade Alglave, Luc Maranget, Paul E. McKenney,
	Akira Yokosawa, Daniel Lustig, Joel Fernandes, Nathan Chancellor,
	Nick Desaulniers, kent.overstreet, Greg Kroah-Hartman, elver,
	Thomas Gleixner, Ingo Molnar, Borislav Petkov, Dave Hansen, x86,
	H. Peter Anvin, Catalin Marinas, torvalds, linux-arm-kernel,
	linux-fsdevel
In-Reply-To: <ZgFVnar3nS4F8eIX@FVFF77S0Q05N>

On Mon, Mar 25, 2024 at 10:44:45AM +0000, Mark Rutland wrote:
[...]
> > 
> > * I choose to re-implement atomics in Rust `asm` because we are still
> >   figuring out how we can make it easy and maintainable for Rust to call
> >   a C function _inlinely_ (Gary makes some progress [2]). Otherwise,
> >   atomic primitives would be function calls, and that can be performance
> >   bottleneck in a few cases.
> 
> I don't think we want to maintain two copies of each architecture's atomics.
> This gets painful very quickly (e.g. as arm64's atomics get patched between
> LL/SC and LSE forms).
> 

No argument here ;-)

> Can we start off with out-of-line atomics, and see where the bottlenecks are?
> 
> It's relatively easy to do that today, at least for the atomic*_*() APIs:
> 
>   https://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git/commit/?h=atomics/outlined&id=e0a77bfa63e7416d610769aa4ab62bc06993ce56
> 
> ... which IIUC covers the "AtomicI32, AtomicI64 and AtomicUsize" cases you
> mention above.
> 

Thanks! Yes, I know I should check with you before I finalize the
implementation ;-) I will try to integrate that but things to notice:

* For module usage, we need to EXPORT_SYMBOL_GPL() all the atomics, I'm
  OK with that, but I don't know how others feel about it.

* Alice reported performance gap between inline and out-of-line refcount
  operations in Rust binder driver:

	https://github.com/Darksonn/linux/commit/b4be1bd6c44225bf7276a4666fd30b8da9cba517	

  I don't know how much worse since I don't have the data, but that's
  one of the reasons I started with inline asm.

That being said, I totally agree that we could start with out-of-line
atomics, and maybe provide inline version for performance critical
paths. Hoping is we can figure out how Rust could inline a C function
eventually.

Regards,
Boqun

> Mark.

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* [PATCH v2 0/5] Rework SCMI Clock driver clk_ops setup procedure
From: Cristian Marussi @ 2024-03-25 21:00 UTC (permalink / raw)
  To: linux-kernel, linux-arm-kernel, linux-clk
  Cc: sudeep.holla, james.quinlan, f.fainelli, vincent.guittot,
	peng.fan, michal.simek, quic_sibis, quic_nkela,
	souvik.chakravarty, mturquette, sboyd, Cristian Marussi

Hi,

a small series to review how the SCMI Clock driver chooses and sets up the
CLK operations to associate to a clock when registering with CLK framework.

SCMI clocks exposed by the platform sports a growing number of clock
properties since SCMI v3.2: discovered SCMI clocks could be restricted in
terms of capability to set state/rate/parent/duty_cycle and the platform
itself can have a varying support in terms of atomic support.

Knowing upfront which operations are NOT allowed on some clocks helps
avoiding needless message exchanges.

As a result, the SCMI Clock driver, when registering resources with the
CLK framework, aims to provide only the specific clk_ops as known to be
certainly supported by the specific SCMI clock resource.

Using static pre-compiled clk_ops structures to fulfill all the possible
(and possibly growing) combinations of clock features is cumbersome and
error-prone (there are 32 possible combinations as of now to account for
the above mentioned clock features variation).

This rework introduces a dynamic allocation mechanism to be able to
configure the required clk_ops at run-time when the SCMI clocks are
enumerated.

Only one single clk_ops is generated for each of the features combinations
effectively found in the set of returned SCMI resources.

Once this preliminary rework is done in 1/5, the following patches use this
new clk_ops schema to introduce a number of restricted clk_ops depending on
the specific retrieved SCMI clocks characteristics.

Based on v6.9-rc1

Thanks,
Cristian

V2
- rebased on v6.9-rc1

Cristian Marussi (5):
  clk: scmi: Allocate CLK operations dynamically
  clk: scmi: Add support for state control restricted clocks
  clk: scmi: Add support for rate change restricted clocks
  clk: scmi: Add support for re-parenting restricted clocks
  clk: scmi: Add support for get/set duty_cycle operations

 drivers/clk/clk-scmi.c | 226 ++++++++++++++++++++++++++++++++---------
 1 file changed, 179 insertions(+), 47 deletions(-)

-- 
2.44.0


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* [PATCH v2 2/5] clk: scmi: Add support for state control restricted clocks
From: Cristian Marussi @ 2024-03-25 21:00 UTC (permalink / raw)
  To: linux-kernel, linux-arm-kernel, linux-clk
  Cc: sudeep.holla, james.quinlan, f.fainelli, vincent.guittot,
	peng.fan, michal.simek, quic_sibis, quic_nkela,
	souvik.chakravarty, mturquette, sboyd, Cristian Marussi
In-Reply-To: <20240325210025.1448717-1-cristian.marussi@arm.com>

Some exposed SCMI Clocks could be marked as non-supporting state changes.
Configure a clk_ops descriptor which does not provide the state change
callbacks for such clocks when registering with CLK framework.

CC: Michael Turquette <mturquette@baylibre.com>
CC: Stephen Boyd <sboyd@kernel.org>
CC: linux-clk@vger.kernel.org
Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
---
 drivers/clk/clk-scmi.c | 22 +++++++++++++++-------
 1 file changed, 15 insertions(+), 7 deletions(-)

diff --git a/drivers/clk/clk-scmi.c b/drivers/clk/clk-scmi.c
index d5d369b052bd..fc9603988d91 100644
--- a/drivers/clk/clk-scmi.c
+++ b/drivers/clk/clk-scmi.c
@@ -18,6 +18,7 @@
 
 enum scmi_clk_feats {
 	SCMI_CLK_ATOMIC_SUPPORTED,
+	SCMI_CLK_STATE_CTRL_FORBIDDEN,
 	SCMI_CLK_MAX_FEATS
 };
 
@@ -230,15 +231,19 @@ scmi_clk_ops_alloc(struct device *dev, unsigned long feats_key)
 	 * only the prepare/unprepare API, as allowed by the clock framework
 	 * when atomic calls are not available.
 	 */
-	if (feats_key & BIT(SCMI_CLK_ATOMIC_SUPPORTED)) {
-		ops->enable = scmi_clk_atomic_enable;
-		ops->disable = scmi_clk_atomic_disable;
-		ops->is_enabled = scmi_clk_atomic_is_enabled;
-	} else {
-		ops->prepare = scmi_clk_enable;
-		ops->unprepare = scmi_clk_disable;
+	if (!(feats_key & BIT(SCMI_CLK_STATE_CTRL_FORBIDDEN))) {
+		if (feats_key & BIT(SCMI_CLK_ATOMIC_SUPPORTED)) {
+			ops->enable = scmi_clk_atomic_enable;
+			ops->disable = scmi_clk_atomic_disable;
+		} else {
+			ops->prepare = scmi_clk_enable;
+			ops->unprepare = scmi_clk_disable;
+		}
 	}
 
+	if (feats_key & BIT(SCMI_CLK_ATOMIC_SUPPORTED))
+		ops->is_enabled = scmi_clk_atomic_is_enabled;
+
 	/* Rate ops */
 	ops->recalc_rate = scmi_clk_recalc_rate;
 	ops->round_rate = scmi_clk_round_rate;
@@ -288,6 +293,9 @@ scmi_clk_ops_select(struct scmi_clk *sclk, bool atomic_capable,
 	if (atomic_capable && ci->enable_latency <= atomic_threshold)
 		feats_key |= BIT(SCMI_CLK_ATOMIC_SUPPORTED);
 
+	if (ci->state_ctrl_forbidden)
+		feats_key |= BIT(SCMI_CLK_STATE_CTRL_FORBIDDEN);
+
 	/* Lookup previously allocated ops */
 	ops = clk_ops_db[feats_key];
 	if (!ops) {
-- 
2.44.0


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* [PATCH v2 1/5] clk: scmi: Allocate CLK operations dynamically
From: Cristian Marussi @ 2024-03-25 21:00 UTC (permalink / raw)
  To: linux-kernel, linux-arm-kernel, linux-clk
  Cc: sudeep.holla, james.quinlan, f.fainelli, vincent.guittot,
	peng.fan, michal.simek, quic_sibis, quic_nkela,
	souvik.chakravarty, mturquette, sboyd, Cristian Marussi
In-Reply-To: <20240325210025.1448717-1-cristian.marussi@arm.com>

SCMI Clocks descriptors expose an increasing number of properties, thing
which, in turn, leads to a varying set of supported CLK operations to be
associated with each clock.

Providing statically pre-defined CLK operations structs for all the
possible combinations of allowed clock features is becoming cumbersome and
error-prone.

Allocate the per-clock operations descriptors dynamically and populate it
with the strictly needed set of operations depending on the advertised
clock properties: one descriptor is created for each distinct combination
of clock operations, so minimizing the number of clk_ops structures to the
strictly minimum needed.

CC: Michael Turquette <mturquette@baylibre.com>
CC: Stephen Boyd <sboyd@kernel.org>
CC: linux-clk@vger.kernel.org
Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
---
 drivers/clk/clk-scmi.c | 163 ++++++++++++++++++++++++++++-------------
 1 file changed, 114 insertions(+), 49 deletions(-)

diff --git a/drivers/clk/clk-scmi.c b/drivers/clk/clk-scmi.c
index 8cbe24789c24..d5d369b052bd 100644
--- a/drivers/clk/clk-scmi.c
+++ b/drivers/clk/clk-scmi.c
@@ -2,7 +2,7 @@
 /*
  * System Control and Power Interface (SCMI) Protocol based clock driver
  *
- * Copyright (C) 2018-2022 ARM Ltd.
+ * Copyright (C) 2018-2024 ARM Ltd.
  */
 
 #include <linux/clk-provider.h>
@@ -16,6 +16,14 @@
 #define NOT_ATOMIC	false
 #define ATOMIC		true
 
+enum scmi_clk_feats {
+	SCMI_CLK_ATOMIC_SUPPORTED,
+	SCMI_CLK_MAX_FEATS
+};
+
+#define SCMI_MAX_CLK_OPS	(1 << SCMI_CLK_MAX_FEATS)
+
+static const struct clk_ops *clk_ops_db[SCMI_MAX_CLK_OPS];
 static const struct scmi_clk_proto_ops *scmi_proto_clk_ops;
 
 struct scmi_clk {
@@ -158,42 +166,6 @@ static int scmi_clk_atomic_is_enabled(struct clk_hw *hw)
 	return !!enabled;
 }
 
-/*
- * We can provide enable/disable/is_enabled atomic callbacks only if the
- * underlying SCMI transport for an SCMI instance is configured to handle
- * SCMI commands in an atomic manner.
- *
- * When no SCMI atomic transport support is available we instead provide only
- * the prepare/unprepare API, as allowed by the clock framework when atomic
- * calls are not available.
- *
- * Two distinct sets of clk_ops are provided since we could have multiple SCMI
- * instances with different underlying transport quality, so they cannot be
- * shared.
- */
-static const struct clk_ops scmi_clk_ops = {
-	.recalc_rate = scmi_clk_recalc_rate,
-	.round_rate = scmi_clk_round_rate,
-	.set_rate = scmi_clk_set_rate,
-	.prepare = scmi_clk_enable,
-	.unprepare = scmi_clk_disable,
-	.set_parent = scmi_clk_set_parent,
-	.get_parent = scmi_clk_get_parent,
-	.determine_rate = scmi_clk_determine_rate,
-};
-
-static const struct clk_ops scmi_atomic_clk_ops = {
-	.recalc_rate = scmi_clk_recalc_rate,
-	.round_rate = scmi_clk_round_rate,
-	.set_rate = scmi_clk_set_rate,
-	.enable = scmi_clk_atomic_enable,
-	.disable = scmi_clk_atomic_disable,
-	.is_enabled = scmi_clk_atomic_is_enabled,
-	.set_parent = scmi_clk_set_parent,
-	.get_parent = scmi_clk_get_parent,
-	.determine_rate = scmi_clk_determine_rate,
-};
-
 static int scmi_clk_ops_init(struct device *dev, struct scmi_clk *sclk,
 			     const struct clk_ops *scmi_ops)
 {
@@ -230,6 +202,106 @@ static int scmi_clk_ops_init(struct device *dev, struct scmi_clk *sclk,
 	return ret;
 }
 
+/**
+ * scmi_clk_ops_alloc() - Alloc and configure clock operations
+ * @dev: A device reference for devres
+ * @feats_key: A bitmap representing the desired clk_ops capabilities.
+ *
+ * Allocate and configure a proper set of clock operations depending on the
+ * specifically required SCMI clock features.
+ *
+ * Return: A pointer to the allocated and configured clk_ops on Success,
+ *	   or NULL on allocation failure.
+ */
+static const struct clk_ops *
+scmi_clk_ops_alloc(struct device *dev, unsigned long feats_key)
+{
+	struct clk_ops *ops;
+
+	ops = devm_kzalloc(dev, sizeof(*ops), GFP_KERNEL);
+	if (!ops)
+		return NULL;
+	/*
+	 * We can provide enable/disable/is_enabled atomic callbacks only if the
+	 * underlying SCMI transport for an SCMI instance is configured to
+	 * handle SCMI commands in an atomic manner.
+	 *
+	 * When no SCMI atomic transport support is available we instead provide
+	 * only the prepare/unprepare API, as allowed by the clock framework
+	 * when atomic calls are not available.
+	 */
+	if (feats_key & BIT(SCMI_CLK_ATOMIC_SUPPORTED)) {
+		ops->enable = scmi_clk_atomic_enable;
+		ops->disable = scmi_clk_atomic_disable;
+		ops->is_enabled = scmi_clk_atomic_is_enabled;
+	} else {
+		ops->prepare = scmi_clk_enable;
+		ops->unprepare = scmi_clk_disable;
+	}
+
+	/* Rate ops */
+	ops->recalc_rate = scmi_clk_recalc_rate;
+	ops->round_rate = scmi_clk_round_rate;
+	ops->determine_rate = scmi_clk_determine_rate;
+	ops->set_rate = scmi_clk_set_rate;
+
+	/* Parent ops */
+	ops->get_parent = scmi_clk_get_parent;
+	ops->set_parent = scmi_clk_set_parent;
+
+	return ops;
+}
+
+/**
+ * scmi_clk_ops_select() - Select a proper set of clock operations
+ * @sclk: A reference to an SCMI clock descriptor
+ * @atomic_capable: A flag to indicate if atomic mode is supported by the
+ *		    transport
+ * @atomic_threshold: Platform atomic threshold value
+ *
+ * After having built a bitmap descriptor to represent the set of features
+ * needed by this SCMI clock, at first use it to lookup into the set of
+ * previously allocated clk_ops to check if a suitable combination of clock
+ * operations was already created; when no match is found allocate a brand new
+ * set of clk_ops satisfying the required combination of features and save it
+ * for future references.
+ *
+ * In this way only one set of clk_ops is ever created for each different
+ * combination that is effectively needed.
+ *
+ * Return: A pointer to the allocated and configured clk_ops on Success, or
+ *	   NULL otherwise.
+ */
+static const struct clk_ops *
+scmi_clk_ops_select(struct scmi_clk *sclk, bool atomic_capable,
+		    unsigned int atomic_threshold)
+{
+	const struct scmi_clock_info *ci = sclk->info;
+	unsigned int feats_key = 0;
+	const struct clk_ops *ops;
+
+	/*
+	 * Note that when transport is atomic but SCMI protocol did not
+	 * specify (or support) an enable_latency associated with a
+	 * clock, we default to use atomic operations mode.
+	 */
+	if (atomic_capable && ci->enable_latency <= atomic_threshold)
+		feats_key |= BIT(SCMI_CLK_ATOMIC_SUPPORTED);
+
+	/* Lookup previously allocated ops */
+	ops = clk_ops_db[feats_key];
+	if (!ops) {
+		ops = scmi_clk_ops_alloc(sclk->dev, feats_key);
+		if (!ops)
+			return NULL;
+
+		/* Store new ops combinations */
+		clk_ops_db[feats_key] = ops;
+	}
+
+	return ops;
+}
+
 static int scmi_clocks_probe(struct scmi_device *sdev)
 {
 	int idx, count, err;
@@ -285,16 +357,10 @@ static int scmi_clocks_probe(struct scmi_device *sdev)
 		sclk->ph = ph;
 		sclk->dev = dev;
 
-		/*
-		 * Note that when transport is atomic but SCMI protocol did not
-		 * specify (or support) an enable_latency associated with a
-		 * clock, we default to use atomic operations mode.
-		 */
-		if (is_atomic &&
-		    sclk->info->enable_latency <= atomic_threshold)
-			scmi_ops = &scmi_atomic_clk_ops;
-		else
-			scmi_ops = &scmi_clk_ops;
+		scmi_ops = scmi_clk_ops_select(sclk, is_atomic,
+					       atomic_threshold);
+		if (!scmi_ops)
+			return -ENOMEM;
 
 		/* Initialize clock parent data. */
 		if (sclk->info->num_parents > 0) {
@@ -318,8 +384,7 @@ static int scmi_clocks_probe(struct scmi_device *sdev)
 		} else {
 			dev_dbg(dev, "Registered clock:%s%s\n",
 				sclk->info->name,
-				scmi_ops == &scmi_atomic_clk_ops ?
-				" (atomic ops)" : "");
+				scmi_ops->enable ? " (atomic ops)" : "");
 			hws[idx] = &sclk->hw;
 		}
 	}
-- 
2.44.0


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* [PATCH v2 4/5] clk: scmi: Add support for re-parenting restricted clocks
From: Cristian Marussi @ 2024-03-25 21:00 UTC (permalink / raw)
  To: linux-kernel, linux-arm-kernel, linux-clk
  Cc: sudeep.holla, james.quinlan, f.fainelli, vincent.guittot,
	peng.fan, michal.simek, quic_sibis, quic_nkela,
	souvik.chakravarty, mturquette, sboyd, Cristian Marussi
In-Reply-To: <20240325210025.1448717-1-cristian.marussi@arm.com>

Some exposed SCMI Clocks could be marked as non-supporting re-parenting
changes.
Configure a clk_ops descriptor which does not provide the re-parenting
callbacks for such clocks when registering with CLK framework.

CC: Michael Turquette <mturquette@baylibre.com>
CC: Stephen Boyd <sboyd@kernel.org>
CC: linux-clk@vger.kernel.org
Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
---
 drivers/clk/clk-scmi.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/clk-scmi.c b/drivers/clk/clk-scmi.c
index d20dcc60f9d1..87e968b6c095 100644
--- a/drivers/clk/clk-scmi.c
+++ b/drivers/clk/clk-scmi.c
@@ -20,6 +20,7 @@ enum scmi_clk_feats {
 	SCMI_CLK_ATOMIC_SUPPORTED,
 	SCMI_CLK_STATE_CTRL_FORBIDDEN,
 	SCMI_CLK_RATE_CTRL_FORBIDDEN,
+	SCMI_CLK_PARENT_CTRL_FORBIDDEN,
 	SCMI_CLK_MAX_FEATS
 };
 
@@ -254,7 +255,8 @@ scmi_clk_ops_alloc(struct device *dev, unsigned long feats_key)
 
 	/* Parent ops */
 	ops->get_parent = scmi_clk_get_parent;
-	ops->set_parent = scmi_clk_set_parent;
+	if (!(feats_key & BIT(SCMI_CLK_PARENT_CTRL_FORBIDDEN)))
+		ops->set_parent = scmi_clk_set_parent;
 
 	return ops;
 }
@@ -301,6 +303,9 @@ scmi_clk_ops_select(struct scmi_clk *sclk, bool atomic_capable,
 	if (ci->rate_ctrl_forbidden)
 		feats_key |= BIT(SCMI_CLK_RATE_CTRL_FORBIDDEN);
 
+	if (ci->parent_ctrl_forbidden)
+		feats_key |= BIT(SCMI_CLK_PARENT_CTRL_FORBIDDEN);
+
 	/* Lookup previously allocated ops */
 	ops = clk_ops_db[feats_key];
 	if (!ops) {
-- 
2.44.0


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* [PATCH v2 5/5] clk: scmi: Add support for get/set duty_cycle operations
From: Cristian Marussi @ 2024-03-25 21:00 UTC (permalink / raw)
  To: linux-kernel, linux-arm-kernel, linux-clk
  Cc: sudeep.holla, james.quinlan, f.fainelli, vincent.guittot,
	peng.fan, michal.simek, quic_sibis, quic_nkela,
	souvik.chakravarty, mturquette, sboyd, Cristian Marussi
In-Reply-To: <20240325210025.1448717-1-cristian.marussi@arm.com>

Provide the CLK framework callbacks related to get/set clock duty cycle if
the related SCMI clock supports OEM extended configurations.

CC: Michael Turquette <mturquette@baylibre.com>
CC: Stephen Boyd <sboyd@kernel.org>
CC: linux-clk@vger.kernel.org
Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
---
 drivers/clk/clk-scmi.c | 49 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 49 insertions(+)

diff --git a/drivers/clk/clk-scmi.c b/drivers/clk/clk-scmi.c
index 87e968b6c095..86ef7c553ddd 100644
--- a/drivers/clk/clk-scmi.c
+++ b/drivers/clk/clk-scmi.c
@@ -21,6 +21,7 @@ enum scmi_clk_feats {
 	SCMI_CLK_STATE_CTRL_FORBIDDEN,
 	SCMI_CLK_RATE_CTRL_FORBIDDEN,
 	SCMI_CLK_PARENT_CTRL_FORBIDDEN,
+	SCMI_CLK_DUTY_CYCLE_SUPPORTED,
 	SCMI_CLK_MAX_FEATS
 };
 
@@ -169,6 +170,45 @@ static int scmi_clk_atomic_is_enabled(struct clk_hw *hw)
 	return !!enabled;
 }
 
+static int scmi_clk_get_duty_cycle(struct clk_hw *hw, struct clk_duty *duty)
+{
+	int ret;
+	u32 val;
+	struct scmi_clk *clk = to_scmi_clk(hw);
+
+	ret = scmi_proto_clk_ops->config_oem_get(clk->ph, clk->id,
+						 SCMI_CLOCK_CFG_DUTY_CYCLE,
+						 &val, NULL, false);
+	if (!ret) {
+		duty->num = val;
+		duty->den = 100;
+	} else {
+		dev_warn(clk->dev,
+			 "Failed to get duty cycle for clock ID %d\n", clk->id);
+	}
+
+	return ret;
+}
+
+static int scmi_clk_set_duty_cycle(struct clk_hw *hw, struct clk_duty *duty)
+{
+	int ret;
+	u32 val;
+	struct scmi_clk *clk = to_scmi_clk(hw);
+
+	/* SCMI OEM Duty Cycle is expressed as a percentage */
+	val = (duty->num * 100) / duty->den;
+	ret = scmi_proto_clk_ops->config_oem_set(clk->ph, clk->id,
+						 SCMI_CLOCK_CFG_DUTY_CYCLE,
+						 val, false);
+	if (ret)
+		dev_warn(clk->dev,
+			 "Failed to set duty cycle(%u/%u) for clock ID %d\n",
+			 duty->num, duty->den, clk->id);
+
+	return ret;
+}
+
 static int scmi_clk_ops_init(struct device *dev, struct scmi_clk *sclk,
 			     const struct clk_ops *scmi_ops)
 {
@@ -258,6 +298,12 @@ scmi_clk_ops_alloc(struct device *dev, unsigned long feats_key)
 	if (!(feats_key & BIT(SCMI_CLK_PARENT_CTRL_FORBIDDEN)))
 		ops->set_parent = scmi_clk_set_parent;
 
+	/* Duty cycle */
+	if (feats_key & BIT(SCMI_CLK_DUTY_CYCLE_SUPPORTED)) {
+		ops->get_duty_cycle = scmi_clk_get_duty_cycle;
+		ops->set_duty_cycle = scmi_clk_set_duty_cycle;
+	}
+
 	return ops;
 }
 
@@ -306,6 +352,9 @@ scmi_clk_ops_select(struct scmi_clk *sclk, bool atomic_capable,
 	if (ci->parent_ctrl_forbidden)
 		feats_key |= BIT(SCMI_CLK_PARENT_CTRL_FORBIDDEN);
 
+	if (ci->extended_config)
+		feats_key |= BIT(SCMI_CLK_DUTY_CYCLE_SUPPORTED);
+
 	/* Lookup previously allocated ops */
 	ops = clk_ops_db[feats_key];
 	if (!ops) {
-- 
2.44.0


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* [PATCH v2 3/5] clk: scmi: Add support for rate change restricted clocks
From: Cristian Marussi @ 2024-03-25 21:00 UTC (permalink / raw)
  To: linux-kernel, linux-arm-kernel, linux-clk
  Cc: sudeep.holla, james.quinlan, f.fainelli, vincent.guittot,
	peng.fan, michal.simek, quic_sibis, quic_nkela,
	souvik.chakravarty, mturquette, sboyd, Cristian Marussi
In-Reply-To: <20240325210025.1448717-1-cristian.marussi@arm.com>

Some exposed SCMI Clocks could be marked as non-supporting rate changes.
Configure a clk_ops descriptors which does not provide the rate change
callbacks for such clocks when registering with CLK framework.

CC: Michael Turquette <mturquette@baylibre.com>
CC: Stephen Boyd <sboyd@kernel.org>
CC: linux-clk@vger.kernel.org
Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
---
 drivers/clk/clk-scmi.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/clk-scmi.c b/drivers/clk/clk-scmi.c
index fc9603988d91..d20dcc60f9d1 100644
--- a/drivers/clk/clk-scmi.c
+++ b/drivers/clk/clk-scmi.c
@@ -19,6 +19,7 @@
 enum scmi_clk_feats {
 	SCMI_CLK_ATOMIC_SUPPORTED,
 	SCMI_CLK_STATE_CTRL_FORBIDDEN,
+	SCMI_CLK_RATE_CTRL_FORBIDDEN,
 	SCMI_CLK_MAX_FEATS
 };
 
@@ -248,7 +249,8 @@ scmi_clk_ops_alloc(struct device *dev, unsigned long feats_key)
 	ops->recalc_rate = scmi_clk_recalc_rate;
 	ops->round_rate = scmi_clk_round_rate;
 	ops->determine_rate = scmi_clk_determine_rate;
-	ops->set_rate = scmi_clk_set_rate;
+	if (!(feats_key & BIT(SCMI_CLK_RATE_CTRL_FORBIDDEN)))
+		ops->set_rate = scmi_clk_set_rate;
 
 	/* Parent ops */
 	ops->get_parent = scmi_clk_get_parent;
@@ -296,6 +298,9 @@ scmi_clk_ops_select(struct scmi_clk *sclk, bool atomic_capable,
 	if (ci->state_ctrl_forbidden)
 		feats_key |= BIT(SCMI_CLK_STATE_CTRL_FORBIDDEN);
 
+	if (ci->rate_ctrl_forbidden)
+		feats_key |= BIT(SCMI_CLK_RATE_CTRL_FORBIDDEN);
+
 	/* Lookup previously allocated ops */
 	ops = clk_ops_db[feats_key];
 	if (!ops) {
-- 
2.44.0


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