* [PATCH v4 4/6] dt-bindings: display: mediatek: disp-tdshp: Add support for MT8196
From: Jay Liu @ 2026-03-24 12:52 UTC (permalink / raw)
To: Chun-Kuang Hu, Philipp Zabel, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno
Cc: dri-devel, linux-mediatek, devicetree, linux-kernel,
linux-arm-kernel, Jay Liu
In-Reply-To: <20260324125315.4715-1-jay.liu@mediatek.com>
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset="y", Size: 1678 bytes --]
Add disp-tdshp hardware description for MediaTek MT8196 SoC
Signed-off-by: Jay Liu <jay.liu@mediatek.com>
---
.../display/mediatek/mediatek,disp-tdshp.yaml | 46 +++++++++++++++++++
1 file changed, 46 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,disp-tdshp.yaml
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp-tdshp.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp-tdshp.yaml
new file mode 100644
index 000000000000..048281a5b22f
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp-tdshp.yaml
@@ -0,0 +1,46 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/mediatek/mediatek,disp-tdshp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek display 2D sharpness processor
+
+maintainers:
+ - Chun-Kuang Hu <chunkuang.hu@kernel.org>
+ - Philipp Zabel <p.zabel@pengutronix.de>
+
+description: |
+ MediaTek display 2D sharpness processor, namely TDSHP, provides a
+ operation used to adjust sharpness in display system.
+
+properties:
+ compatible:
+ enum:
+ - mediatek,mt8196-disp-tdshp
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ disp-tdshp@321e0000 {
+ compatible = "mediatek,mt8196-disp-tdshp";
+ reg = <0 0x321e0000 0 0x1000>;
+ clocks = <&dispsys_config_clk 107>;
+ };
+ };
--
2.46.0
^ permalink raw reply related
* [PATCH v4 2/6] dt-bindings: display: mediatek: dither: Add support for MT8196
From: Jay Liu @ 2026-03-24 12:51 UTC (permalink / raw)
To: Chun-Kuang Hu, Philipp Zabel, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno
Cc: dri-devel, linux-mediatek, devicetree, linux-kernel,
linux-arm-kernel, Jay Liu, Krzysztof Kozlowski
In-Reply-To: <20260324125315.4715-1-jay.liu@mediatek.com>
Add a compatible string for the DITHER IP found in the MT8196 SoC.
Each DITHER IP of this SoC is fully compatible with the ones found
in MT8183.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Jay Liu <jay.liu@mediatek.com>
---
.../devicetree/bindings/display/mediatek/mediatek,dither.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml
index abaf27916d13..25ef7d0c2a2b 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml
@@ -30,6 +30,7 @@ properties:
- mediatek,mt8188-disp-dither
- mediatek,mt8192-disp-dither
- mediatek,mt8195-disp-dither
+ - mediatek,mt8196-disp-dither
- mediatek,mt8365-disp-dither
- const: mediatek,mt8183-disp-dither
--
2.46.0
^ permalink raw reply related
* [PATCH v4 3/6] dt-bindings: display: mediatek: ccorr: Add support for MT8196
From: Jay Liu @ 2026-03-24 12:52 UTC (permalink / raw)
To: Chun-Kuang Hu, Philipp Zabel, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno
Cc: dri-devel, linux-mediatek, devicetree, linux-kernel,
linux-arm-kernel, Jay Liu, Krzysztof Kozlowski
In-Reply-To: <20260324125315.4715-1-jay.liu@mediatek.com>
Add a compatible string for the CCORR IP found in the MT8196 SoC.
Each CCORR IP of this SoC is fully compatible with the ones found
in MT8192.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Jay Liu <jay.liu@mediatek.com>
---
.../devicetree/bindings/display/mediatek/mediatek,ccorr.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml
index fca8e7bb0cbc..581003aa9b9c 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml
@@ -32,6 +32,7 @@ properties:
- mediatek,mt8186-disp-ccorr
- mediatek,mt8188-disp-ccorr
- mediatek,mt8195-disp-ccorr
+ - mediatek,mt8196-disp-ccorr
- const: mediatek,mt8192-disp-ccorr
reg:
--
2.46.0
^ permalink raw reply related
* [PATCH v4 1/6] dt-bindings: display: mediatek: gamma: Add support for MT8196
From: Jay Liu @ 2026-03-24 12:51 UTC (permalink / raw)
To: Chun-Kuang Hu, Philipp Zabel, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno
Cc: dri-devel, linux-mediatek, devicetree, linux-kernel,
linux-arm-kernel, Jay Liu, Krzysztof Kozlowski
In-Reply-To: <20260324125315.4715-1-jay.liu@mediatek.com>
Add a compatible string for the GAMMA IP found in the MT8196 SoC.
Each GAMMA IP of this SoC is fully compatible with the ones found
in MT8195.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Jay Liu <jay.liu@mediatek.com>
---
.../devicetree/bindings/display/mediatek/mediatek,gamma.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml
index 48542dc7e784..513e51c6d2b9 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml
@@ -40,6 +40,7 @@ properties:
- items:
- enum:
- mediatek,mt8188-disp-gamma
+ - mediatek,mt8196-disp-gamma
- const: mediatek,mt8195-disp-gamma
reg:
--
2.46.0
^ permalink raw reply related
* [PATCH v4 0/6] porting pq compnent for MT8196
From: Jay Liu @ 2026-03-24 12:51 UTC (permalink / raw)
To: Chun-Kuang Hu, Philipp Zabel, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno
Cc: dri-devel, linux-mediatek, devicetree, linux-kernel,
linux-arm-kernel, Jay Liu
Change in v4:
- Address coding style comments for disp-tdshp binding.
- Rebase ccorr driver patch on top of latest linux-next to fix conficts.
Jay Liu (6):
dt-bindings: display: mediatek: gamma: Add support for MT8196
dt-bindings: display: mediatek: dither: Add support for MT8196
dt-bindings: display: mediatek: ccorr: Add support for MT8196
dt-bindings: display: mediatek: disp-tdshp: Add support for MT8196
drm/mediatek: Support multiple CCORR component
drm/mediatek: Add TDSHP component support for MT8196
.../display/mediatek/mediatek,ccorr.yaml | 1 +
.../display/mediatek/mediatek,disp-tdshp.yaml | 46 ++++++++++++++++
.../display/mediatek/mediatek,dither.yaml | 1 +
.../display/mediatek/mediatek,gamma.yaml | 1 +
drivers/gpu/drm/mediatek/mtk_crtc.c | 5 +-
drivers/gpu/drm/mediatek/mtk_ddp_comp.c | 52 ++++++++++++++++++-
drivers/gpu/drm/mediatek/mtk_ddp_comp.h | 8 +--
drivers/gpu/drm/mediatek/mtk_disp_ccorr.c | 6 ++-
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 2 +-
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 +
10 files changed, 116 insertions(+), 8 deletions(-)
create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,disp-tdshp.yaml
--
2.46.0
^ permalink raw reply
* [PATCH 0/3] selftests/resctrl: Add dynamic linked list management for IMC counters
From: Yifan Wu @ 2026-03-24 12:50 UTC (permalink / raw)
To: tony.luck, reinette.chatre, Dave.Martin, james.morse, babu.moger,
shuah, tan.shaopeng, fenghuay, ben.horgan, jonathan.cameron,
zengheng4, wuyifan50, linux-kernel, linux-arm-kernel,
linux-kselftest, linuxarm
Cc: xiaqinxin, prime.zeng, wangyushan12, xuwei5, fanghao11, wangzhou1
Hi all,
This patch series adds dynamic linked list management for the IMC
counters, which can work based on the actual number of counters instead of
an upper limit, without the need for array out-of-bounds access check.
This patch series is based on the Reinette's patch series aimed at fixing
the resctrl test and can be found at:
https://lore.kernel.org/lkml/cover.1773432891.git.reinette.chatre@intel.com/
Yifan Wu (3):
selftests/resctrl: Introduced linked list management for IMC counters
selftests/resctrl: Replace array-based IMC counter management with
linked lists
selftests/resctrl: Add cleanup for MBM/MBA test
tools/testing/selftests/resctrl/mba_test.c | 1 +
tools/testing/selftests/resctrl/mbm_test.c | 1 +
tools/testing/selftests/resctrl/resctrl.h | 2 +
tools/testing/selftests/resctrl/resctrl_val.c | 159 ++++++++++--------
4 files changed, 95 insertions(+), 68 deletions(-)
--
2.33.0
^ permalink raw reply
* [PATCH 2/3] selftests/resctrl: Replace array-based IMC counter management with linked lists
From: Yifan Wu @ 2026-03-24 12:50 UTC (permalink / raw)
To: tony.luck, reinette.chatre, Dave.Martin, james.morse, babu.moger,
shuah, tan.shaopeng, fenghuay, ben.horgan, jonathan.cameron,
zengheng4, wuyifan50, linux-kernel, linux-arm-kernel,
linux-kselftest, linuxarm
Cc: xiaqinxin, prime.zeng, wangyushan12, xuwei5, fanghao11, wangzhou1
In-Reply-To: <20260324125034.1509177-1-wuyifan50@huawei.com>
Convert IMC counter management from static array to dynamic
linked list allocation.
Signed-off-by: Yifan Wu <wuyifan50@huawei.com>
---
tools/testing/selftests/resctrl/resctrl_val.c | 134 +++++++++---------
1 file changed, 66 insertions(+), 68 deletions(-)
diff --git a/tools/testing/selftests/resctrl/resctrl_val.c b/tools/testing/selftests/resctrl/resctrl_val.c
index ac58d3862281..417d87ba368a 100644
--- a/tools/testing/selftests/resctrl/resctrl_val.c
+++ b/tools/testing/selftests/resctrl/resctrl_val.c
@@ -14,7 +14,6 @@
#define READ_FILE_NAME "cas_count_read"
#define DYN_PMU_PATH "/sys/bus/event_source/devices"
#define SCALE 0.00006103515625
-#define MAX_IMCS 40
#define MAX_TOKENS 5
#define CON_MBM_LOCAL_BYTES_PATH \
@@ -38,36 +37,37 @@ struct imc_counter_config {
static char mbm_total_path[1024];
static int imcs;
-static struct imc_counter_config imc_counters_config[MAX_IMCS];
LIST_HEAD(imc_counters_configs);
static const struct resctrl_test *current_test;
-static void read_mem_bw_initialize_perf_event_attr(int i)
+static void read_mem_bw_initialize_perf_event_attr(struct imc_counter_config *imc_counters_config)
{
- memset(&imc_counters_config[i].pe, 0,
+ memset(&imc_counters_config->pe, 0,
sizeof(struct perf_event_attr));
- imc_counters_config[i].pe.type = imc_counters_config[i].type;
- imc_counters_config[i].pe.size = sizeof(struct perf_event_attr);
- imc_counters_config[i].pe.disabled = 1;
- imc_counters_config[i].pe.inherit = 1;
- imc_counters_config[i].pe.exclude_guest = 0;
- imc_counters_config[i].pe.config =
- imc_counters_config[i].umask << 8 |
- imc_counters_config[i].event;
- imc_counters_config[i].pe.sample_type = PERF_SAMPLE_IDENTIFIER;
- imc_counters_config[i].pe.read_format =
+ imc_counters_config->pe.type = imc_counters_config->type;
+ imc_counters_config->pe.size = sizeof(struct perf_event_attr);
+ imc_counters_config->pe.disabled = 1;
+ imc_counters_config->pe.inherit = 1;
+ imc_counters_config->pe.exclude_guest = 0;
+ imc_counters_config->pe.config =
+ imc_counters_config->umask << 8 |
+ imc_counters_config->event;
+ imc_counters_config->pe.sample_type = PERF_SAMPLE_IDENTIFIER;
+ imc_counters_config->pe.read_format =
PERF_FORMAT_TOTAL_TIME_ENABLED | PERF_FORMAT_TOTAL_TIME_RUNNING;
}
-static void read_mem_bw_ioctl_perf_event_ioc_reset_enable(int i)
+static void read_mem_bw_ioctl_perf_event_ioc_reset_enable(struct imc_counter_config
+ *imc_counters_config)
{
- ioctl(imc_counters_config[i].fd, PERF_EVENT_IOC_RESET, 0);
- ioctl(imc_counters_config[i].fd, PERF_EVENT_IOC_ENABLE, 0);
+ ioctl(imc_counters_config->fd, PERF_EVENT_IOC_RESET, 0);
+ ioctl(imc_counters_config->fd, PERF_EVENT_IOC_ENABLE, 0);
}
-static void read_mem_bw_ioctl_perf_event_ioc_disable(int i)
+static void read_mem_bw_ioctl_perf_event_ioc_disable(struct imc_counter_config
+ *imc_counters_config)
{
- ioctl(imc_counters_config[i].fd, PERF_EVENT_IOC_DISABLE, 0);
+ ioctl(imc_counters_config->fd, PERF_EVENT_IOC_DISABLE, 0);
}
/*
@@ -75,7 +75,8 @@ static void read_mem_bw_ioctl_perf_event_ioc_disable(int i)
* @cas_count_cfg: Config
* @count: iMC number
*/
-static void get_read_event_and_umask(char *cas_count_cfg, unsigned int count)
+static void get_read_event_and_umask(char *cas_count_cfg, struct imc_counter_config
+ *imc_counters_config)
{
char *token[MAX_TOKENS];
int i = 0;
@@ -89,21 +90,21 @@ static void get_read_event_and_umask(char *cas_count_cfg, unsigned int count)
if (!token[i])
break;
if (strcmp(token[i], "event") == 0)
- imc_counters_config[count].event = strtol(token[i + 1], NULL, 16);
+ imc_counters_config->event = strtol(token[i + 1], NULL, 16);
if (strcmp(token[i], "umask") == 0)
- imc_counters_config[count].umask = strtol(token[i + 1], NULL, 16);
+ imc_counters_config->umask = strtol(token[i + 1], NULL, 16);
}
}
-static int open_perf_read_event(int i, int cpu_no)
+static int open_perf_read_event(struct imc_counter_config *imc_counters_config, int cpu_no)
{
- imc_counters_config[i].fd =
- perf_event_open(&imc_counters_config[i].pe, -1, cpu_no, -1,
+ imc_counters_config->fd =
+ perf_event_open(&imc_counters_config->pe, -1, cpu_no, -1,
PERF_FLAG_FD_CLOEXEC);
- if (imc_counters_config[i].fd == -1) {
+ if (imc_counters_config->fd == -1) {
fprintf(stderr, "Error opening leader %llx\n",
- imc_counters_config[i].pe.config);
+ imc_counters_config->pe.config);
return -1;
}
@@ -112,10 +113,10 @@ static int open_perf_read_event(int i, int cpu_no)
}
static int parse_imc_read_bw_events(char *imc_dir, unsigned int type,
- unsigned int *count)
+ struct imc_counter_config *imc_counters_config)
{
char imc_events_dir[PATH_MAX], imc_counter_cfg[PATH_MAX];
- unsigned int orig_count = *count;
+ unsigned int orig_count = imcs;
char cas_count_cfg[1024];
struct dirent *ep;
int path_len;
@@ -165,17 +166,13 @@ static int parse_imc_read_bw_events(char *imc_dir, unsigned int type,
ksft_perror("Could not get iMC cas count read");
goto out_close;
}
- if (*count >= MAX_IMCS) {
- ksft_print_msg("Maximum iMC count exceeded\n");
- goto out_close;
- }
- imc_counters_config[*count].type = type;
- get_read_event_and_umask(cas_count_cfg, *count);
- /* Do not fail after incrementing *count. */
- *count += 1;
+ imc_counters_config->type = type;
+ get_read_event_and_umask(cas_count_cfg, imc_counters_config);
+ /* Do not fail after incrementing count. */
+ imcs++;
}
- if (*count == orig_count) {
+ if (imcs == orig_count) {
ksft_print_msg("Unable to find events in %s\n", imc_events_dir);
goto out_close;
}
@@ -186,7 +183,7 @@ static int parse_imc_read_bw_events(char *imc_dir, unsigned int type,
}
/* Get type and config of an iMC counter's read event. */
-static int read_from_imc_dir(char *imc_dir, unsigned int *count)
+static int read_from_imc_dir(char *imc_dir, struct imc_counter_config *imc_counters_config)
{
char imc_counter_type[PATH_MAX];
unsigned int type;
@@ -214,7 +211,7 @@ static int read_from_imc_dir(char *imc_dir, unsigned int *count)
ksft_perror("Could not get iMC type");
return -1;
}
- ret = parse_imc_read_bw_events(imc_dir, type, count);
+ ret = parse_imc_read_bw_events(imc_dir, type, imc_counters_config);
if (ret) {
ksft_print_msg("Unable to parse bandwidth event and umask\n");
return ret;
@@ -239,7 +236,7 @@ static int num_of_imcs(void)
{
struct imc_counter_config *imc_counters_config;
char imc_dir[512], *temp;
- unsigned int count = 0;
+ imcs = 0;
struct dirent *ep;
int ret;
DIR *dp;
@@ -275,7 +272,7 @@ static int num_of_imcs(void)
memset(imc_counters_config, 0, sizeof(struct imc_counter_config));
sprintf(imc_dir, "%s/%s/", DYN_PMU_PATH,
ep->d_name);
- ret = read_from_imc_dir(imc_dir, &count);
+ ret = read_from_imc_dir(imc_dir, imc_counters_config);
if (ret) {
free(imc_counters_config);
closedir(dp);
@@ -286,7 +283,7 @@ static int num_of_imcs(void)
}
}
closedir(dp);
- if (count == 0) {
+ if (imcs == 0) {
ksft_print_msg("Unable to find iMC counters\n");
return -1;
@@ -297,20 +294,22 @@ static int num_of_imcs(void)
return -1;
}
- return count;
+ return imcs;
}
int initialize_read_mem_bw_imc(void)
{
- int imc;
+ int ret;
+ struct imc_counter_config *imc_counters_config;
- imcs = num_of_imcs();
- if (imcs <= 0)
- return imcs;
+ ret = num_of_imcs();
+ if (ret <= 0)
+ return ret;
/* Initialize perf_event_attr structures for all iMC's */
- for (imc = 0; imc < imcs; imc++)
- read_mem_bw_initialize_perf_event_attr(imc);
+ list_for_each_entry(imc_counters_config, &imc_counters_configs, imc_list) {
+ read_mem_bw_initialize_perf_event_attr(imc_counters_config);
+ }
return 0;
}
@@ -330,11 +329,11 @@ void cleanup_read_mem_bw_imc(void)
static void perf_close_imc_read_mem_bw(void)
{
- int mc;
+ struct imc_counter_config *imc_counters_config;
- for (mc = 0; mc < imcs; mc++) {
- if (imc_counters_config[mc].fd != -1)
- close(imc_counters_config[mc].fd);
+ list_for_each_entry(imc_counters_config, &imc_counters_configs, imc_list) {
+ if (imc_counters_config->fd != -1)
+ close(imc_counters_config->fd);
}
}
@@ -346,13 +345,14 @@ static void perf_close_imc_read_mem_bw(void)
*/
static int perf_open_imc_read_mem_bw(int cpu_no)
{
- int imc, ret;
+ int ret;
+ struct imc_counter_config *imc_counters_config;
- for (imc = 0; imc < imcs; imc++)
- imc_counters_config[imc].fd = -1;
+ list_for_each_entry(imc_counters_config, &imc_counters_configs, imc_list)
+ imc_counters_config->fd = -1;
- for (imc = 0; imc < imcs; imc++) {
- ret = open_perf_read_event(imc, cpu_no);
+ list_for_each_entry(imc_counters_config, &imc_counters_configs, imc_list) {
+ ret = open_perf_read_event(imc_counters_config, cpu_no);
if (ret)
goto close_fds;
}
@@ -372,16 +372,16 @@ static int perf_open_imc_read_mem_bw(int cpu_no)
*/
static void do_imc_read_mem_bw_test(void)
{
- int imc;
+ struct imc_counter_config *imc_counters_config;
- for (imc = 0; imc < imcs; imc++)
- read_mem_bw_ioctl_perf_event_ioc_reset_enable(imc);
+ list_for_each_entry(imc_counters_config, &imc_counters_configs, imc_list)
+ read_mem_bw_ioctl_perf_event_ioc_reset_enable(imc_counters_config);
sleep(1);
/* Stop counters after a second to get results. */
- for (imc = 0; imc < imcs; imc++)
- read_mem_bw_ioctl_perf_event_ioc_disable(imc);
+ list_for_each_entry(imc_counters_config, &imc_counters_configs, imc_list)
+ read_mem_bw_ioctl_perf_event_ioc_disable(imc_counters_config);
}
/*
@@ -396,17 +396,15 @@ static void do_imc_read_mem_bw_test(void)
static int get_read_mem_bw_imc(float *bw_imc)
{
float reads = 0, of_mul_read = 1;
- int imc;
+ struct imc_counter_config *r;
/*
* Log read event values from all iMC counters into
* struct imc_counter_config.
* Take overflow into consideration before calculating total bandwidth.
*/
- for (imc = 0; imc < imcs; imc++) {
+ list_for_each_entry(r, &imc_counters_configs, imc_list) {
struct membw_read_format measurement;
- struct imc_counter_config *r =
- &imc_counters_config[imc];
if (read(r->fd, &measurement, sizeof(measurement)) == -1) {
ksft_perror("Couldn't get read bandwidth through iMC");
--
2.33.0
^ permalink raw reply related
* [PATCH 1/3] selftests/resctrl: Introduced linked list management for IMC counters
From: Yifan Wu @ 2026-03-24 12:50 UTC (permalink / raw)
To: tony.luck, reinette.chatre, Dave.Martin, james.morse, babu.moger,
shuah, tan.shaopeng, fenghuay, ben.horgan, jonathan.cameron,
zengheng4, wuyifan50, linux-kernel, linux-arm-kernel,
linux-kselftest, linuxarm
Cc: xiaqinxin, prime.zeng, wangyushan12, xuwei5, fanghao11, wangzhou1
In-Reply-To: <20260324125034.1509177-1-wuyifan50@huawei.com>
Added linked list based management for IMC counter configurations,
allowing the system to dynamically allocate and clean up resources based on
actual hardware capabilities.
Signed-off-by: Yifan Wu <wuyifan50@huawei.com>
---
tools/testing/selftests/resctrl/resctrl.h | 1 +
tools/testing/selftests/resctrl/resctrl_val.c | 25 +++++++++++++++++++
2 files changed, 26 insertions(+)
diff --git a/tools/testing/selftests/resctrl/resctrl.h b/tools/testing/selftests/resctrl/resctrl.h
index 175101022bf3..29c9f76132f0 100644
--- a/tools/testing/selftests/resctrl/resctrl.h
+++ b/tools/testing/selftests/resctrl/resctrl.h
@@ -24,6 +24,7 @@
#include <linux/perf_event.h>
#include <linux/compiler.h>
#include <linux/bits.h>
+#include <linux/list.h>
#include "kselftest.h"
#define MB (1024 * 1024)
diff --git a/tools/testing/selftests/resctrl/resctrl_val.c b/tools/testing/selftests/resctrl/resctrl_val.c
index f20d2194c35f..ac58d3862281 100644
--- a/tools/testing/selftests/resctrl/resctrl_val.c
+++ b/tools/testing/selftests/resctrl/resctrl_val.c
@@ -28,6 +28,7 @@ struct membw_read_format {
};
struct imc_counter_config {
+ struct list_head imc_list;
__u32 type;
__u64 event;
__u64 umask;
@@ -38,6 +39,7 @@ struct imc_counter_config {
static char mbm_total_path[1024];
static int imcs;
static struct imc_counter_config imc_counters_config[MAX_IMCS];
+LIST_HEAD(imc_counters_configs);
static const struct resctrl_test *current_test;
static void read_mem_bw_initialize_perf_event_attr(int i)
@@ -235,6 +237,7 @@ static int read_from_imc_dir(char *imc_dir, unsigned int *count)
*/
static int num_of_imcs(void)
{
+ struct imc_counter_config *imc_counters_config;
char imc_dir[512], *temp;
unsigned int count = 0;
struct dirent *ep;
@@ -263,14 +266,23 @@ static int num_of_imcs(void)
* first character is a numerical digit or not.
*/
if (temp[0] >= '0' && temp[0] <= '9') {
+ imc_counters_config = malloc(sizeof(struct imc_counter_config));
+ if (!imc_counters_config) {
+ ksft_print_msg("Unable to allocate memory for iMC counters\n");
+
+ return -1;
+ }
+ memset(imc_counters_config, 0, sizeof(struct imc_counter_config));
sprintf(imc_dir, "%s/%s/", DYN_PMU_PATH,
ep->d_name);
ret = read_from_imc_dir(imc_dir, &count);
if (ret) {
+ free(imc_counters_config);
closedir(dp);
return ret;
}
+ list_add(&imc_counters_config->imc_list, &imc_counters_configs);
}
}
closedir(dp);
@@ -303,6 +315,19 @@ int initialize_read_mem_bw_imc(void)
return 0;
}
+void cleanup_read_mem_bw_imc(void)
+{
+ struct imc_counter_config *next_imc_counters_config;
+ struct imc_counter_config *imc_counters_config;
+
+ list_for_each_entry_safe(imc_counters_config, next_imc_counters_config,
+ &imc_counters_configs, imc_list) {
+ list_del(&imc_counters_config->imc_list);
+ free(imc_counters_config);
+ }
+ INIT_LIST_HEAD(&imc_counters_configs);
+}
+
static void perf_close_imc_read_mem_bw(void)
{
int mc;
--
2.33.0
^ permalink raw reply related
* [PATCH 3/3] selftests/resctrl: Add cleanup for MBM/MBA test
From: Yifan Wu @ 2026-03-24 12:50 UTC (permalink / raw)
To: tony.luck, reinette.chatre, Dave.Martin, james.morse, babu.moger,
shuah, tan.shaopeng, fenghuay, ben.horgan, jonathan.cameron,
zengheng4, wuyifan50, linux-kernel, linux-arm-kernel,
linux-kselftest, linuxarm
Cc: xiaqinxin, prime.zeng, wangyushan12, xuwei5, fanghao11, wangzhou1
In-Reply-To: <20260324125034.1509177-1-wuyifan50@huawei.com>
Added cleanup calls in MBA and MBM tests to prevent resource leaks.
Signed-off-by: Yifan Wu <wuyifan50@huawei.com>
---
tools/testing/selftests/resctrl/mba_test.c | 1 +
tools/testing/selftests/resctrl/mbm_test.c | 1 +
tools/testing/selftests/resctrl/resctrl.h | 1 +
3 files changed, 3 insertions(+)
diff --git a/tools/testing/selftests/resctrl/mba_test.c b/tools/testing/selftests/resctrl/mba_test.c
index 39cee9898359..4bb1a82eb195 100644
--- a/tools/testing/selftests/resctrl/mba_test.c
+++ b/tools/testing/selftests/resctrl/mba_test.c
@@ -166,6 +166,7 @@ static int check_results(void)
static void mba_test_cleanup(void)
{
+ cleanup_read_mem_bw_imc();
remove(RESULT_FILE_NAME);
}
diff --git a/tools/testing/selftests/resctrl/mbm_test.c b/tools/testing/selftests/resctrl/mbm_test.c
index 6dbbc3b76003..68c89f50a34a 100644
--- a/tools/testing/selftests/resctrl/mbm_test.c
+++ b/tools/testing/selftests/resctrl/mbm_test.c
@@ -125,6 +125,7 @@ static int mbm_measure(const struct user_params *uparams,
static void mbm_test_cleanup(void)
{
+ cleanup_read_mem_bw_imc();
remove(RESULT_FILE_NAME);
}
diff --git a/tools/testing/selftests/resctrl/resctrl.h b/tools/testing/selftests/resctrl/resctrl.h
index 29c9f76132f0..27dca1e7cf8e 100644
--- a/tools/testing/selftests/resctrl/resctrl.h
+++ b/tools/testing/selftests/resctrl/resctrl.h
@@ -184,6 +184,7 @@ void mem_flush(unsigned char *buf, size_t buf_size);
void fill_cache_read(unsigned char *buf, size_t buf_size, bool once);
ssize_t get_fill_buf_size(int cpu_no, const char *cache_type);
int initialize_read_mem_bw_imc(void);
+void cleanup_read_mem_bw_imc(void);
int measure_read_mem_bw(const struct user_params *uparams,
struct resctrl_val_param *param, pid_t bm_pid);
void initialize_mem_bw_resctrl(const struct resctrl_val_param *param,
--
2.33.0
^ permalink raw reply related
* Re: [PATCH net-next v2] net: airoha: Rework the code flow in airoha_remove() and in airoha_probe() error path
From: patchwork-bot+netdevbpf @ 2026-03-24 12:50 UTC (permalink / raw)
To: Lorenzo Bianconi
Cc: andrew+netdev, davem, edumazet, kuba, pabeni, horms,
linux-arm-kernel, linux-mediatek, netdev
In-Reply-To: <20260321-airoha-remove-rework-v2-1-16c7bade5fe5@kernel.org>
Hello:
This patch was applied to netdev/net-next.git (main)
by Paolo Abeni <pabeni@redhat.com>:
On Sat, 21 Mar 2026 15:41:44 +0100 you wrote:
> As suggested by Simon in [0], rework the code flow in airoha_remove()
> and in the airoha_probe() error path in order to rely on a more common
> approach un-registering configured net-devices first and destroying the
> hw resources at the end of the code.
> Introduce airoha_qdma_cleanup routine to release QDMA resources.
>
> [0] https://lore.kernel.org/netdev/20251214-airoha-fix-dev-registration-v1-1-860e027ad4c6@kernel.org/
>
> [...]
Here is the summary with links:
- [net-next,v2] net: airoha: Rework the code flow in airoha_remove() and in airoha_probe() error path
https://git.kernel.org/netdev/net-next/c/b1c803d5c816
You are awesome, thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html
^ permalink raw reply
* Re: [PATCH] ASoC: dt-bindings: stm32: Fix incorrect compatible string in stm32h7-sai match
From: Olivier MOYSAN @ 2026-03-24 12:49 UTC (permalink / raw)
To: Mark Brown, Jihed Chaibi
Cc: arnaud.pouliquen, mcoquelin.stm32, alexandre.torgue, lgirdwood,
krzk+dt, robh, conor+dt, devicetree, linux-sound, linux-stm32,
linux-kernel, linux-arm-kernel
In-Reply-To: <e4146fbd-3e2e-4d2f-b042-2af006bdfefb@sirena.org.uk>
Hi,
On 3/23/26 14:47, Mark Brown wrote:
> On Sat, Mar 21, 2026 at 02:20:11AM +0100, Jihed Chaibi wrote:
>> The conditional block that defines clock constraints for the stm32h7-sai
>> variant references "st,stm32mph7-sai", which does not match any compatible
>> string in the enum. As a result, clock validation for the h7 variant is
>> silently skipped. Correct the compatible string to "st,stm32h7-sai".
>
> A web search for stm32mph7 appears to show stm32h7 as the correct part
> number... ST people, any confirmation here? Are both valid?
The right part number is "st,stm32h7-sai" only.
So, the fix is valid. Thanks for it.
BRs
Olivier
^ permalink raw reply
* Re: [PATCH v7 12/41] KVM: arm64: gic-v5: Sanitize ID_AA64PFR2_EL1.GCIE
From: Mark Brown @ 2026-03-24 12:47 UTC (permalink / raw)
To: Sascha Bischoff
Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
kvm@vger.kernel.org, nd, maz@kernel.org, oliver.upton@linux.dev,
Joey Gouly, Suzuki Poulose, yuzenghui@huawei.com,
peter.maydell@linaro.org, lpieralisi@kernel.org, Timothy Hayes,
jonathan.cameron@huawei.com
In-Reply-To: <20260319154937.3619520-13-sascha.bischoff@arm.com>
[-- Attachment #1: Type: text/plain, Size: 2426 bytes --]
On Thu, Mar 19, 2026 at 03:52:50PM +0000, Sascha Bischoff wrote:
> Add in a sanitization function for ID_AA64PFR2_EL1, preserving the
> already-present behaviour for the FPMR, MTEFAR, and MTESTOREONLY
> fields. Add sanitisation for the GCIE field, which is set to IMP if
> the host supports a GICv5 guest and NI, otherwise.
We're also seeing an issue with this in the aarch32_id_regs test:
# selftests: kvm: aarch32_id_regs
# Random seed: 0x6b8b4567
# ==== Test Assertion Failure ====
# arm64/aarch32_id_regs.c:25: read_sysreg_s((((3) << 19) | ((0) << 16) | ((0) << 12) | ((1) << 8) | ((1) << 5))) == 0
# pid=3111 tid=3111 errno=4 - Interrupted system call
# sh: 1: addr2line: not found
# 0x10000000 != 0x0 (read_sysreg_s((((3) << 19) | ((0) << 16) | ((0) << 12) | ((1) << 8) | ((1) << 5))) != 0)
not ok 9 selftests: kvm: aarch32_id_regs # exit=254
which for some reason only manifests on TX2 of the platforms I've seen.
Bisect log:
git bisect start
# status: waiting for both good and bad commits
# bad: [e3d585ed3ff891a00c2284fef4be9cf8581735ab] Merge branch kvm-arm64/vgic-v5-ppi into kvmarm-master/next
git bisect bad e3d585ed3ff891a00c2284fef4be9cf8581735ab
# status: waiting for good commit(s), bad commit known
# good: [f338e77383789c0cae23ca3d48adcc5e9e137e3c] Linux 7.0-rc4
git bisect good f338e77383789c0cae23ca3d48adcc5e9e137e3c
# bad: [0a9f38bf612b195e04236d366ed9f769ce14cc27] KVM: arm64: selftests: Introduce a minimal GICv5 PPI selftest
git bisect bad 0a9f38bf612b195e04236d366ed9f769ce14cc27
# bad: [4d591252bacb2d004b7c7f5db439bfa23b552ee7] KVM: arm64: gic-v5: Implement PPI interrupt injection
git bisect bad 4d591252bacb2d004b7c7f5db439bfa23b552ee7
# good: [da92ff15ca4c5b0f75ec1cb3d2e275db2ff2c810] KVM: arm64: gic-v5: Add Arm copyright header
git bisect good da92ff15ca4c5b0f75ec1cb3d2e275db2ff2c810
# bad: [070543a85adce329672012a1fe35fa48c76e02d5] KVM: arm64: gic-v5: Trap and emulate ICC_IDR0_EL1 accesses
git bisect bad 070543a85adce329672012a1fe35fa48c76e02d5
# bad: [a258a383b91774ac646517ec1003a442964d8946] KVM: arm64: gic-v5: Sanitize ID_AA64PFR2_EL1.GCIE
git bisect bad a258a383b91774ac646517ec1003a442964d8946
# good: [f656807150e3e1c6f76cab918e5adfad6d881d58] KVM: arm64: gic-v5: Detect implemented PPIs on boot
git bisect good f656807150e3e1c6f76cab918e5adfad6d881d58
# first bad commit: [a258a383b91774ac646517ec1003a442964d8946] KVM: arm64: gic-v5: Sanitize ID_AA64PFR2_EL1.GCIE
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply
* Re: [PATCH bpf-next v10 1/5] bpf: Move constants blinding out of arch-specific JITs
From: bot+bpf-ci @ 2026-03-24 12:46 UTC (permalink / raw)
To: xukuohai, bpf, linux-kernel, linux-arm-kernel
Cc: ast, daniel, andrii, martin.lau, eddyz87, yonghong.song, puranjay,
a.s.protopopov, alexis.lothore, list+bpf, linux, yangtiezhu,
hengqi.chen, johan.almbladh, paulburton, hbathini, chleroy,
naveen, luke.r.nels, xi.wang, bjorn, pulehui, iii, hca, gor,
davem, udknight, ast, andrii, daniel, martin.lau, eddyz87,
yonghong.song, clm, ihor.solodrai
In-Reply-To: <20260324122052.342751-2-xukuohai@huaweicloud.com>
[-- Attachment #1: Type: text/plain, Size: 3978 bytes --]
> diff --git a/kernel/bpf/core.c b/kernel/bpf/core.c
> index 67eb12b637a5..8f52f4b6c3af 100644
> --- a/kernel/bpf/core.c
> +++ b/kernel/bpf/core.c
[ ... ]
> @@ -1507,13 +1507,16 @@ static void adjust_insn_arrays(struct bpf_prog *prog, u32 off, u32 len)
> #endif
> }
>
> -struct bpf_prog *bpf_jit_blind_constants(struct bpf_prog *prog)
> +struct bpf_prog *bpf_jit_blind_constants(struct bpf_verifier_env *env, struct bpf_prog *prog)
> {
[ ... ]
> - tmp = bpf_patch_insn_single(clone, i, insn_buff, rewritten);
> - if (IS_ERR(tmp)) {
> + if (env)
> + tmp = bpf_patch_insn_data(env, subprog_start + i, insn_buff, rewritten);
> + else
> + tmp = bpf_patch_insn_single(clone, i, insn_buff, rewritten);
When env is non-NULL, bpf_patch_insn_data() adjusts env->insn_aux_data
via adjust_insn_aux_data() and env->subprog_info via
adjust_subprog_starts(). This shifts subprogram start positions to
account for the expanded instructions.
> diff --git a/kernel/bpf/verifier.c b/kernel/bpf/verifier.c
> index cd008b146ee5..1b2b99f2d859 100644
> --- a/kernel/bpf/verifier.c
> +++ b/kernel/bpf/verifier.c
[ ... ]
> static int jit_subprogs(struct bpf_verifier_env *env)
> {
> - struct bpf_prog *prog = env->prog, **func, *tmp;
> + struct bpf_prog *orig_prog = env->prog, *prog, **func, *tmp;
> int i, j, subprog_start, subprog_end = 0, len, subprog;
> struct bpf_map *map_ptr;
> struct bpf_insn *insn;
> void *old_bpf_func;
> int err, num_exentries;
> - int old_len, subprog_start_adjustment = 0;
> + bool blinded = false;
>
> if (env->subprog_cnt <= 1)
> return 0;
>
> + prog = bpf_jit_blind_constants(env, NULL);
> + if (IS_ERR(prog))
> + return -ENOMEM;
> + if (prog != orig_prog)
> + blinded = true;
[ ... ]
> + if (blinded) {
> + bpf_jit_prog_release_other(orig_prog, prog);
> + env->prog = prog = orig_prog;
> + }
> /* cleanup main prog to be interpreted */
> prog->jit_requested = 0;
> prog->blinding_requested = 0;
> - for (i = 0, insn = prog->insnsi; i < prog->len; i++, insn++) {
> - if (!bpf_pseudo_call(insn))
> - continue;
> - insn->off = 0;
> - insn->imm = env->insn_aux_data[i].call_imm;
> + /* we already rolled back to the clean orig_prog when blinded is true */
> + if (!blinded) {
> + for (i = 0, insn = prog->insnsi; i < prog->len; i++, insn++) {
> + if (!bpf_pseudo_call(insn))
> + continue;
> + insn->off = 0;
> + insn->imm = env->insn_aux_data[i].call_imm;
> + }
> }
> bpf_prog_jit_attempt_done(prog);
> return err;
When blinded is true, the rollback restores env->prog to orig_prog, but
env->subprog_info still holds the shifted start positions from blinding
(adjusted by adjust_subprog_starts() in bpf_patch_insn_data()). The
commit message states "env->insn_aux_data and env->subprog_info are no
longer used after JIT failure." However, on configurations without
CONFIG_BPF_JIT_ALWAYS_ON, fixup_call_args() falls through to the
interpreter fixup loop after jit_subprogs() fails:
fixup_call_args() {
err = jit_subprogs(env); /* fails, e.g. -ENOTSUPP */
...
for (i = 0; i < prog->len; ...) {
...
depth = get_callee_stack_depth(env, insn, i);
}
}
get_callee_stack_depth() computes a target address from orig_prog's
original instruction offsets and calls find_subprog(env, start). Since
env->subprog_info start positions were shifted by blinding but the
instruction addresses are from the unblinded orig_prog, find_subprog()
fails to find a matching entry and returns -ENOENT, triggering a
spurious "verifier bug" warning and rejecting the program.
Could env->subprog_info be restored alongside the prog rollback, or
could jit_subprogs() return -EFAULT when blinding was active to skip
the interpreter fallback path?
---
AI reviewed your patch. Please fix the bug or email reply why it's not a bug.
See: https://github.com/kernel-patches/vmtest/blob/master/ci/claude/README.md
CI run summary: https://github.com/kernel-patches/bpf/actions/runs/23488858455
^ permalink raw reply
* Re: [PATCH] media: rkisp1: request/free irqs in PM runtime ops
From: Dan Scally @ 2026-03-24 12:45 UTC (permalink / raw)
To: Laurent Pinchart, Tomi Valkeinen
Cc: Dafna Hirschfeld, Mauro Carvalho Chehab, Heiko Stuebner,
linux-media, linux-rockchip, linux-arm-kernel
In-Reply-To: <20260106160346.GE26157@pendragon.ideasonboard.com>
Hi Laurent, Tomi
On 06/01/2026 16:03, Laurent Pinchart wrote:
> On Tue, Jan 06, 2026 at 06:01:38PM +0200, Tomi Valkeinen wrote:
>> Hi,
>>
>> On 05/01/2026 18:19, Daniel Scally wrote:
>>> The rkisp1 driver tracks whether the IRQ handlers should take any
>>> action through the use of an "irqs_enabled" flag which is set true
>>> at the end of .runtime_resume() and false at the start of
>>> .runtime_suspend(). In .runtime_suspend(), after setting the flag,
>>> there's then a short window during which the hardware has not yet
>>> been disabled by the clock APIs but interrupts remain enabled. If an
>>> interrupt is triggered during that window the IRQ handlers will return
>>> IRQ_NONE and fail to clear the ISP's IRQ reset registers.
>>>
>>> Instead, delay calling request_irq() from .probe() to the end of the
>>> .runtime_resume() callback, and call free_irq() at the start of the
>>> .runtime_suspend() callback. This will prevent the interrupt handlers
>>> being called at all for the device once .runtime_suspend() has been
>>> called for it.
>>
>> Shouldn't we usually always properly disable the IP before suspend? I've
>> seen IPs that definitely did not like at all cutting the clocks
>> arbitrarily when it's active.
>
> Yes we should. The driver should have real system suspend/resume
> handlers that stop and restart streaming.
I'm looking at this again now after having parked it for a while. We discussed earlier about the
changes that the driver needs to better handle a system suspend event whilst streaming, and I think
that those changes will solve the original problem I was having (interrupts arriving when the driver
didn't expect them, basically), but I wonder whether this change might not still be useful for a
different reason. The original discussion [1] that made the change adding the irqs_enabled flag to
the rkisp1 driver includes some discussion about a more generalisable way to ensure that the
handlers don't try to access the hardware if they run as a result of a different device triggering a
shared IRQ line - it seems to me that freeing the handler when it shouldn't be generating anything
would tackle that. Obviously it's something of a solved problem for this driver, but is it
worthwhile generally?
Thanks
Dan
[1] https://lore.kernel.org/all/20231218-rkisp-shirq-fix-v1-2-173007628248@ideasonboard.com/
>
>> And I don't think clk disable should be considered "disabling the
>> hardware". The clocks may not even be disabled at that time, if they're
>> shared clocks or always on clocks. So if the driver assumes that after
>> clk disable call it won't get any interrupts... I don't think that right.
>>
>> If we can't sensibly disable the IP, I think we can at least mask the
>> IP's interrupts in its interrupt enable register (which we probably
>> should do even if we can disable the IP), and wait for any possible irq
>> handler to stop running. After that we won't get any interrupts,
>> regardless of the clocks.
>>
>> Tomi
>>
>>> Signed-off-by: Daniel Scally <dan.scally@ideasonboard.com>
>>> ---
>>> We noticed this problem when testing hibernation with the streams
>>> running. In a typical use-case the stream might be stopped before the
>>> runtime PM suspend callback is called, and so the problem is avoided,
>>> but when hibernated with active streams there are sufficient interrupts
>>> coming in to reliably land one in the window between the irqs_enabled
>>> flag being set to false and the hardware being disabled through
>>> clk_bulk_disable_unprepare().
>>>
>>> I'm under the impression that requesting the IRQs when the device is
>>> in use in the manner of this patch and releasing the when it is not
>>> in use is preferred over requesting them in the .probe() function -
>>> possibly an impression I picked up from Linux Device Drivers. It
>>> doesn't seem to be a particularly common model though, so I thought
>>> I'd flag the method here.
>>> ---
>>> .../platform/rockchip/rkisp1/rkisp1-capture.c | 3 -
>>> .../media/platform/rockchip/rkisp1/rkisp1-common.h | 2 -
>>> .../media/platform/rockchip/rkisp1/rkisp1-csi.c | 3 -
>>> .../media/platform/rockchip/rkisp1/rkisp1-dev.c | 82 +++++++++++++++-------
>>> .../media/platform/rockchip/rkisp1/rkisp1-isp.c | 3 -
>>> 5 files changed, 57 insertions(+), 36 deletions(-)
>>>
>>> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
>>> index 6dcefd144d5abe358323e37ac6133c6134ac636e..510d1e8d8bbc86e8b8be3579571e308e5ad9f260 100644
>>> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
>>> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
>>> @@ -820,9 +820,6 @@ irqreturn_t rkisp1_capture_isr(int irq, void *ctx)
>>> unsigned int i;
>>> u32 status;
>>>
>>> - if (!rkisp1->irqs_enabled)
>>> - return IRQ_NONE;
>>> -
>>> status = rkisp1_read(rkisp1, RKISP1_CIF_MI_MIS);
>>> if (!status)
>>> return IRQ_NONE;
>>> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
>>> index 5e6a4d5f6fd12baf45a0083eff75de1095162b2d..2a5f6f69b217cdba2fa7c4d1f230ede5aff49149 100644
>>> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
>>> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
>>> @@ -507,7 +507,6 @@ struct rkisp1_debug {
>>> * @debug: debug params to be exposed on debugfs
>>> * @info: version-specific ISP information
>>> * @irqs: IRQ line numbers
>>> - * @irqs_enabled: the hardware is enabled and can cause interrupts
>>> */
>>> struct rkisp1_device {
>>> void __iomem *base_addr;
>>> @@ -532,7 +531,6 @@ struct rkisp1_device {
>>> struct rkisp1_debug debug;
>>> const struct rkisp1_info *info;
>>> int irqs[RKISP1_NUM_IRQS];
>>> - bool irqs_enabled;
>>> };
>>>
>>> /*
>>> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-csi.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-csi.c
>>> index ddc6182f3e4bdacdd1962c86f6259334b16aa505..bfc33365ad9d09ccace4ccbb2b19a2fbe1b77eb2 100644
>>> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-csi.c
>>> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-csi.c
>>> @@ -196,9 +196,6 @@ irqreturn_t rkisp1_csi_isr(int irq, void *ctx)
>>> struct rkisp1_device *rkisp1 = dev_get_drvdata(dev);
>>> u32 val, status;
>>>
>>> - if (!rkisp1->irqs_enabled)
>>> - return IRQ_NONE;
>>> -
>>> status = rkisp1_read(rkisp1, RKISP1_CIF_MIPI_MIS);
>>> if (!status)
>>> return IRQ_NONE;
>>> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c
>>> index 1791c02a40ae18205f5eb2fd6edca6cda6b459bf..6fa76423bacf3e92cbbb4ef1ceb55e194b88d963 100644
>>> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c
>>> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c
>>> @@ -307,28 +307,62 @@ static int rkisp1_subdev_notifier_register(struct rkisp1_device *rkisp1)
>>> * Power
>>> */
>>>
>>> -static int __maybe_unused rkisp1_runtime_suspend(struct device *dev)
>>> +static void rkisp1_free_irqs(struct rkisp1_device *rkisp1)
>>> {
>>> - struct rkisp1_device *rkisp1 = dev_get_drvdata(dev);
>>> + for (unsigned int i = 0; i < ARRAY_SIZE(rkisp1->irqs); i++) {
>>> + if (rkisp1->irqs[i] == -1)
>>> + continue;
>>>
>>> - rkisp1->irqs_enabled = false;
>>> - /* Make sure the IRQ handler will see the above */
>>> - mb();
>>> + if (irq_has_action(rkisp1->irqs[i]))
>>> + free_irq(rkisp1->irqs[i], rkisp1->dev);
>>> + }
>>> +}
>>>
>>> - /*
>>> - * Wait until any running IRQ handler has returned. The IRQ handler
>>> - * may get called even after this (as it's a shared interrupt line)
>>> - * but the 'irqs_enabled' flag will make the handler return immediately.
>>> - */
>>> - for (unsigned int il = 0; il < ARRAY_SIZE(rkisp1->irqs); ++il) {
>>> - if (rkisp1->irqs[il] == -1)
>>> +static int rkisp1_request_irqs(struct rkisp1_device *rkisp1)
>>> +{
>>> + const struct rkisp1_info *info = rkisp1->info;
>>> + int ret;
>>> +
>>> + for (unsigned int irqn = 0; irqn < ARRAY_SIZE(rkisp1->irqs); irqn++) {
>>> + unsigned int isrn;
>>> +
>>> + if (rkisp1->irqs[irqn] == -1)
>>> continue;
>>>
>>> - /* Skip if the irq line is the same as previous */
>>> - if (il == 0 || rkisp1->irqs[il - 1] != rkisp1->irqs[il])
>>> - synchronize_irq(rkisp1->irqs[il]);
>>> + if (irq_has_action(rkisp1->irqs[irqn]))
>>> + continue;
>>> +
>>> + for (isrn = 0; isrn < info->isr_size; isrn++)
>>> + if ((info->isrs[isrn].line_mask & BIT(irqn)))
>>> + break;
>>> +
>>> + if (isrn == info->isr_size) {
>>> + dev_err(rkisp1->dev, "Failed to find IRQ handler\n");
>>> + return -EINVAL;
>>> + }
>>> +
>>> + ret = request_irq(rkisp1->irqs[irqn], info->isrs[isrn].isr,
>>> + IRQF_SHARED, dev_driver_string(rkisp1->dev),
>>> + rkisp1->dev);
>>> + if (ret) {
>>> + dev_err(rkisp1->dev, "Failed to request IRQ\n");
>>> + goto err_free_irqs;
>>> + }
>>> }
>>>
>>> + return 0;
>>> +
>>> +err_free_irqs:
>>> + rkisp1_free_irqs(rkisp1);
>>> + return ret;
>>> +}
>>> +
>>> +static int __maybe_unused rkisp1_runtime_suspend(struct device *dev)
>>> +{
>>> + struct rkisp1_device *rkisp1 = dev_get_drvdata(dev);
>>> +
>>> + rkisp1_free_irqs(rkisp1);
>>> +
>>> clk_bulk_disable_unprepare(rkisp1->clk_size, rkisp1->clks);
>>> return pinctrl_pm_select_sleep_state(dev);
>>> }
>>> @@ -345,11 +379,16 @@ static int __maybe_unused rkisp1_runtime_resume(struct device *dev)
>>> if (ret)
>>> return ret;
>>>
>>> - rkisp1->irqs_enabled = true;
>>> - /* Make sure the IRQ handler will see the above */
>>> - mb();
>>> + ret = rkisp1_request_irqs(rkisp1);
>>> + if (ret)
>>> + goto err_clk_disable;
>>>
>>> return 0;
>>> +
>>> +err_clk_disable:
>>> + clk_bulk_disable_unprepare(rkisp1->clk_size, rkisp1->clks);
>>> +
>>> + return ret;
>>> }
>>>
>>> static const struct dev_pm_ops rkisp1_pm_ops = {
>>> @@ -694,13 +733,6 @@ static int rkisp1_probe(struct platform_device *pdev)
>>> if (info->isrs[i].line_mask & BIT(il))
>>> rkisp1->irqs[il] = irq;
>>> }
>>> -
>>> - ret = devm_request_irq(dev, irq, info->isrs[i].isr, IRQF_SHARED,
>>> - dev_driver_string(dev), dev);
>>> - if (ret) {
>>> - dev_err(dev, "request irq failed: %d\n", ret);
>>> - return ret;
>>> - }
>>> }
>>>
>>> ret = rkisp1_init_clocks(rkisp1);
>>> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c
>>> index 2311672cedb1b6c9dd7f1b883adcac1516a685ae..c6b1ecd2d0c260f6739726c9f32562b98ca31364 100644
>>> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c
>>> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c
>>> @@ -1106,9 +1106,6 @@ irqreturn_t rkisp1_isp_isr(int irq, void *ctx)
>>> struct rkisp1_device *rkisp1 = dev_get_drvdata(dev);
>>> u32 status, isp_err;
>>>
>>> - if (!rkisp1->irqs_enabled)
>>> - return IRQ_NONE;
>>> -
>>> status = rkisp1_read(rkisp1, RKISP1_CIF_ISP_MIS);
>>> if (!status)
>>> return IRQ_NONE;
>>>
>>> ---
>>> base-commit: ee5b462b97162dbb6c536e18a37b3048f6520019
>>> change-id: 20260105-rkisp1-irqs-8af5a1e0b887
>
^ permalink raw reply
* Re: (subset) [PATCH 2/5] clk: samsung: exynos850: Add APM-to-AP mailbox clock
From: Krzysztof Kozlowski @ 2026-03-24 12:44 UTC (permalink / raw)
To: Sylwester Nawrocki, Chanwoo Choi, Alim Akhtar, Sam Protsenko,
Michael Turquette, Stephen Boyd, Rob Herring, Conor Dooley,
Tudor Ambarus, Jassi Brar, Alexey Klimov
Cc: Krzysztof Kozlowski, Peter Griffin, linux-samsung-soc,
linux-arm-kernel, linux-clk, devicetree, linux-kernel
In-Reply-To: <20260320-exynos850-ap2apm-mailbox-v1-2-983eb3f296fc@linaro.org>
On Fri, 20 Mar 2026 21:15:14 +0000, Alexey Klimov wrote:
> Add APM mailbox clock for communicating between APM and main application
> CPUs in CMU_APM unit. This clock is needed to access this mailbox
> registers. This mailbox is used for ACPM communication between kernel
> and APM co-processor.
Applied, thanks!
[2/5] clk: samsung: exynos850: Add APM-to-AP mailbox clock
https://git.kernel.org/krzk/linux/c/e57c36bc1a3e459239ead492ebce731a88a264b1
Best regards,
--
Krzysztof Kozlowski <krzk@kernel.org>
^ permalink raw reply
* Re: (subset) [PATCH 1/5] dt-bindings: clock: exynos850: Add APM_AP MAILBOX clock
From: Krzysztof Kozlowski @ 2026-03-24 12:42 UTC (permalink / raw)
To: Sylwester Nawrocki, Chanwoo Choi, Alim Akhtar, Sam Protsenko,
Michael Turquette, Stephen Boyd, Rob Herring, Conor Dooley,
Tudor Ambarus, Jassi Brar, Alexey Klimov
Cc: Krzysztof Kozlowski, Peter Griffin, linux-samsung-soc,
linux-arm-kernel, linux-clk, devicetree, linux-kernel
In-Reply-To: <20260320-exynos850-ap2apm-mailbox-v1-1-983eb3f296fc@linaro.org>
On Fri, 20 Mar 2026 21:15:13 +0000, Alexey Klimov wrote:
> Add a constant for APM-to-AP mailbox clock. This clock is needed
> to access this mailbox registers.
Applied, thanks!
[1/5] dt-bindings: clock: exynos850: Add APM_AP MAILBOX clock
https://git.kernel.org/krzk/linux/c/bf9462c82721e42f49e4a62efe96ef7b41a5e42e
Best regards,
--
Krzysztof Kozlowski <krzk@kernel.org>
^ permalink raw reply
* Re: [PATCH 10/12] s390/ap: use generic driver_override infrastructure
From: Harald Freudenberger @ 2026-03-24 12:41 UTC (permalink / raw)
To: Danilo Krummrich
Cc: Russell King, Greg Kroah-Hartman, Rafael J. Wysocki,
Ioana Ciornei, Nipun Gupta, Nikhil Agarwal, K. Y. Srinivasan,
Haiyang Zhang, Wei Liu, Dexuan Cui, Long Li, Bjorn Helgaas,
Armin Wolf, Bjorn Andersson, Mathieu Poirier, Vineeth Vijayan,
Peter Oberparleiter, Heiko Carstens, Vasily Gorbik,
Alexander Gordeev, Christian Borntraeger, Sven Schnelle,
Holger Dengler, Mark Brown, Michael S. Tsirkin, Jason Wang,
Xuan Zhuo, Eugenio Pérez, Alex Williamson, Juergen Gross,
Stefano Stabellini, Oleksandr Tyshchenko,
Christophe Leroy (CS GROUP), linux-kernel, driver-core,
linuxppc-dev, linux-hyperv, linux-pci, platform-driver-x86,
linux-arm-msm, linux-remoteproc, linux-s390, linux-spi,
virtualization, kvm, xen-devel, linux-arm-kernel
In-Reply-To: <20260324005919.2408620-11-dakr@kernel.org>
On 2026-03-24 01:59, Danilo Krummrich wrote:
> When the AP masks are updated via apmask_store() or aqmask_store(),
> ap_bus_revise_bindings() is called after ap_attr_mutex has been
> released.
>
> This calls __ap_revise_reserved(), which accesses the driver_override
> field without holding any lock, racing against a concurrent
> driver_override_store() that may free the old string, resulting in a
> potential UAF.
>
> Fix this by using the driver-core driver_override infrastructure, which
> protects all accesses with an internal spinlock.
>
> Note that unlike most other buses, the AP bus does not check
> driver_override in its match() callback; the override is checked in
> ap_device_probe() and __ap_revise_reserved() instead.
>
> Also note that we do not enable the driver_override feature of struct
> bus_type, as AP - in contrast to most other buses - passes "" to
> sysfs_emit() when the driver_override pointer is NULL. Thus, printing
> "\n" instead of "(null)\n".
>
> Additionally, AP has a custom counter that is modified in the
> corresponding custom driver_override_store().
>
> Fixes: d38a87d7c064 ("s390/ap: Support driver_override for AP queue
> devices")
> Signed-off-by: Danilo Krummrich <dakr@kernel.org>
> ---
> drivers/s390/crypto/ap_bus.c | 34 +++++++++++++++++-----------------
> drivers/s390/crypto/ap_bus.h | 1 -
> drivers/s390/crypto/ap_queue.c | 24 ++++++------------------
> 3 files changed, 23 insertions(+), 36 deletions(-)
>
> diff --git a/drivers/s390/crypto/ap_bus.c
> b/drivers/s390/crypto/ap_bus.c
> index d652df96a507..f24e27add721 100644
> --- a/drivers/s390/crypto/ap_bus.c
> +++ b/drivers/s390/crypto/ap_bus.c
> @@ -859,25 +859,24 @@ static int
> __ap_queue_devices_with_id_unregister(struct device *dev, void *data)
>
> static int __ap_revise_reserved(struct device *dev, void *dummy)
> {
> - int rc, card, queue, devres, drvres;
> + int rc, card, queue, devres, drvres, ovrd;
>
> if (is_queue_dev(dev)) {
> struct ap_driver *ap_drv = to_ap_drv(dev->driver);
> struct ap_queue *aq = to_ap_queue(dev);
> - struct ap_device *ap_dev = &aq->ap_dev;
>
> card = AP_QID_CARD(aq->qid);
> queue = AP_QID_QUEUE(aq->qid);
>
> - if (ap_dev->driver_override) {
> - if (strcmp(ap_dev->driver_override,
> - ap_drv->driver.name)) {
> - pr_debug("reprobing queue=%02x.%04x\n", card, queue);
> - rc = device_reprobe(dev);
> - if (rc) {
> - AP_DBF_WARN("%s reprobing queue=%02x.%04x failed\n",
> - __func__, card, queue);
> - }
> + ovrd = device_match_driver_override(dev, &ap_drv->driver);
> + if (ovrd > 0) {
> + /* override set and matches, nothing to do */
> + } else if (ovrd == 0) {
> + pr_debug("reprobing queue=%02x.%04x\n", card, queue);
> + rc = device_reprobe(dev);
> + if (rc) {
> + AP_DBF_WARN("%s reprobing queue=%02x.%04x failed\n",
> + __func__, card, queue);
> }
> } else {
> mutex_lock(&ap_attr_mutex);
> @@ -928,7 +927,7 @@ int ap_owned_by_def_drv(int card, int queue)
> if (aq) {
> const struct device_driver *drv = aq->ap_dev.device.driver;
> const struct ap_driver *ap_drv = to_ap_drv(drv);
> - bool override = !!aq->ap_dev.driver_override;
> + bool override = device_has_driver_override(&aq->ap_dev.device);
>
> if (override && drv && ap_drv->flags & AP_DRIVER_FLAG_DEFAULT)
> rc = 1;
> @@ -977,7 +976,7 @@ static int ap_device_probe(struct device *dev)
> {
> struct ap_device *ap_dev = to_ap_dev(dev);
> struct ap_driver *ap_drv = to_ap_drv(dev->driver);
> - int card, queue, devres, drvres, rc = -ENODEV;
> + int card, queue, devres, drvres, rc = -ENODEV, ovrd;
>
> if (!get_device(dev))
> return rc;
> @@ -991,10 +990,11 @@ static int ap_device_probe(struct device *dev)
> */
> card = AP_QID_CARD(to_ap_queue(dev)->qid);
> queue = AP_QID_QUEUE(to_ap_queue(dev)->qid);
> - if (ap_dev->driver_override) {
> - if (strcmp(ap_dev->driver_override,
> - ap_drv->driver.name))
> - goto out;
> + ovrd = device_match_driver_override(dev, &ap_drv->driver);
> + if (ovrd > 0) {
> + /* override set and matches, nothing to do */
> + } else if (ovrd == 0) {
> + goto out;
> } else {
> mutex_lock(&ap_attr_mutex);
> devres = test_bit_inv(card, ap_perms.apm) &&
> diff --git a/drivers/s390/crypto/ap_bus.h
> b/drivers/s390/crypto/ap_bus.h
> index 51e08f27bd75..04ea256ecf91 100644
> --- a/drivers/s390/crypto/ap_bus.h
> +++ b/drivers/s390/crypto/ap_bus.h
> @@ -166,7 +166,6 @@ void ap_driver_unregister(struct ap_driver *);
> struct ap_device {
> struct device device;
> int device_type; /* AP device type. */
> - const char *driver_override;
> };
>
> #define to_ap_dev(x) container_of((x), struct ap_device, device)
> diff --git a/drivers/s390/crypto/ap_queue.c
> b/drivers/s390/crypto/ap_queue.c
> index 3fe2e41c5c6b..ca9819e6f7e7 100644
> --- a/drivers/s390/crypto/ap_queue.c
> +++ b/drivers/s390/crypto/ap_queue.c
> @@ -734,26 +734,14 @@ static ssize_t driver_override_show(struct device
> *dev,
> struct device_attribute *attr,
> char *buf)
> {
> - struct ap_queue *aq = to_ap_queue(dev);
> - struct ap_device *ap_dev = &aq->ap_dev;
> - int rc;
> -
> - device_lock(dev);
> - if (ap_dev->driver_override)
> - rc = sysfs_emit(buf, "%s\n", ap_dev->driver_override);
> - else
> - rc = sysfs_emit(buf, "\n");
> - device_unlock(dev);
> -
> - return rc;
> + guard(spinlock)(&dev->driver_override.lock);
> + return sysfs_emit(buf, "%s\n", dev->driver_override.name ?: "");
> }
>
> static ssize_t driver_override_store(struct device *dev,
> struct device_attribute *attr,
> const char *buf, size_t count)
> {
> - struct ap_queue *aq = to_ap_queue(dev);
> - struct ap_device *ap_dev = &aq->ap_dev;
> int rc = -EINVAL;
> bool old_value;
>
> @@ -764,13 +752,13 @@ static ssize_t driver_override_store(struct
> device *dev,
> if (ap_apmask_aqmask_in_use)
> goto out;
>
> - old_value = ap_dev->driver_override ? true : false;
> - rc = driver_set_override(dev, &ap_dev->driver_override, buf, count);
> + old_value = device_has_driver_override(dev);
> + rc = __device_set_driver_override(dev, buf, count);
> if (rc)
> goto out;
> - if (old_value && !ap_dev->driver_override)
> + if (old_value && !device_has_driver_override(dev))
> --ap_driver_override_ctr;
> - else if (!old_value && ap_dev->driver_override)
> + else if (!old_value && device_has_driver_override(dev))
> ++ap_driver_override_ctr;
>
> rc = count;
Thanks Danilo
Reviewed-by: Harald Freudenberger <freude@linux.ibm.com>
^ permalink raw reply
* [PATCH v6 08/10] arm64: dts: lx2160a-cex7: add rtc alias
From: Josua Mayer @ 2026-03-24 12:41 UTC (permalink / raw)
To: Frank Li, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Shawn Guo, Carlos Song
Cc: Mikhail Anikin, Yazan Shhady, Rabeeh Khoury, Frank Li,
linux-arm-kernel, devicetree, linux-kernel, Josua Mayer
In-Reply-To: <20260324-lx2160-sd-cd-v6-0-8bf207711848@solid-run.com>
Add alias for rtc0 ensuring that on-COM RTC is assigned first index.
Note that fsl-lx2160a.dtsi already defines an alias for rtc1 which
implicitly achieved the same result.
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dtsi
index 7f6e39e27ce5c..90956ffb8ea9a 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dtsi
@@ -14,6 +14,7 @@ / {
aliases {
crypto = &crypto;
+ rtc0 = &com_rtc;
};
sb_3v3: regulator-sb3v3 {
@@ -154,7 +155,7 @@ &i2c2 {
&i2c4 {
status = "okay";
- rtc@51 {
+ com_rtc: rtc@51 {
compatible = "nxp,pcf2129";
reg = <0x51>;
interrupts-extended = <&gpio2 8 IRQ_TYPE_LEVEL_LOW>;
--
2.51.0
^ permalink raw reply related
* [PATCH v6 07/10] arm64: dts: lx2160a: complete pinmux for rcwsr12 configuration word
From: Josua Mayer @ 2026-03-24 12:41 UTC (permalink / raw)
To: Frank Li, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Shawn Guo, Carlos Song
Cc: Mikhail Anikin, Yazan Shhady, Rabeeh Khoury, Frank Li,
linux-arm-kernel, devicetree, linux-kernel, Josua Mayer
In-Reply-To: <20260324-lx2160-sd-cd-v6-0-8bf207711848@solid-run.com>
Commit 8a1365c7bbc1 ("arm64: dts: lx2160a: add pinmux and i2c gpio to
support bus recovery") introduced pinmux nodes for lx2160 i2c
interfaces, allowing runtime change between i2c and gpio functions
implementing bus recovery.
However, the dynamic configuration area (overwrite MUX) used by the
pinctrl-single driver initially reads as zero and does not reflect the
actual hardware state set by the Reset Configuration Word (RCW) at
power-on.
Because multiple groups of pins are configured from a single 32-bit
register, the first write from the pinctrl driver unintentionally clears
all other bits to zero.
Add description for all bits of RCWSR12 register, allowing boards to
explicitly define and restore their intended hardware state.
This includes i2c, gpio, flextimer, spi, can and sdhc functions.
Other configuration words, i.e. RCWSR13 & RCWSR14 may be added in the
future for boards setting non-zero values there.
Fixes: 8a1365c7bbc1 ("arm64: dts: lx2160a: add pinmux and i2c gpio to support bus recovery")
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 75 ++++++++++++++++++++++++++
1 file changed, 75 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
index d266bf96e2c6a..479982948ee53 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
@@ -1721,6 +1721,7 @@ pinmux_i2crv: pinmux@70010012c {
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0x7>;
+ /* RCWSR12 */
i2c1_pins: iic2-i2c-pins {
pinctrl-single,bits = <0x0 0x0 0x7>;
};
@@ -1729,6 +1730,10 @@ gpio0_31_30_pins: iic2-gpio-pins {
pinctrl-single,bits = <0x0 0x1 0x7>;
};
+ ftm0_ch10_pins: iic2-ftm-pins {
+ pinctrl-single,bits = <0x0 0x2 0x7>;
+ };
+
esdhc0_cd_wp_pins: iic2-sdhc-pins {
pinctrl-single,bits = <0x0 0x6 0x7>;
};
@@ -1741,6 +1746,14 @@ gpio0_29_28_pins: iic3-gpio-pins {
pinctrl-single,bits = <0x0 (0x1 << 3) (0x7 << 3)>;
};
+ can0_pins: iic3-can-pins {
+ pinctrl-single,bits = <0x0 (0x2 << 3) (0x7 << 3)>;
+ };
+
+ event65_pins: iic3-event-pins {
+ pinctrl-single,bits = <0x0 (0x6 << 3) (0x7 << 3)>;
+ };
+
i2c3_pins: iic4-i2c-pins {
pinctrl-single,bits = <0x0 0x0 (0x7 << 6)>;
};
@@ -1749,6 +1762,14 @@ gpio0_27_26_pins: iic4-gpio-pins {
pinctrl-single,bits = <0x0 (0x1 << 6) (0x7 << 6)>;
};
+ can1_pins: iic4-can-pins {
+ pinctrl-single,bits = <0x0 (0x2 << 6) (0x7 << 6)>;
+ };
+
+ event87_pins: iic4-event-pins {
+ pinctrl-single,bits = <0x0 (0x6 << 6) (0x7 << 6)>;
+ };
+
i2c4_pins: iic5-i2c-pins {
pinctrl-single,bits = <0x0 0x0 (0x7 << 9)>;
};
@@ -1757,6 +1778,14 @@ gpio0_25_24_pins: iic5-gpio-pins {
pinctrl-single,bits = <0x0 (0x1 << 9) (0x7 << 9)>;
};
+ esdhc0_clksync_pins: iic5-sdhc-clk-pins {
+ pinctrl-single,bits = <0x0 (0x2 << 9) (0x7 << 9)>;
+ };
+
+ dspi2_miso_mosi_pins: iic5-spi3-pins {
+ pinctrl-single,bits = <0x3 (0x2 << 9) (0x7 << 9)>;
+ };
+
i2c5_pins: iic6-i2c-pins {
pinctrl-single,bits = <0x0 0x0 (0x7 << 12)>;
};
@@ -1765,26 +1794,71 @@ gpio0_23_22_pins: iic6-gpio-pins {
pinctrl-single,bits = <0x0 (0x1 << 12) (0x7 << 12)>;
};
+ esdhc1_clksync_pins: iic6-sdhc-clk-pins {
+ pinctrl-single,bits = <0x0 (0x2 << 12) (0x7 << 12)>;
+ };
+
fspi_data74_pins: xspi1-data74-pins {
pinctrl-single,bits = <0x0 0x0 (0x7 << 15)>;
};
+ gpio1_31_28_pins: xspi1-data74-gpio-pins {
+ pinctrl-single,bits = <0x0 0x1 (0x7 << 15)>;
+ };
+
fspi_data30_pins: xspi1-data30-pins {
pinctrl-single,bits = <0x0 0x0 (0x7 << 18)>;
};
+ gpio1_27_24_pins: xspi1-data30-gpio-pins {
+ pinctrl-single,bits = <0x0 0x1 (0x7 << 18)>;
+ };
+
fspi_dqs_sck_cs10_pins: xspi1-base-pins {
pinctrl-single,bits = <0x0 0x0 (0x7 << 21)>;
};
+ gpio1_23_20_pins: xspi1-base-gpio-pins {
+ pinctrl-single,bits = <0x0 0x1 (0x7 << 21)>;
+ };
+
esdhc0_cmd_data30_clk_vsel_pins: sdhc1-base-sdhc-vsel-pins {
pinctrl-single,bits = <0x0 0x0 (0x7 << 24)>;
};
+ gpio0_21_15_pins: sdhc1-base-gpio-pins {
+ pinctrl-single,bits = <0x0 (0x1 << 24) (0x7 << 24)>;
+ };
+
+ dspi0_pins: sdhc1-base-spi1-pins {
+ pinctrl-single,bits = <0x0 (0x2 << 24) (0x7 << 24)>;
+ };
+
+ esdhc0_cmd_data30_clk_dspi2_cs0_pins: sdhc1-base-sdhc-spi3-pins {
+ pinctrl-single,bits = <0x0 (0x3 << 24) (0x7 << 24)>;
+ };
+
+ esdhc0_cmd_data30_clk_data4_pins: sdhc1-base-sdhc-data4-pins {
+ pinctrl-single,bits = <0x0 (0x4 << 24) (0x7 << 24)>;
+ };
+
+ esdhc0_dir_pins: sdhc1-dir-pins {
+ pinctrl-single,bits = <0x0 0x0 (0x7 << 27)>;
+ };
+
gpio0_14_12_pins: sdhc1-dir-gpio-pins {
pinctrl-single,bits = <0x0 (0x1 << 27) (0x7 << 27)>;
};
+ dspi2_cs31_pins: sdhc1-dir-spi3-pins {
+ pinctrl-single,bits = <0x0 (0x3 << 27) (0x7 << 27)>;
+ };
+
+ esdhc0_data75_pins: sdhc1-dir-sdhc-pins {
+ pinctrl-single,bits = <0x0 (0x4 << 27) (0x7 << 27)>;
+ };
+
+ /* RCWSR13 */
gpio1_18_15_pins: iic8-iic7-gpio-pins {
pinctrl-single,bits = <0x4 0x1 0x7>;
};
@@ -1793,6 +1867,7 @@ i2c6_i2c7_pins: iic8-iic7-i2c-pins {
pinctrl-single,bits = <0x4 0x2 0x7>;
};
+ /* RCWSR14 */
i2c0_pins: iic1-i2c-pins {
pinctrl-single,bits = <0x8 0x0 (0x1 << 10)>;
};
--
2.51.0
^ permalink raw reply related
* [PATCH v6 06/10] arm64: dts: lx2160a: change zeros to hexadecimal in pinmux nodes
From: Josua Mayer @ 2026-03-24 12:41 UTC (permalink / raw)
To: Frank Li, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Shawn Guo, Carlos Song
Cc: Mikhail Anikin, Yazan Shhady, Rabeeh Khoury, Frank Li,
linux-arm-kernel, devicetree, linux-kernel, Josua Mayer
In-Reply-To: <20260324-lx2160-sd-cd-v6-0-8bf207711848@solid-run.com>
Replace some stray zeros from decimal to hexadecimal format within
pinmux nodes.
No functional change intended.
Fixes: 8a1365c7bbc1 ("arm64: dts: lx2160a: add pinmux and i2c gpio to support bus recovery")
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
index 53b9c5f1f1935..d266bf96e2c6a 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
@@ -1722,7 +1722,7 @@ pinmux_i2crv: pinmux@70010012c {
pinctrl-single,function-mask = <0x7>;
i2c1_pins: iic2-i2c-pins {
- pinctrl-single,bits = <0x0 0 0x7>;
+ pinctrl-single,bits = <0x0 0x0 0x7>;
};
gpio0_31_30_pins: iic2-gpio-pins {
@@ -1734,7 +1734,7 @@ esdhc0_cd_wp_pins: iic2-sdhc-pins {
};
i2c2_pins: iic3-i2c-pins {
- pinctrl-single,bits = <0x0 0 (0x7 << 3)>;
+ pinctrl-single,bits = <0x0 0x0 (0x7 << 3)>;
};
gpio0_29_28_pins: iic3-gpio-pins {
@@ -1742,7 +1742,7 @@ gpio0_29_28_pins: iic3-gpio-pins {
};
i2c3_pins: iic4-i2c-pins {
- pinctrl-single,bits = <0x0 0 (0x7 << 6)>;
+ pinctrl-single,bits = <0x0 0x0 (0x7 << 6)>;
};
gpio0_27_26_pins: iic4-gpio-pins {
@@ -1750,7 +1750,7 @@ gpio0_27_26_pins: iic4-gpio-pins {
};
i2c4_pins: iic5-i2c-pins {
- pinctrl-single,bits = <0x0 0 (0x7 << 9)>;
+ pinctrl-single,bits = <0x0 0x0 (0x7 << 9)>;
};
gpio0_25_24_pins: iic5-gpio-pins {
@@ -1758,7 +1758,7 @@ gpio0_25_24_pins: iic5-gpio-pins {
};
i2c5_pins: iic6-i2c-pins {
- pinctrl-single,bits = <0x0 0 (0x7 << 12)>;
+ pinctrl-single,bits = <0x0 0x0 (0x7 << 12)>;
};
gpio0_23_22_pins: iic6-gpio-pins {
--
2.51.0
^ permalink raw reply related
* [PATCH v6 10/10] arm64: dts: lx2162a-clearfog: set sfp connector leds function and source
From: Josua Mayer @ 2026-03-24 12:41 UTC (permalink / raw)
To: Frank Li, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Shawn Guo, Carlos Song
Cc: Mikhail Anikin, Yazan Shhady, Rabeeh Khoury, Frank Li,
linux-arm-kernel, devicetree, linux-kernel, Josua Mayer
In-Reply-To: <20260324-lx2160-sd-cd-v6-0-8bf207711848@solid-run.com>
LX2162A Clearfog has four LEDs attached physically to the 4-port SFP
connector. They are intended to show information relating to network
interface status.
Select "netdev" as default trigger for each LED, and link each one to
the respective dpmac instance as trigger-source.
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts b/arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts
index 8920326a06735..9d50d3e2761da 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts
@@ -41,21 +41,29 @@ leds {
led_sfp_at: led-sfp-at {
gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /* PROC_IRQ5 */
default-state = "off";
+ linux,default-trigger = "netdev";
+ trigger-sources = <&dpmac3>;
};
led_sfp_ab: led-sfp-ab {
gpios = <&gpio2 11 GPIO_ACTIVE_HIGH>; /* PROC_IRQ11 */
default-state = "off";
+ linux,default-trigger = "netdev";
+ trigger-sources = <&dpmac4>;
};
led_sfp_bt: led-sfp-bt {
gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>; /* EVT1_B */
default-state = "off";
+ linux,default-trigger = "netdev";
+ trigger-sources = <&dpmac5>;
};
led_sfp_bb: led-sfp-bb {
gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>; /* EVT2_B */
default-state = "off";
+ linux,default-trigger = "netdev";
+ trigger-sources = <&dpmac6>;
};
};
--
2.51.0
^ permalink raw reply related
* [PATCH v6 09/10] arm64: dts: lx2162a-sr-som: add crypto & rtc aliases, model
From: Josua Mayer @ 2026-03-24 12:41 UTC (permalink / raw)
To: Frank Li, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Shawn Guo, Carlos Song
Cc: Mikhail Anikin, Yazan Shhady, Rabeeh Khoury, Frank Li,
linux-arm-kernel, devicetree, linux-kernel, Josua Mayer
In-Reply-To: <20260324-lx2160-sd-cd-v6-0-8bf207711848@solid-run.com>
Add aliases for crypto accelerator and rtc0 ensuring that on-SoM RTC and
the SoC A72 domain crypto accelerator are assigned first index.
Further set model and compatible strings which are informative but
overridden by actual boards.
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
arch/arm64/boot/dts/freescale/fsl-lx2162a-sr-som.dtsi | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2162a-sr-som.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2162a-sr-som.dtsi
index e1344942eaaee..3ad908d52a18b 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2162a-sr-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2162a-sr-som.dtsi
@@ -5,6 +5,16 @@
// Copyright 2021 Rabeeh Khoury <rabeeh@solid-run.com>
// Copyright 2023 Josua Mayer <josua@solid-run.com>
+/ {
+ model = "SolidRun LX2162A System on Module";
+ compatible = "solidrun,lx2162a-som", "fsl,lx2160a";
+
+ aliases {
+ crypto = &crypto;
+ rtc0 = &som_rtc;
+ };
+};
+
&crypto {
status = "okay";
};
@@ -77,7 +87,7 @@ variable_eeprom: eeprom@54 {
&i2c5 {
status = "okay";
- rtc@6f {
+ som_rtc: rtc@6f {
compatible = "microchip,mcp7940x";
reg = <0x6f>;
};
--
2.51.0
^ permalink raw reply related
* [PATCH v6 05/10] arm64: dts: lx2160a: add sda gpio references for i2c bus recovery
From: Josua Mayer @ 2026-03-24 12:40 UTC (permalink / raw)
To: Frank Li, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Shawn Guo, Carlos Song
Cc: Mikhail Anikin, Yazan Shhady, Rabeeh Khoury, Frank Li,
linux-arm-kernel, devicetree, linux-kernel, Josua Mayer
In-Reply-To: <20260324-lx2160-sd-cd-v6-0-8bf207711848@solid-run.com>
LX2160A pinmux is done in groups by various length bitfields within
configuration registers.
In particular i2c sda/scl pins are always configured together. Therefore
bus recovery may control both sda and scl.
When pinmux nodes and bus recovery was enabled originally for LX2160,
only the scl-gpios were added to the i2c controller nodes.
Add references to sda-gpios for each i2c controller.
Fixes: 8a1365c7bbc1 ("arm64: dts: lx2160a: add pinmux and i2c gpio to support bus recovery")
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
index 28500e8873909..53b9c5f1f1935 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
@@ -753,6 +753,7 @@ i2c0: i2c@2000000 {
pinctrl-0 = <&i2c0_pins>;
pinctrl-1 = <&gpio0_3_2_pins>;
scl-gpios = <&gpio0 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio0 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "disabled";
};
@@ -769,6 +770,7 @@ i2c1: i2c@2010000 {
pinctrl-0 = <&i2c1_pins>;
pinctrl-1 = <&gpio0_31_30_pins>;
scl-gpios = <&gpio0 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio0 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "disabled";
};
@@ -785,6 +787,7 @@ i2c2: i2c@2020000 {
pinctrl-0 = <&i2c2_pins>;
pinctrl-1 = <&gpio0_29_28_pins>;
scl-gpios = <&gpio0 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio0 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "disabled";
};
@@ -801,6 +804,7 @@ i2c3: i2c@2030000 {
pinctrl-0 = <&i2c3_pins>;
pinctrl-1 = <&gpio0_27_26_pins>;
scl-gpios = <&gpio0 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio0 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "disabled";
};
@@ -817,6 +821,7 @@ i2c4: i2c@2040000 {
pinctrl-0 = <&i2c4_pins>;
pinctrl-1 = <&gpio0_25_24_pins>;
scl-gpios = <&gpio0 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio0 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "disabled";
};
@@ -833,6 +838,7 @@ i2c5: i2c@2050000 {
pinctrl-0 = <&i2c5_pins>;
pinctrl-1 = <&gpio0_23_22_pins>;
scl-gpios = <&gpio0 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio0 22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "disabled";
};
@@ -849,6 +855,7 @@ i2c6: i2c@2060000 {
pinctrl-0 = <&i2c6_i2c7_pins>;
pinctrl-1 = <&gpio1_18_15_pins>;
scl-gpios = <&gpio1 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio1 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "disabled";
};
@@ -865,6 +872,7 @@ i2c7: i2c@2070000 {
pinctrl-0 = <&i2c6_i2c7_pins>;
pinctrl-1 = <&gpio1_18_15_pins>;
scl-gpios = <&gpio1 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio1 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "disabled";
};
--
2.51.0
^ permalink raw reply related
* [PATCH v6 03/10] arm64: dts: lx2160a: remove duplicate pinmux nodes
From: Josua Mayer @ 2026-03-24 12:40 UTC (permalink / raw)
To: Frank Li, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Shawn Guo, Carlos Song
Cc: Mikhail Anikin, Yazan Shhady, Rabeeh Khoury, Frank Li,
linux-arm-kernel, devicetree, linux-kernel, Josua Mayer
In-Reply-To: <20260324-lx2160-sd-cd-v6-0-8bf207711848@solid-run.com>
LX2160A pinmux is done in groups by various length bitfields within
configuration registers.
The pinmux nodes i2c7-scl-pins and i2c7-scl-gpio-pins are duplicates of
i2c6-scl-gpio and i2c6-scl-gpio-pins, writing to the same register and
bits.
These two i2c buses i2c6/i2c7 (IIC7/IIC8) are configured together in
register RCWSR13 bits 3-0.
Drop the duplicate node name and change references to the i2c6 node.
Fixes: 8a1365c7bbc1 ("arm64: dts: lx2160a: add pinmux and i2c gpio to support bus recovery")
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 12 ++----------
1 file changed, 2 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
index d5bb55df03216..41c9b4253f4a5 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
@@ -862,8 +862,8 @@ i2c7: i2c@2070000 {
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(16)>;
pinctrl-names = "default", "gpio";
- pinctrl-0 = <&i2c7_scl>;
- pinctrl-1 = <&i2c7_scl_gpio>;
+ pinctrl-0 = <&i2c6_scl>;
+ pinctrl-1 = <&i2c6_scl_gpio>;
scl-gpios = <&gpio1 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "disabled";
};
@@ -1785,14 +1785,6 @@ i2c6_scl_gpio: i2c6-scl-gpio-pins {
pinctrl-single,bits = <0x4 0x1 0x7>;
};
- i2c7_scl: i2c7-scl-pins {
- pinctrl-single,bits = <0x4 0x2 0x7>;
- };
-
- i2c7_scl_gpio: i2c7-scl-gpio-pins {
- pinctrl-single,bits = <0x4 0x1 0x7>;
- };
-
i2c0_scl: i2c0-scl-pins {
pinctrl-single,bits = <0x8 0x0 (0x1 << 10)>;
};
--
2.51.0
^ permalink raw reply related
* [PATCH v6 02/10] arm64: dts: lx2160a: change i2c0 (iic1) pinmux mask to one bit
From: Josua Mayer @ 2026-03-24 12:40 UTC (permalink / raw)
To: Frank Li, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Shawn Guo, Carlos Song
Cc: Mikhail Anikin, Yazan Shhady, Rabeeh Khoury, Frank Li,
linux-arm-kernel, devicetree, linux-kernel, Josua Mayer
In-Reply-To: <20260324-lx2160-sd-cd-v6-0-8bf207711848@solid-run.com>
LX2160A pinmux is done in groups by various length bitfields within
configuration registers.
The first i2c bus (called IIC1 in reference manual) is configured
through field IIC1_PMUX in register RCWSR14 bit 10 which is described in
the reference manual as a single bit, unlike the other i2c buses.
Change the bitmask for the pinmux nodes from 0x7 to 0x1 to ensure only
single bit is modified.
Further change the zero in the same line to hexadecimal format for
consistency.
This change is of cosmetic nature enforcing consistency with
documentation. There is no known issue when writing the extra two bits
marked in reference manual as reserved.
Fixes: 8a1365c7bbc1 ("arm64: dts: lx2160a: add pinmux and i2c gpio to support bus recovery")
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
index af74e77efabc5..d5bb55df03216 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
@@ -1794,11 +1794,11 @@ i2c7_scl_gpio: i2c7-scl-gpio-pins {
};
i2c0_scl: i2c0-scl-pins {
- pinctrl-single,bits = <0x8 0 (0x7 << 10)>;
+ pinctrl-single,bits = <0x8 0x0 (0x1 << 10)>;
};
i2c0_scl_gpio: i2c0-scl-gpio-pins {
- pinctrl-single,bits = <0x8 (0x1 << 10) (0x7 << 10)>;
+ pinctrl-single,bits = <0x8 (0x1 << 10) (0x1 << 10)>;
};
};
--
2.51.0
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