* Re: spi: uniphier: KASAN wild-memory-access in complete() on early IRQ
From: Masami Hiramatsu @ 2026-06-10 13:57 UTC (permalink / raw)
To: Jaeyoung Chung
Cc: Mark Brown, Kunihiko Hayashi, linux-spi, linux-arm-kernel,
linux-kernel, Sangyun Kim, Kyungwook Boo
In-Reply-To: <20260610115622.773149-1-jjy600901@snu.ac.kr>
On Wed, 10 Jun 2026 20:56:21 +0900
Jaeyoung Chung <jjy600901@snu.ac.kr> wrote:
> Hi,
>
> uniphier_spi_probe() in drivers/spi/spi-uniphier.c registers the
> interrupt handler uniphier_spi_handler() with devm_request_irq() before
> it initializes priv->xfer_done with init_completion(). If an interrupt
> arrives after devm_request_irq() and before init_completion(), the
> handler calls complete() on an uninitialized completion, causing a
> kernel panic.
>
> The probe path, in uniphier_spi_probe():
>
> host = spi_alloc_host(&pdev->dev, sizeof(*priv)); /* priv kzalloc-zeroed */
> ...
> ret = devm_request_irq(&pdev->dev, irq, uniphier_spi_handler,
> 0, "uniphier-spi", priv); /* register handler */
> ...
> init_completion(&priv->xfer_done); /* initialize completion */
>
> The interrupt handler uniphier_spi_handler() calls complete() on its
> done path:
>
> done:
> complete(&priv->xfer_done);
>
> If the device raises an interrupt before init_completion() runs,
> complete() acquires the uninitialized wait.lock and walks the zeroed
> task_list in swake_up_locked(). The zeroed task_list makes list_empty()
> return false, so swake_up_locked() dereferences a NULL list entry,
> triggering a KASAN wild-memory-access.
>
> Suggested fix: move init_completion(&priv->xfer_done) above
> devm_request_irq(), so the completion is valid before the handler can run.
>
> Reported-by: Sangyun Kim <sangyun.kim@snu.ac.kr>
> Reported-by: Kyungwook Boo <bookyungwook@gmail.com>
>
Good catch! All resources used by a callback, should be initialized before
registering it.
Kinihiko, can you fix it by reordering the initialization?
Thank you,
> Thanks,
> Jaeyoung Chung
--
Masami Hiramatsu (Google) <mhiramat@kernel.org>
^ permalink raw reply
* Re: [PATCH v2 01/16] device property: Add fwnode_graph_get_port_by_id()
From: Andy Shevchenko @ 2026-06-10 13:57 UTC (permalink / raw)
To: Chen-Yu Tsai
Cc: Bartosz Golaszewski, Greg Kroah-Hartman, Daniel Scally,
Heikki Krogerus, Sakari Ailus, Rafael J. Wysocki,
Danilo Krummrich, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Matthias Brugger, AngeloGioacchino Del Regno, Alan Stern,
linux-acpi, driver-core, linux-pm, linux-usb, devicetree,
linux-mediatek, linux-arm-kernel, linux-kernel,
Manivannan Sadhasivam
In-Reply-To: <20260610084053.2059858-2-wenst@chromium.org>
On Wed, Jun 10, 2026 at 04:40:35PM +0800, Chen-Yu Tsai wrote:
> In some cases the driver needs a reference to the port firmware node.
> Once such case is the upcoming USB power sequencing integration. The
> USB hub port is tied to the corresponding port firmware node if it
> exists.
>
> Provide a helper for this.
Okay, if it's really needed.
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
...
> +/**
> + * fwnode_graph_get_port_by_id - get the port matching a given id
> + * @fwnode: parent fwnode_handle containing the graph
> + * @id: id of the port
> + *
> + * Return: A 'port' firmware node pointer with refcount incremented.
> + *
> + * The caller is responsible for calling fwnode_handle_put() on the returned
> + * fwnode pointer.
Note, the Return section must be last one in the kernel-doc. The last paragraph
sounds to me as a better fit for main description. Basically check how other
kernel-doc(s) in this file are organised and follow that pattern.
> + */
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* Re: [PATCH v3 0/9] KVM: arm64: selftests: Basic nested guest support
From: Wei-Lin Chang @ 2026-06-10 13:57 UTC (permalink / raw)
To: Oliver Upton
Cc: linux-kernel, kvm, linux-kselftest, linux-arm-kernel, kvmarm,
Paolo Bonzini, Shuah Khan, Marc Zyngier, Joey Gouly,
Suzuki K Poulose, Zenghui Yu, Catalin Marinas, Will Deacon,
Itaru Kitayama
In-Reply-To: <ioz7qsirq2v665bqbjin5ekwss46pfg2sfmndkvail2athbo75@cgt7zikhtx6r>
Hi Oliver,
On Fri, May 29, 2026 at 02:38:53PM +0100, Wei-Lin Chang wrote:
> Hi Oliver,
>
> On Tue, May 19, 2026 at 02:31:09PM -0700, Oliver Upton wrote:
> > Hi Wei-Lin,
> >
> > Thank you very much for the series.
> >
> > I haven't had time to read through much of this yet, but I noticed
> > Itaru's comment about leaving stage-1 translation disabled for the L2.
> >
> > Since selftests expects things like atomics to work we will definitely
> > need the stage-1 MMU to be enabled w/ Normal mappings (this was broken
> > in the past [*]). I wonder if we can (ab)use the pre-existing stage-1
> > tables that the selftests library creates on behalf of the L1. After all,
> > L1 and L2 are both effectively in the same virtual address space.
> >
> > [*] https://lore.kernel.org/kvmarm/20250405001042.1470552-1-rananta@google.com/
>
> Thanks for the pointer, I see, only inner/outer shareable, write-back
> normal memory guarantees atomics to work. Interestingly, treating the
> atomic instruction as a NOP is one of the permitted outcomes if other
> memory attributes are used...
>
> However, the L2s in this series aren't using atomic instructions, and
> right now for the current organization of this series, the L1 guest
> hypervisor infrastructure is in lib/ for future NV selftests to share L2
> creation code, but L2 code are entirely per selftest. This means other
> selftest L2s can reuse the L1 stage-1 tables themselves if the implicit
> memory attributes that comes from MMU being off is not desired.
>
> Sorry if that sounded defensive, I am not opposed to always reusing the
> L1 stage-1 tables in L2, just wanted to make sure the point gets across.
>
> Always reusing L1 stage-1 tables in L2 allows L2 access to lib/ (which
> should be helpful for testing recursive NV), and L1-L2 code sharing
> intra-selftest. OTOH things are a bit simpler with MMU off in this case
> with testing the shadow stage2.
>
> What do you think?
Gentle ping on this :)
Would love to hear what you think.
Thanks,
Wei-Lin Chang
>
> Thanks,
> Wei-Lin Chang
>
> >
> > Thanks,
> > Oliver
> >
> > On Sat, May 16, 2026 at 07:29:54PM +0100, Wei-Lin Chang wrote:
> > > Hi,
> > >
> > > This is v3 of adding basic support for running nested guests (L2) in
> > > kselftest. This time a framework for enabling stage-2 in the guest is
> > > added, including the s2_mmu struct, s2 translation control setup, and
> > > a stage-2 page table generator. Similar to L2 vCPU management, all
> > > stage-2 work is done in the guest instead of userspace.
> > >
> > > An additional shadow_stage2 test is added which leverages the framework
> > > to run L2 with stage-2 enabled.
> > >
> > > * Changes from v2 [1]:
> > >
> > > - Update vm_paddr_t to gpa_t, vm_vaddr_t to gva_t.
> > >
> > > - Added framework for enabling stage-2 in the guest.
> > >
> > > - Added shadow_stage2 test.
> > >
> > > Thanks!
> > >
> > > [1]: https://lore.kernel.org/kvmarm/20260412142216.3806482-1-weilin.chang@arm.com/
> > >
> > > Wei-Lin Chang (9):
> > > KVM: arm64: selftests: Add GPR save/restore functions for NV
> > > KVM: arm64: selftests: Add helpers for guest hypervisors
> > > KVM: arm64: selftests: Add hello_nested basic NV selftest
> > > KVM: arm64: selftests: Enhance hello_nested test
> > > KVM: arm64: selftests: Add shadow_stage2 test
> > > KVM: arm64: selftests: shadow_stage2: Allocate L2 stack from dedicated
> > > pool
> > > KVM: arm64: selftests: shadow_stage2: Check supported stage-2 granule
> > > size
> > > KVM: arm64: selftests: Add infrastructure for using stage-2 in guest
> > > KVM: arm64: selftests: shadow_stage2: Turn on stage-2 translation for
> > > the nested guest
> > >
> > > tools/testing/selftests/kvm/Makefile.kvm | 5 +
> > > .../selftests/kvm/arm64/hello_nested.c | 134 +++++++++
> > > .../selftests/kvm/arm64/shadow_stage2.c | 165 +++++++++++
> > > .../selftests/kvm/include/arm64/nested.h | 85 ++++++
> > > tools/testing/selftests/kvm/lib/arm64/entry.S | 137 +++++++++
> > > .../selftests/kvm/lib/arm64/hyp-entry.S | 77 +++++
> > > .../testing/selftests/kvm/lib/arm64/nested.c | 264 ++++++++++++++++++
> > > 7 files changed, 867 insertions(+)
> > > create mode 100644 tools/testing/selftests/kvm/arm64/hello_nested.c
> > > create mode 100644 tools/testing/selftests/kvm/arm64/shadow_stage2.c
> > > create mode 100644 tools/testing/selftests/kvm/include/arm64/nested.h
> > > create mode 100644 tools/testing/selftests/kvm/lib/arm64/entry.S
> > > create mode 100644 tools/testing/selftests/kvm/lib/arm64/hyp-entry.S
> > > create mode 100644 tools/testing/selftests/kvm/lib/arm64/nested.c
> > >
> > > --
> > > 2.43.0
> > >
> > >
^ permalink raw reply
* Re: [PATCH v10 5/6] pinctrl: s32cc: implement GPIO functionality
From: Khristine Andreea Barbulescu @ 2026-06-10 13:58 UTC (permalink / raw)
To: Enric Balletbo i Serra
Cc: Linus Walleij, Bartosz Golaszewski, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Chester Lin, Matthias Brugger,
Ghennadi Procopciuc, Larisa Grigore, Lee Jones, Shawn Guo,
Sascha Hauer, Fabio Estevam, Dong Aisheng, Jacky Bai,
Greg Kroah-Hartman, Rafael J. Wysocki, Srinivas Kandagatla,
Alberto Ruiz, Christophe Lizzi, devicetree, Eric Chanudet, imx,
linux-arm-kernel, linux-gpio, linux-kernel, NXP S32 Linux Team,
Pengutronix Kernel Team, Vincent Guittot
In-Reply-To: <CALE0LRu1aJAY_-7imYFFPbEwWPpodArXbxtjE-ur3UQnVt5fHw@mail.gmail.com>
On 6/2/2026 12:26 PM, Enric Balletbo i Serra wrote:
> Hi Khristine,
>
> Thank you for the patch. I got some checkpatch warnings, could you
> take a look? And some minor comments below.
>
> On Tue, Jun 2, 2026 at 10:02 AM Khristine Andreea Barbulescu
> <khristineandreea.barbulescu@oss.nxp.com> wrote:
>>
>> From: Andrei Stefanescu <andrei.stefanescu@oss.nxp.com>
>>
>> The updated SIUL2 block groups pinctrl, GPIO data access
>> and interrupt control within the same hardware unit.
>> The SIUL2 driver is therefore structured as a monolithic
>> pinctrl/GPIO driver.
>>
>> GPIO data access and direction handling are implemented using the
>> gpio-regmap library backed by a virtual regmap. The virtual regmap
>> translates the gpio-regmap register model to the underlying SIUL2
>> registers: MSCR for direction, PGPDI for input values and PGPDO for
>> output values.
>>
>> The existing pinctrl GPIO callbacks are used for the request/free path:
>> they switch the pad to GPIO mode on request and restore the previous
>> MSCR configuration when the GPIO is released.
>>
>> This change came as a result of upstream review in the
>> following series:
>> https://lore.kernel.org/linux-gpio/20260120115923.3463866-4-khristineandreea.barbulescu@oss.nxp.com/T/#m543c9edbdde74bdc68b6a2364e8b975356c33043
>> https://lore.kernel.org/all/20260504131148.3622697-7-khristineandreea.barbulescu@oss.nxp.com/
>>
>> Support both SIUL2 DT layouts:
>> - legacy pinctrl-only binding
>> - extended pinctrl/GPIO/irqchip binding
>>
>> Signed-off-by: Andrei Stefanescu <andrei.stefanescu@oss.nxp.com>
>> Signed-off-by: Khristine Andreea Barbulescu <khristineandreea.barbulescu@oss.nxp.com>
>> ---
>> drivers/pinctrl/nxp/Kconfig | 1 +
>> drivers/pinctrl/nxp/pinctrl-s32.h | 32 +-
>> drivers/pinctrl/nxp/pinctrl-s32cc.c | 685 +++++++++++++++++++++++++---
>> drivers/pinctrl/nxp/pinctrl-s32g2.c | 46 +-
>> 4 files changed, 686 insertions(+), 78 deletions(-)
>>
>> diff --git a/drivers/pinctrl/nxp/Kconfig b/drivers/pinctrl/nxp/Kconfig
>> index abca7ef97003..59fc6adf5b0b 100644
>> --- a/drivers/pinctrl/nxp/Kconfig
>> +++ b/drivers/pinctrl/nxp/Kconfig
>> @@ -5,6 +5,7 @@ config PINCTRL_S32CC
>> select GENERIC_PINCTRL_GROUPS
>> select GENERIC_PINMUX_FUNCTIONS
>> select GENERIC_PINCONF
>> + select GPIO_REGMAP
>> select REGMAP_MMIO
>>
>> config PINCTRL_S32G2
>> diff --git a/drivers/pinctrl/nxp/pinctrl-s32.h b/drivers/pinctrl/nxp/pinctrl-s32.h
>> index 8715befd5f05..c2fc5eda7eb4 100644
>> --- a/drivers/pinctrl/nxp/pinctrl-s32.h
>> +++ b/drivers/pinctrl/nxp/pinctrl-s32.h
>> @@ -2,7 +2,7 @@
>> *
>> * S32 pinmux core definitions
>> *
>> - * Copyright 2016-2020, 2022 NXP
>> + * Copyright 2016-2020, 2022, 2026 NXP
>> * Copyright (C) 2022 SUSE LLC
>> * Copyright 2015-2016 Freescale Semiconductor, Inc.
>> * Copyright (C) 2012 Linaro Ltd.
>> @@ -34,11 +34,39 @@ struct s32_pin_range {
>> unsigned int end;
>> };
>>
>> +/**
>> + * struct s32_gpio_range - contiguous GPIO pin range within a SIUL2 module
>> + * @gpio_base: first GPIO line offset in the GPIO range
>> + * @pin_base: first pinctrl pin number mapped by this GPIO range
>> + * @gpio_num: number of consecutive GPIO pins in the range
>> + */
>> +struct s32_gpio_range {
>> + unsigned int gpio_base;
>> + unsigned int pin_base;
>> + unsigned int gpio_num;
>> +};
>> +
>> +/**
>> + * struct s32_gpio_pad_map - mapping between GPIO ranges and PGPD pads
>> + * @gpio_start: first GPIO line offset in the range
>> + * @gpio_end: last GPIO line offset in the range
>> + * @pad: PGPD pad number serving the range
>> + */
>> +struct s32_gpio_pad_map {
>> + unsigned int gpio_start;
>> + unsigned int gpio_end;
>> + unsigned int pad;
>> +};
>> +
>> struct s32_pinctrl_soc_data {
>> const struct pinctrl_pin_desc *pins;
>> unsigned int npins;
>> const struct s32_pin_range *mem_pin_ranges;
>> unsigned int mem_regions;
>> + const struct s32_gpio_range *gpio_ranges;
>> + unsigned int num_gpio_ranges;
>> + const struct s32_gpio_pad_map *gpio_pad_maps;
>> + unsigned int num_gpio_pad_maps;
>> };
>>
>> struct s32_pinctrl_soc_info {
>> @@ -53,6 +81,8 @@ struct s32_pinctrl_soc_info {
>>
>> #define S32_PINCTRL_PIN(pin) PINCTRL_PIN(pin, #pin)
>> #define S32_PIN_RANGE(_start, _end) { .start = _start, .end = _end }
>> +#define S32_GPIO_RANGE(gpio, pin, num) \
>> + { .gpio_base = gpio, .pin_base = pin, .gpio_num = num }
>>
>> int s32_pinctrl_probe(struct platform_device *pdev,
>> const struct s32_pinctrl_soc_data *soc_data);
>> diff --git a/drivers/pinctrl/nxp/pinctrl-s32cc.c b/drivers/pinctrl/nxp/pinctrl-s32cc.c
>> index 89a4eb2000ee..8843926345ec 100644
>> --- a/drivers/pinctrl/nxp/pinctrl-s32cc.c
>> +++ b/drivers/pinctrl/nxp/pinctrl-s32cc.c
>> @@ -2,7 +2,7 @@
>> /*
>> * Core driver for the S32 CC (Common Chassis) pin controller
>> *
>> - * Copyright 2017-2022,2024 NXP
>> + * Copyright 2017-2022,2024-2026 NXP
>> * Copyright (C) 2022 SUSE LLC
>> * Copyright 2015-2016 Freescale Semiconductor, Inc.
>> */
>> @@ -10,6 +10,7 @@
>> #include <linux/bitops.h>
>> #include <linux/err.h>
>> #include <linux/gpio/driver.h>
>> +#include <linux/gpio/regmap.h>
>> #include <linux/init.h>
>> #include <linux/io.h>
>> #include <linux/module.h>
>> @@ -39,6 +40,40 @@
>> #define S32_MSCR_ODE BIT(20)
>> #define S32_MSCR_OBE BIT(21)
>>
>> +#define S32_GPIO_OP_SHIFT 16
>> +#define S32_GPIO_OP_MASK GENMASK(19, 16)
>> +
>> +#define S32_GPIO_OP_DIR 0 /* MSCR direction */
>> +#define S32_GPIO_OP_DAT BIT(S32_GPIO_OP_SHIFT) /* PGPDI read */
>> +#define S32_GPIO_OP_SET BIT(S32_GPIO_OP_SHIFT + 1) /* PGPDO write */
>> +
>> +/*
>> + * [15:12] = GPIO bank / gpio range index
>> + * [11:0] = real register offset or pin id
>> + */
>> +#define S32_GPIO_BANK_SHIFT 12
>> +#define S32_GPIO_BANK_MASK GENMASK(15, 12)
>> +#define S32_GPIO_REG_MASK GENMASK(11, 0)
>> +
>> +#define S32_GPIO_ENCODE(bank, off) \
>> + ((((bank) << S32_GPIO_BANK_SHIFT) & S32_GPIO_BANK_MASK) | \
>> + ((off) & S32_GPIO_REG_MASK))
>> +
>> +#define S32_GPIO_DECODE_BANK(reg) \
>> + (((reg) & S32_GPIO_BANK_MASK) >> S32_GPIO_BANK_SHIFT)
>> +
>> +#define S32_GPIO_DECODE_OFF(reg) \
>> + ((reg) & S32_GPIO_REG_MASK)
>> +
>> +/*
>> + * PGPDOs are 16bit registers that come in big endian
>> + * order if they are grouped in pairs of two.
>> + *
>> + * For example, the order is PGPDO1, PGPDO0, PGPDO3, PGPDO2...
>> + */
>> +#define S32_PGPD(N) (((N) ^ 1) * 2)
>> +#define S32_PGPD_SIZE 16
>> +
>> enum s32_write_type {
>> S32_PINCONF_UPDATE_ONLY,
>> S32_PINCONF_OVERWRITE,
>> @@ -72,6 +107,18 @@ struct s32_pinctrl_mem_region {
>> char name[8];
>> };
>>
>> +/*
>> + * struct s32_gpio_regmaps - GPIO register maps for a SIUL2 instance
>> + * @pgpdo: regmap for Parallel GPIO Pad Data Out registers
>> + * @pgpdi: regmap for Parallel GPIO Pad Data In registers
>> + * @range: GPIO range info
>> + */
>> +struct s32_gpio_regmaps {
>> + struct regmap *pgpdo;
>> + struct regmap *pgpdi;
>> + const struct s32_gpio_range *range;
>> +};
>> +
>> /*
>> * struct gpio_pin_config - holds pin configuration for GPIO's
>> * @pin_id: Pin ID for this GPIO
>> @@ -98,6 +145,12 @@ struct s32_pinctrl_context {
>> * @pctl: a pointer to the pinctrl device structure
>> * @regions: reserved memory regions with start/end pin
>> * @info: structure containing information about the pin
>> + * @gpio_regmaps: PGPDO/PGPDI regmaps for each SIUL2 module
>> + * @num_gpio_regmaps: number of GPIO regmap entries
>> + * @gpio_regmap: regmap bridging gpio-regmap to SIUL2 registers
>> + * @gpio_rgm: gpio-regmap instance registered for this controller
>> + * @ngpio: total number of GPIO line offsets
>> + * @gpio_names: GPIO line names array passed to gpio-regmap
>> * @gpio_configs: saved configurations for GPIO pins
>> * @gpio_configs_lock: lock for the `gpio_configs` list
>> * @saved_context: configuration saved over system sleep
>> @@ -107,6 +160,12 @@ struct s32_pinctrl {
>> struct pinctrl_dev *pctl;
>> struct s32_pinctrl_mem_region *regions;
>> struct s32_pinctrl_soc_info *info;
>> + struct s32_gpio_regmaps *gpio_regmaps;
>> + unsigned int num_gpio_regmaps;
>> + struct regmap *gpio_regmap;
>> + struct gpio_regmap *gpio_rgm;
>> + unsigned int ngpio;
>> + const char *const *gpio_names;
>> struct list_head gpio_configs;
>> spinlock_t gpio_configs_lock;
>> #ifdef CONFIG_PM_SLEEP
>> @@ -356,88 +415,84 @@ static int s32_pmx_get_funcs_count(struct pinctrl_dev *pctldev)
>> return info->nfunctions;
>> }
>>
>> -static const char *s32_pmx_get_func_name(struct pinctrl_dev *pctldev,
>> - unsigned int selector)
>> -{
>> - struct s32_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
>> - const struct s32_pinctrl_soc_info *info = ipctl->info;
>> -
>> - return info->functions[selector].name;
>> -}
>> -
>> -static int s32_pmx_get_groups(struct pinctrl_dev *pctldev,
>> - unsigned int selector,
>> - const char * const **groups,
>> - unsigned int * const num_groups)
>> -{
>> - struct s32_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
>> - const struct s32_pinctrl_soc_info *info = ipctl->info;
>> -
>> - *groups = info->functions[selector].groups;
>> - *num_groups = info->functions[selector].ngroups;
>> -
>> - return 0;
>> -}
>> -
>> static int s32_pmx_gpio_request_enable(struct pinctrl_dev *pctldev,
>> struct pinctrl_gpio_range *range,
>> - unsigned int offset)
>> + unsigned int pin)
>> {
>> struct s32_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
>> - struct gpio_pin_config *gpio_pin;
>> + struct gpio_pin_config *gpio_pin __free(kfree) = NULL;
>> unsigned int config;
>> - unsigned long flags;
>> int ret;
>>
>> - ret = s32_regmap_read(pctldev, offset, &config);
>> + ret = s32_regmap_read(pctldev, pin, &config);
>> if (ret)
>> return ret;
>>
>> - /* Save current configuration */
>> - gpio_pin = kmalloc_obj(*gpio_pin);
>> + gpio_pin = kmalloc(sizeof(*gpio_pin), GFP_KERNEL);
>
> Why? Isn't kmalloc_obj safer?
>
>> if (!gpio_pin)
>> return -ENOMEM;
>>
>> - gpio_pin->pin_id = offset;
>> + gpio_pin->pin_id = pin;
>> gpio_pin->config = config;
>> - INIT_LIST_HEAD(&gpio_pin->list);
>> -
>> - spin_lock_irqsave(&ipctl->gpio_configs_lock, flags);
>> - list_add(&gpio_pin->list, &ipctl->gpio_configs);
>> - spin_unlock_irqrestore(&ipctl->gpio_configs_lock, flags);
>>
>> /* GPIO pin means SSS = 0 */
>> - config &= ~S32_MSCR_SSS_MASK;
>> + ret = s32_regmap_update(pctldev, pin,
>> + S32_MSCR_SSS_MASK | S32_MSCR_IBE,
>> + S32_MSCR_IBE);
>> + if (ret)
>> + return ret;
>> +
>> + scoped_guard(spinlock_irqsave, &ipctl->gpio_configs_lock)
>> + list_add(&no_free_ptr(gpio_pin)->list, &ipctl->gpio_configs);
>>
>> - return s32_regmap_write(pctldev, offset, config);
>> + return 0;
>> }
>>
>> static void s32_pmx_gpio_disable_free(struct pinctrl_dev *pctldev,
>> struct pinctrl_gpio_range *range,
>> - unsigned int offset)
>> + unsigned int pin)
>> {
>> struct s32_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
>> - struct gpio_pin_config *gpio_pin, *tmp;
>> + struct gpio_pin_config *gpio_pin, *found = NULL;
>> unsigned long flags;
>> - int ret;
>>
>> spin_lock_irqsave(&ipctl->gpio_configs_lock, flags);
>> -
>> - list_for_each_entry_safe(gpio_pin, tmp, &ipctl->gpio_configs, list) {
>> - if (gpio_pin->pin_id == offset) {
>> - ret = s32_regmap_write(pctldev, gpio_pin->pin_id,
>> - gpio_pin->config);
>> - if (ret != 0)
>> - goto unlock;
>> -
>> + list_for_each_entry(gpio_pin, &ipctl->gpio_configs, list) {
>> + if (gpio_pin->pin_id == pin) {
>> list_del(&gpio_pin->list);
>> - kfree(gpio_pin);
>> + found = gpio_pin;
>> break;
>> }
>> }
>> -
>> -unlock:
>> spin_unlock_irqrestore(&ipctl->gpio_configs_lock, flags);
>> +
>> + if (found) {
>> + s32_regmap_write(pctldev, found->pin_id, found->config);
>> + kfree(found);
>> + }
>> +}
>> +
>> +static const char *s32_pmx_get_func_name(struct pinctrl_dev *pctldev,
>> + unsigned int selector)
>> +{
>> + struct s32_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
>> + const struct s32_pinctrl_soc_info *info = ipctl->info;
>> +
>> + return info->functions[selector].name;
>> +}
>> +
>> +static int s32_pmx_get_groups(struct pinctrl_dev *pctldev,
>> + unsigned int selector,
>> + const char * const **groups,
>> + unsigned int * const num_groups)
>> +{
>> + struct s32_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
>> + const struct s32_pinctrl_soc_info *info = ipctl->info;
>> +
>> + *groups = info->functions[selector].groups;
>> + *num_groups = info->functions[selector].ngroups;
>> +
>> + return 0;
>> }
>>
>> static int s32_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
>> @@ -649,9 +704,9 @@ static void s32_pinconf_dbg_show(struct pinctrl_dev *pctldev,
>>
>> ret = s32_regmap_read(pctldev, pin_id, &config);
>> if (ret)
>> - return;
>> -
>> - seq_printf(s, "0x%x", config);
>> + seq_printf(s, "error %d", ret);
>> + else
>> + seq_printf(s, "0x%x", config);
>> }
>>
>> static void s32_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
>> @@ -662,15 +717,13 @@ static void s32_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
>> struct s32_pin_group *grp;
>> unsigned int config;
>> const char *name;
>> - int i, ret;
>> + int i;
>>
>> seq_puts(s, "\n");
>> grp = &info->groups[selector];
>> for (i = 0; i < grp->data.npins; i++) {
>> name = pin_get_name(pctldev, grp->data.pins[i]);
>> - ret = s32_regmap_read(pctldev, grp->data.pins[i], &config);
>> - if (ret)
>> - return;
>> + s32_regmap_read(pctldev, grp->data.pins[i], &config);
>> seq_printf(s, "%s: 0x%x\n", name, config);
>> }
>> }
>> @@ -683,6 +736,450 @@ static const struct pinconf_ops s32_pinconf_ops = {
>> .pin_config_group_dbg_show = s32_pinconf_group_dbg_show,
>> };
>>
>> +static void s32_gpio_free_saved_configs(void *data)
>> +{
>> + struct s32_pinctrl *ipctl = data;
>> + struct gpio_pin_config *gpio_pin, *tmp;
>> + unsigned long flags;
>> +
>> + spin_lock_irqsave(&ipctl->gpio_configs_lock, flags);
>> + list_for_each_entry_safe(gpio_pin, tmp, &ipctl->gpio_configs, list) {
>> + list_del(&gpio_pin->list);
>> + kfree(gpio_pin);
>> + }
>> + spin_unlock_irqrestore(&ipctl->gpio_configs_lock, flags);
>> +}
>> +
>> +static unsigned int s32_pin2pad(unsigned int pin)
>> +{
>> + return pin / S32_PGPD_SIZE;
>> +}
>> +
>> +static u16 s32_pin2mask(unsigned int pin)
>> +{
>> + /*
>> + * From Reference manual :
>> + * PGPDOx[PPDOy] = GPDO(x × 16) + (15 - y)[PDO_(x × 16) + (15 - y)]
>> + */
>> + return BIT(S32_PGPD_SIZE - 1 - pin % S32_PGPD_SIZE);
>> +}
>> +
>> +static int s32_gpio_get_range(struct s32_pinctrl *ipctl,
>> + unsigned int gpio,
>> + unsigned int *pin,
>> + unsigned int *bank)
>> +{
>> + const struct s32_pinctrl_soc_data *soc_data = ipctl->info->soc_data;
>> + const struct s32_gpio_range *range;
>> + int i;
>> +
>> + for (i = 0; i < soc_data->num_gpio_ranges; i++) {
>> + range = &soc_data->gpio_ranges[i];
>> +
>> + if (gpio < range->gpio_base ||
>> + gpio >= range->gpio_base + range->gpio_num)
>> + continue;
>> +
>> + if (pin)
>> + *pin = range->pin_base + gpio - range->gpio_base;
>> +
>> + if (bank)
>> + *bank = i;
>> +
>> + return 0;
>> + }
>> +
>> + return -EINVAL;
>> +}
>> +
>> +static int s32_gpio_pad_map_xlate(struct s32_pinctrl *ipctl,
>> + unsigned int gpio,
>> + unsigned int *reg_offset,
>> + u16 *mask)
>> +{
>> + const struct s32_pinctrl_soc_data *soc_data = ipctl->info->soc_data;
>> + const struct s32_gpio_pad_map *map;
>> + unsigned int bit;
>> + int i;
>> +
>> + if (!soc_data->gpio_pad_maps || !soc_data->num_gpio_pad_maps)
>> + return -EINVAL;
>> +
>> + for (i = 0; i < soc_data->num_gpio_pad_maps; i++) {
>> + map = &soc_data->gpio_pad_maps[i];
>> +
>> + if (gpio < map->gpio_start || gpio > map->gpio_end)
>> + continue;
>> +
>> + bit = gpio - map->gpio_start;
>> + *mask = BIT(S32_PGPD_SIZE - 1 - bit);
>> + *reg_offset = S32_PGPD(map->pad);
>> +
>> + return 0;
>> + }
>> +
>> + return -EINVAL;
>> +}
>> +
>> +static int s32_gpio_xlate_pgpd(struct s32_pinctrl *ipctl,
>> + unsigned int pin,
>> + unsigned int *reg_offset,
>> + u16 *mask)
>> +{
>> + /*
>> + * SIUL2_1 does not expose GPIO data registers as a linear pad sequence.
>> + * Valid PGPD offsets there correspond to PGPD7, PGPD9, PGPD10, PGPD11.
>> + */
>> + if (pin >= 112)
>
> The magic number 112 requires better documentation or a define
>
> Or maybe, (NOT TESTED) instead of hardcoding, check if a pad map
> exists for this pin
>
> /* Try pad map first (needed for SIUL2_1's sparse layout) */
> ret = s32_gpio_pad_map_xlate(ipctl, pin, reg_offset, mask);
> if (ret != -EINVAL)
> return ret;
>
> /* Fall back to linear layout (SIUL2_0) */
> *mask = s32_pin2mask(pin);
> *reg_offset = S32_PGPD(s32_pin2pad(pin));
> return 0;
>
> Does it make sense?
>
>> + return s32_gpio_pad_map_xlate(ipctl, pin, reg_offset, mask);
>> +
>> + *mask = s32_pin2mask(pin);
>> + *reg_offset = S32_PGPD(s32_pin2pad(pin));
>> +
>> + return 0;
>> +}
>> +
>> +static int s32_gpio_reg_mask_xlate(struct gpio_regmap *gpio,
>> + unsigned int base, unsigned int offset,
>> + unsigned int *reg, unsigned int *mask)
>> +{
>> + struct s32_pinctrl *ipctl = gpio_regmap_get_drvdata(gpio);
>> + unsigned int pgpd_reg, pin, bank;
>> + u16 pgpd_mask;
>> + int ret;
>> +
>> + ret = s32_gpio_get_range(ipctl, offset, &pin, &bank);
>> + if (ret)
>> + return ret;
>> +
>> + switch (base) {
>> + case S32_GPIO_OP_DIR:
>> + /*
>> + * Direction is controlled through MSCR OBE.
>> + * Encode the real pin id in the virtual register.
>> + */
>> + *reg = S32_GPIO_OP_DIR | pin;
>> + *mask = S32_MSCR_OBE;
>> + return 0;
>> +
>> + case S32_GPIO_OP_DAT:
>> + case S32_GPIO_OP_SET:
>> + ret = s32_gpio_xlate_pgpd(ipctl, pin, &pgpd_reg, &pgpd_mask);
>> + if (ret)
>> + return ret;
>> + /*
>> + * Encode both the GPIO bank and the real PGPD register offset.
>> + */
>> + *reg = base | S32_GPIO_ENCODE(bank, pgpd_reg);
>> + *mask = pgpd_mask;
>> + return 0;
>> + default:
>> + return -EINVAL;
>> + }
>> +}
>> +
>> +static int s32_gpio_reg_read(void *context, unsigned int reg,
>> + unsigned int *val)
>> +{
>> + struct s32_pinctrl *ipctl = context;
>> + unsigned int op = reg & S32_GPIO_OP_MASK;
>> + unsigned int vreg = reg & ~S32_GPIO_OP_MASK;
>> + unsigned int bank;
>> + unsigned int offset;
>> + struct regmap *map;
>> +
>> + switch (op) {
>> + case S32_GPIO_OP_DIR:
>> + /*
>> + * Lower bits contain the real MSCR pin id.
>> + */
>> + offset = S32_GPIO_DECODE_OFF(vreg);
>> +
>> + return s32_regmap_read(ipctl->pctl, offset, val);
>> +
>> + case S32_GPIO_OP_DAT:
>> + bank = S32_GPIO_DECODE_BANK(vreg);
>> + offset = S32_GPIO_DECODE_OFF(vreg);
>> +
>> + if (bank >= ipctl->num_gpio_regmaps)
>> + return -EINVAL;
>> +
>> + map = ipctl->gpio_regmaps[bank].pgpdi;
>> + if (!map)
>> + return -ENODEV;
>> +
>> + return regmap_read(map, offset, val);
>> +
>> + case S32_GPIO_OP_SET:
>> + /*
>> + * gpio-regmap uses update_bits() for set, so it needs to read
>> + * the output register before writing the updated value.
>> + */
>> + bank = S32_GPIO_DECODE_BANK(vreg);
>> + offset = S32_GPIO_DECODE_OFF(vreg);
>> +
>> + if (bank >= ipctl->num_gpio_regmaps)
>> + return -EINVAL;
>> +
>> + map = ipctl->gpio_regmaps[bank].pgpdo;
>> + if (!map)
>> + return -ENODEV;
>> +
>> + return regmap_read(map, offset, val);
>> +
>> + default:
>> + return -EINVAL;
>> + }
>> +}
>> +
>> +static int s32_gpio_reg_write(void *context, unsigned int reg,
>> + unsigned int val)
>> +{
>> + struct s32_pinctrl *ipctl = context;
>> + unsigned int op = reg & S32_GPIO_OP_MASK;
>> + unsigned int vreg = reg & ~S32_GPIO_OP_MASK;
>> + unsigned int bank, offset, config;
>> + struct regmap *map;
>> +
>> + switch (op) {
>> + case S32_GPIO_OP_DIR:
>> + /*
>> + * gpio-regmap sets S32_MSCR_OBE for output and clears it for
>> + * input. Keep IBE enabled for GPIOs in both cases.
>> + */
>> + offset = S32_GPIO_DECODE_OFF(vreg);
>> +
>> + config = S32_MSCR_IBE;
>> + if (val & S32_MSCR_OBE)
>> + config |= S32_MSCR_OBE;
>> +
>> + return s32_regmap_update(ipctl->pctl, offset,
>> + S32_MSCR_OBE | S32_MSCR_IBE,
>> + config);
>> +
>> + case S32_GPIO_OP_SET:
>> + bank = S32_GPIO_DECODE_BANK(vreg);
>> + offset = S32_GPIO_DECODE_OFF(vreg);
>> +
>> + if (bank >= ipctl->num_gpio_regmaps)
>> + return -EINVAL;
>> +
>> + map = ipctl->gpio_regmaps[bank].pgpdo;
>> + if (!map)
>> + return -ENODEV;
>> +
>> + return regmap_write(map, offset, val);
>> +
>> + default:
>> + return -EINVAL;
>> + }
>> +}
>> +
>> +static const struct regmap_bus s32_gpio_regmap_bus = {
>> + .reg_read = s32_gpio_reg_read,
>> + .reg_write = s32_gpio_reg_write,
>> +};
>> +
>> +static const struct regmap_config s32_gpio_regmap_config = {
>> + .name = "s32-gpio",
>> + .reg_bits = 32,
>> + .val_bits = 32,
>> + .reg_stride = 1,
>> + .max_register = S32_GPIO_OP_SET | S32_GPIO_BANK_MASK | S32_GPIO_REG_MASK,
>> + .cache_type = REGCACHE_NONE,
>> +};
>> +
>> +static int s32_gpio_get_ngpio(const struct s32_pinctrl_soc_data *soc_data,
>> + unsigned int *ngpio)
>> +{
>> + const struct s32_gpio_range *range;
>> + unsigned int end, max = 0;
>> + int i;
>> +
>> + if (!soc_data->gpio_ranges || !soc_data->num_gpio_ranges)
>> + return -EINVAL;
>> +
>> + for (i = 0; i < soc_data->num_gpio_ranges; i++) {
>> + range = &soc_data->gpio_ranges[i];
>> +
>> + if (!range->gpio_num)
>> + return -EINVAL;
>> +
>> + end = range->gpio_base + range->gpio_num;
>> +
>> + /*
>> + * gpio_ranges must be ordered by gpio_base and must not overlap.
>> + * The GPIO line space size is derived from the highest range end.
>> + */
>> + if (i > 0 && range->gpio_base < max)
>> + return -EINVAL;
>> +
>> + if (end > max)
>> + max = end;
>> + }
>> +
>> + *ngpio = max;
>> +
>> + return 0;
>> +}
>> +
>> +static int s32_init_gpio_regmap(struct platform_device *pdev,
>> + struct s32_pinctrl *ipctl)
>> +{
>> + ipctl->gpio_regmap =
>> + devm_regmap_init(&pdev->dev, &s32_gpio_regmap_bus,
>> + ipctl, &s32_gpio_regmap_config);
>> + if (IS_ERR(ipctl->gpio_regmap))
>> + return dev_err_probe(&pdev->dev,
>> + PTR_ERR(ipctl->gpio_regmap),
>> + "Failed to init GPIO regmap\n");
>> +
>> + return 0;
>> +}
>> +
>> +static int s32_init_valid_mask(struct gpio_chip *chip, unsigned long *mask,
>> + unsigned int ngpios)
>> +{
>> + struct gpio_regmap *gpio = gpiochip_get_data(chip);
>> + struct s32_pinctrl *ipctl = gpio_regmap_get_drvdata(gpio);
>> + unsigned int gpio_num, pin, reg_offset;
>> + u16 pgpd_mask;
>> + int ret;
>> +
>> + bitmap_zero(mask, ngpios);
>> +
>> + for (gpio_num = 0; gpio_num < ngpios; gpio_num++) {
>> + ret = s32_gpio_get_range(ipctl, gpio_num, &pin, NULL);
>> + if (ret)
>> + continue;
>> +
>> + ret = s32_gpio_xlate_pgpd(ipctl, pin, ®_offset, &pgpd_mask);
>> + if (ret)
>> + continue;
>> +
>> + bitmap_set(mask, gpio_num, 1);
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +static int s32_gpio_populate_names(struct s32_pinctrl *ipctl)
>> +{
>> + char **names;
>> + unsigned int gpio;
>> + unsigned int pin;
>> + char port;
>> + int ret;
>> +
>> + names = devm_kcalloc(ipctl->dev, ipctl->ngpio, sizeof(*names),
>> + GFP_KERNEL);
>> + if (!names)
>> + return -ENOMEM;
>> +
>> + for (gpio = 0; gpio < ipctl->ngpio; gpio++) {
>> + ret = s32_gpio_get_range(ipctl, gpio, &pin, NULL);
>> + if (ret)
>> + continue;
>> +
>> + port = 'A' + pin / 16;
>> +
>> + names[gpio] = devm_kasprintf(ipctl->dev, GFP_KERNEL,
>> + "P%c_%02u", port, pin & 0xf);
>> + if (!names[gpio])
>> + return -ENOMEM;
>> + }
>> +
>> + ipctl->gpio_names = (const char *const *)names;
>> +
>> + return 0;
>> +}
>> +
>> +static int s32_pinctrl_init_gpio_regmaps(struct platform_device *pdev,
>> + struct s32_pinctrl *ipctl)
>> +{
>> + const struct s32_pinctrl_soc_data *soc_data = ipctl->info->soc_data;
>> + static const struct regmap_config pgpd_config = {
>> + .reg_bits = 32,
>> + .val_bits = 16,
>> + .reg_stride = 2,
>> + };
>> + struct regmap_config cfg;
>> + struct resource *res;
>> + void __iomem *base;
>> + unsigned int pgpdo_idx, pgpdi_idx;
>> + unsigned int i;
>> +
>> + if (!soc_data->gpio_ranges || !soc_data->num_gpio_ranges)
>> + return 0;
>> +
>> + ipctl->num_gpio_regmaps = soc_data->num_gpio_ranges;
>> + ipctl->gpio_regmaps = devm_kcalloc(&pdev->dev, ipctl->num_gpio_regmaps,
>> + sizeof(*ipctl->gpio_regmaps),
>> + GFP_KERNEL);
>> + if (!ipctl->gpio_regmaps)
>> + return -ENOMEM;
>> +
>> + for (i = 0; i < ipctl->num_gpio_regmaps; i++) {
>> + ipctl->gpio_regmaps[i].range = &soc_data->gpio_ranges[i];
>> +
>> + /*
>> + * GPIO resources are placed after the pinctrl regions
>> + */
>> + pgpdo_idx = soc_data->mem_regions + i * 2;
>> + pgpdi_idx = soc_data->mem_regions + i * 2 + 1;
>> +
>> + /* PGPDO */
>> + res = platform_get_resource(pdev, IORESOURCE_MEM, pgpdo_idx);
>> + if (!res)
>> + return dev_err_probe(&pdev->dev, -ENOENT,
>> + "Missing PGPDO resource %u\n", i);
>> +
>> + base = devm_ioremap_resource(&pdev->dev, res);
>> + if (IS_ERR(base))
>> + return PTR_ERR(base);
>> +
>> + cfg = pgpd_config;
>> + cfg.name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "pgpdo%u", i);
>> + if (!cfg.name)
>> + return -ENOMEM;
>> +
>> + cfg.max_register = resource_size(res) - cfg.reg_stride;
>> +
>> + ipctl->gpio_regmaps[i].pgpdo =
>> + devm_regmap_init_mmio(&pdev->dev, base, &cfg);
>> + if (IS_ERR(ipctl->gpio_regmaps[i].pgpdo))
>> + return dev_err_probe(&pdev->dev,
>> + PTR_ERR(ipctl->gpio_regmaps[i].pgpdo),
>> + "Failed to init PGPDO regmap %u\n", i);
>> +
>> + /* PGPDI */
>> + res = platform_get_resource(pdev, IORESOURCE_MEM, pgpdi_idx);
>> + if (!res)
>> + return dev_err_probe(&pdev->dev, -ENOENT,
>> + "Missing PGPDI resource %u\n", i);
>> +
>> + base = devm_ioremap_resource(&pdev->dev, res);
>> + if (IS_ERR(base))
>> + return PTR_ERR(base);
>> +
>> + cfg = pgpd_config;
>> + cfg.name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "pgpdi%u", i);
>> + if (!cfg.name)
>> + return -ENOMEM;
>> +
>> + cfg.max_register = resource_size(res) - cfg.reg_stride;
>> +
>> + ipctl->gpio_regmaps[i].pgpdi =
>> + devm_regmap_init_mmio(&pdev->dev, base, &cfg);
>> + if (IS_ERR(ipctl->gpio_regmaps[i].pgpdi))
>> + return dev_err_probe(&pdev->dev,
>> + PTR_ERR(ipctl->gpio_regmaps[i].pgpdi),
>> + "Failed to init PGPDI regmap %u\n", i);
>> + }
>> +
>> + return 0;
>> +}
>> +
>> #ifdef CONFIG_PM_SLEEP
>> static bool s32_pinctrl_should_save(struct s32_pinctrl *ipctl,
>> unsigned int pin)
>> @@ -710,7 +1207,6 @@ int s32_pinctrl_suspend(struct device *dev)
>> const struct s32_pinctrl_soc_info *info = ipctl->info;
>> struct s32_pinctrl_context *saved_context = &ipctl->saved_context;
>> int i;
>> - int ret;
>> unsigned int config;
>>
>> for (i = 0; i < info->soc_data->npins; i++) {
>> @@ -719,9 +1215,7 @@ int s32_pinctrl_suspend(struct device *dev)
>> if (!s32_pinctrl_should_save(ipctl, pin->number))
>> continue;
>>
>> - ret = s32_regmap_read(ipctl->pctl, pin->number, &config);
>> - if (ret)
>> - return -EINVAL;
>> + s32_regmap_read(ipctl->pctl, pin->number, &config);
>>
>> saved_context->pads[i] = config;
>> }
>> @@ -736,7 +1230,7 @@ int s32_pinctrl_resume(struct device *dev)
>> const struct s32_pinctrl_soc_info *info = ipctl->info;
>> const struct pinctrl_pin_desc *pin;
>> struct s32_pinctrl_context *saved_context = &ipctl->saved_context;
>> - int ret, i;
>> + int i;
>>
>> for (i = 0; i < info->soc_data->npins; i++) {
>> pin = &info->soc_data->pins[i];
>> @@ -744,10 +1238,8 @@ int s32_pinctrl_resume(struct device *dev)
>> if (!s32_pinctrl_should_save(ipctl, pin->number))
>> continue;
>>
>> - ret = s32_regmap_write(ipctl->pctl, pin->number,
>> - saved_context->pads[i]);
>> - if (ret)
>> - return ret;
>> + s32_regmap_write(ipctl->pctl, pin->number,
>> + saved_context->pads[i]);
>> }
>>
>> return 0;
>> @@ -927,13 +1419,15 @@ static int s32_pinctrl_probe_dt(struct platform_device *pdev,
>> int s32_pinctrl_probe(struct platform_device *pdev,
>> const struct s32_pinctrl_soc_data *soc_data)
>> {
>> - struct s32_pinctrl *ipctl;
>> - int ret;
>> - struct pinctrl_desc *s32_pinctrl_desc;
>> - struct s32_pinctrl_soc_info *info;
>> #ifdef CONFIG_PM_SLEEP
>> struct s32_pinctrl_context *saved_context;
>> #endif
>> + struct gpio_regmap_config gpio_cfg = {};
>> + struct pinctrl_desc *s32_pinctrl_desc;
>> + struct s32_pinctrl_soc_info *info;
>> + struct s32_pinctrl *ipctl;
>> + unsigned int ngpio;
>> + int ret;
>>
>> if (!soc_data || !soc_data->pins || !soc_data->npins) {
>> dev_err(&pdev->dev, "wrong pinctrl info\n");
>> @@ -959,6 +1453,11 @@ int s32_pinctrl_probe(struct platform_device *pdev,
>> INIT_LIST_HEAD(&ipctl->gpio_configs);
>> spin_lock_init(&ipctl->gpio_configs_lock);
>>
>> + ret = devm_add_action_or_reset(&pdev->dev,
>> + s32_gpio_free_saved_configs, ipctl);
>> + if (ret)
>> + return ret;
>> +
>> s32_pinctrl_desc =
>> devm_kzalloc(&pdev->dev, sizeof(*s32_pinctrl_desc), GFP_KERNEL);
>> if (!s32_pinctrl_desc)
>> @@ -978,6 +1477,11 @@ int s32_pinctrl_probe(struct platform_device *pdev,
>> return ret;
>> }
>>
>> + ret = s32_pinctrl_init_gpio_regmaps(pdev, ipctl);
>> + if (ret)
>> + return dev_err_probe(&pdev->dev, ret,
>> + "Failed to init GPIO regmaps\n");
>> +
>> ret = devm_pinctrl_register_and_init(&pdev->dev, s32_pinctrl_desc,
>> ipctl, &ipctl->pctl);
>> if (ret)
>> @@ -999,7 +1503,42 @@ int s32_pinctrl_probe(struct platform_device *pdev,
>> return dev_err_probe(&pdev->dev, ret,
>> "Failed to enable pinctrl\n");
>>
>> - dev_info(&pdev->dev, "Initialized S32 pinctrl driver\n");
>> + /* Setup GPIO if GPIO ranges are defined */
>> + if (!soc_data->gpio_ranges || !soc_data->num_gpio_ranges)
>> + return 0;
>> +
>> + ret = s32_gpio_get_ngpio(soc_data, &ngpio);
>> + if (ret)
>> + return dev_err_probe(&pdev->dev, ret, "Invalid GPIO ranges\n");
>> +
>> + ipctl->ngpio = ngpio;
>> +
>> + ret = s32_gpio_populate_names(ipctl);
>> + if (ret)
>> + return ret;
>> +
>> + ret = s32_init_gpio_regmap(pdev, ipctl);
>> + if (ret)
>> + return ret;
>> +
>> + gpio_cfg.parent = &pdev->dev;
>> + gpio_cfg.fwnode = dev_fwnode(&pdev->dev);
>> + gpio_cfg.label = dev_name(&pdev->dev);
>> + gpio_cfg.regmap = ipctl->gpio_regmap;
>> + gpio_cfg.ngpio = ngpio;
>> + gpio_cfg.names = ipctl->gpio_names;
>> + gpio_cfg.reg_dir_out_base = GPIO_REGMAP_ADDR(S32_GPIO_OP_DIR);
>> + gpio_cfg.reg_dat_base = GPIO_REGMAP_ADDR(S32_GPIO_OP_DAT);
>> + gpio_cfg.reg_set_base = GPIO_REGMAP_ADDR(S32_GPIO_OP_SET);
>> + gpio_cfg.reg_mask_xlate = s32_gpio_reg_mask_xlate;
>> + gpio_cfg.init_valid_mask = s32_init_valid_mask;
>> + gpio_cfg.drvdata = ipctl;
>> +
>> + ipctl->gpio_rgm = devm_gpio_regmap_register(&pdev->dev, &gpio_cfg);
>> + if (IS_ERR(ipctl->gpio_rgm))
>> + return dev_err_probe(&pdev->dev,
>> + PTR_ERR(ipctl->gpio_rgm),
>> + "Unable to add gpio_regmap chip\n");
>>
>> return 0;
>> }
>> diff --git a/drivers/pinctrl/nxp/pinctrl-s32g2.c b/drivers/pinctrl/nxp/pinctrl-s32g2.c
>> index c49d28793b69..0bd6e6ab5ad1 100644
>> --- a/drivers/pinctrl/nxp/pinctrl-s32g2.c
>> +++ b/drivers/pinctrl/nxp/pinctrl-s32g2.c
>> @@ -3,7 +3,7 @@
>> * NXP S32G pinctrl driver
>> *
>> * Copyright 2015-2016 Freescale Semiconductor, Inc.
>> - * Copyright 2017-2018, 2020-2022 NXP
>> + * Copyright 2017-2018, 2020-2022, 2025-2026 NXP
>> * Copyright (C) 2022 SUSE LLC
>> */
>>
>> @@ -773,17 +773,47 @@ static const struct s32_pin_range s32_pin_ranges_siul2[] = {
>> S32_PIN_RANGE(942, 1007),
>> };
>>
>> -static const struct s32_pinctrl_soc_data s32_pinctrl_data = {
>> +static const struct s32_gpio_range s32_gpio_ranges_siul2[] = {
>> + S32_GPIO_RANGE(0, 0, 102),
>> + S32_GPIO_RANGE(112, 112, 79),
>> +};
>> +
>> +/*
>> + * SIUL2_1 GPIO ranges mapped to sparse PGPD pads.
>> + *
>> + * SIUL2_1 does not expose GPIO data registers as a linear pad
>> + * sequence. Each entry describes a contiguous GPIO offset range
>> + * and the PGPD pad servicing that range.
>> + */
>> +static const struct s32_gpio_pad_map s32g_gpio_pad_maps[] = {
>> + { 112, 122, 7 }, /* PH_00 .. PH_10 -> PGPD7 */
>> + { 144, 159, 9 }, /* PJ_00 .. PJ_15 -> PGPD9 */
>> + { 160, 175, 10 }, /* PK_00 .. PK_15 -> PGPD10 */
>> + { 176, 190, 11 }, /* PL_00 .. PL_14 -> PGPD11 */
>> +};
>> +
>> +/* Legacy data for old DT bindings without GPIO support */
>> +static const struct s32_pinctrl_soc_data legacy_s32g_pinctrl_data = {
>> + .pins = s32_pinctrl_pads_siul2,
>> + .npins = ARRAY_SIZE(s32_pinctrl_pads_siul2),
>> + .mem_pin_ranges = s32_pin_ranges_siul2,
>> + .mem_regions = ARRAY_SIZE(s32_pin_ranges_siul2),
>> +};
>> +
>> +static const struct s32_pinctrl_soc_data s32g_pinctrl_data = {
>> .pins = s32_pinctrl_pads_siul2,
>> .npins = ARRAY_SIZE(s32_pinctrl_pads_siul2),
>> .mem_pin_ranges = s32_pin_ranges_siul2,
>> .mem_regions = ARRAY_SIZE(s32_pin_ranges_siul2),
>> + .gpio_ranges = s32_gpio_ranges_siul2,
>> + .num_gpio_ranges = ARRAY_SIZE(s32_gpio_ranges_siul2),
>> + .gpio_pad_maps = s32g_gpio_pad_maps,
>> + .num_gpio_pad_maps = ARRAY_SIZE(s32g_gpio_pad_maps),
>> };
>>
>> static const struct of_device_id s32_pinctrl_of_match[] = {
>> {
>> .compatible = "nxp,s32g2-siul2-pinctrl",
>> - .data = &s32_pinctrl_data,
>> },
>> { /* sentinel */ }
>> };
>> @@ -792,8 +822,16 @@ MODULE_DEVICE_TABLE(of, s32_pinctrl_of_match);
>> static int s32g_pinctrl_probe(struct platform_device *pdev)
>> {
>> const struct s32_pinctrl_soc_data *soc_data;
>> + struct device_node *np = pdev->dev.of_node;
>>
>> - soc_data = of_device_get_match_data(&pdev->dev);
>> + /*
>> + * Legacy DTs only describe the pinctrl resources.
>> + * New DT changes extend the same node with GPIO resources.
>> + */
>> + if (of_property_present(np, "gpio-controller"))
>> + soc_data = &s32g_pinctrl_data;
>> + else
>> + soc_data = &legacy_s32g_pinctrl_data;
>>
>> return s32_pinctrl_probe(pdev, soc_data);
>> }
>> --
>> 2.34.1
>>
>
Hi Enric,
Thanks for your feedback!
I have addressed the two points from your review in
the new patch series (v11):
- `kmalloc_obj` usage is now correct in the GPIO request path
- The SIUL2_1 sparse PGPD layout is handled via a `sparse`
flag on `struct s32_gpio_range` and a pad-map-driven xlate,
removing the magic number 112 that was previously used
as a boundary check.
Regarding the remaining checkpatch warning:
I don t think `cfg` should be declared `const` because
it is a per-iteration copy of the `pgpd_config` template
that gets two fields written at runtime: `cfg.name` and
`cfg.max_register`(derived from the resource size).
Making the base template `pgpd_config` const (which it is)
I think is the right approach here.
Best regards,
Khristine
^ permalink raw reply
* Re: [PATCH v2 02/16] device property: Add fwnode_graph_get_next_port_endpoint()
From: Andy Shevchenko @ 2026-06-10 14:08 UTC (permalink / raw)
To: Chen-Yu Tsai
Cc: Bartosz Golaszewski, Greg Kroah-Hartman, Daniel Scally,
Heikki Krogerus, Sakari Ailus, Rafael J. Wysocki,
Danilo Krummrich, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Matthias Brugger, AngeloGioacchino Del Regno, Alan Stern,
linux-acpi, driver-core, linux-pm, linux-usb, devicetree,
linux-mediatek, linux-arm-kernel, linux-kernel,
Manivannan Sadhasivam
In-Reply-To: <20260610084053.2059858-3-wenst@chromium.org>
On Wed, Jun 10, 2026 at 04:40:36PM +0800, Chen-Yu Tsai wrote:
> Due to design constraints of the power sequencing API, the consumer
> must first be sure that the other side is actually a provider, or it
> will continually get -EPROBE_DEFER when requesting the power
> sequencing descriptor.
>
> In the upcoming USB power sequencing integration, the USB hub driver
> first needs to check whether a graph connection exists, and whether
> the other side of the connection is a supported connector type. The
> USB port is tied to a "port" firmware node, and this new helper will
> be used to get the endpoint under the known "port" firmware node.
...
> +/**
> + * fwnode_graph_get_next_port_endpoint - Get next endpoint firmware node in port
> + * @port: Pointer to the target port firmware node
> + * @prev: Previous endpoint node or %NULL to get the first
> + *
> + * The caller is responsible for calling fwnode_handle_put() on the returned
> + * fwnode pointer. Note that this function also puts a reference to @prev
> + * unconditionally.
> + *
> + * Return: an endpoint firmware node pointer or %NULL if no more endpoints
> + * are available.
Yeah, you see, even here is inconsistency with previously added kernel-doc.
> + */
> +struct fwnode_handle *fwnode_graph_get_next_port_endpoint(const struct fwnode_handle *port,
> + struct fwnode_handle *prev)
> +{
> + struct fwnode_handle *ep;
Unused?
> + while (1) {
This is usually harder to read and follow. It's like "pay much attention on
the code", but here no rocket science, no code to really pay attention to.
> + prev = fwnode_get_next_child_node(port, prev);
> + if (!prev)
> + break;
> +
> + if (WARN(!fwnode_name_eq(prev, "endpoint"),
> + "non endpoint node is used (%pfw)", prev))
> + continue;
> +
> + break;
> + }
> +
> + return prev;
> +}
So, this can be rewritten as
ep = prev;
do {
ep = fwnode_get_next_child_node(port, ep);
if (fwnode_name_eq(ep, "endpoint"))
break;
WARN_ON(ep, ...);
} while (ep);
return ep;
But also big question why? to WARN*(). There is no use in the entire
property.c.
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* Re: [PATCH net-next v4 0/2] airoha: add the capability to configure GDM3/GDM4 as WAN/LAN on demand
From: Alexander Lobakin @ 2026-06-10 14:08 UTC (permalink / raw)
To: Lorenzo Bianconi
Cc: Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni, linux-arm-kernel, linux-mediatek, netdev,
Madhur Agrawal
In-Reply-To: <20260610-airoha-ethtool-priv_flags-v4-0-60e89cf28fea@kernel.org>
From: Lorenzo Bianconi <lorenzo@kernel.org>
Date: Wed, 10 Jun 2026 15:33:35 +0200
> Add the capability to configure GDM3/GDM4 as WAN/LAN on demand when QoS
> offload is created or destroyed.
> Make dev->qdma an RCU pointer so the TX path can safely dereference it
> without holding RTNL.
> Introduce airoha_qdma_start() and airoha_qdma_stop() helpers.
Series:
Reviewed-by: Alexander Lobakin <aleksander.lobakin@intel.com>
Thanks,
Olek
^ permalink raw reply
* Re: [PATCH net-next v2] net: airoha: simplify WAN device check in airoha_dev_init()
From: Alexander Lobakin @ 2026-06-10 14:14 UTC (permalink / raw)
To: Lorenzo Bianconi
Cc: Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni, linux-arm-kernel, linux-mediatek, netdev
In-Reply-To: <20260610-airoha-eth-simplify-dev-init-v2-1-8f244e69b0d4@kernel.org>
From: Lorenzo Bianconi <lorenzo@kernel.org>
Date: Wed, 10 Jun 2026 15:25:13 +0200
> airoha_register_gdm_devices() iterates eth->ports[] in order, so GDM2's
> netdev is always registered before GDM3/GDM4. This means the explicit
> check for eth->ports[1] && eth->ports[1]->devs[0] is a redundant
> special-case of what airoha_get_wan_gdm_dev() already covers, since
> GDM2 is always marked as WAN during its own ndo_init.
> Remove the redundant check and rely solely on airoha_get_wan_gdm_dev()
> which handles both the GDM2-present and GDM2-absent cases.
>
> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Reviewed-by: Alexander Lobakin <aleksander.lobakin@intel.com>
Thanks,
Olek
^ permalink raw reply
* Re: [PATCH v2 05/16] usb: hub: Associate port@ fwnode with USB port device
From: Andy Shevchenko @ 2026-06-10 14:16 UTC (permalink / raw)
To: Chen-Yu Tsai
Cc: Bartosz Golaszewski, Greg Kroah-Hartman, Daniel Scally,
Heikki Krogerus, Sakari Ailus, Rafael J. Wysocki,
Danilo Krummrich, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Matthias Brugger, AngeloGioacchino Del Regno, Alan Stern,
linux-acpi, driver-core, linux-pm, linux-usb, devicetree,
linux-mediatek, linux-arm-kernel, linux-kernel,
Manivannan Sadhasivam
In-Reply-To: <20260610084053.2059858-6-wenst@chromium.org>
On Wed, Jun 10, 2026 at 04:40:39PM +0800, Chen-Yu Tsai wrote:
> When a USB hub port is connected to a connector in a firmware node
> graph, the port itself has a node in the graph.
>
> Associate the port's firmware node with the USB port's device,
> usb_port::dev. This is used in later changes for the M.2 slot power
> sequencing provider to match against the requesting port.
Okay, would this affect ACPI-based systems? if so, how?
Can you elaborate on that, please?
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* Re: [PATCH v2 04/16] usb: hub: Return actual error from hub_configure() in hub_probe()
From: Andy Shevchenko @ 2026-06-10 14:20 UTC (permalink / raw)
To: Chen-Yu Tsai
Cc: Bartosz Golaszewski, Greg Kroah-Hartman, Daniel Scally,
Heikki Krogerus, Sakari Ailus, Rafael J. Wysocki,
Danilo Krummrich, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Matthias Brugger, AngeloGioacchino Del Regno, Alan Stern,
linux-acpi, driver-core, linux-pm, linux-usb, devicetree,
linux-mediatek, linux-arm-kernel, linux-kernel,
Manivannan Sadhasivam
In-Reply-To: <20260610084053.2059858-5-wenst@chromium.org>
On Wed, Jun 10, 2026 at 04:40:38PM +0800, Chen-Yu Tsai wrote:
> The addition of power sequencing descriptor handling in the USB hub code
> requires dealing with deferred probing from pwrseq_get(). The power
> sequencing provider may not yet be available when the USB hub probes.
>
> Return the actual error code from hub_configure() when it fails, so that
> the driver core can notice the deferred probe request.
Makes sense to me.
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
One nit-pick, though.
...
> - if (hub_configure(hub, &desc->endpoint[0].desc) >= 0) {
> + ret = hub_configure(hub, &desc->endpoint[0].desc);
> + if (ret >= 0) {
> onboard_dev_create_pdevs(hdev, &hub->onboard_devs);
>
> return 0;
> }
>
> hub_disconnect(intf);
> - return -ENODEV;
> + return ret;
Can we convert to regular pattern, id est checking for errors first?
ret = hub_configure(hub, &desc->endpoint[0].desc);
if (ret < 0) {
hub_disconnect(intf);
return ret;
}
onboard_dev_create_pdevs(hdev, &hub->onboard_devs);
return 0;
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* [PATCH 1/3] dt-bindings: vendor-prefixes: Add youyeetoo
From: Daniele Briguglio @ 2026-06-10 13:58 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner
Cc: devicetree, linux-kernel, linux-arm-kernel, linux-rockchip,
Daniele Briguglio
In-Reply-To: <20260610-yy3588-board-v1-0-4bb7176b6826@superkali.me>
Youyeetoo is the single board computer brand of Hong Kong Cybodev
Tech Limited.
Link: https://www.youyeetoo.com
Signed-off-by: Daniele Briguglio <hello@superkali.me>
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index 28784d66a..c0d05ba73 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -1915,6 +1915,8 @@ patternProperties:
description: YSH & ATIL
"^yones-toptech,.*":
description: Yones Toptech Co., Ltd.
+ "^youyeetoo,.*":
+ description: Hong Kong Cybodev Tech Limited (youyeetoo)
"^ys,.*":
description: Shenzhen Yashi Changhua Intelligent Technology Co., Ltd.
"^ysoft,.*":
--
2.47.3
^ permalink raw reply related
* [PATCH 2/3] dt-bindings: arm: rockchip: Add Youyeetoo YY3588
From: Daniele Briguglio @ 2026-06-10 13:58 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner
Cc: devicetree, linux-kernel, linux-arm-kernel, linux-rockchip,
Daniele Briguglio
In-Reply-To: <20260610-yy3588-board-v1-0-4bb7176b6826@superkali.me>
The YY3588 is a single board computer based on the Rockchip RK3588.
Add devicetree binding documentation for it.
Signed-off-by: Daniele Briguglio <hello@superkali.me>
---
Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
index 1a9dde186..e7894d2b8 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
@@ -1347,6 +1347,11 @@ properties:
- const: xunlong,orangepi-cm5
- const: rockchip,rk3588s
+ - description: Youyeetoo YY3588
+ items:
+ - const: youyeetoo,yy3588
+ - const: rockchip,rk3588
+
- description: Zkmagic A95X Z2
items:
- const: zkmagic,a95x-z2
--
2.47.3
^ permalink raw reply related
* [PATCH 0/3] arm64: dts: rockchip: Add Youyeetoo YY3588
From: Daniele Briguglio @ 2026-06-10 13:58 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner
Cc: devicetree, linux-kernel, linux-arm-kernel, linux-rockchip,
Daniele Briguglio
This series adds support for the Youyeetoo YY3588, a single board
computer built around the Rockchip RK3588.
Both Ethernet ports, eMMC, SD card, USB, Type-C, HDMI output, WiFi on
the Mini PCIe slot, audio, the recovery key and the fan have been
tested on the board.
Board documentation: https://wiki.youyeetoo.com/YY3588
Signed-off-by: Daniele Briguglio <hello@superkali.me>
---
Daniele Briguglio (3):
dt-bindings: vendor-prefixes: Add youyeetoo
dt-bindings: arm: rockchip: Add Youyeetoo YY3588
arm64: dts: rockchip: Add Youyeetoo YY3588
.../devicetree/bindings/arm/rockchip.yaml | 5 +
.../devicetree/bindings/vendor-prefixes.yaml | 2 +
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3588-youyeetoo-yy3588.dts | 1190 ++++++++++++++++++++
4 files changed, 1198 insertions(+)
---
base-commit: 8545eda00fdf3d7e17933ce0f706d005b1bad42d
change-id: 20260610-yy3588-board-ecc20882cae7
Best regards,
--
Daniele Briguglio <hello@superkali.me>
^ permalink raw reply
* [PATCH 3/3] arm64: dts: rockchip: Add Youyeetoo YY3588
From: Daniele Briguglio @ 2026-06-10 13:59 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner
Cc: devicetree, linux-kernel, linux-arm-kernel, linux-rockchip,
Daniele Briguglio
In-Reply-To: <20260610-yy3588-board-v1-0-4bb7176b6826@superkali.me>
The YY3588 is a single board computer built around the Rockchip RK3588.
Specification:
- Rockchip RK3588 SoC
- 4/8/16/32 GB LPDDR4/4x
- up to 256 GB eMMC
- microSD card slot
- 1x 1000Base-T (Realtek RTL8211F) and 1x 2500Base-T (Realtek RTL8125)
- HDMI 2.1 output
- HDMI input
- 4x USB 3.0 Type-A via onboard hub, 1x USB 2.0 Type-A
- USB Type-C with USB 3.0
- M.2 M-key with PCIe 3.0 x4
- Mini PCIe slot for WiFi/BT or 4G modules
- SATA 3.0
- ES8388 audio codec with headphone jack and onboard microphone
- fan connector, RTC, recovery key
- 12 V DC input
Both Ethernet ports, eMMC, SD card, USB, Type-C, HDMI output, WiFi
on the Mini PCIe slot, audio, the recovery key and the fan have been
tested on the board.
Link: https://wiki.youyeetoo.com/YY3588
Signed-off-by: Daniele Briguglio <hello@superkali.me>
---
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3588-youyeetoo-yy3588.dts | 1190 ++++++++++++++++++++
2 files changed, 1191 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 761d82b4f..6cab03c9c 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -213,6 +213,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-tiger-haikou.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-tiger-haikou-video-demo.dtbo
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-toybrick-x0.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-turing-rk1.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-youyeetoo-yy3588.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-coolpi-4b.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-evb1-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-gameforce-ace.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-youyeetoo-yy3588.dts b/arch/arm64/boot/dts/rockchip/rk3588-youyeetoo-yy3588.dts
new file mode 100644
index 000000000..28d8790a2
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3588-youyeetoo-yy3588.dts
@@ -0,0 +1,1190 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2024 Youyeetoo
+ * Copyright (c) 2026 Daniele Briguglio <hello@superkali.me>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
+#include <dt-bindings/usb/pd.h>
+#include "rk3588.dtsi"
+
+/ {
+ model = "Youyeetoo YY3588";
+ compatible = "youyeetoo,yy3588", "rockchip,rk3588";
+
+ aliases {
+ ethernet0 = &gmac1;
+ ethernet1 = &r8125;
+ mmc0 = &sdhci;
+ mmc1 = &sdmmc;
+ };
+
+ adc-keys {
+ compatible = "adc-keys";
+ io-channels = <&saradc 1>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <1800000>;
+ poll-interval = <100>;
+
+ button-recovery {
+ label = "Recovery";
+ linux,code = <KEY_VENDOR>;
+ press-threshold-microvolt = <17000>;
+ };
+ };
+
+ analog-sound {
+ compatible = "simple-audio-card";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hp_det>;
+ simple-audio-card,name = "rockchip-es8388";
+ simple-audio-card,aux-devs = <&speaker_amp>;
+ simple-audio-card,format = "i2s";
+ simple-audio-card,hp-det-gpios = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>;
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,pin-switches = "Headphones", "Speaker";
+ simple-audio-card,routing =
+ "Headphones", "LOUT2",
+ "Headphones", "ROUT2",
+ "Speaker Amp INL", "LOUT1",
+ "Speaker Amp INR", "ROUT1",
+ "Speaker", "Speaker Amp OUTL",
+ "Speaker", "Speaker Amp OUTR",
+ "LINPUT1", "Microphone Jack",
+ "RINPUT1", "Microphone Jack",
+ "LINPUT2", "Onboard Microphone",
+ "RINPUT2", "Onboard Microphone";
+ simple-audio-card,widgets =
+ "Microphone", "Microphone Jack",
+ "Microphone", "Onboard Microphone",
+ "Headphone", "Headphones",
+ "Speaker", "Speaker";
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s0_8ch>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&es8388>;
+ system-clock-frequency = <12288000>;
+ };
+ };
+
+ chosen {
+ stdout-path = "serial2:1500000n8";
+ };
+
+ hdmi0-con {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi0_con_in: endpoint {
+ remote-endpoint = <&hdmi0_out_con>;
+ };
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&led_pins>;
+
+ led-0 {
+ color = <LED_COLOR_ID_BLUE>;
+ function = LED_FUNCTION_STATUS;
+ gpios = <&gpio1 RK_PD6 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-1 {
+ function = LED_FUNCTION_HEARTBEAT;
+ gpios = <&gpio1 RK_PD7 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ /* PI6C557-05BLE PCIe 3.0 reference clock generator */
+ pcie30_port0_refclk: pcie-oscillator {
+ compatible = "gated-fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <100000000>;
+ clock-output-names = "pcie30_refclk";
+ vdd-supply = <&vcc3v3_pi6c_05>;
+ };
+
+ fan: pwm-fan {
+ compatible = "pwm-fan";
+ #cooling-cells = <2>;
+ cooling-levels = <0 50 100 150 200 255>;
+ fan-supply = <&vcc12v_dcin>;
+ pwms = <&pwm2 0 50000 0>;
+ };
+
+ pcie20_avdd0v85: regulator-pcie20-avdd0v85 {
+ compatible = "regulator-fixed";
+ regulator-name = "pcie20_avdd0v85";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ vin-supply = <&vdd_0v85_s0>;
+ };
+
+ pcie20_avdd1v8: regulator-pcie20-avdd1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "pcie20_avdd1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&avcc_1v8_s0>;
+ };
+
+ pcie30_avdd0v75: regulator-pcie30-avdd0v75 {
+ compatible = "regulator-fixed";
+ regulator-name = "pcie30_avdd0v75";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+ vin-supply = <&avdd_0v75_s0>;
+ };
+
+ pcie30_avdd1v8: regulator-pcie30-avdd1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "pcie30_avdd1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&avcc_1v8_s0>;
+ };
+
+ vbus5v0_typec: regulator-vbus5v0-typec {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&typec5v_pwren>;
+ regulator-name = "vbus5v0_typec";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_1v1_nldo_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc12v_dcin: regulator-vcc12v-dcin {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc12v_dcin";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ };
+
+ vcc3v3_pi6c_05: regulator-vcc3v3-pi6c-05 {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pi6c_05_pwren>;
+ regulator-name = "vcc3v3_pi6c_05";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <5000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc3v3_sd_s0: regulator-vcc3v3-sd-s0 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_sd_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc3v3_sys>;
+ };
+
+ vcc3v3_sys: regulator-vcc3v3-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc12v_dcin>;
+ };
+
+ vcc5v0_sys: regulator-vcc5v0-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc12v_dcin>;
+ };
+
+ speaker_amp: speaker-amplifier {
+ compatible = "simple-audio-amplifier";
+ enable-gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&spk_en>;
+ sound-name-prefix = "Speaker Amp";
+ VCC-supply = <&vcc5v0_sys>;
+ };
+};
+
+&combphy0_ps {
+ status = "okay";
+};
+
+&combphy1_ps {
+ status = "okay";
+};
+
+&combphy2_psu {
+ status = "okay";
+};
+
+&cpu_b0 {
+ cpu-supply = <&vdd_cpu_big0_s0>;
+};
+
+&cpu_b1 {
+ cpu-supply = <&vdd_cpu_big0_s0>;
+};
+
+&cpu_b2 {
+ cpu-supply = <&vdd_cpu_big1_s0>;
+};
+
+&cpu_b3 {
+ cpu-supply = <&vdd_cpu_big1_s0>;
+};
+
+&cpu_l0 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l1 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l2 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l3 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&gmac1 {
+ clock_in_out = "input";
+ phy-handle = <&rgmii_phy>;
+ /* RX delay is added by the PHY, TX delay by the GMAC */
+ phy-mode = "rgmii-rxid";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac1_miim
+ &gmac1_tx_bus2
+ &gmac1_rx_bus2
+ &gmac1_rgmii_clk
+ &gmac1_rgmii_bus
+ &gmac1_clkinout>;
+ tx_delay = <0x43>;
+ status = "okay";
+};
+
+&gpu {
+ mali-supply = <&vdd_gpu_s0>;
+ status = "okay";
+};
+
+&hdmi0 {
+ frl-enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&hdmi0_in {
+ hdmi0_in_vp0: endpoint {
+ remote-endpoint = <&vp0_out_hdmi0>;
+ };
+};
+
+&hdmi0_out {
+ hdmi0_out_con: endpoint {
+ remote-endpoint = <&hdmi0_con_in>;
+ };
+};
+
+&hdmi0_sound {
+ status = "okay";
+};
+
+&hdmi_receiver_cma {
+ status = "okay";
+};
+
+&hdmi_receiver {
+ hpd-gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmim1_rx_cec &hdmim1_rx_hpdin &hdmim1_rx_scl &hdmim1_rx_sda &hdmirx_5v_det>;
+ status = "okay";
+};
+
+&hdptxphy0 {
+ status = "okay";
+};
+
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0m2_xfer>;
+ status = "okay";
+
+ vdd_cpu_big0_s0: regulator@42 {
+ compatible = "rockchip,rk8602";
+ reg = <0x42>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_cpu_big0_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_big1_s0: regulator@43 {
+ compatible = "rockchip,rk8603", "rockchip,rk8602";
+ reg = <0x43>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_cpu_big1_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1m2_xfer>;
+ status = "okay";
+
+ vdd_npu_s0: regulator@42 {
+ compatible = "rockchip,rk8602";
+ reg = <0x42>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_npu_s0";
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+};
+
+&i2c6 {
+ clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c6m0_xfer>;
+ status = "okay";
+
+ usbc0: usb-typec@22 {
+ compatible = "fcs,fusb302";
+ reg = <0x22>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usbc0_int>;
+ vbus-supply = <&vbus5v0_typec>;
+
+ usb_con: connector {
+ compatible = "usb-c-connector";
+ data-role = "dual";
+ label = "USB-C";
+ power-role = "source";
+ source-pdos = <PDO_FIXED(5000, 1500, PDO_FIXED_USB_COMM)>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ usbc0_hs: endpoint {
+ remote-endpoint = <&usb_host0_xhci_drd_sw>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ usbc0_ss: endpoint {
+ remote-endpoint = <&usbdp_phy0_typec_ss>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ usbc0_sbu: endpoint {
+ remote-endpoint = <&usbdp_phy0_typec_sbu>;
+ };
+ };
+ };
+ };
+ };
+
+ hym8563: rtc@51 {
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ #clock-cells = <0>;
+ clock-output-names = "hym8563";
+ };
+};
+
+&i2c7 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c7m0_xfer>;
+ status = "okay";
+
+ es8388: audio-codec@11 {
+ compatible = "everest,es8388", "everest,es8328";
+ reg = <0x11>;
+ assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
+ assigned-clock-rates = <12288000>;
+ clocks = <&cru I2S0_8CH_MCLKOUT>;
+ AVDD-supply = <&vcc3v3_sys>;
+ DVDD-supply = <&vcc_1v8_s3>;
+ HPVDD-supply = <&vcc3v3_sys>;
+ PVDD-supply = <&vcc_1v8_s3>;
+ #sound-dai-cells = <0>;
+ };
+};
+
+&i2s0_8ch {
+ pinctrl-0 = <&i2s0_lrck
+ &i2s0_mclk
+ &i2s0_sclk
+ &i2s0_sdi0
+ &i2s0_sdo0>;
+ status = "okay";
+};
+
+&i2s5_8ch {
+ status = "okay";
+};
+
+&i2s7_8ch {
+ status = "okay";
+};
+
+&mdio1 {
+ rgmii_phy: ethernet-phy@1 {
+ /* RTL8211F */
+ compatible = "ethernet-phy-id001c.c916";
+ reg = <0x1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rtl8211f_rst>;
+ reset-assert-us = <20000>;
+ reset-deassert-us = <100000>;
+ reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&package_thermal {
+ polling-delay = <1000>;
+
+ trips {
+ package_fan0: package-fan0 {
+ temperature = <55000>;
+ hysteresis = <2000>;
+ type = "active";
+ };
+
+ package_fan1: package-fan1 {
+ temperature = <65000>;
+ hysteresis = <2000>;
+ type = "active";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&package_fan0>;
+ cooling-device = <&fan THERMAL_NO_LIMIT 1>;
+ };
+
+ map1 {
+ trip = <&package_fan1>;
+ cooling-device = <&fan 2 THERMAL_NO_LIMIT>;
+ };
+ };
+};
+
+&pcie2x1l0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie2_0_rst>;
+ reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_sys>;
+ status = "okay";
+};
+
+&pcie2x1l1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie2_1_rst>;
+ reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_sys>;
+ status = "okay";
+
+ pcie@0,0 {
+ reg = <0x300000 0 0 0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+ device_type = "pci";
+ bus-range = <0x30 0x3f>;
+
+ r8125: ethernet@0,0 {
+ reg = <0x310000 0 0 0 0>;
+ };
+ };
+};
+
+&pcie30phy {
+ status = "okay";
+};
+
+&pcie3x4 {
+ clocks = <&cru ACLK_PCIE_4L_MSTR>, <&cru ACLK_PCIE_4L_SLV>,
+ <&cru ACLK_PCIE_4L_DBI>, <&cru PCLK_PCIE_4L>,
+ <&cru CLK_PCIE_AUX0>, <&cru CLK_PCIE4L_PIPE>,
+ <&pcie30_port0_refclk>;
+ clock-names = "aclk_mst", "aclk_slv",
+ "aclk_dbi", "pclk",
+ "aux", "pipe",
+ "ref";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie3x4_perstn>;
+ reset-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_sys>;
+ status = "okay";
+};
+
+&pinctrl {
+ hdmirx {
+ hdmirx_5v_det: hdmirx-5v-det {
+ rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ leds {
+ led_pins: led-pins {
+ rockchip,pins = <1 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>,
+ <1 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pcie {
+ pcie2_0_rst: pcie2-0-rst {
+ rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ pcie2_1_rst: pcie2-1-rst {
+ rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ pi6c_05_pwren: pi6c-05-pwren {
+ rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ pcie3x4_perstn: pcie3x4-perstn {
+ rockchip,pins = <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ rtl8211f {
+ rtl8211f_rst: rtl8211f-rst {
+ rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ sound {
+ hp_det: hp-det {
+ rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+
+ spk_en: spk-en {
+ rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ usb {
+ typec5v_pwren: typec5v-pwren {
+ rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ usbc0_int: usbc0-int {
+ rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
+
+&pwm2 {
+ pinctrl-0 = <&pwm2m2_pins>;
+ status = "okay";
+};
+
+&rknn_core_0 {
+ npu-supply = <&vdd_npu_s0>;
+ sram-supply = <&vdd_npu_s0>;
+ status = "okay";
+};
+
+&rknn_core_1 {
+ npu-supply = <&vdd_npu_s0>;
+ sram-supply = <&vdd_npu_s0>;
+ status = "okay";
+};
+
+&rknn_core_2 {
+ npu-supply = <&vdd_npu_s0>;
+ sram-supply = <&vdd_npu_s0>;
+ status = "okay";
+};
+
+&rknn_mmu_0 {
+ status = "okay";
+};
+
+&rknn_mmu_1 {
+ status = "okay";
+};
+
+&rknn_mmu_2 {
+ status = "okay";
+};
+
+&saradc {
+ vref-supply = <&avcc_1v8_s0>;
+ status = "okay";
+};
+
+&sata0 {
+ status = "okay";
+};
+
+&sdhci {
+ bus-width = <8>;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ no-sd;
+ no-sdio;
+ non-removable;
+ status = "okay";
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ disable-wp;
+ max-frequency = <150000000>;
+ no-mmc;
+ no-sdio;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc3v3_sd_s0>;
+ vqmmc-supply = <&vccio_sd_s0>;
+ status = "okay";
+};
+
+&spi2 {
+ assigned-clocks = <&cru CLK_SPI2>;
+ assigned-clock-rates = <200000000>;
+ num-cs = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
+ status = "okay";
+
+ pmic@0 {
+ compatible = "rockchip,rk806";
+ reg = <0x0>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
+ <&rk806_dvs2_null>, <&rk806_dvs3_null>;
+ spi-max-frequency = <1000000>;
+ system-power-controller;
+
+ vcc1-supply = <&vcc5v0_sys>;
+ vcc2-supply = <&vcc5v0_sys>;
+ vcc3-supply = <&vcc5v0_sys>;
+ vcc4-supply = <&vcc5v0_sys>;
+ vcc5-supply = <&vcc5v0_sys>;
+ vcc6-supply = <&vcc5v0_sys>;
+ vcc7-supply = <&vcc5v0_sys>;
+ vcc8-supply = <&vcc5v0_sys>;
+ vcc9-supply = <&vcc5v0_sys>;
+ vcc10-supply = <&vcc5v0_sys>;
+ vcc11-supply = <&vcc_2v0_pldo_s3>;
+ vcc12-supply = <&vcc5v0_sys>;
+ vcc13-supply = <&vcc_1v1_nldo_s3>;
+ vcc14-supply = <&vcc_1v1_nldo_s3>;
+ vcca-supply = <&vcc5v0_sys>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ rk806_dvs1_null: dvs1-null-pins {
+ pins = "gpio_pwrctrl1";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs2_null: dvs2-null-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs3_null: dvs3-null-pins {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun0";
+ };
+
+ regulators {
+ vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_gpu_s0";
+ regulator-enable-ramp-delay = <400>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_cpu_lit_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_log_s0: dcdc-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <675000>;
+ regulator-max-microvolt = <750000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_log_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <750000>;
+ };
+ };
+
+ vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_vdenc_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_ddr_s0: dcdc-reg5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <675000>;
+ regulator-max-microvolt = <900000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_ddr_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <850000>;
+ };
+ };
+
+ vdd2_ddr_s3: dcdc-reg6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vdd2_ddr_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_2v0_pldo_s3: dcdc-reg7 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <2000000>;
+ regulator-max-microvolt = <2000000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_2v0_pldo_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <2000000>;
+ };
+ };
+
+ vcc_3v3_s3: dcdc-reg8 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc_3v3_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vddq_ddr_s0: dcdc-reg9 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vddq_ddr_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v8_s3: dcdc-reg10 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc_1v8_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ avcc_1v8_s0: pldo-reg1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "avcc_1v8_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc_1v8_s0: pldo-reg2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc_1v8_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ avdd_1v2_s0: pldo-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "avdd_1v2_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_3v3_s0: pldo-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vcc_3v3_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vccio_sd_s0: pldo-reg5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vccio_sd_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ pldo6_s3: pldo-reg6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "pldo6_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vdd_0v75_s3: nldo-reg1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+ regulator-name = "vdd_0v75_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <750000>;
+ };
+ };
+
+ vdd_ddr_pll_s0: nldo-reg2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ regulator-name = "vdd_ddr_pll_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <850000>;
+ };
+ };
+
+ avdd_0v75_s0: nldo-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+ regulator-name = "avdd_0v75_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_0v85_s0: nldo-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ regulator-name = "vdd_0v85_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_0v75_s0: nldo-reg5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+ regulator-name = "vdd_0v75_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+};
+
+&tsadc {
+ status = "okay";
+};
+
+&u2phy0 {
+ status = "okay";
+};
+
+&u2phy0_otg {
+ status = "okay";
+};
+
+&u2phy1 {
+ status = "okay";
+};
+
+&u2phy1_otg {
+ status = "okay";
+};
+
+&u2phy2 {
+ status = "okay";
+};
+
+&u2phy2_host {
+ phy-supply = <&vcc5v0_sys>;
+ status = "okay";
+};
+
+&u2phy3 {
+ status = "okay";
+};
+
+&u2phy3_host {
+ phy-supply = <&vcc5v0_sys>;
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-0 = <&uart1m0_xfer>;
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-0 = <&uart2m0_xfer>;
+ status = "okay";
+};
+
+&uart6 {
+ pinctrl-0 = <&uart6m0_xfer>;
+ status = "okay";
+};
+
+&uart7 {
+ pinctrl-0 = <&uart7m0_xfer>;
+ status = "okay";
+};
+
+&uart9 {
+ pinctrl-0 = <&uart9m0_xfer>;
+ status = "okay";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&usb_host0_xhci {
+ usb-role-switch;
+ status = "okay";
+
+ port {
+ usb_host0_xhci_drd_sw: endpoint {
+ remote-endpoint = <&usbc0_hs>;
+ };
+ };
+};
+
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};
+
+&usb_host1_xhci {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbdp_phy0 {
+ mode-switch;
+ orientation-switch;
+ sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
+ sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ usbdp_phy0_typec_ss: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&usbc0_ss>;
+ };
+
+ usbdp_phy0_typec_sbu: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&usbc0_sbu>;
+ };
+ };
+};
+
+&usbdp_phy1 {
+ status = "okay";
+};
+
+&vop {
+ status = "okay";
+};
+
+&vop_mmu {
+ status = "okay";
+};
+
+&vp0 {
+ vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
+ remote-endpoint = <&hdmi0_in_vp0>;
+ };
+};
--
2.47.3
^ permalink raw reply related
* Re: [RFC PATCH v3 0/9] accel: rocket: Add RK3568 NPU support
From: Diederik de Haas @ 2026-06-10 14:28 UTC (permalink / raw)
To: Midgy Balon, Diederik de Haas
Cc: Chaoyi Chen, tomeu, ogabbay, heiko, robh, krzk+dt, conor+dt, joro,
will, robin.murphy, dri-devel, linux-rockchip, devicetree,
linux-arm-kernel, iommu, linux-kernel, Simon Xue, Finley Xiao,
Jonas Karlman
In-Reply-To: <CA+GS1Y1xAq-9eMyMmoVE6NG9KLG7XRxgPoSr5RkW=6fT5D820g@mail.gmail.com>
On Wed Jun 10, 2026 at 3:36 PM CEST, Midgy Balon wrote:
> Hello Chaoyi & Diederik,
>
> I compared the RK3568 and RK3588 NPU power-domain + DTS as you
> suggested, and it lines up
> exactly with what you described.
>
> The difference is the `need_regulator` capability. RK3588's NPU domain is
> `DOMAIN_RK3588("npu", …, false, true)` — the trailing `true` is
> `regulator`/`need_regulator`.
> The mainline RK3568 macro `DOMAIN_RK3568(name, pwr, req, wakeup)` has
> no regulator parameter at
> all, so `RK3568_PD_NPU` can't be marked need_regulator. My v4 adds
> that: a regulator-capable
> RK3568 NPU domain (need_regulator = true) plus `domain-supply =
> <&vdd_npu>` on the NPU node —
> i.e. the same shape as RK3588.
>
> And the fix you referenced (Frank Zhang's "pmdomain: rockchip: Fix init genpd as
> GENPD_STATE_ON before regulator ready", plus "quiet regulator error on
> -EPROBE_DEFER") is
> already in my base (v7.1-rc6), so the `if (need_regulator)
> rockchip_pd_power(pd, false)`
> default-off path is in effect. That's what resolves the actual problem
> for me: with rocket
> built as a module (the normal config), need_regulator on the NPU
> domain, and those pmdomain
> patches in place, the board boots cleanly and NPU jobs run with no RCU
> stall / no deadlock. My
> earlier hang was an artifact of a self-contained rocket=y image
> probing in the initcalls before
> the I2C regulator core was up — as a module it loads ~6.8 s in, well
> after, so it's gone.
>
> I also went back and checked the `fw_devlink=permissive` question
> myself — and good news, it
> turns out it is NOT needed. I rebooted the exact same kernel with
> permissive removed from the
> cmdline (strict fw_devlink, the default), and the board boots cleanly,
> the NPU probes
> (`rocket fde40000.npu: Rockchip NPU core 0 version: 0`), and NPU jobs
> submit and run five times
> in a row with no deadlock and no RCU stall. So strict fw_devlink
> resolves the NPU/PMIC ordering
> fine via deferred probe.
>
> The one remaining thing is cosmetic: at power-domain-controller probe
> (~2.94 s) I still get,
> in BOTH modes (with or without permissive):
>
> rockchip-pm-domain …: Failed to create device link (0x180) with
> supplier 0-0020 …power-domain@6
>
> i.e. genpd can't form the link to the rk809 (the I2C PMIC supplying
> vdd_npu) because the PMIC
> isn't registered yet at that point. It's non-fatal — the domain
> defaults off (Frank's patch),
> the rail comes up via the regulator core, the NPU probes a few seconds
> later, and all jobs run.
>
> One question: on RK3588 with need_regulator, do you also see that
> "Failed to create device
> link … supplier <pmic>" line at pmdomain probe, or does it order
> cleanly? If RK3588 is clean,
> is there a DTS detail (e.g. the regulator's bus/probe order) I should
> mirror on RK3568 to make
> the link form in time — or is this line just expected/harmless and
> best left as-is?
[ 2.110935] rockchip-pm-domain fd8d8000.power-management:power-controller: Failed to create device link (0x180) with supplier 2-0042 for /power-management@fd8d8000/power-controller/power-domain@8
[ 2.557459] sdhci-dwcmshc fe2e0000.mmc: Can't reduce the clock below 52MHz in HS200/HS400 mode
[ 2.647174] rockchip-pm-domain fd8d8000.power-management:power-controller: Failed to create device link (0x180) with supplier 2-0042 for /power-management@fd8d8000/power-controller/power-domain@8
[ 2.945089] rockchip-pm-domain fd8d8000.power-management:power-controller: Failed to create device link (0x180) with supplier spi2.0 for /power-management@fd8d8000/power-controller/power-domain@12
8 = NPU; 12 = GPU
on both nanopc-t6-lts and nanopc-t6-plus (both RK3588).
And on a 6.18 dmesg output I have for Rock 5B, I see the ~ same, but then
it's 1-0042 instead of 2-0042.
I don't know if it's bad or harmless, but it is consistent.
HTH,
Diederik
> @Diederik — thanks; the DCDC_REG2 change and Jonas's USB-suspend
> series look like generally
> useful RK356x robustness fixes, though for this specific NPU
> device-link the need_regulator +
> Frank's pmdomain patches seem to be the relevant piece. I'll keep them
> in mind for suspend.
>
> The convolution-output / compute-completion issue is still separate
> and open (@Finley — that's
> the PVTPLL/NoC one); the power-domain side is in good shape for v4.
>
> Thanks y'all for your help :)
>
> Kind regards,
> Midgy
>
> Le mer. 10 juin 2026 à 12:05, Diederik de Haas
> <diederik@cknow-tech.com> a écrit :
>>
>> Hi,
>>
>> On Wed Jun 10, 2026 at 3:14 AM CEST, Chaoyi Chen wrote:
>> > Hi Midgy,
>> >
>> > On 6/9/2026 7:11 PM, Midgy Balon wrote:
>> >> Hello Chaoyi,
>> >>
>> >> You were right - building rocket as a module fixes it. Thanks for the pointer.
>> >>
>> >> I rebuilt with CONFIG_DRM_ACCEL_ROCKET=m (everything else the same:
>> >> need_regulator on
>> >> the RK3568 NPU power domain via a DOMAIN_M_R variant, domain-supply =
>> >> <&vdd_npu>, and the
>> >> regulator-always-on workaround dropped). The board now boots cleanly
>> >> and, more importantly,
>> >> an NPU job submit no longer hangs: I ran the test workload five times
>> >> with no RCU stall and
>> >> no freeze.
>> >>
>> >> So with rocket=m the need_regulator approach works on RK3568, and I'll
>> >> keep it for v4
>> >> (domain-supply + need_regulator, instead of marking vdd_npu
>> >> always-on). rocket=m is the
>> >> normal configuration anyway; my earlier hang came from building it =y
>> >> in a self-contained
>> >> image, so it probed in the initcalls (around 2 s) and the genpd ->
>> >> I2C-PMIC regulator
>> >> transition ran before the system was ready. As a module it loads from
>> >> udev much later
>> >> (~6.8 s here), after the I2C controller and regulator core are fully up.
>> >>
>> >> On your question of when the device-link error is printed - it is at
>> >> power-domain
>> >> controller probe, not at the rocket probe:
>> >>
>> >> [ 2.700618] vdd_npu: Bringing 500000uV into 825000-825000uV
>> >> [ 2.749637] rockchip-pm-domain fdd90000.power-management:power-controller:
>> >> Failed to create device link (0x180) with supplier 0-0020 for
>> >> /power-management@fdd90000/power-controller/power-domain@6
>> >> [ 2.945955] platform fde40000.npu: Adding to iommu group 3
>> >> ...
>> >> [ 6.840374] rocket: loading out-of-tree module taints kernel.
>> >> [ 6.877647] [drm] Initialized rocket 0.0.0 for rknn on minor 0
>> >> [ 6.879950] rocket fde40000.npu: Rockchip NPU core 0 version: 0
>> >>
>> >> So the device-link to the rk809 PMIC (0-0020) fails to form at ~2.75
>> >> s, well before rocket
>> >> loads at ~6.8 s. It is non-fatal here - the vdd_npu rail is brought up
>> >> by the regulator core
>> >> and all jobs run - and there is no "failed to get ack on domain npu"
>> >> NoC warning this boot
>> >> (the always-on kernel had one). The complete boot log is attached.
>> >>
>> >> Two notes / one question:
>> >> - This boot used fw_devlink=permissive on the command line. Is the
>> >> "Failed to create device
>> >> link ... supplier 0-0020" at pmdomain probe expected/benign, or is
>> >> there a clean way to make
>> >> it order correctly (so it also works without permissive, and a =y
>> >> build wouldn't deadlock in
>> >> the initcalls)?
>> >
>> > We encountered the same issue on the RK3588 NPU before. And it was
>> > resolved with the following patch at that time.
>> >
>> > https://lore.kernel.org/all/20251216055247.13150-1-rmxpzlb@gmail.com/
>> >
>> > Please compare the differences in NPU pmdomain and DTS configuration
>> > between the RK3568 and RK3588.
>>
>> About a month ago on #linux-rockchip we were discussing PM 'stuff':
>> https://libera.catirclogs.org/linux-rockchip/2026-05-15#39939137;
>> which references this paste
>> https://paste.sr.ht/~diederik/89d9f84e22474e837b55286d213b67f03859ce2e
>> I've since removed the DCDC_REG2 for PineTab2 and the 'fix' should likely
>> be extended to cover all RK3566/RK3568 devices though.
>>
>> It's what I made at the time hoping to fix a suspend/resume issue when
>> trying upstream TF-A. It didn't fix the issue at the time, but may still
>> be useful/needed and I think it's what Chaoyi hinted at.
>>
>> Just yesterday, Jonas posted this patch which may be useful/needed too:
>> https://lore.kernel.org/linux-rockchip/20260609154124.445182-1-jonas@kwiboo.se/
>>
>> HTH,
>> Diederik
>>
>> >> - (The convolution output is still uniform zero-point / the job times
>> >> out - that is the
>> >> separate NPU compute-completion issue, unrelated to the power-domain
>> >> work. Finley, that is
>> >> the one I flagged earlier re PVTPLL/NoC.)
>> >>
>> >> Kind regards,
>> >> Midgy
>> >>
>>
>
> _______________________________________________
> Linux-rockchip mailing list
> Linux-rockchip@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply
* Re: [PATCH v2 1/4] dt-bindings: remoteproc: imx_rproc: document optional "memory-region-names"
From: Frank Li @ 2026-06-10 14:29 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Mathieu Poirier, Laurentiu Mihalcea, Bjorn Andersson, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Sascha Hauer, Peng Fan,
Fabio Estevam, Daniel Baluta, Francesco Dolcini, linux-remoteproc,
devicetree, imx, linux-arm-kernel, linux-kernel
In-Reply-To: <20260610-accomplished-antique-mink-cf0ead@quoll>
On Wed, Jun 10, 2026 at 09:39:25AM +0200, Krzysztof Kozlowski wrote:
> On Tue, Jun 09, 2026 at 11:33:03AM -0600, Mathieu Poirier wrote:
> > On Tue, 9 Jun 2026 at 11:06, Frank Li <Frank.li@oss.nxp.com> wrote:
> > >
> > > On Tue, Jun 09, 2026 at 10:40:06AM -0600, Mathieu Poirier wrote:
> > > > [You don't often get email from mathieu.poirier@linaro.org. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
> > > >
> > > > On Fri, Jun 05, 2026 at 04:36:18AM -0700, Laurentiu Mihalcea wrote:
> > > > > From: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
> > > > >
> > > > > The names of the carveout regions are derived using the names of the
> > > > > reserved memory devicetree nodes, which are referenced using the
> > > > > "memory-region" property. This adds a restriction on the names of said
> > > > > devicetree nodes, often bearing specific names such as: "vdevbuffer",
> > > > > "vdev0vring0", "rsc-table", etc... This goes against the devicetree
> > > > > specification's recommendation, which states that the devicetree node
> > > > > names should be generic.
> > > >
> > > > I don't see what is so restrictive in using the node name of the reserved-memory
> > > > regions. Function of_reserved_mem_region_to_resource() is already doing all the
> > > > parsing, packaging everything in a neat and easy to use "struct resource". What
> > > > will you gain with this new "memory-region-names" that can't be done with the
> > > > current solution?
> > >
> > > DT Binding check can't find such wrong if node name is not what expected.
> > > Binding can't restrict memory's node name because there ware not specific
> > > compatible string for it.
> > >
> >
> > But what "wrong" could that be, and what kind of restriction are you
> > hoping to enforce? What specific problem are you hoping to solve?
> >
> > I'll wait to see what the DT people think about this - I personally
> > don't see the value in it.
>
> I see no point in this commit, but maybe because the commit msg is just
> misleading. It mixes node names with names for phandles which are two
> separate things.
For example:
rsc_table: rsc-table@90000000
{ ret = <0x90000000>;
no-map;
}
m4 {
...
memory-region = <&rsc_table>;
}
If you change node name "rsc-table" to "memory", driver will failure
because it parse node name "rsc-table", which phandle point to. but no
binding to restrict node name to "rsc-table". So rsc-table became hidden
ABI.
if use memory-region-names, we can restrict memory-region-name to
"rsc-table" earsily.
Frank
>
> Plus this change actually makes nothing - no names are restricted to any
> meaningful values!
>
> Best regards,
> Krzysztof
>
^ permalink raw reply
* Re: [PATCH v2 07/16] usb: hub: Power on connected M.2 E-key connectors
From: Andy Shevchenko @ 2026-06-10 14:31 UTC (permalink / raw)
To: Chen-Yu Tsai
Cc: Bartosz Golaszewski, Greg Kroah-Hartman, Daniel Scally,
Heikki Krogerus, Sakari Ailus, Rafael J. Wysocki,
Danilo Krummrich, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Matthias Brugger, AngeloGioacchino Del Regno, Alan Stern,
linux-acpi, driver-core, linux-pm, linux-usb, devicetree,
linux-mediatek, linux-arm-kernel, linux-kernel,
Manivannan Sadhasivam
In-Reply-To: <20260610084053.2059858-8-wenst@chromium.org>
On Wed, Jun 10, 2026 at 04:40:41PM +0800, Chen-Yu Tsai wrote:
> The new M.2 E-key connector can have a USB connection. For the USB device
> on this connector to work, its power must be enabled and the W_DISABLE2#
> signal deasserted. The connector driver handles this and provides a
> toggle over the power sequencing API.
>
> This feature currently only supports a directly connected (no mux in
> between) M.2 E-key connector. Existing USB connector types are not
> covered. The USB A connector was recently added to the onboard devices
> driver. USB B connectors have historically been managed by the USB
> gadget or dual-role device controller drivers. USB C connectors are
> handled by TCPM drivers.
>
> The power sequencing API does not know whether a power sequence provider
> is not needed or not available yet, so we only request it for connectors
> that we know need it, which at this time is just the E-key connector.
>
> On the USB side, the port firmware node (if present) is tied to the
> usb_port device. This device is used to acquire the power sequencing
> descriptor. This allows the provider to tell the different ports on one
> hub apart.
>
> This feature is not implemented in the onboard USB devices driver. The
> power sequencing API expects the consumer device to make the request,
> but there is no device node to instantiate a platform device to tie
> the driver to. The connector is not a child node of the USB host or
> hub, and the graph connection is from a USB port to the connector.
> And the connector itself already has a driver.
>
> Power sequencing is not directly enabled in the connector driver as
> that would completely decouple the timing of it from the USB subsystem.
> It would not be possible for the USB subsystem to toggle the power
> for a power cycle or to disable the port.
>
> This change depends on another change to make the power sequencing
> framework bool instead of tristate. The USB core and hub driver are
> bool, so if the power sequencing framework is built as a module, the
> kernel will fail to link.
> int usb_hub_set_port_power(struct usb_device *hdev, struct usb_hub *hub,
> int port1, bool set)
> {
> - int ret;
> + struct usb_port *pwrseq_port = hub->ports[port1 - 1];
> + int ret = 0;
Don't touch ret here. It's easier to maintain when assignment is closer to it's
first user (because it's getting validated there).
> + /* non-SuperSpeed USB port holds pwrseq descriptor reference. */
> + if (hub->ports[port1 - 1]->is_superspeed && hub->ports[port1 - 1]->peer)
> + pwrseq_port = hub->ports[port1 - 1]->peer;
ret = 0;
> + if (set && !pwrseq_port->pwrseq_on)
> + ret = pwrseq_power_on(pwrseq_port->pwrseq);
> + else if (!set && pwrseq_port->pwrseq_on)
> + ret = pwrseq_power_off(pwrseq_port->pwrseq);
> + if (ret)
> + return ret;
>
> if (set)
> ret = set_port_feature(hdev, port1, USB_PORT_FEAT_POWER);
> else
> ret = usb_clear_port_feature(hdev, port1, USB_PORT_FEAT_POWER);
>
> - if (ret)
> + if (ret) {
> + if (set && !pwrseq_port->pwrseq_on)
> + pwrseq_power_off(pwrseq_port->pwrseq);
> + else if (!set && pwrseq_port->pwrseq_on)
> + pwrseq_power_on(pwrseq_port->pwrseq);
> return ret;
Can we rather have a couple of helpers? It might be hard to follow all this.
In such a case you won't even need the ret assignment here.
> + }
>
> - if (set)
> + if (set) {
> set_bit(port1, hub->power_bits);
> - else
> + pwrseq_port->pwrseq_on = 1;
> + } else {
> clear_bit(port1, hub->power_bits);
> + pwrseq_port->pwrseq_on = 0;
> + }
Just
pwrseq_port->pwrseq_on = set; // or explicit comparison
assign_bit(port1, hub->power_bits, pwrseq_port->pwrseq_on);
> return 0;
> }
...
> +static bool port_pwrseq_is_supported(struct usb_port *port_dev)
> +{
> + struct device *dev = &port_dev->dev;
> + struct fwnode_handle *port = dev->fwnode;
+ blank line here, because for RAII we assume the C99 definitions inside
the code, so one can insert the code in between. Doing it before ep validation
may lead to interesting errors in the future.
> + struct fwnode_handle *ep __free(fwnode_handle) =
> + fwnode_graph_get_next_port_endpoint(port, NULL);
> + if (!ep)
> + return false;
> +
> + struct fwnode_handle *remote __free(fwnode_handle) =
> + fwnode_graph_get_remote_port_parent(ep);
> + if (!remote)
> + return false;
> +
> + if (!fwnode_device_is_compatible(remote, "pcie-m2-e-connector")) {
> + dev_dbg(dev, "remote endpoint %pfw is not a supported connector", remote);
> + return false;
> + }
> +
> + return true;
> +}
...
> + if (IS_ERR(port_dev->pwrseq)) {
> + retval = PTR_ERR(port_dev->pwrseq);
> + dev_err_probe(&port_dev->dev, retval,
> + "failed to get power sequencing descriptor\n");
retval = dev_err_probe(PTR_ERR(...));
> + goto err_put_kn;
> + }
...
> retval = component_add(&port_dev->dev, &connector_ops);
> if (retval) {
> dev_warn(&port_dev->dev, "failed to add component\n");
dev_warn_probe() // however it's not in your patch and was before...
> - goto err_put_kn;
> + goto err_pwrseq_off;
> }
...
> +err_pwrseq_off:
> + if (port_dev->pwrseq_on)
> + pwrseq_power_off(port_dev->pwrseq);
Hmm... I would rather see pwrseq framework to provide something like
_is_powered_on().
if (pwrseq_is_powered_on())
_power_off();
...
> + if (port_dev->pwrseq_on)
> + pwrseq_power_off(port_dev->pwrseq);
Ditto.
And perhaps even _power_off_if_on() that combines the check and the call.
However it seems that is reference counted and this _power_off() calls won't
guarantee actual power off.
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* Re: [PATCH v2 10/16] power: sequencing: pcie-m2: support matching on remote "port" node
From: Andy Shevchenko @ 2026-06-10 14:33 UTC (permalink / raw)
To: Chen-Yu Tsai
Cc: Bartosz Golaszewski, Greg Kroah-Hartman, Daniel Scally,
Heikki Krogerus, Sakari Ailus, Rafael J. Wysocki,
Danilo Krummrich, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Matthias Brugger, AngeloGioacchino Del Regno, Alan Stern,
linux-acpi, driver-core, linux-pm, linux-usb, devicetree,
linux-mediatek, linux-arm-kernel, linux-kernel,
Manivannan Sadhasivam
In-Reply-To: <20260610084053.2059858-11-wenst@chromium.org>
On Wed, Jun 10, 2026 at 04:40:44PM +0800, Chen-Yu Tsai wrote:
> A USB hub can have multiple ports, and this driver needs to
> differentiate which port is being matched to. The USB hub driver now
> associates the "port" node with the usb_port device, so here we can
> use the remote "port" node to check for a match. Then fall back to
> the remote device node for the other connection types.
...
> + if (remote_port && remote_port == dev_of_node(dev))
> + return PWRSEQ_MATCH_OK;
> if (remote && (remote == dev_of_node(dev)))
> return PWRSEQ_MATCH_OK;
We have device_match_of_node() IIRC the name of that API.
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* [PATCH v2 0/9] v4l2: Add tracing for stateless codecs
From: Detlev Casanova @ 2026-06-10 14:33 UTC (permalink / raw)
To: Daniel Almeida, Mauro Carvalho Chehab, Steven Rostedt,
Masami Hiramatsu, Mathieu Desnoyers, Nicolas Dufresne,
Benjamin Gaignard, Philipp Zabel, Heiko Stuebner
Cc: linux-kernel, linux-media, linux-trace-kernel, linux-rockchip,
linux-arm-kernel, kernel, Detlev Casanova
Hi !
This patchset aims to improve codec event tracing in v4l2.
The traces added in visl by Daniel Almeida are moved to the global trace
events.
They are adapted to trace each each field separately and not just the
whole struct so that userspace can filter on different fields and
libraries like libtracefs and libtraceevent can be used to list the
fields instead of parsing the trace printk's.
The trace event templates are also reworked to avoid long lines, but
quoted string splits are kept as they don't cut words.
To each trace event are also added a tgid and fd fields, helping
userspace track different decoding sessions (contexts) based on the given
file descriptor used by the given process id.
Also for better tracking, stream on and stream off events are added as
well as HW run and HW done events to track decoder core usage.
The main focus is to be able to generate perfetto traces to show VPU usage,
a perfetto producer using this can be found at [1] (it will be renamed to
match the more generic approach than hantro).
Other controls can be traced later as well, this patch set only focuses on
mem2mem type drivers.
[1]:
https://gitlab.collabora.com/detlev/hantro-perf/-/tree/hantro-improved-info
Changes since v1:
- Don't modify the printk format
- Trace all fields of the structs instead of the whole struct as a buffer
- Remove fdinfo patches (they will come in another patch set)
- Fix long lines
- Rename v4l2_requests.h trace header to v4l2_controls.h
- Add basic documentation
Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
---
Detlev Casanova (9):
media: Move visl traces to v4l2-core
media: Map each struct field to its own trace field
media: Add tgid and fd fields in v4l2_fh struct
media: Add tgid and fd to the v4l2-requests trace fields
media: Add missing types to v4l2_ctrl_ptr
media: Trace the stateless controls when set in v4l2-ctrls-core.c
media: Add stream on/off traces and run them in the ioctl
media: Add HW run/done trace events
media: hantro: Add v4l2_hw run/done traces
drivers/media/platform/verisilicon/hantro.h | 1 +
drivers/media/platform/verisilicon/hantro_drv.c | 10 +
.../platform/verisilicon/rockchip_vpu981_regs.h | 1 +
.../media/platform/verisilicon/rockchip_vpu_hw.c | 4 +
drivers/media/test-drivers/visl/Makefile | 2 +-
drivers/media/test-drivers/visl/visl-dec.c | 76 -
drivers/media/test-drivers/visl/visl-trace-av1.h | 314 ---
drivers/media/test-drivers/visl/visl-trace-fwht.h | 66 -
drivers/media/test-drivers/visl/visl-trace-h264.h | 349 ---
drivers/media/test-drivers/visl/visl-trace-hevc.h | 464 ----
drivers/media/test-drivers/visl/visl-trace-mpeg2.h | 99 -
.../media/test-drivers/visl/visl-trace-points.c | 11 -
drivers/media/test-drivers/visl/visl-trace-vp8.h | 156 --
drivers/media/test-drivers/visl/visl-trace-vp9.h | 292 ---
drivers/media/v4l2-core/v4l2-ctrls-api.c | 10 +
drivers/media/v4l2-core/v4l2-ctrls-core.c | 114 +
drivers/media/v4l2-core/v4l2-fh.c | 1 +
drivers/media/v4l2-core/v4l2-ioctl.c | 37 +-
drivers/media/v4l2-core/v4l2-trace.c | 48 +
include/media/v4l2-ctrls.h | 19 +
include/media/v4l2-fh.h | 4 +
include/trace/events/v4l2.h | 77 +
include/trace/events/v4l2_controls.h | 2708 ++++++++++++++++++++
23 files changed, 3033 insertions(+), 1830 deletions(-)
---
base-commit: acb7500801e98639f6d8c2d796ed9f64cba83d3a
change-id: 20260608-v4l2-add-ftrace-aec6e7f60a6c
Best regards,
--
Detlev Casanova <detlev.casanova@collabora.com>
^ permalink raw reply
* [PATCH v2 3/9] media: Add tgid and fd fields in v4l2_fh struct
From: Detlev Casanova @ 2026-06-10 14:33 UTC (permalink / raw)
To: Daniel Almeida, Mauro Carvalho Chehab, Steven Rostedt,
Masami Hiramatsu, Mathieu Desnoyers, Nicolas Dufresne,
Benjamin Gaignard, Philipp Zabel, Heiko Stuebner
Cc: linux-kernel, linux-media, linux-trace-kernel, linux-rockchip,
linux-arm-kernel, kernel, Detlev Casanova
In-Reply-To: <20260610-v4l2-add-ftrace-v2-0-9756edf72ac1@collabora.com>
These fields will be used in traces to help userspace tracing tools
identify streams.
The tgid field will keep the PID of the process that opened the video
file.
That is needed because trace calls can happen in IRQs, for which there is
no current PID.
The fd field helps identify the context in case the same process opens the
video device multiple times.
Note that the fd field is set in the __video_do_ioctl() function.
That is because the file descriptor has not been allocated yet when
v4l2_open() is called.
Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
---
drivers/media/v4l2-core/v4l2-fh.c | 1 +
drivers/media/v4l2-core/v4l2-ioctl.c | 17 +++++++++++++++++
include/media/v4l2-fh.h | 4 ++++
3 files changed, 22 insertions(+)
diff --git a/drivers/media/v4l2-core/v4l2-fh.c b/drivers/media/v4l2-core/v4l2-fh.c
index b184bed8aca9..9c2ddd1c2137 100644
--- a/drivers/media/v4l2-core/v4l2-fh.c
+++ b/drivers/media/v4l2-core/v4l2-fh.c
@@ -37,6 +37,7 @@ void v4l2_fh_init(struct v4l2_fh *fh, struct video_device *vdev)
INIT_LIST_HEAD(&fh->available);
INIT_LIST_HEAD(&fh->subscribed);
fh->sequence = -1;
+ fh->tgid = current->tgid;
mutex_init(&fh->subscribe_lock);
}
EXPORT_SYMBOL_GPL(v4l2_fh_init);
diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c
index a2b650f4ec3c..c8746a1637f5 100644
--- a/drivers/media/v4l2-core/v4l2-ioctl.c
+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
@@ -9,6 +9,7 @@
*/
#include <linux/compat.h>
+#include <linux/fdtable.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/slab.h>
@@ -3061,6 +3062,16 @@ void v4l_printk_ioctl(const char *prefix, unsigned int cmd)
}
EXPORT_SYMBOL(v4l_printk_ioctl);
+static int _file_iterate(const void *priv, struct file *filp, unsigned int fd)
+{
+ const struct file *fh_filp = priv;
+
+ if (fh_filp == filp)
+ return fd;
+
+ return 0;
+}
+
static long __video_do_ioctl(struct file *file,
unsigned int cmd, void *arg)
{
@@ -3081,6 +3092,12 @@ static long __video_do_ioctl(struct file *file,
return ret;
}
+ if (unlikely(!vfh->fd)) {
+ vfh->fd = iterate_fd(current->files, 0, _file_iterate, file);
+ if (!vfh->fd)
+ vfh->fd = -1;
+ }
+
/*
* We need to serialize streamon/off/reqbufs with queueing new requests.
* These ioctls may trigger the cancellation of a streaming
diff --git a/include/media/v4l2-fh.h b/include/media/v4l2-fh.h
index aad4b3689d7e..4ef4e58ab8d1 100644
--- a/include/media/v4l2-fh.h
+++ b/include/media/v4l2-fh.h
@@ -28,6 +28,8 @@ struct v4l2_ctrl_handler;
* @vdev: pointer to &struct video_device
* @ctrl_handler: pointer to &struct v4l2_ctrl_handler
* @prio: priority of the file handler, as defined by &enum v4l2_priority
+ * @tgid: process id that initialized the v4l2_fh
+ * @fd: file descriptor associated to this v4l2_fh for the process id in tgid
*
* @wait: event' s wait queue
* @subscribe_lock: serialise changes to the subscribed list; guarantee that
@@ -44,6 +46,8 @@ struct v4l2_fh {
struct video_device *vdev;
struct v4l2_ctrl_handler *ctrl_handler;
enum v4l2_priority prio;
+ uint32_t tgid;
+ int fd;
/* Events */
wait_queue_head_t wait;
--
2.54.0
^ permalink raw reply related
* [PATCH v2 5/9] media: Add missing types to v4l2_ctrl_ptr
From: Detlev Casanova @ 2026-06-10 14:33 UTC (permalink / raw)
To: Daniel Almeida, Mauro Carvalho Chehab, Steven Rostedt,
Masami Hiramatsu, Mathieu Desnoyers, Nicolas Dufresne,
Benjamin Gaignard, Philipp Zabel, Heiko Stuebner
Cc: linux-kernel, linux-media, linux-trace-kernel, linux-rockchip,
linux-arm-kernel, kernel, Detlev Casanova
In-Reply-To: <20260610-v4l2-add-ftrace-v2-0-9756edf72ac1@collabora.com>
The v4l2_ctrl_ptr union contains pointers for all control types, but
v4l2_ctrl_hevc_decode_params and v4l2_ctrl_hevc_scaling_matrix are missing.
Add them.
Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
---
include/media/v4l2-ctrls.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/include/media/v4l2-ctrls.h b/include/media/v4l2-ctrls.h
index 327976b14d50..a2b4c96a9a6f 100644
--- a/include/media/v4l2-ctrls.h
+++ b/include/media/v4l2-ctrls.h
@@ -49,6 +49,8 @@ struct video_device;
* @p_hevc_sps: Pointer to an HEVC sequence parameter set structure.
* @p_hevc_pps: Pointer to an HEVC picture parameter set structure.
* @p_hevc_slice_params: Pointer to an HEVC slice parameters structure.
+ * @p_hevc_decode_params: Pointer to an HEVC decode parameters structure.
+ * @p_hevc_scaling_matrix Pointer to an HEVC scaling matrix structure.
* @p_hdr10_cll: Pointer to an HDR10 Content Light Level structure.
* @p_hdr10_mastering: Pointer to an HDR10 Mastering Display structure.
* @p_area: Pointer to an area.
@@ -81,6 +83,8 @@ union v4l2_ctrl_ptr {
struct v4l2_ctrl_hevc_sps *p_hevc_sps;
struct v4l2_ctrl_hevc_pps *p_hevc_pps;
struct v4l2_ctrl_hevc_slice_params *p_hevc_slice_params;
+ struct v4l2_ctrl_hevc_decode_params *p_hevc_decode_params;
+ struct v4l2_ctrl_hevc_scaling_matrix *p_hevc_scaling_matrix;
struct v4l2_ctrl_vp9_compressed_hdr *p_vp9_compressed_hdr_probs;
struct v4l2_ctrl_vp9_frame *p_vp9_frame;
struct v4l2_ctrl_hdr10_cll_info *p_hdr10_cll;
--
2.54.0
^ permalink raw reply related
* [PATCH v2 6/9] media: Trace the stateless controls when set in v4l2-ctrls-core.c
From: Detlev Casanova @ 2026-06-10 14:33 UTC (permalink / raw)
To: Daniel Almeida, Mauro Carvalho Chehab, Steven Rostedt,
Masami Hiramatsu, Mathieu Desnoyers, Nicolas Dufresne,
Benjamin Gaignard, Philipp Zabel, Heiko Stuebner
Cc: linux-kernel, linux-media, linux-trace-kernel, linux-rockchip,
linux-arm-kernel, kernel, Detlev Casanova
In-Reply-To: <20260610-v4l2-add-ftrace-v2-0-9756edf72ac1@collabora.com>
Also remove the trace from visl as the generic v4l2-requests traces can
now be used instead.
It allows all stateless drivers to inherit traceability, with just a small
overhead when disabled in userspace.
Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
---
drivers/media/test-drivers/visl/visl-dec.c | 74 -------------------
drivers/media/v4l2-core/v4l2-ctrls-api.c | 10 +++
drivers/media/v4l2-core/v4l2-ctrls-core.c | 114 +++++++++++++++++++++++++++++
include/media/v4l2-ctrls.h | 15 ++++
4 files changed, 139 insertions(+), 74 deletions(-)
diff --git a/drivers/media/test-drivers/visl/visl-dec.c b/drivers/media/test-drivers/visl/visl-dec.c
index 2a065a6249ad..9517830fb3e8 100644
--- a/drivers/media/test-drivers/visl/visl-dec.c
+++ b/drivers/media/test-drivers/visl/visl-dec.c
@@ -12,7 +12,6 @@
#include <linux/workqueue.h>
#include <media/v4l2-mem2mem.h>
#include <media/tpg/v4l2-tpg.h>
-#include <trace/events/v4l2_controls.h>
#define LAST_BUF_IDX (V4L2_AV1_REF_LAST_FRAME - V4L2_AV1_REF_LAST_FRAME)
#define LAST2_BUF_IDX (V4L2_AV1_REF_LAST2_FRAME - V4L2_AV1_REF_LAST_FRAME)
@@ -486,78 +485,6 @@ static void visl_tpg_fill(struct visl_ctx *ctx, struct visl_run *run)
}
}
-static void visl_trace_ctrls(struct visl_ctx *ctx, struct visl_run *run)
-{
- int i;
- struct v4l2_fh *fh = &ctx->fh;
-
- switch (ctx->current_codec) {
- default:
- case VISL_CODEC_NONE:
- break;
- case VISL_CODEC_FWHT:
- trace_v4l2_ctrl_fwht_params(fh->tgid, fh->fd, run->fwht.params);
- break;
- case VISL_CODEC_MPEG2:
- trace_v4l2_ctrl_mpeg2_sequence(fh->tgid, fh->fd, run->mpeg2.seq);
- trace_v4l2_ctrl_mpeg2_picture(fh->tgid, fh->fd, run->mpeg2.pic);
- trace_v4l2_ctrl_mpeg2_quantisation(fh->tgid, fh->fd, run->mpeg2.quant);
- break;
- case VISL_CODEC_VP8:
- trace_v4l2_ctrl_vp8_frame(fh->tgid, fh->fd, run->vp8.frame);
- trace_v4l2_ctrl_vp8_entropy(fh->tgid, fh->fd, run->vp8.frame);
- break;
- case VISL_CODEC_VP9:
- trace_v4l2_ctrl_vp9_frame(fh->tgid, fh->fd, run->vp9.frame);
- trace_v4l2_ctrl_vp9_compressed_hdr(fh->tgid, fh->fd, run->vp9.probs);
- trace_v4l2_ctrl_vp9_compressed_coeff(fh->tgid, fh->fd, run->vp9.probs);
- trace_v4l2_vp9_mv_probs(fh->tgid, fh->fd, &run->vp9.probs->mv);
- break;
- case VISL_CODEC_H264:
- trace_v4l2_ctrl_h264_sps(fh->tgid, fh->fd, run->h264.sps);
- trace_v4l2_ctrl_h264_pps(fh->tgid, fh->fd, run->h264.pps);
- trace_v4l2_ctrl_h264_scaling_matrix(fh->tgid, fh->fd, run->h264.sm);
- trace_v4l2_ctrl_h264_slice_params(fh->tgid, fh->fd, run->h264.spram);
-
- for (i = 0; i < ARRAY_SIZE(run->h264.spram->ref_pic_list0); i++)
- trace_v4l2_h264_ref_pic_list0(fh->tgid, fh->fd,
- &run->h264.spram->ref_pic_list0[i], i);
- for (i = 0; i < ARRAY_SIZE(run->h264.spram->ref_pic_list0); i++)
- trace_v4l2_h264_ref_pic_list1(fh->tgid, fh->fd,
- &run->h264.spram->ref_pic_list1[i], i);
-
- trace_v4l2_ctrl_h264_decode_params(fh->tgid, fh->fd, run->h264.dpram);
-
- for (i = 0; i < ARRAY_SIZE(run->h264.dpram->dpb); i++)
- trace_v4l2_h264_dpb_entry(fh->tgid, fh->fd, &run->h264.dpram->dpb[i], i);
-
- trace_v4l2_ctrl_h264_pred_weights(fh->tgid, fh->fd, run->h264.pwht);
- break;
- case VISL_CODEC_HEVC:
- trace_v4l2_ctrl_hevc_sps(fh->tgid, fh->fd, run->hevc.sps);
- trace_v4l2_ctrl_hevc_pps(fh->tgid, fh->fd, run->hevc.pps);
- trace_v4l2_ctrl_hevc_slice_params(fh->tgid, fh->fd, run->hevc.spram);
- trace_v4l2_ctrl_hevc_scaling_matrix(fh->tgid, fh->fd, run->hevc.sm);
- trace_v4l2_ctrl_hevc_decode_params(fh->tgid, fh->fd, run->hevc.dpram);
-
- for (i = 0; i < ARRAY_SIZE(run->hevc.dpram->dpb); i++)
- trace_v4l2_hevc_dpb_entry(fh->tgid, fh->fd, &run->hevc.dpram->dpb[i]);
-
-
- trace_v4l2_hevc_pred_weight_table(fh->tgid, fh->fd,
- &run->hevc.spram->pred_weight_table);
- trace_v4l2_ctrl_hevc_ext_sps_lt_rps(fh->tgid, fh->fd, run->hevc.rps_lt);
- trace_v4l2_ctrl_hevc_ext_sps_st_rps(fh->tgid, fh->fd, run->hevc.rps_st);
- break;
- case VISL_CODEC_AV1:
- trace_v4l2_ctrl_av1_sequence(fh->tgid, fh->fd, run->av1.seq);
- trace_v4l2_ctrl_av1_frame(fh->tgid, fh->fd, run->av1.frame);
- trace_v4l2_ctrl_av1_film_grain(fh->tgid, fh->fd, run->av1.grain);
- trace_v4l2_ctrl_av1_tile_group_entry(fh->tgid, fh->fd, run->av1.tge);
- break;
- }
-}
-
void visl_device_run(void *priv)
{
struct visl_ctx *ctx = priv;
@@ -634,7 +561,6 @@ void visl_device_run(void *priv)
run.dst->sequence, run.dst->vb2_buf.timestamp);
visl_tpg_fill(ctx, &run);
- visl_trace_ctrls(ctx, &run);
if (bitstream_trace_frame_start > -1 &&
run.dst->sequence >= bitstream_trace_frame_start &&
diff --git a/drivers/media/v4l2-core/v4l2-ctrls-api.c b/drivers/media/v4l2-core/v4l2-ctrls-api.c
index 93d8d4012d0f..c44578828b21 100644
--- a/drivers/media/v4l2-core/v4l2-ctrls-api.c
+++ b/drivers/media/v4l2-core/v4l2-ctrls-api.c
@@ -523,6 +523,12 @@ int v4l2_g_ext_ctrls(struct v4l2_ctrl_handler *hdl, struct video_device *vdev,
}
EXPORT_SYMBOL(v4l2_g_ext_ctrls);
+static void trace_ext_ctrl(struct v4l2_fh *fh, const struct v4l2_ctrl *ctrl)
+{
+ if (ctrl->type_ops->trace)
+ ctrl->type_ops->trace(fh, ctrl, ctrl->p_cur);
+}
+
/* Validate a new control */
static int validate_new(const struct v4l2_ctrl *ctrl, union v4l2_ctrl_ptr p_new)
{
@@ -711,6 +717,10 @@ int try_set_ext_ctrls_common(struct v4l2_fh *fh,
idx = helpers[idx].next;
} while (!ret && idx);
}
+
+ if (set)
+ trace_ext_ctrl(fh, master);
+
v4l2_ctrl_unlock(master);
}
diff --git a/drivers/media/v4l2-core/v4l2-ctrls-core.c b/drivers/media/v4l2-core/v4l2-ctrls-core.c
index 6b375720e395..d8a8dc7896c5 100644
--- a/drivers/media/v4l2-core/v4l2-ctrls-core.c
+++ b/drivers/media/v4l2-core/v4l2-ctrls-core.c
@@ -10,8 +10,11 @@
#include <linux/slab.h>
#include <media/v4l2-ctrls.h>
#include <media/v4l2-event.h>
+#include <media/v4l2-fh.h>
#include <media/v4l2-fwnode.h>
+#include <trace/events/v4l2_controls.h>
+
#include "v4l2-ctrls-priv.h"
static const union v4l2_ctrl_ptr ptr_null;
@@ -1462,12 +1465,123 @@ int v4l2_ctrl_type_op_validate(const struct v4l2_ctrl *ctrl,
}
EXPORT_SYMBOL(v4l2_ctrl_type_op_validate);
+void v4l2_ctrl_type_op_trace(const struct v4l2_fh *fh,
+ const struct v4l2_ctrl *ctrl, union v4l2_ctrl_ptr ptr)
+{
+ int i = 0;
+
+ switch ((u32)ctrl->type) {
+ case V4L2_CTRL_TYPE_FWHT_PARAMS:
+ trace_v4l2_ctrl_fwht_params(fh->tgid, fh->fd, ptr.p_fwht_params);
+ break;
+ case V4L2_CTRL_TYPE_MPEG2_SEQUENCE:
+ trace_v4l2_ctrl_mpeg2_sequence(fh->tgid, fh->fd, ptr.p_mpeg2_sequence);
+ break;
+ case V4L2_CTRL_TYPE_MPEG2_PICTURE:
+ trace_v4l2_ctrl_mpeg2_picture(fh->tgid, fh->fd, ptr.p_mpeg2_picture);
+ break;
+ case V4L2_CTRL_TYPE_MPEG2_QUANTISATION:
+ trace_v4l2_ctrl_mpeg2_quantisation(fh->tgid, fh->fd, ptr.p_mpeg2_quantisation);
+ break;
+ case V4L2_CTRL_TYPE_VP8_FRAME:
+ trace_v4l2_ctrl_vp8_frame(fh->tgid, fh->fd, ptr.p_vp8_frame);
+ trace_v4l2_ctrl_vp8_entropy(fh->tgid, fh->fd, ptr.p_vp8_frame);
+ break;
+ case V4L2_CTRL_TYPE_VP9_FRAME:
+ trace_v4l2_ctrl_vp9_frame(fh->tgid, fh->fd, ptr.p_vp9_frame);
+ break;
+ case V4L2_CTRL_TYPE_VP9_COMPRESSED_HDR:
+ trace_v4l2_ctrl_vp9_compressed_hdr(fh->tgid, fh->fd,
+ ptr.p_vp9_compressed_hdr_probs);
+ trace_v4l2_ctrl_vp9_compressed_coeff(fh->tgid, fh->fd,
+ ptr.p_vp9_compressed_hdr_probs);
+ trace_v4l2_vp9_mv_probs(fh->tgid, fh->fd, &ptr.p_vp9_compressed_hdr_probs->mv);
+ break;
+ case V4L2_CTRL_TYPE_H264_SPS:
+ trace_v4l2_ctrl_h264_sps(fh->tgid, fh->fd, ptr.p_h264_sps);
+ break;
+ case V4L2_CTRL_TYPE_H264_PPS:
+ trace_v4l2_ctrl_h264_pps(fh->tgid, fh->fd, ptr.p_h264_pps);
+ break;
+ case V4L2_CTRL_TYPE_H264_SCALING_MATRIX:
+ trace_v4l2_ctrl_h264_scaling_matrix(fh->tgid, fh->fd, ptr.p_h264_scaling_matrix);
+ break;
+ case V4L2_CTRL_TYPE_H264_SLICE_PARAMS:
+ {
+ struct v4l2_ctrl_h264_slice_params *sp = ptr.p_h264_slice_params;
+
+ trace_v4l2_ctrl_h264_slice_params(fh->tgid, fh->fd, sp);
+
+ for (i = 0; i < ARRAY_SIZE(sp->ref_pic_list0); i++)
+ trace_v4l2_h264_ref_pic_list0(fh->tgid, fh->fd, &sp->ref_pic_list0[i], i);
+ for (i = 0; i < ARRAY_SIZE(sp->ref_pic_list1); i++)
+ trace_v4l2_h264_ref_pic_list1(fh->tgid, fh->fd, &sp->ref_pic_list1[i], i);
+
+ break;
+ }
+ case V4L2_CTRL_TYPE_H264_DECODE_PARAMS:
+ {
+ struct v4l2_ctrl_h264_decode_params *dp = ptr.p_h264_decode_params;
+
+ trace_v4l2_ctrl_h264_decode_params(fh->tgid, fh->fd, dp);
+
+ for (i = 0; i < ARRAY_SIZE(dp->dpb); i++)
+ trace_v4l2_h264_dpb_entry(fh->tgid, fh->fd, &dp->dpb[i], i);
+
+ break;
+ }
+ case V4L2_CTRL_TYPE_H264_PRED_WEIGHTS:
+ trace_v4l2_ctrl_h264_pred_weights(fh->tgid, fh->fd, ptr.p_h264_pred_weights);
+ break;
+ case V4L2_CTRL_TYPE_HEVC_SPS:
+ trace_v4l2_ctrl_hevc_sps(fh->tgid, fh->fd, ptr.p_hevc_sps);
+ break;
+ case V4L2_CTRL_TYPE_HEVC_PPS:
+ trace_v4l2_ctrl_hevc_pps(fh->tgid, fh->fd, ptr.p_hevc_pps);
+ break;
+ case V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS:
+ trace_v4l2_ctrl_hevc_slice_params(fh->tgid, fh->fd, ptr.p_hevc_slice_params);
+ trace_v4l2_hevc_pred_weight_table(fh->tgid, fh->fd,
+ &ptr.p_hevc_slice_params->pred_weight_table);
+ break;
+ case V4L2_CTRL_TYPE_HEVC_SCALING_MATRIX:
+ trace_v4l2_ctrl_hevc_scaling_matrix(fh->tgid, fh->fd, ptr.p_hevc_scaling_matrix);
+ break;
+ case V4L2_CTRL_TYPE_HEVC_DECODE_PARAMS:
+ {
+ struct v4l2_ctrl_hevc_decode_params *dp = ptr.p_hevc_decode_params;
+
+ trace_v4l2_ctrl_hevc_decode_params(fh->tgid, fh->fd, dp);
+
+ for (i = 0; i < ARRAY_SIZE(dp->dpb); i++)
+ trace_v4l2_hevc_dpb_entry(fh->tgid, fh->fd, &dp->dpb[i]);
+
+ break;
+ }
+ case V4L2_CTRL_TYPE_AV1_SEQUENCE:
+ trace_v4l2_ctrl_av1_sequence(fh->tgid, fh->fd, ptr.p_av1_sequence);
+ break;
+ case V4L2_CTRL_TYPE_AV1_FRAME:
+ trace_v4l2_ctrl_av1_frame(fh->tgid, fh->fd, ptr.p_av1_frame);
+ break;
+ case V4L2_CTRL_TYPE_AV1_FILM_GRAIN:
+ trace_v4l2_ctrl_av1_film_grain(fh->tgid, fh->fd, ptr.p_av1_film_grain);
+ break;
+ case V4L2_CTRL_TYPE_AV1_TILE_GROUP_ENTRY:
+ trace_v4l2_ctrl_av1_tile_group_entry(fh->tgid, fh->fd, ptr.p_av1_tile_group_entry);
+ break;
+ }
+
+}
+EXPORT_SYMBOL(v4l2_ctrl_type_op_trace);
+
static const struct v4l2_ctrl_type_ops std_type_ops = {
.equal = v4l2_ctrl_type_op_equal,
.init = v4l2_ctrl_type_op_init,
.minimum = v4l2_ctrl_type_op_minimum,
.maximum = v4l2_ctrl_type_op_maximum,
.log = v4l2_ctrl_type_op_log,
+ .trace = v4l2_ctrl_type_op_trace,
.validate = v4l2_ctrl_type_op_validate,
};
diff --git a/include/media/v4l2-ctrls.h b/include/media/v4l2-ctrls.h
index a2b4c96a9a6f..57c4bb999b7b 100644
--- a/include/media/v4l2-ctrls.h
+++ b/include/media/v4l2-ctrls.h
@@ -140,6 +140,7 @@ struct v4l2_ctrl_ops {
* @minimum: set the value to the minimum value of the control.
* @maximum: set the value to the maximum value of the control.
* @log: log the value.
+ * @trace: trace the value of the control with Ftrace.
* @validate: validate the value for ctrl->new_elems array elements.
* Return 0 on success and a negative value otherwise.
*/
@@ -153,6 +154,8 @@ struct v4l2_ctrl_type_ops {
void (*maximum)(const struct v4l2_ctrl *ctrl, u32 idx,
union v4l2_ctrl_ptr ptr);
void (*log)(const struct v4l2_ctrl *ctrl);
+ void (*trace)(const struct v4l2_fh *fh,
+ const struct v4l2_ctrl *ctrl, union v4l2_ctrl_ptr ptr);
int (*validate)(const struct v4l2_ctrl *ctrl, union v4l2_ctrl_ptr ptr);
};
@@ -1627,6 +1630,18 @@ void v4l2_ctrl_type_op_init(const struct v4l2_ctrl *ctrl, u32 from_idx,
*/
void v4l2_ctrl_type_op_log(const struct v4l2_ctrl *ctrl);
+/**
+ * v4l2_ctrl_type_op_trace - Default v4l2_ctrl_type_ops trace callback.
+ *
+ * @fh: The v4l2_fh of the current context.
+ * @ctrl: The v4l2_ctrl pointer.
+ * @ptr: The v4l2 control value.
+ *
+ * Return: void
+ */
+void v4l2_ctrl_type_op_trace(const struct v4l2_fh *fh,
+ const struct v4l2_ctrl *ctrl, union v4l2_ctrl_ptr ptr);
+
/**
* v4l2_ctrl_type_op_validate - Default v4l2_ctrl_type_ops validate callback.
*
--
2.54.0
^ permalink raw reply related
* [PATCH v2 7/9] media: Add stream on/off traces and run them in the ioctl
From: Detlev Casanova @ 2026-06-10 14:33 UTC (permalink / raw)
To: Daniel Almeida, Mauro Carvalho Chehab, Steven Rostedt,
Masami Hiramatsu, Mathieu Desnoyers, Nicolas Dufresne,
Benjamin Gaignard, Philipp Zabel, Heiko Stuebner
Cc: linux-kernel, linux-media, linux-trace-kernel, linux-rockchip,
linux-arm-kernel, kernel, Detlev Casanova
In-Reply-To: <20260610-v4l2-add-ftrace-v2-0-9756edf72ac1@collabora.com>
This will automatically add stream on/off tracing for all v4l2 drivers.
Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
---
drivers/media/v4l2-core/v4l2-ioctl.c | 20 +++++++++++++++++--
include/trace/events/v4l2.h | 37 ++++++++++++++++++++++++++++++++++++
2 files changed, 55 insertions(+), 2 deletions(-)
diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c
index c8746a1637f5..b09489baff3e 100644
--- a/drivers/media/v4l2-core/v4l2-ioctl.c
+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
@@ -1963,13 +1963,29 @@ static int v4l_try_fmt(const struct v4l2_ioctl_ops *ops, struct file *file,
static int v4l_streamon(const struct v4l2_ioctl_ops *ops, struct file *file,
void *arg)
{
- return ops->vidioc_streamon(file, NULL, *(unsigned int *)arg);
+ struct v4l2_fh *fh = file_to_v4l2_fh(file);
+ int err;
+
+ err = ops->vidioc_streamon(file, NULL, *(unsigned int *)arg);
+
+ if (!err)
+ trace_v4l2_streamon(fh->tgid, fh->fd);
+
+ return err;
}
static int v4l_streamoff(const struct v4l2_ioctl_ops *ops, struct file *file,
void *arg)
{
- return ops->vidioc_streamoff(file, NULL, *(unsigned int *)arg);
+ struct v4l2_fh *fh = file_to_v4l2_fh(file);
+ int err;
+
+ err = ops->vidioc_streamoff(file, NULL, *(unsigned int *)arg);
+
+ if (!err)
+ trace_v4l2_streamoff(fh->tgid, fh->fd);
+
+ return err;
}
static int v4l_g_tuner(const struct v4l2_ioctl_ops *ops, struct file *file,
diff --git a/include/trace/events/v4l2.h b/include/trace/events/v4l2.h
index 248bc09bfc99..e5b80aeecc30 100644
--- a/include/trace/events/v4l2.h
+++ b/include/trace/events/v4l2.h
@@ -262,6 +262,43 @@ DEFINE_EVENT(vb2_v4l2_event_class, vb2_v4l2_qbuf,
TP_ARGS(q, vb)
);
+
+/* Events for stream on/off.
+ *
+ * These events will be fired every time userspace starts or stops a stream.
+ * tgid and fd are used to identify the process that opened the video device.
+ *
+ * Note that this even can be fired multiple times for a given tgid/fd pair.
+ * E.g.: mem2mem drivers expect stream on/off on both output and capture queues.
+ */
+DECLARE_EVENT_CLASS(v4l2_stream_class,
+ TP_PROTO(u32 tgid, u32 fd),
+ TP_ARGS(tgid, fd),
+
+ TP_STRUCT__entry(
+ __field(u32, tgid)
+ __field(u32, fd)
+ ),
+
+ TP_fast_assign(
+ __entry->tgid = tgid;
+ __entry->fd = fd;
+ ),
+
+ TP_printk("tgid = %u, fd = %u",
+ __entry->tgid, __entry->fd)
+);
+
+DEFINE_EVENT(v4l2_stream_class, v4l2_streamon,
+ TP_PROTO(u32 tgid, u32 fd),
+ TP_ARGS(tgid, fd)
+);
+
+DEFINE_EVENT(v4l2_stream_class, v4l2_streamoff,
+ TP_PROTO(u32 tgid, u32 fd),
+ TP_ARGS(tgid, fd)
+);
+
#endif /* if !defined(_TRACE_V4L2_H) || defined(TRACE_HEADER_MULTI_READ) */
/* This part must be outside protection */
--
2.54.0
^ permalink raw reply related
* [PATCH v2 8/9] media: Add HW run/done trace events
From: Detlev Casanova @ 2026-06-10 14:33 UTC (permalink / raw)
To: Daniel Almeida, Mauro Carvalho Chehab, Steven Rostedt,
Masami Hiramatsu, Mathieu Desnoyers, Nicolas Dufresne,
Benjamin Gaignard, Philipp Zabel, Heiko Stuebner
Cc: linux-kernel, linux-media, linux-trace-kernel, linux-rockchip,
linux-arm-kernel, kernel, Detlev Casanova
In-Reply-To: <20260610-v4l2-add-ftrace-v2-0-9756edf72ac1@collabora.com>
The events can be fired by drivers when the hardware is run and when it
is done.
That can be used by userspace tracers to see HW performance and usage.
The hw_done event allows setting the number of clock cycles the HW needed
to do the work, to help tools evaluate performances.
Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
---
drivers/media/v4l2-core/v4l2-trace.c | 3 +++
include/trace/events/v4l2.h | 40 ++++++++++++++++++++++++++++++++++++
2 files changed, 43 insertions(+)
diff --git a/drivers/media/v4l2-core/v4l2-trace.c b/drivers/media/v4l2-core/v4l2-trace.c
index 183d5ecb49c5..59cf6f8807ac 100644
--- a/drivers/media/v4l2-core/v4l2-trace.c
+++ b/drivers/media/v4l2-core/v4l2-trace.c
@@ -12,6 +12,9 @@ EXPORT_TRACEPOINT_SYMBOL_GPL(vb2_v4l2_buf_queue);
EXPORT_TRACEPOINT_SYMBOL_GPL(vb2_v4l2_dqbuf);
EXPORT_TRACEPOINT_SYMBOL_GPL(vb2_v4l2_qbuf);
+EXPORT_TRACEPOINT_SYMBOL_GPL(v4l2_hw_run);
+EXPORT_TRACEPOINT_SYMBOL_GPL(v4l2_hw_done);
+
/* Export AV1 controls */
EXPORT_TRACEPOINT_SYMBOL_GPL(v4l2_ctrl_av1_sequence);
EXPORT_TRACEPOINT_SYMBOL_GPL(v4l2_ctrl_av1_frame);
diff --git a/include/trace/events/v4l2.h b/include/trace/events/v4l2.h
index e5b80aeecc30..6f1bbb085cb0 100644
--- a/include/trace/events/v4l2.h
+++ b/include/trace/events/v4l2.h
@@ -299,6 +299,46 @@ DEFINE_EVENT(v4l2_stream_class, v4l2_streamoff,
TP_ARGS(tgid, fd)
);
+
+/* Events for hardware run/done.
+ *
+ * These events will be fired respectively when the hardware is run (v4l2_hw_run) and done
+ * (v4l2_hw_done).
+ * As for other events, tgid and fd are used to identify the process that opened the video device.
+ *
+ * The v4l2_hw_done event also includes the number of hardware cycles taken by the hardware to
+ * process the command.
+ */
+DEFINE_EVENT(v4l2_stream_class, v4l2_hw_run,
+ TP_PROTO(u32 tgid, u32 fd),
+ TP_ARGS(tgid, fd)
+);
+
+DECLARE_EVENT_CLASS(v4l2_hw_done_class,
+ TP_PROTO(u32 tgid, u32 fd, u32 hw_cycles),
+ TP_ARGS(tgid, fd, hw_cycles),
+
+ TP_STRUCT__entry(
+ __field(u32, tgid)
+ __field(u32, fd)
+ __field(u32, hw_cycles)
+ ),
+
+ TP_fast_assign(
+ __entry->tgid = tgid;
+ __entry->fd = fd;
+ __entry->hw_cycles = hw_cycles;
+ ),
+
+ TP_printk("tgid = %u, fd = %u, hw_cycles = %u",
+ __entry->tgid, __entry->fd, __entry->hw_cycles)
+);
+
+DEFINE_EVENT(v4l2_hw_done_class, v4l2_hw_done,
+ TP_PROTO(u32 tgid, u32 fd, u32 hw_cycles),
+ TP_ARGS(tgid, fd, hw_cycles)
+);
+
#endif /* if !defined(_TRACE_V4L2_H) || defined(TRACE_HEADER_MULTI_READ) */
/* This part must be outside protection */
--
2.54.0
^ permalink raw reply related
* [PATCH v2 9/9] media: hantro: Add v4l2_hw run/done traces
From: Detlev Casanova @ 2026-06-10 14:33 UTC (permalink / raw)
To: Daniel Almeida, Mauro Carvalho Chehab, Steven Rostedt,
Masami Hiramatsu, Mathieu Desnoyers, Nicolas Dufresne,
Benjamin Gaignard, Philipp Zabel, Heiko Stuebner
Cc: linux-kernel, linux-media, linux-trace-kernel, linux-rockchip,
linux-arm-kernel, kernel, Detlev Casanova
In-Reply-To: <20260610-v4l2-add-ftrace-v2-0-9756edf72ac1@collabora.com>
Add the trace calls as well as retrieving the number of clock cycles for
the rockchip_vpu core.
Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
---
drivers/media/platform/verisilicon/hantro.h | 1 +
drivers/media/platform/verisilicon/hantro_drv.c | 10 ++++++++++
drivers/media/platform/verisilicon/rockchip_vpu981_regs.h | 1 +
drivers/media/platform/verisilicon/rockchip_vpu_hw.c | 4 ++++
4 files changed, 16 insertions(+)
diff --git a/drivers/media/platform/verisilicon/hantro.h b/drivers/media/platform/verisilicon/hantro.h
index 0353de154a1e..d5cddc783688 100644
--- a/drivers/media/platform/verisilicon/hantro.h
+++ b/drivers/media/platform/verisilicon/hantro.h
@@ -253,6 +253,7 @@ struct hantro_ctx {
u32 sequence_cap;
u32 sequence_out;
+ u32 hw_cycles;
const struct hantro_fmt *vpu_src_fmt;
struct v4l2_pix_format_mplane src_fmt;
diff --git a/drivers/media/platform/verisilicon/hantro_drv.c b/drivers/media/platform/verisilicon/hantro_drv.c
index 2e81877f640f..32855b14e0f1 100644
--- a/drivers/media/platform/verisilicon/hantro_drv.c
+++ b/drivers/media/platform/verisilicon/hantro_drv.c
@@ -25,6 +25,8 @@
#include <media/videobuf2-core.h>
#include <media/videobuf2-vmalloc.h>
+#include <trace/events/v4l2.h>
+
#include "hantro_v4l2.h"
#include "hantro.h"
#include "hantro_hw.h"
@@ -103,6 +105,9 @@ void hantro_irq_done(struct hantro_dev *vpu,
struct hantro_ctx *ctx =
v4l2_m2m_get_curr_priv(vpu->m2m_dev);
+ if (ctx)
+ trace_v4l2_hw_done(ctx->fh.tgid, ctx->fh.fd, ctx->hw_cycles);
+
/*
* If cancel_delayed_work returns false
* the timeout expired. The watchdog is running,
@@ -125,6 +130,9 @@ void hantro_watchdog(struct work_struct *work)
ctx = v4l2_m2m_get_curr_priv(vpu->m2m_dev);
if (ctx) {
vpu_err("frame processing timed out!\n");
+
+ trace_v4l2_hw_done(ctx->fh.tgid, ctx->fh.fd, ctx->hw_cycles);
+
if (ctx->codec_ops->reset)
ctx->codec_ops->reset(ctx);
hantro_job_finish(vpu, ctx, VB2_BUF_STATE_ERROR);
@@ -189,6 +197,8 @@ static void device_run(void *priv)
if (ctx->codec_ops->run(ctx))
goto err_cancel_job;
+ trace_v4l2_hw_run(ctx->fh.tgid, ctx->fh.fd);
+
return;
err_cancel_job:
diff --git a/drivers/media/platform/verisilicon/rockchip_vpu981_regs.h b/drivers/media/platform/verisilicon/rockchip_vpu981_regs.h
index e4008da64f19..96b85470208b 100644
--- a/drivers/media/platform/verisilicon/rockchip_vpu981_regs.h
+++ b/drivers/media/platform/verisilicon/rockchip_vpu981_regs.h
@@ -451,6 +451,7 @@
#define av1_pp0_dup_ver AV1_DEC_REG(394, 16, 0xff)
#define av1_pp0_dup_hor AV1_DEC_REG(394, 24, 0xff)
+#define AV1_CYCLE_COUNT (AV1_SWREG(63))
#define AV1_TILE_OUT_LU (AV1_SWREG(65))
#define AV1_REFERENCE_Y(i) (AV1_SWREG(67) + ((i) * 0x8))
#define AV1_SEGMENTATION (AV1_SWREG(81))
diff --git a/drivers/media/platform/verisilicon/rockchip_vpu_hw.c b/drivers/media/platform/verisilicon/rockchip_vpu_hw.c
index 02673be9878e..f959151b6645 100644
--- a/drivers/media/platform/verisilicon/rockchip_vpu_hw.c
+++ b/drivers/media/platform/verisilicon/rockchip_vpu_hw.c
@@ -424,6 +424,8 @@ static irqreturn_t rk3588_vpu981_irq(int irq, void *dev_id)
{
struct hantro_dev *vpu = dev_id;
enum vb2_buffer_state state;
+ struct hantro_ctx *ctx =
+ v4l2_m2m_get_curr_priv(vpu->m2m_dev);
u32 status;
status = vdpu_read(vpu, AV1_REG_INTERRUPT);
@@ -433,6 +435,8 @@ static irqreturn_t rk3588_vpu981_irq(int irq, void *dev_id)
vdpu_write(vpu, 0, AV1_REG_INTERRUPT);
vdpu_write(vpu, AV1_REG_CONFIG_DEC_CLK_GATE_E, AV1_REG_CONFIG);
+ ctx->hw_cycles = vdpu_read(vpu, AV1_CYCLE_COUNT);
+
hantro_irq_done(vpu, state);
return IRQ_HANDLED;
--
2.54.0
^ permalink raw reply related
* Re: [PATCH v2 11/16] power: sequencing: pcie-m2: Add usb and sdio targets for E-key connector
From: Andy Shevchenko @ 2026-06-10 14:36 UTC (permalink / raw)
To: Chen-Yu Tsai
Cc: Bartosz Golaszewski, Greg Kroah-Hartman, Daniel Scally,
Heikki Krogerus, Sakari Ailus, Rafael J. Wysocki,
Danilo Krummrich, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Matthias Brugger, AngeloGioacchino Del Regno, Alan Stern,
linux-acpi, driver-core, linux-pm, linux-usb, devicetree,
linux-mediatek, linux-arm-kernel, linux-kernel,
Manivannan Sadhasivam
In-Reply-To: <20260610084053.2059858-12-wenst@chromium.org>
On Wed, Jun 10, 2026 at 04:40:45PM +0800, Chen-Yu Tsai wrote:
> The M.2 E-key connector allows either PCIe or SDIO for WiFi and USB or
> UART for BT. Currently the driver only supports PCIe and UART.
>
> Add power sequencing targets for SDIO and USB. To avoid adding a
> complicated dependency tree, rename the existing power sequencing units
> "pcie" and "uart" to "wifi" and "bt". The existing target names are left
> untouched. The new "sdio" and "usb" targets just point to the renamed
> "wifi" and "bt" units.
Why can we do that? No breakage? Only internal names? No ABI affected?
Please, clarify all this in the commit message.
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
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