[PATCH 0/2] Enable Qualcomm Crypto Engine for QCS615

[PATCH 0/2] Enable Qualcomm Crypto Engine for QCS615

[Abhinaba Rakshit]

Document QCS615 support for QCrypto driver and add QCE
and Crypto BAM DMA nodes.

This patch series depends on the below patch series:
https://lore.kernel.org/all/20241104-add_initial_support_for_qcs615-v5-0-9dde8d7b80b0@quicinc.com/ - Reviewed

Signed-off-by: Abhinaba Rakshit <quic_arakshit@quicinc.com>
---
Abhinaba Rakshit (2):
      dt-bindings: crypto: qcom-qce: document QCS615 crypto engine
      arm64: dts: qcom: qcs615: add QCrypto nodes

 .../devicetree/bindings/crypto/qcom-qce.yaml       |  1 +
 arch/arm64/boot/dts/qcom/qcs615.dtsi               | 25 ++++++++++++++++++++++
 2 files changed, 26 insertions(+)
---
base-commit: 50a0c754714aa3ea0b0e62f3765eb666a1579f24
change-id: 20250224-enable-qce-for-qcs615-de3a8c3505d2

Best regards,
-- 
Abhinaba Rakshit <quic_arakshit@quicinc.com>

[PATCH 1/2] dt-bindings: crypto: qcom-qce: document QCS615 crypto engine

[Abhinaba Rakshit]

Document the crypto engine on the QCS615 platform.

Signed-off-by: Abhinaba Rakshit <quic_arakshit@quicinc.com>
---
 Documentation/devicetree/bindings/crypto/qcom-qce.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
index 3ed56d9d378e38a7ed3f5cd606c4dc20955194f0..acc1eef9d85825d0331db314dd103b8c7a8e2ab3 100644
--- a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
+++ b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
@@ -45,6 +45,7 @@ properties:
 
       - items:
           - enum:
+              - qcom,qcs615-qce
               - qcom,qcs8300-qce
               - qcom,sa8775p-qce
               - qcom,sc7280-qce

-- 
2.34.1

Re: [PATCH 1/2] dt-bindings: crypto: qcom-qce: document QCS615 crypto engine

[Rob Herring (Arm)]

On Mon, 24 Feb 2025 15:34:10 +0530, Abhinaba Rakshit wrote:
> Document the crypto engine on the QCS615 platform.
> 
> Signed-off-by: Abhinaba Rakshit <quic_arakshit@quicinc.com>
> ---
>  Documentation/devicetree/bindings/crypto/qcom-qce.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 

Acked-by: Rob Herring (Arm) <robh@kernel.org>

[PATCH 2/2] arm64: dts: qcom: qcs615: add QCrypto nodes

[Abhinaba Rakshit]

Add the QCE and Crypto BAM DMA nodes.

Signed-off-by: Abhinaba Rakshit <quic_arakshit@quicinc.com>
---
 arch/arm64/boot/dts/qcom/qcs615.dtsi | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi
index f4abfad474ea62dea13d05eb874530947e1e8d3e..25e98d20ec1d941f0b45cc3d94f298065c9a5566 100644
--- a/arch/arm64/boot/dts/qcom/qcs615.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi
@@ -1114,6 +1114,31 @@ ufs_mem_phy: phy@1d87000 {
 			status = "disabled";
 		};
 
+		cryptobam: dma-controller@1dc4000 {
+			compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
+			reg = <0x0 0x01dc4000 0x0 0x24000>;
+			interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+			#dma-cells = <1>;
+			qcom,ee = <0>;
+			qcom,controlled-remotely;
+			num-channels = <16>;
+			qcom,num-ees = <4>;
+			iommus = <&apps_smmu 0x0104 0x0011>,
+				 <&apps_smmu 0x0114 0x0011>;
+		};
+
+		crypto: crypto@1dfa000 {
+			compatible = "qcom,qcs615-qce", "qcom,sm8150-qce", "qcom,qce";
+			reg = <0x0 0x01dfa000 0x0 0x6000>;
+			dmas = <&cryptobam 4>, <&cryptobam 5>;
+			dma-names = "rx", "tx";
+			iommus = <&apps_smmu 0x0104 0x0011>,
+				 <&apps_smmu 0x0114 0x0011>;
+			interconnects = <&aggre1_noc MASTER_CRYPTO QCOM_ICC_TAG_ALWAYS
+					&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
+			interconnect-names = "memory";
+		};
+
 		tcsr_mutex: hwlock@1f40000 {
 			compatible = "qcom,tcsr-mutex";
 			reg = <0x0 0x01f40000 0x0 0x20000>;

-- 
2.34.1

Re: [PATCH 2/2] arm64: dts: qcom: qcs615: add QCrypto nodes

[Konrad Dybcio]

On 24.02.2025 11:04 AM, Abhinaba Rakshit wrote:
> Add the QCE and Crypto BAM DMA nodes.
> 
> Signed-off-by: Abhinaba Rakshit <quic_arakshit@quicinc.com>
> ---
>  arch/arm64/boot/dts/qcom/qcs615.dtsi | 25 +++++++++++++++++++++++++
>  1 file changed, 25 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi
> index f4abfad474ea62dea13d05eb874530947e1e8d3e..25e98d20ec1d941f0b45cc3d94f298065c9a5566 100644
> --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi
> +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi
> @@ -1114,6 +1114,31 @@ ufs_mem_phy: phy@1d87000 {
>  			status = "disabled";
>  		};
>  
> +		cryptobam: dma-controller@1dc4000 {
> +			compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
> +			reg = <0x0 0x01dc4000 0x0 0x24000>;
> +			interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
> +			#dma-cells = <1>;
> +			qcom,ee = <0>;
> +			qcom,controlled-remotely;
> +			num-channels = <16>;
> +			qcom,num-ees = <4>;
> +			iommus = <&apps_smmu 0x0104 0x0011>,
> +				 <&apps_smmu 0x0114 0x0011>;

(0x0114 & ~ 0x0011) == (0x0104 & ~0x0011), try dropping the second entry
here and below and see if things still work

> +		};
> +
> +		crypto: crypto@1dfa000 {
> +			compatible = "qcom,qcs615-qce", "qcom,sm8150-qce", "qcom,qce";
> +			reg = <0x0 0x01dfa000 0x0 0x6000>;
> +			dmas = <&cryptobam 4>, <&cryptobam 5>;
> +			dma-names = "rx", "tx";
> +			iommus = <&apps_smmu 0x0104 0x0011>,
> +				 <&apps_smmu 0x0114 0x0011>;
> +			interconnects = <&aggre1_noc MASTER_CRYPTO QCOM_ICC_TAG_ALWAYS
> +					&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;

Please align the '&'s

Konrad

Re: [PATCH 2/2] arm64: dts: qcom: qcs615: add QCrypto nodes

[Abhinaba Rakshit]

On Tue, Feb 25, 2025 at 02:52:36PM +0100, Konrad Dybcio wrote:
> On 24.02.2025 11:04 AM, Abhinaba Rakshit wrote:
> > Add the QCE and Crypto BAM DMA nodes.
> > 
> > Signed-off-by: Abhinaba Rakshit <quic_arakshit@quicinc.com>
> > ---
> >  arch/arm64/boot/dts/qcom/qcs615.dtsi | 25 +++++++++++++++++++++++++
> >  1 file changed, 25 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi
> > index f4abfad474ea62dea13d05eb874530947e1e8d3e..25e98d20ec1d941f0b45cc3d94f298065c9a5566 100644
> > --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi
> > @@ -1114,6 +1114,31 @@ ufs_mem_phy: phy@1d87000 {
> >  			status = "disabled";
> >  		};
> >  
> > +		cryptobam: dma-controller@1dc4000 {
> > +			compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
> > +			reg = <0x0 0x01dc4000 0x0 0x24000>;
> > +			interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
> > +			#dma-cells = <1>;
> > +			qcom,ee = <0>;
> > +			qcom,controlled-remotely;
> > +			num-channels = <16>;
> > +			qcom,num-ees = <4>;
> > +			iommus = <&apps_smmu 0x0104 0x0011>,
> > +				 <&apps_smmu 0x0114 0x0011>;
> 
> (0x0114 & ~ 0x0011) == (0x0104 & ~0x0011), try dropping the second entry
> here and below and see if things still work
> 

With dropping the second entry, as well qcrypto is still functional,
Will update in the patch v2

> > +		};
> > +
> > +		crypto: crypto@1dfa000 {
> > +			compatible = "qcom,qcs615-qce", "qcom,sm8150-qce", "qcom,qce";
> > +			reg = <0x0 0x01dfa000 0x0 0x6000>;
> > +			dmas = <&cryptobam 4>, <&cryptobam 5>;
> > +			dma-names = "rx", "tx";
> > +			iommus = <&apps_smmu 0x0104 0x0011>,
> > +				 <&apps_smmu 0x0114 0x0011>;
> > +			interconnects = <&aggre1_noc MASTER_CRYPTO QCOM_ICC_TAG_ALWAYS
> > +					&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
> 
> Please align the '&'s

Will update in patch v2

> 
> Konrad