Linux ARM-MSM sub-architecture
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From: Antonino Maniscalco <antomani103@gmail.com>
To: Rob Clark <robdclark@gmail.com>
Cc: Sean Paul <sean@poorly.run>,
	Konrad Dybcio <konrad.dybcio@linaro.org>,
	Abhinav Kumar <quic_abhinavk@quicinc.com>,
	Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
	Marijn Suijten <marijn.suijten@somainline.org>,
	David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
	Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	Maxime Ripard <mripard@kernel.org>,
	Thomas Zimmermann <tzimmermann@suse.de>,
	linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
	freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	Sharat Masetty <smasetty@codeaurora.org>,
	Neil Armstrong <neil.armstrong@linaro.org>
Subject: Re: [PATCH v2 4/9] drm/msm/A6xx: Implement preemption for A7XX targets
Date: Sat, 31 Aug 2024 16:26:59 +0200	[thread overview]
Message-ID: <8537f53c-3898-4fa0-8376-de789d5c3ba3@gmail.com> (raw)
In-Reply-To: <CAF6AEGuwtgzOZtDKPq+dna-mvv2M193Neow_7ZprxrLV+hf+FA@mail.gmail.com>

On 8/30/24 10:25 PM, Rob Clark wrote:
> On Fri, Aug 30, 2024 at 8:33 AM Antonino Maniscalco
> <antomani103@gmail.com> wrote:
>>
>> This patch implements preemption feature for A6xx targets, this allows
>> the GPU to switch to a higher priority ringbuffer if one is ready. A6XX
>> hardware as such supports multiple levels of preemption granularities,
>> ranging from coarse grained(ringbuffer level) to a more fine grained
>> such as draw-call level or a bin boundary level preemption. This patch
>> enables the basic preemption level, with more fine grained preemption
>> support to follow.
>>
>> Signed-off-by: Sharat Masetty <smasetty@codeaurora.org>
>> Signed-off-by: Antonino Maniscalco <antomani103@gmail.com>
>> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-QRD
>> ---
>>   drivers/gpu/drm/msm/Makefile              |   1 +
>>   drivers/gpu/drm/msm/adreno/a6xx_gpu.c     | 323 +++++++++++++++++++++-
>>   drivers/gpu/drm/msm/adreno/a6xx_gpu.h     | 168 ++++++++++++
>>   drivers/gpu/drm/msm/adreno/a6xx_preempt.c | 431 ++++++++++++++++++++++++++++++
>>   drivers/gpu/drm/msm/msm_ringbuffer.h      |   7 +
>>   5 files changed, 921 insertions(+), 9 deletions(-)
>>
> 
> [snip]
> 
>> @@ -784,6 +1062,16 @@ static int a6xx_ucode_load(struct msm_gpu *gpu)
>>                  msm_gem_object_set_name(a6xx_gpu->shadow_bo, "shadow");
>>          }
>>
>> +       a6xx_gpu->pwrup_reglist_ptr = msm_gem_kernel_new(gpu->dev, PAGE_SIZE,
>> +                                                        MSM_BO_WC  | MSM_BO_MAP_PRIV,
>> +                                                        gpu->aspace, &a6xx_gpu->pwrup_reglist_bo,
>> +                                                        &a6xx_gpu->pwrup_reglist_iova);
> 
> I guess this could also be MSM_BO_GPU_READONLY?
> 
> BR,
> -R

Besides containing the the actual reglist this buffer also contains the 
`cpu_gpu_lock` structure which is written by the SQE so adding the 
`MSM_BO_GPU_READONLY` flag would cause it to fault.

Best regards,
-- 
Antonino Maniscalco <antomani103@gmail.com>


  reply	other threads:[~2024-08-31 14:27 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-30 15:32 [PATCH v2 0/9] Preemption support for A7XX Antonino Maniscalco
2024-08-30 15:32 ` [PATCH v2 1/9] drm/msm: Fix bv_fence being used as bv_rptr Antonino Maniscalco
2024-08-30 15:32 ` [PATCH v2 2/9] drm/msm: Add submitqueue setup and close Antonino Maniscalco
2024-08-30 15:32 ` [PATCH v2 3/9] drm/msm: Add a `preempt_record_size` field Antonino Maniscalco
2024-08-30 15:32 ` [PATCH v2 4/9] drm/msm/A6xx: Implement preemption for A7XX targets Antonino Maniscalco
2024-08-30 18:01   ` Rob Clark
2024-08-30 18:54     ` Connor Abbott
2024-08-30 19:00       ` Rob Clark
2024-08-30 19:09         ` Connor Abbott
2024-08-30 20:19           ` Rob Clark
2024-08-30 20:25   ` Rob Clark
2024-08-31 14:26     ` Antonino Maniscalco [this message]
2024-08-30 20:36   ` Rob Clark
2024-08-30 15:32 ` [PATCH v2 5/9] drm/msm/A6xx: Sync relevant adreno_pm4.xml changes Antonino Maniscalco
2024-08-30 15:32 ` [PATCH v2 6/9] drm/msm/A6xx: Use posamble to reset counters on preemption Antonino Maniscalco
2024-08-30 18:32   ` Rob Clark
2024-09-04 13:38     ` Antonino Maniscalco
2024-09-04 14:30       ` Rob Clark
2024-08-30 15:32 ` [PATCH v2 7/9] drm/msm/A6xx: Add traces for preemption Antonino Maniscalco
2024-08-30 15:32 ` [PATCH v2 8/9] drm/msm/A6XX: Add a flag to allow preemption to submitqueue_create Antonino Maniscalco
2024-08-30 15:32 ` [PATCH v2 9/9] drm/msm/A6xx: Enable preemption for A750 Antonino Maniscalco
2024-08-30 18:23   ` Rob Clark

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