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* [PATCH v2 0/2] dt-bindings: mailbox: qcom-ipcc: Add IPCC on Kaanapali and Glymur Platforms
@ 2025-10-29  8:15 Jingyi Wang
  2025-10-29  8:15 ` [PATCH v2 1/2] dt-bindings: mailbox: qcom: Add IPCC support for Kaanapali Platform Jingyi Wang
  2025-10-29  8:15 ` [PATCH v2 2/2] dt-bindings: mailbox: qcom: Add IPCC support for Glymur Platform Jingyi Wang
  0 siblings, 2 replies; 13+ messages in thread
From: Jingyi Wang @ 2025-10-29  8:15 UTC (permalink / raw)
  To: Manivannan Sadhasivam, Jassi Brar, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley
  Cc: aiqun.yu, tingwei.zhang, trilok.soni, yijie.yang, linux-arm-msm,
	linux-kernel, devicetree, Jingyi Wang, Sibi Sankar

Add dt-bindings and header files for the Inter-Processor Communication
Controller on Kaanapali and Glymur platforms. As virtual physical mapping
logic is removed in new IPCC HW design. Physical client ID instead of
Virtual client ID is used.

Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
---
Changes in v2:
- Add separate header files for different platforms
- Merge binding and header file in one patch
- squash glymur ipcc change from: https://lore.kernel.org/linux-arm-msm/20250924183726.509202-1-sibi.sankar@oss.qualcomm.com/T/#m186ef6ceb50936185d07b81e2d36228a5a361d34
- Link to v1: https://lore.kernel.org/r/20250924-knp-ipcc-v1-1-5d9e9cb59ad4@oss.qualcomm.com

---
Jingyi Wang (1):
      dt-bindings: mailbox: qcom: Add IPCC support for Kaanapali Platform

Sibi Sankar (1):
      dt-bindings: mailbox: qcom: Add IPCC support for Glymur Platform

 .../devicetree/bindings/mailbox/qcom-ipcc.yaml     |  2 +
 include/dt-bindings/mailbox/qcom,glymur-ipcc.h     | 68 ++++++++++++++++++++++
 include/dt-bindings/mailbox/qcom,kaanapali-ipcc.h  | 58 ++++++++++++++++++
 3 files changed, 128 insertions(+)
---
base-commit: aaa9c3550b60d6259d6ea8b1175ade8d1242444e
change-id: 20251028-knp-ipcc-6b4189f71121

Best regards,
-- 
Jingyi Wang <jingyi.wang@oss.qualcomm.com>


^ permalink raw reply	[flat|nested] 13+ messages in thread

* [PATCH v2 1/2] dt-bindings: mailbox: qcom: Add IPCC support for Kaanapali Platform
  2025-10-29  8:15 [PATCH v2 0/2] dt-bindings: mailbox: qcom-ipcc: Add IPCC on Kaanapali and Glymur Platforms Jingyi Wang
@ 2025-10-29  8:15 ` Jingyi Wang
  2025-10-29 15:16   ` Bjorn Andersson
  2025-10-29  8:15 ` [PATCH v2 2/2] dt-bindings: mailbox: qcom: Add IPCC support for Glymur Platform Jingyi Wang
  1 sibling, 1 reply; 13+ messages in thread
From: Jingyi Wang @ 2025-10-29  8:15 UTC (permalink / raw)
  To: Manivannan Sadhasivam, Jassi Brar, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley
  Cc: aiqun.yu, tingwei.zhang, trilok.soni, yijie.yang, linux-arm-msm,
	linux-kernel, devicetree, Jingyi Wang

Add the physical client ids and binding for Kaanapali platform. Physical
client IDs instead of virtual client IDs are used for qcom new platforms
in the Inter Process Communication Controller (IPCC) driver as virtual to
physical mapping logic is removed in HW.

Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
---
 .../devicetree/bindings/mailbox/qcom-ipcc.yaml     |  1 +
 include/dt-bindings/mailbox/qcom,kaanapali-ipcc.h  | 58 ++++++++++++++++++++++
 2 files changed, 59 insertions(+)

diff --git a/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml b/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml
index e5c423130db6..ee3fe093e3ca 100644
--- a/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml
+++ b/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml
@@ -24,6 +24,7 @@ properties:
   compatible:
     items:
       - enum:
+          - qcom,kaanapali-ipcc
           - qcom,milos-ipcc
           - qcom,qcs8300-ipcc
           - qcom,qdu1000-ipcc
diff --git a/include/dt-bindings/mailbox/qcom,kaanapali-ipcc.h b/include/dt-bindings/mailbox/qcom,kaanapali-ipcc.h
new file mode 100644
index 000000000000..b6208ad155ad
--- /dev/null
+++ b/include/dt-bindings/mailbox/qcom,kaanapali-ipcc.h
@@ -0,0 +1,58 @@
+/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#ifndef __DT_BINDINGS_MAILBOX_IPCC_KAANAPALI_H
+#define __DT_BINDINGS_MAILBOX_IPCC_KAANAPALI_H
+
+/* Physical client IDs */
+#define IPCC_MPROC_AOP			0
+#define IPCC_MPROC_TZ			1
+#define IPCC_MPROC_MPSS			2
+#define IPCC_MPROC_LPASS		3
+#define IPCC_MPROC_SDC			4
+#define IPCC_MPROC_CDSP			5
+#define IPCC_MPROC_APSS			6
+#define IPCC_MPROC_SOCCP		13
+#define IPCC_MPROC_DCP			14
+#define IPCC_MPROC_SPSS			15
+#define IPCC_MPROC_TME			16
+#define IPCC_MPROC_WPSS			17
+
+#define IPCC_COMPUTE_L0_CDSP		2
+#define IPCC_COMPUTE_L0_APSS		3
+#define IPCC_COMPUTE_L0_GPU		4
+#define IPCC_COMPUTE_L0_CVP		8
+#define IPCC_COMPUTE_L0_CAM		9
+#define IPCC_COMPUTE_L0_CAM1		10
+#define IPCC_COMPUTE_L0_DCP		11
+#define IPCC_COMPUTE_L0_VPU		12
+#define IPCC_COMPUTE_L0_SOCCP		16
+
+#define IPCC_COMPUTE_L1_CDSP		2
+#define IPCC_COMPUTE_L1_APSS		3
+#define IPCC_COMPUTE_L1_GPU		4
+#define IPCC_COMPUTE_L1_CVP		8
+#define IPCC_COMPUTE_L1_CAM		9
+#define IPCC_COMPUTE_L1_CAM1		10
+#define IPCC_COMPUTE_L1_DCP		11
+#define IPCC_COMPUTE_L1_VPU		12
+#define IPCC_COMPUTE_L1_SOCCP		16
+
+#define IPCC_PERIPH_CDSP		2
+#define IPCC_PERIPH_APSS		3
+#define IPCC_PERIPH_PCIE0		4
+#define IPCC_PERIPH_PCIE1		5
+
+#define IPCC_FENCE_CDSP			2
+#define IPCC_FENCE_APSS			3
+#define IPCC_FENCE_GPU			4
+#define IPCC_FENCE_CVP			8
+#define IPCC_FENCE_CAM			8
+#define IPCC_FENCE_CAM1			10
+#define IPCC_FENCE_DCP			11
+#define IPCC_FENCE_VPU			20
+#define IPCC_FENCE_SOCCP		24
+
+#endif

-- 
2.25.1


^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [PATCH v2 2/2] dt-bindings: mailbox: qcom: Add IPCC support for Glymur Platform
  2025-10-29  8:15 [PATCH v2 0/2] dt-bindings: mailbox: qcom-ipcc: Add IPCC on Kaanapali and Glymur Platforms Jingyi Wang
  2025-10-29  8:15 ` [PATCH v2 1/2] dt-bindings: mailbox: qcom: Add IPCC support for Kaanapali Platform Jingyi Wang
@ 2025-10-29  8:15 ` Jingyi Wang
  2025-10-29 15:18   ` Bjorn Andersson
  2025-10-29 15:49   ` Krzysztof Kozlowski
  1 sibling, 2 replies; 13+ messages in thread
From: Jingyi Wang @ 2025-10-29  8:15 UTC (permalink / raw)
  To: Manivannan Sadhasivam, Jassi Brar, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley
  Cc: aiqun.yu, tingwei.zhang, trilok.soni, yijie.yang, linux-arm-msm,
	linux-kernel, devicetree, Jingyi Wang, Sibi Sankar

From: Sibi Sankar <sibi.sankar@oss.qualcomm.com>

Add binding and physical client ids for the Glymur platform. Physical
client IDs instead of virtual client IDs are used for qcom new platforms
in the Inter Process Communication Controller (IPCC) driver as virtual to
physical mapping logic is removed in HW.

Signed-off-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com>
Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
---
 .../devicetree/bindings/mailbox/qcom-ipcc.yaml     |  1 +
 include/dt-bindings/mailbox/qcom,glymur-ipcc.h     | 68 ++++++++++++++++++++++
 2 files changed, 69 insertions(+)

diff --git a/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml b/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml
index ee3fe093e3ca..7c4d6170491d 100644
--- a/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml
+++ b/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml
@@ -24,6 +24,7 @@ properties:
   compatible:
     items:
       - enum:
+          - qcom,glymur-ipcc
           - qcom,kaanapali-ipcc
           - qcom,milos-ipcc
           - qcom,qcs8300-ipcc
diff --git a/include/dt-bindings/mailbox/qcom,glymur-ipcc.h b/include/dt-bindings/mailbox/qcom,glymur-ipcc.h
new file mode 100644
index 000000000000..3ab8189974a5
--- /dev/null
+++ b/include/dt-bindings/mailbox/qcom,glymur-ipcc.h
@@ -0,0 +1,68 @@
+/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#ifndef __DT_BINDINGS_MAILBOX_IPCC_GLYMUR_H
+#define __DT_BINDINGS_MAILBOX_IPCC_GLYMUR_H
+
+/* Glymur physical client IDs */
+#define IPCC_MPROC_AOP			0
+#define IPCC_MPROC_TZ			1
+#define IPCC_MPROC_MPSS			2
+#define IPCC_MPROC_LPASS		3
+#define IPCC_MPROC_SLPI			4
+#define IPCC_MPROC_SDC			5
+#define IPCC_MPROC_CDSP			6
+#define IPCC_MPROC_NPU			7
+#define IPCC_MPROC_APSS			8
+#define IPCC_MPROC_GPU			9
+#define IPCC_MPROC_ICP			11
+#define IPCC_MPROC_VPU			12
+#define IPCC_MPROC_PCIE0		13
+#define IPCC_MPROC_PCIE1		14
+#define IPCC_MPROC_PCIE2		15
+#define IPCC_MPROC_SPSS			16
+#define IPCC_MPROC_PCIE3		19
+#define IPCC_MPROC_PCIE4		20
+#define IPCC_MPROC_PCIE5		21
+#define IPCC_MPROC_PCIE6		22
+#define IPCC_MPROC_TME			23
+#define IPCC_MPROC_WPSS			24
+#define IPCC_MPROC_PCIE7		44
+#define IPCC_MPROC_SOCCP		46
+
+#define IPCC_COMPUTE_L0_LPASS		0
+#define IPCC_COMPUTE_L0_CDSP		1
+#define IPCC_COMPUTE_L0_APSS		2
+#define IPCC_COMPUTE_L0_GPU		3
+#define IPCC_COMPUTE_L0_CVP		6
+#define IPCC_COMPUTE_L0_ICP		7
+#define IPCC_COMPUTE_L0_VPU		8
+#define IPCC_COMPUTE_L0_DPU		9
+#define IPCC_COMPUTE_L0_SOCCP		11
+
+#define IPCC_COMPUTE_L1_LPASS		0
+#define IPCC_COMPUTE_L1_CDSP		1
+#define IPCC_COMPUTE_L1_APSS		2
+#define IPCC_COMPUTE_L1_GPU		3
+#define IPCC_COMPUTE_L1_CVP		6
+#define IPCC_COMPUTE_L1_ICP		7
+#define IPCC_COMPUTE_L1_VPU		8
+#define IPCC_COMPUTE_L1_DPU		9
+#define IPCC_COMPUTE_L1_SOCCP		11
+
+#define IPCC_PERIPH_LPASS		0
+#define IPCC_PERIPH_APSS		1
+#define IPCC_PERIPH_PCIE0		2
+#define IPCC_PERIPH_PCIE1		3
+#define IPCC_PERIPH_PCIE2		6
+#define IPCC_PERIPH_PCIE3		7
+#define IPCC_PERIPH_PCIE4		8
+#define IPCC_PERIPH_PCIE5		9
+#define IPCC_PERIPH_PCIE6		10
+#define IPCC_PERIPH_PCIE7		11
+#define IPCC_PERIPH_SOCCP		13
+#define IPCC_PERIPH_WPSS		16
+
+#endif

-- 
2.25.1


^ permalink raw reply related	[flat|nested] 13+ messages in thread

* Re: [PATCH v2 1/2] dt-bindings: mailbox: qcom: Add IPCC support for Kaanapali Platform
  2025-10-29  8:15 ` [PATCH v2 1/2] dt-bindings: mailbox: qcom: Add IPCC support for Kaanapali Platform Jingyi Wang
@ 2025-10-29 15:16   ` Bjorn Andersson
  2025-10-29 15:47     ` Krzysztof Kozlowski
  0 siblings, 1 reply; 13+ messages in thread
From: Bjorn Andersson @ 2025-10-29 15:16 UTC (permalink / raw)
  To: Jingyi Wang
  Cc: Manivannan Sadhasivam, Jassi Brar, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley, aiqun.yu, tingwei.zhang,
	trilok.soni, yijie.yang, linux-arm-msm, linux-kernel, devicetree

On Wed, Oct 29, 2025 at 01:15:09AM -0700, Jingyi Wang wrote:
> Add the physical client ids and binding for Kaanapali platform. Physical
> client IDs instead of virtual client IDs are used for qcom new platforms
> in the Inter Process Communication Controller (IPCC) driver as virtual to
> physical mapping logic is removed in HW.

Happy to see the description of what changed wrt physical vs virtual
client IDs, but you're leaving the task of figuring out how this
explanation is applicable to the imagination of the reader.

Nobody knows that the values in dt-bindings/mailbox/qcom-ipcc.h are
"virtual client IDs", so it's not clear that you're trying to provide an
explanation to why a new, platform-specific, header file is needed here.


Change looks good, but please update the commit message.

Regards,
Bjorn

> 
> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
> ---
>  .../devicetree/bindings/mailbox/qcom-ipcc.yaml     |  1 +
>  include/dt-bindings/mailbox/qcom,kaanapali-ipcc.h  | 58 ++++++++++++++++++++++
>  2 files changed, 59 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml b/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml
> index e5c423130db6..ee3fe093e3ca 100644
> --- a/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml
> +++ b/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml
> @@ -24,6 +24,7 @@ properties:
>    compatible:
>      items:
>        - enum:
> +          - qcom,kaanapali-ipcc
>            - qcom,milos-ipcc
>            - qcom,qcs8300-ipcc
>            - qcom,qdu1000-ipcc
> diff --git a/include/dt-bindings/mailbox/qcom,kaanapali-ipcc.h b/include/dt-bindings/mailbox/qcom,kaanapali-ipcc.h
> new file mode 100644
> index 000000000000..b6208ad155ad
> --- /dev/null
> +++ b/include/dt-bindings/mailbox/qcom,kaanapali-ipcc.h
> @@ -0,0 +1,58 @@
> +/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
> +/*
> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
> + */
> +
> +#ifndef __DT_BINDINGS_MAILBOX_IPCC_KAANAPALI_H
> +#define __DT_BINDINGS_MAILBOX_IPCC_KAANAPALI_H
> +
> +/* Physical client IDs */
> +#define IPCC_MPROC_AOP			0
> +#define IPCC_MPROC_TZ			1
> +#define IPCC_MPROC_MPSS			2
> +#define IPCC_MPROC_LPASS		3
> +#define IPCC_MPROC_SDC			4
> +#define IPCC_MPROC_CDSP			5
> +#define IPCC_MPROC_APSS			6
> +#define IPCC_MPROC_SOCCP		13
> +#define IPCC_MPROC_DCP			14
> +#define IPCC_MPROC_SPSS			15
> +#define IPCC_MPROC_TME			16
> +#define IPCC_MPROC_WPSS			17
> +
> +#define IPCC_COMPUTE_L0_CDSP		2
> +#define IPCC_COMPUTE_L0_APSS		3
> +#define IPCC_COMPUTE_L0_GPU		4
> +#define IPCC_COMPUTE_L0_CVP		8
> +#define IPCC_COMPUTE_L0_CAM		9
> +#define IPCC_COMPUTE_L0_CAM1		10
> +#define IPCC_COMPUTE_L0_DCP		11
> +#define IPCC_COMPUTE_L0_VPU		12
> +#define IPCC_COMPUTE_L0_SOCCP		16
> +
> +#define IPCC_COMPUTE_L1_CDSP		2
> +#define IPCC_COMPUTE_L1_APSS		3
> +#define IPCC_COMPUTE_L1_GPU		4
> +#define IPCC_COMPUTE_L1_CVP		8
> +#define IPCC_COMPUTE_L1_CAM		9
> +#define IPCC_COMPUTE_L1_CAM1		10
> +#define IPCC_COMPUTE_L1_DCP		11
> +#define IPCC_COMPUTE_L1_VPU		12
> +#define IPCC_COMPUTE_L1_SOCCP		16
> +
> +#define IPCC_PERIPH_CDSP		2
> +#define IPCC_PERIPH_APSS		3
> +#define IPCC_PERIPH_PCIE0		4
> +#define IPCC_PERIPH_PCIE1		5
> +
> +#define IPCC_FENCE_CDSP			2
> +#define IPCC_FENCE_APSS			3
> +#define IPCC_FENCE_GPU			4
> +#define IPCC_FENCE_CVP			8
> +#define IPCC_FENCE_CAM			8
> +#define IPCC_FENCE_CAM1			10
> +#define IPCC_FENCE_DCP			11
> +#define IPCC_FENCE_VPU			20
> +#define IPCC_FENCE_SOCCP		24
> +
> +#endif
> 
> -- 
> 2.25.1
> 
> 

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [PATCH v2 2/2] dt-bindings: mailbox: qcom: Add IPCC support for Glymur Platform
  2025-10-29  8:15 ` [PATCH v2 2/2] dt-bindings: mailbox: qcom: Add IPCC support for Glymur Platform Jingyi Wang
@ 2025-10-29 15:18   ` Bjorn Andersson
  2025-10-29 15:49   ` Krzysztof Kozlowski
  1 sibling, 0 replies; 13+ messages in thread
From: Bjorn Andersson @ 2025-10-29 15:18 UTC (permalink / raw)
  To: Jingyi Wang
  Cc: Manivannan Sadhasivam, Jassi Brar, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley, aiqun.yu, tingwei.zhang,
	trilok.soni, yijie.yang, linux-arm-msm, linux-kernel, devicetree,
	Sibi Sankar

On Wed, Oct 29, 2025 at 01:15:10AM -0700, Jingyi Wang wrote:
> From: Sibi Sankar <sibi.sankar@oss.qualcomm.com>
> 
> Add binding and physical client ids for the Glymur platform. Physical
> client IDs instead of virtual client IDs are used for qcom new platforms
> in the Inter Process Communication Controller (IPCC) driver as virtual to
> physical mapping logic is removed in HW.

This is just copy-paste from patch 1, with the same shortcomings.

Please improve the commit message in patch 1 to introduce the
understanding of why we need soc-specific header files from now on, and
then omit that part of the explanation from this one.

Regards,
Bjorn

> 
> Signed-off-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com>
> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
> ---
>  .../devicetree/bindings/mailbox/qcom-ipcc.yaml     |  1 +
>  include/dt-bindings/mailbox/qcom,glymur-ipcc.h     | 68 ++++++++++++++++++++++
>  2 files changed, 69 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml b/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml
> index ee3fe093e3ca..7c4d6170491d 100644
> --- a/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml
> +++ b/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml
> @@ -24,6 +24,7 @@ properties:
>    compatible:
>      items:
>        - enum:
> +          - qcom,glymur-ipcc
>            - qcom,kaanapali-ipcc
>            - qcom,milos-ipcc
>            - qcom,qcs8300-ipcc
> diff --git a/include/dt-bindings/mailbox/qcom,glymur-ipcc.h b/include/dt-bindings/mailbox/qcom,glymur-ipcc.h
> new file mode 100644
> index 000000000000..3ab8189974a5
> --- /dev/null
> +++ b/include/dt-bindings/mailbox/qcom,glymur-ipcc.h
> @@ -0,0 +1,68 @@
> +/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
> +/*
> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
> + */
> +
> +#ifndef __DT_BINDINGS_MAILBOX_IPCC_GLYMUR_H
> +#define __DT_BINDINGS_MAILBOX_IPCC_GLYMUR_H
> +
> +/* Glymur physical client IDs */
> +#define IPCC_MPROC_AOP			0
> +#define IPCC_MPROC_TZ			1
> +#define IPCC_MPROC_MPSS			2
> +#define IPCC_MPROC_LPASS		3
> +#define IPCC_MPROC_SLPI			4
> +#define IPCC_MPROC_SDC			5
> +#define IPCC_MPROC_CDSP			6
> +#define IPCC_MPROC_NPU			7
> +#define IPCC_MPROC_APSS			8
> +#define IPCC_MPROC_GPU			9
> +#define IPCC_MPROC_ICP			11
> +#define IPCC_MPROC_VPU			12
> +#define IPCC_MPROC_PCIE0		13
> +#define IPCC_MPROC_PCIE1		14
> +#define IPCC_MPROC_PCIE2		15
> +#define IPCC_MPROC_SPSS			16
> +#define IPCC_MPROC_PCIE3		19
> +#define IPCC_MPROC_PCIE4		20
> +#define IPCC_MPROC_PCIE5		21
> +#define IPCC_MPROC_PCIE6		22
> +#define IPCC_MPROC_TME			23
> +#define IPCC_MPROC_WPSS			24
> +#define IPCC_MPROC_PCIE7		44
> +#define IPCC_MPROC_SOCCP		46
> +
> +#define IPCC_COMPUTE_L0_LPASS		0
> +#define IPCC_COMPUTE_L0_CDSP		1
> +#define IPCC_COMPUTE_L0_APSS		2
> +#define IPCC_COMPUTE_L0_GPU		3
> +#define IPCC_COMPUTE_L0_CVP		6
> +#define IPCC_COMPUTE_L0_ICP		7
> +#define IPCC_COMPUTE_L0_VPU		8
> +#define IPCC_COMPUTE_L0_DPU		9
> +#define IPCC_COMPUTE_L0_SOCCP		11
> +
> +#define IPCC_COMPUTE_L1_LPASS		0
> +#define IPCC_COMPUTE_L1_CDSP		1
> +#define IPCC_COMPUTE_L1_APSS		2
> +#define IPCC_COMPUTE_L1_GPU		3
> +#define IPCC_COMPUTE_L1_CVP		6
> +#define IPCC_COMPUTE_L1_ICP		7
> +#define IPCC_COMPUTE_L1_VPU		8
> +#define IPCC_COMPUTE_L1_DPU		9
> +#define IPCC_COMPUTE_L1_SOCCP		11
> +
> +#define IPCC_PERIPH_LPASS		0
> +#define IPCC_PERIPH_APSS		1
> +#define IPCC_PERIPH_PCIE0		2
> +#define IPCC_PERIPH_PCIE1		3
> +#define IPCC_PERIPH_PCIE2		6
> +#define IPCC_PERIPH_PCIE3		7
> +#define IPCC_PERIPH_PCIE4		8
> +#define IPCC_PERIPH_PCIE5		9
> +#define IPCC_PERIPH_PCIE6		10
> +#define IPCC_PERIPH_PCIE7		11
> +#define IPCC_PERIPH_SOCCP		13
> +#define IPCC_PERIPH_WPSS		16
> +
> +#endif
> 
> -- 
> 2.25.1
> 
> 

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [PATCH v2 1/2] dt-bindings: mailbox: qcom: Add IPCC support for Kaanapali Platform
  2025-10-29 15:16   ` Bjorn Andersson
@ 2025-10-29 15:47     ` Krzysztof Kozlowski
  2025-10-29 16:15       ` Bjorn Andersson
  0 siblings, 1 reply; 13+ messages in thread
From: Krzysztof Kozlowski @ 2025-10-29 15:47 UTC (permalink / raw)
  To: Bjorn Andersson, Jingyi Wang
  Cc: Manivannan Sadhasivam, Jassi Brar, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley, aiqun.yu, tingwei.zhang,
	trilok.soni, yijie.yang, linux-arm-msm, linux-kernel, devicetree

On 29/10/2025 16:16, Bjorn Andersson wrote:
> On Wed, Oct 29, 2025 at 01:15:09AM -0700, Jingyi Wang wrote:
>> Add the physical client ids and binding for Kaanapali platform. Physical
>> client IDs instead of virtual client IDs are used for qcom new platforms
>> in the Inter Process Communication Controller (IPCC) driver as virtual to
>> physical mapping logic is removed in HW.
> 
> Happy to see the description of what changed wrt physical vs virtual
> client IDs, but you're leaving the task of figuring out how this
> explanation is applicable to the imagination of the reader.
> 
> Nobody knows that the values in dt-bindings/mailbox/qcom-ipcc.h are
> "virtual client IDs", so it's not clear that you're trying to provide an
> explanation to why a new, platform-specific, header file is needed here.
> 
> 


Physical or virtual, standard expectation is that they are used by the
driver. This does not happen here, so what do they exactly represent?
Which part of SW ABI?

Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [PATCH v2 2/2] dt-bindings: mailbox: qcom: Add IPCC support for Glymur Platform
  2025-10-29  8:15 ` [PATCH v2 2/2] dt-bindings: mailbox: qcom: Add IPCC support for Glymur Platform Jingyi Wang
  2025-10-29 15:18   ` Bjorn Andersson
@ 2025-10-29 15:49   ` Krzysztof Kozlowski
  2025-10-29 17:23     ` Bjorn Andersson
  1 sibling, 1 reply; 13+ messages in thread
From: Krzysztof Kozlowski @ 2025-10-29 15:49 UTC (permalink / raw)
  To: Jingyi Wang, Manivannan Sadhasivam, Jassi Brar, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley
  Cc: aiqun.yu, tingwei.zhang, trilok.soni, yijie.yang, linux-arm-msm,
	linux-kernel, devicetree, Sibi Sankar

On 29/10/2025 09:15, Jingyi Wang wrote:
> diff --git a/include/dt-bindings/mailbox/qcom,glymur-ipcc.h b/include/dt-bindings/mailbox/qcom,glymur-ipcc.h
> new file mode 100644
> index 000000000000..3ab8189974a5
> --- /dev/null
> +++ b/include/dt-bindings/mailbox/qcom,glymur-ipcc.h
> @@ -0,0 +1,68 @@
> +/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
> +/*
> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
> + */
> +
> +#ifndef __DT_BINDINGS_MAILBOX_IPCC_GLYMUR_H
> +#define __DT_BINDINGS_MAILBOX_IPCC_GLYMUR_H
> +
> +/* Glymur physical client IDs */
> +#define IPCC_MPROC_AOP			0


Here the same - not used by Linux. Don't add these, they are really not
necessary and they are not helping anyhow. For longer explanation see 2
year thread for PMIC ADC v7.

Or provide explanation in terms what Linux interface you are binding
here (please focus on Linux or other SW).

Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [PATCH v2 1/2] dt-bindings: mailbox: qcom: Add IPCC support for Kaanapali Platform
  2025-10-29 15:47     ` Krzysztof Kozlowski
@ 2025-10-29 16:15       ` Bjorn Andersson
  2025-10-30  5:55         ` Krzysztof Kozlowski
  0 siblings, 1 reply; 13+ messages in thread
From: Bjorn Andersson @ 2025-10-29 16:15 UTC (permalink / raw)
  To: Krzysztof Kozlowski
  Cc: Jingyi Wang, Manivannan Sadhasivam, Jassi Brar, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley, aiqun.yu, tingwei.zhang,
	trilok.soni, yijie.yang, linux-arm-msm, linux-kernel, devicetree

On Wed, Oct 29, 2025 at 04:47:17PM +0100, Krzysztof Kozlowski wrote:
> On 29/10/2025 16:16, Bjorn Andersson wrote:
> > On Wed, Oct 29, 2025 at 01:15:09AM -0700, Jingyi Wang wrote:
> >> Add the physical client ids and binding for Kaanapali platform. Physical
> >> client IDs instead of virtual client IDs are used for qcom new platforms
> >> in the Inter Process Communication Controller (IPCC) driver as virtual to
> >> physical mapping logic is removed in HW.
> > 
> > Happy to see the description of what changed wrt physical vs virtual
> > client IDs, but you're leaving the task of figuring out how this
> > explanation is applicable to the imagination of the reader.
> > 
> > Nobody knows that the values in dt-bindings/mailbox/qcom-ipcc.h are
> > "virtual client IDs", so it's not clear that you're trying to provide an
> > explanation to why a new, platform-specific, header file is needed here.
> > 
> > 
> 
> 
> Physical or virtual, standard expectation is that they are used by the
> driver. This does not happen here, so what do they exactly represent?
> Which part of SW ABI?
> 

I was under the impression that they would be used only in DeviceTree
source, and the driver simply uses the values it reads at runtime.

But perhaps my memory is failing me, it's been a while since we
discussed this internally. Either way, the commit message should
document this, so I don't have to remember...

Regards,
Bjorn

> Best regards,
> Krzysztof

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [PATCH v2 2/2] dt-bindings: mailbox: qcom: Add IPCC support for Glymur Platform
  2025-10-29 15:49   ` Krzysztof Kozlowski
@ 2025-10-29 17:23     ` Bjorn Andersson
  2025-10-30  5:53       ` Krzysztof Kozlowski
  0 siblings, 1 reply; 13+ messages in thread
From: Bjorn Andersson @ 2025-10-29 17:23 UTC (permalink / raw)
  To: Krzysztof Kozlowski
  Cc: Jingyi Wang, Manivannan Sadhasivam, Jassi Brar, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley, aiqun.yu, tingwei.zhang,
	trilok.soni, yijie.yang, linux-arm-msm, linux-kernel, devicetree,
	Sibi Sankar

On Wed, Oct 29, 2025 at 04:49:30PM +0100, Krzysztof Kozlowski wrote:
> On 29/10/2025 09:15, Jingyi Wang wrote:
> > diff --git a/include/dt-bindings/mailbox/qcom,glymur-ipcc.h b/include/dt-bindings/mailbox/qcom,glymur-ipcc.h
> > new file mode 100644
> > index 000000000000..3ab8189974a5
> > --- /dev/null
> > +++ b/include/dt-bindings/mailbox/qcom,glymur-ipcc.h
> > @@ -0,0 +1,68 @@
> > +/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
> > +/*
> > + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
> > + */
> > +
> > +#ifndef __DT_BINDINGS_MAILBOX_IPCC_GLYMUR_H
> > +#define __DT_BINDINGS_MAILBOX_IPCC_GLYMUR_H
> > +
> > +/* Glymur physical client IDs */
> > +#define IPCC_MPROC_AOP			0
> 
> 
> Here the same - not used by Linux.

How is this different from e.g.:

include/dt-bindings/interrupt-controller/arm-gic.h:#define GIC_SPI 0

Perhaps I'm misunderstanding what you're saying here.

> Don't add these, they are really not
> necessary and they are not helping anyhow. For longer explanation see 2
> year thread for PMIC ADC v7.
> 

I'm sorry, I'm not able to wrangle a lore query for this, can you please
provide a link?

> Or provide explanation in terms what Linux interface you are binding
> here (please focus on Linux or other SW).
> 

Don't we use include/dt-bindings to define hardware constants for use in
dt source as well? Has this changed?

Regards,
Bjorn

> Best regards,
> Krzysztof
> 

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [PATCH v2 2/2] dt-bindings: mailbox: qcom: Add IPCC support for Glymur Platform
  2025-10-29 17:23     ` Bjorn Andersson
@ 2025-10-30  5:53       ` Krzysztof Kozlowski
  2025-10-30 19:11         ` Bjorn Andersson
  0 siblings, 1 reply; 13+ messages in thread
From: Krzysztof Kozlowski @ 2025-10-30  5:53 UTC (permalink / raw)
  To: Bjorn Andersson
  Cc: Jingyi Wang, Manivannan Sadhasivam, Jassi Brar, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley, aiqun.yu, tingwei.zhang,
	trilok.soni, yijie.yang, linux-arm-msm, linux-kernel, devicetree,
	Sibi Sankar

On 29/10/2025 18:23, Bjorn Andersson wrote:
> On Wed, Oct 29, 2025 at 04:49:30PM +0100, Krzysztof Kozlowski wrote:
>> On 29/10/2025 09:15, Jingyi Wang wrote:
>>> diff --git a/include/dt-bindings/mailbox/qcom,glymur-ipcc.h b/include/dt-bindings/mailbox/qcom,glymur-ipcc.h
>>> new file mode 100644
>>> index 000000000000..3ab8189974a5
>>> --- /dev/null
>>> +++ b/include/dt-bindings/mailbox/qcom,glymur-ipcc.h
>>> @@ -0,0 +1,68 @@
>>> +/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
>>> +/*
>>> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
>>> + */
>>> +
>>> +#ifndef __DT_BINDINGS_MAILBOX_IPCC_GLYMUR_H
>>> +#define __DT_BINDINGS_MAILBOX_IPCC_GLYMUR_H
>>> +
>>> +/* Glymur physical client IDs */
>>> +#define IPCC_MPROC_AOP			0
>>
>>
>> Here the same - not used by Linux.
> 
> How is this different from e.g.:
> 
> include/dt-bindings/interrupt-controller/arm-gic.h:#define GIC_SPI 0

$ git grep GIC_SPI
drivers/irqchip/irq-mchp-eic.c

How is this not used by Linux? What is drivers/irqchip/foo.c if not a
Linux driver?

> 
> Perhaps I'm misunderstanding what you're saying here.
> 
>> Don't add these, they are really not
>> necessary and they are not helping anyhow. For longer explanation see 2
>> year thread for PMIC ADC v7.
>>
> 
> I'm sorry, I'm not able to wrangle a lore query for this, can you please
> provide a link?

"adc v7 qcom" and then my last two or three replies in that thread:
https://lore.kernel.org/all/d7627a5d-893a-4bc3-8b67-c151ee0bea32@kernel.org/

> 
>> Or provide explanation in terms what Linux interface you are binding
>> here (please focus on Linux or other SW).
>>
> 
> Don't we use include/dt-bindings to define hardware constants for use in

No, we do not.

> dt source as well? Has this changed?

Yes, 5 years ago or more when we noticed people do it unnecessarily. You
know, it is difficult to notice it, because we look at bindings and they
seem fine. Finding that something is not used requires more effort which
we usually do not care.

I have few bookmarks but not necessarily the earliest, just something I
managed to find because people ask the same:

2014 (so more than 5 years ago!):
https://lore.kernel.org/all/201401111415.29395.arnd@arndb.de/

A bit newer:
https://lore.kernel.org/linux-devicetree/CAK8P3a0fDJQvGLEtG0fxLkG08Fh9V7LEMPsx4AaS+2Ldo_xWxw@mail.gmail.com/

https://lore.kernel.org/linux-devicetree/CAK8P3a1APzs74YTcZ=m43G3zrmwJZKcYSTvV5eDDQX-37UY7Tw@mail.gmail.com/

https://lore.kernel.org/linux-devicetree/418c5f0c-5279-41f5-3705-345ec9a97ea2@linaro.org/

https://lore.kernel.org/linux-devicetree/c088e01c-0714-82be-8347-6140daf56640@linaro.org/

https://lore.kernel.org/linux-devicetree/579a1569-7bba-491f-ba5e-7cfcb34ccc1f@linaro.org/


Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [PATCH v2 1/2] dt-bindings: mailbox: qcom: Add IPCC support for Kaanapali Platform
  2025-10-29 16:15       ` Bjorn Andersson
@ 2025-10-30  5:55         ` Krzysztof Kozlowski
  0 siblings, 0 replies; 13+ messages in thread
From: Krzysztof Kozlowski @ 2025-10-30  5:55 UTC (permalink / raw)
  To: Bjorn Andersson
  Cc: Jingyi Wang, Manivannan Sadhasivam, Jassi Brar, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley, aiqun.yu, tingwei.zhang,
	trilok.soni, yijie.yang, linux-arm-msm, linux-kernel, devicetree

On 29/10/2025 17:15, Bjorn Andersson wrote:
> On Wed, Oct 29, 2025 at 04:47:17PM +0100, Krzysztof Kozlowski wrote:
>> On 29/10/2025 16:16, Bjorn Andersson wrote:
>>> On Wed, Oct 29, 2025 at 01:15:09AM -0700, Jingyi Wang wrote:
>>>> Add the physical client ids and binding for Kaanapali platform. Physical
>>>> client IDs instead of virtual client IDs are used for qcom new platforms
>>>> in the Inter Process Communication Controller (IPCC) driver as virtual to
>>>> physical mapping logic is removed in HW.
>>>
>>> Happy to see the description of what changed wrt physical vs virtual
>>> client IDs, but you're leaving the task of figuring out how this
>>> explanation is applicable to the imagination of the reader.
>>>
>>> Nobody knows that the values in dt-bindings/mailbox/qcom-ipcc.h are
>>> "virtual client IDs", so it's not clear that you're trying to provide an
>>> explanation to why a new, platform-specific, header file is needed here.
>>>
>>>
>>
>>
>> Physical or virtual, standard expectation is that they are used by the
>> driver. This does not happen here, so what do they exactly represent?
>> Which part of SW ABI?
>>
> 
> I was under the impression that they would be used only in DeviceTree
> source, and the driver simply uses the values it reads at runtime.


And uses them for what? What do the values mean for the driver, how does
it use them? If I change some entry from "1" to "2" does Linux code
behave differently?


Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [PATCH v2 2/2] dt-bindings: mailbox: qcom: Add IPCC support for Glymur Platform
  2025-10-30  5:53       ` Krzysztof Kozlowski
@ 2025-10-30 19:11         ` Bjorn Andersson
  2025-10-31  2:04           ` Jingyi Wang
  0 siblings, 1 reply; 13+ messages in thread
From: Bjorn Andersson @ 2025-10-30 19:11 UTC (permalink / raw)
  To: Krzysztof Kozlowski
  Cc: Jingyi Wang, Manivannan Sadhasivam, Jassi Brar, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley, aiqun.yu, tingwei.zhang,
	trilok.soni, yijie.yang, linux-arm-msm, linux-kernel, devicetree,
	Sibi Sankar

On Thu, Oct 30, 2025 at 06:53:59AM +0100, Krzysztof Kozlowski wrote:
> On 29/10/2025 18:23, Bjorn Andersson wrote:
> > On Wed, Oct 29, 2025 at 04:49:30PM +0100, Krzysztof Kozlowski wrote:
> >> On 29/10/2025 09:15, Jingyi Wang wrote:
> >>> diff --git a/include/dt-bindings/mailbox/qcom,glymur-ipcc.h b/include/dt-bindings/mailbox/qcom,glymur-ipcc.h
> >>> new file mode 100644
> >>> index 000000000000..3ab8189974a5
> >>> --- /dev/null
> >>> +++ b/include/dt-bindings/mailbox/qcom,glymur-ipcc.h
> >>> @@ -0,0 +1,68 @@
> >>> +/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
> >>> +/*
> >>> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
> >>> + */
> >>> +
> >>> +#ifndef __DT_BINDINGS_MAILBOX_IPCC_GLYMUR_H
> >>> +#define __DT_BINDINGS_MAILBOX_IPCC_GLYMUR_H
> >>> +
> >>> +/* Glymur physical client IDs */
> >>> +#define IPCC_MPROC_AOP			0
> >>
> >>
> >> Here the same - not used by Linux.
> > 
> > How is this different from e.g.:
> > 
> > include/dt-bindings/interrupt-controller/arm-gic.h:#define GIC_SPI 0
> 
> $ git grep GIC_SPI
> drivers/irqchip/irq-mchp-eic.c
> 

My interpretation of that snippet (and the other use cases) is that they
are programmatically constructing the values of a DT property, not that
they define the SW API.

> How is this not used by Linux? What is drivers/irqchip/foo.c if not a
> Linux driver?
> 

No argument there.

[..]
> > 
> >> Or provide explanation in terms what Linux interface you are binding
> >> here (please focus on Linux or other SW).
> >>
> > 
> > Don't we use include/dt-bindings to define hardware constants for use in
> 
> No, we do not.
> 

I have completely missed this. Perhaps this is the first use case, but
the result is non-the-less:

$ find arch/*/boot/dts/qcom -name '*.h' | wc -l
0


But this makes sense, and I like it.

@Jingyi, as these header constants are consumed only by DeviceTree
source, please move them to arch/arm64/boot/dts/qcom/

Thanks,
Bjorn

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [PATCH v2 2/2] dt-bindings: mailbox: qcom: Add IPCC support for Glymur Platform
  2025-10-30 19:11         ` Bjorn Andersson
@ 2025-10-31  2:04           ` Jingyi Wang
  0 siblings, 0 replies; 13+ messages in thread
From: Jingyi Wang @ 2025-10-31  2:04 UTC (permalink / raw)
  To: Bjorn Andersson, Krzysztof Kozlowski
  Cc: Manivannan Sadhasivam, Jassi Brar, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley, aiqun.yu, tingwei.zhang,
	trilok.soni, yijie.yang, linux-arm-msm, linux-kernel, devicetree,
	Sibi Sankar



On 10/31/2025 3:11 AM, Bjorn Andersson wrote:
> On Thu, Oct 30, 2025 at 06:53:59AM +0100, Krzysztof Kozlowski wrote:
>> On 29/10/2025 18:23, Bjorn Andersson wrote:
>>> On Wed, Oct 29, 2025 at 04:49:30PM +0100, Krzysztof Kozlowski wrote:
>>>> On 29/10/2025 09:15, Jingyi Wang wrote:
>>>>> diff --git a/include/dt-bindings/mailbox/qcom,glymur-ipcc.h b/include/dt-bindings/mailbox/qcom,glymur-ipcc.h
>>>>> new file mode 100644
>>>>> index 000000000000..3ab8189974a5
>>>>> --- /dev/null
>>>>> +++ b/include/dt-bindings/mailbox/qcom,glymur-ipcc.h
>>>>> @@ -0,0 +1,68 @@
>>>>> +/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
>>>>> +/*
>>>>> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
>>>>> + */
>>>>> +
>>>>> +#ifndef __DT_BINDINGS_MAILBOX_IPCC_GLYMUR_H
>>>>> +#define __DT_BINDINGS_MAILBOX_IPCC_GLYMUR_H
>>>>> +
>>>>> +/* Glymur physical client IDs */
>>>>> +#define IPCC_MPROC_AOP			0
>>>>
>>>>
>>>> Here the same - not used by Linux.
>>>
>>> How is this different from e.g.:
>>>
>>> include/dt-bindings/interrupt-controller/arm-gic.h:#define GIC_SPI 0
>>
>> $ git grep GIC_SPI
>> drivers/irqchip/irq-mchp-eic.c
>>
> 
> My interpretation of that snippet (and the other use cases) is that they
> are programmatically constructing the values of a DT property, not that
> they define the SW API.
> 
>> How is this not used by Linux? What is drivers/irqchip/foo.c if not a
>> Linux driver?
>>
> 
> No argument there.
> 
> [..]
>>>
>>>> Or provide explanation in terms what Linux interface you are binding
>>>> here (please focus on Linux or other SW).
>>>>
>>>
>>> Don't we use include/dt-bindings to define hardware constants for use in
>>
>> No, we do not.
>>
> 
> I have completely missed this. Perhaps this is the first use case, but
> the result is non-the-less:
> 
> $ find arch/*/boot/dts/qcom -name '*.h' | wc -l
> 0
> 
> 
> But this makes sense, and I like it.
> 
> @Jingyi, as these header constants are consumed only by DeviceTree
> source, please move them to arch/arm64/boot/dts/qcom/
> 
> Thanks,
> Bjorn

Well noted.

Thanks,
Jingyi


^ permalink raw reply	[flat|nested] 13+ messages in thread

end of thread, other threads:[~2025-10-31  2:04 UTC | newest]

Thread overview: 13+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-10-29  8:15 [PATCH v2 0/2] dt-bindings: mailbox: qcom-ipcc: Add IPCC on Kaanapali and Glymur Platforms Jingyi Wang
2025-10-29  8:15 ` [PATCH v2 1/2] dt-bindings: mailbox: qcom: Add IPCC support for Kaanapali Platform Jingyi Wang
2025-10-29 15:16   ` Bjorn Andersson
2025-10-29 15:47     ` Krzysztof Kozlowski
2025-10-29 16:15       ` Bjorn Andersson
2025-10-30  5:55         ` Krzysztof Kozlowski
2025-10-29  8:15 ` [PATCH v2 2/2] dt-bindings: mailbox: qcom: Add IPCC support for Glymur Platform Jingyi Wang
2025-10-29 15:18   ` Bjorn Andersson
2025-10-29 15:49   ` Krzysztof Kozlowski
2025-10-29 17:23     ` Bjorn Andersson
2025-10-30  5:53       ` Krzysztof Kozlowski
2025-10-30 19:11         ` Bjorn Andersson
2025-10-31  2:04           ` Jingyi Wang

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