Re: [PATCH 04/11] PCI/IDE: Selective Stream IDE enumeration

[Dan Williams <dan.j.williams@intel.com>]

Xu Yilun wrote:
> On Tue, Dec 10, 2024 at 08:38:57AM +0530, Aneesh Kumar K.V wrote:
> > 
> > Hi Dan,
> > 
> > > +#define  PCI_IDE_CAP_SELECTIVE_STREAMS_NUM(x)	(((x) >> 16) & 0xff) /* Selective IDE Streams */
> > 
> > Should this be
> > 
> > #define  PCI_IDE_CAP_SELECTIVE_STREAMS_NUM(x)	((((x) >> 16) & 0xff) + 1) /* Selective IDE Streams */
> 
> Is it better keep the literal SPEC definition here in pci_reg.h? And ...
> 
> > 
> > We do loop as below in ide.c
> > 
> > 	for (int i = 0; i < PCI_IDE_CAP_SELECTIVE_STREAMS_NUM(val); i++) {
> 
> for (int i = 0; i < PCI_IDE_CAP_SELECTIVE_STREAMS_NUM(val) + 1; i++) {

I think we should follow what you said in the last patch and just define
the mask that gets to the raw field and then put the fixup code in ide.c

Folded in this:

diff --git a/drivers/pci/ide.c b/drivers/pci/ide.c
index 6667a61ba01a..eea126ce7ae0 100644
--- a/drivers/pci/ide.c
+++ b/drivers/pci/ide.c
@@ -14,8 +14,8 @@ static int sel_ide_offset(u16 cap, int stream_id, int nr_ide_mem)
 
 void pci_ide_init(struct pci_dev *pdev)
 {
+       int nr_ide_mem = 0, nr_streams;
        u16 ide_cap, sel_ide_cap;
-       int nr_ide_mem = 0;
        u32 val = 0;
 
        if (!pci_is_pcie(pdev))
@@ -47,7 +47,8 @@ void pci_ide_init(struct pci_dev *pdev)
        else
                sel_ide_cap = ide_cap + PCI_IDE_LINK_STREAM;
 
-       for (int i = 0; i < PCI_IDE_CAP_SELECTIVE_STREAMS_NUM(val); i++) {
+       nr_streams = FIELD_GET(PCI_IDE_CAP_SELECTIVE_STREAMS_NUM_MASK, val) + 1;
+       for (int i = 0; i < nr_streams; i++) {
                if (i == 0) {
                        pci_read_config_dword(pdev, sel_ide_cap, &val);
                        nr_ide_mem = PCI_IDE_SEL_CAP_ASSOC_NUM(val);
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index 7b8ef694a9ef..17aef7646b8d 100644
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -1226,8 +1226,7 @@
 #define  PCI_IDE_CAP_ALG(x)            (((x) >> 8) & 0x1f) /* Supported Algorithms */
 #define  PCI_IDE_CAP_ALG_AES_GCM_256   0    /* AES-GCM 256 key size, 96b MAC */
 #define  PCI_IDE_CAP_LINK_TC_NUM(x)    (((x) >> 13) & 0x7) /* Link IDE TCs */
-#define  PCI_IDE_CAP_SELECTIVE_STREAMS_NUM(x) ((((x) >> 16) & 0xff) + 1) /* Selective IDE Streams */
-#define  PCI_IDE_CAP_SELECTIVE_STREAMS_MASK    0xff0000
+#define  PCI_IDE_CAP_SELECTIVE_STREAMS_NUM_MASK        0xff0000 /* Supported Selective IDE Streams */
 #define  PCI_IDE_CAP_TEE_LIMITED       0x1000000 /* TEE-Limited Stream Supported */
 #define PCI_IDE_CTL                    0x8
 #define  PCI_IDE_CTL_FLOWTHROUGH_IDE   0x4     /* Flow-Through IDE Stream Enabled */