From: Alison Schofield <alison.schofield@intel.com>
To: Davidlohr Bueso <dave@stgolabs.net>,
Jonathan Cameron <jonathan.cameron@huawei.com>,
Dave Jiang <dave.jiang@intel.com>,
Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
Dan Williams <dan.j.williams@intel.com>
Cc: linux-cxl@vger.kernel.org
Subject: [PATCH v2 2/3] cxl/acpi: Make the XOR calculations available for testing
Date: Fri, 29 Aug 2025 00:21:26 -0700 [thread overview]
Message-ID: <1474b223f2b50da36f36f07820a8708fcbb8441a.1756446925.git.alison.schofield@intel.com> (raw)
In-Reply-To: <cover.1756446925.git.alison.schofield@intel.com>
In preparation for adding a test module that can exercise the address
translation functions performed by the CXL Driver, refactor the XOR
implementation like this:
- Extract the core calculation into a standalone helper function,
- Mark the new helper function as __mock_export to make it available
to test modules while keeping it otherwise static,
- Enhance the parameter validation since this new function will be
called from a test module with no guarantee of valid rameters.
- Move the define of struct cxl_cxims_data to include/linux/acpi.h
so the test module can build and pass xormap data.
Signed-off-by: Alison Schofield <alison.schofield@intel.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
---
drivers/cxl/acpi.c | 35 ++++++++++++++++++++++++-----------
include/linux/acpi.h | 7 +++++++
2 files changed, 31 insertions(+), 11 deletions(-)
diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c
index 26c494704437..f924058dbd4c 100644
--- a/drivers/cxl/acpi.c
+++ b/drivers/cxl/acpi.c
@@ -11,11 +11,6 @@
#include "cxlpci.h"
#include "cxl.h"
-struct cxl_cxims_data {
- int nr_maps;
- u64 xormaps[] __counted_by(nr_maps);
-};
-
/*
* There is one CXIMS, therefore one set of XOR maps, that all CXL Windows with
* the same host bridge granularity share. The number of maps to apply at address
@@ -28,20 +23,31 @@ static const int hbiw_to_nr_maps[HBIW_TO_NR_MAPS_SIZE] = {
[1] = 0, [2] = 1, [3] = 0, [4] = 2, [6] = 1, [8] = 3, [12] = 2, [16] = 4
};
+static const int valid_hbiw[] = { 1, 2, 3, 4, 6, 8, 12, 16 };
+
static const guid_t acpi_cxl_qtg_id_guid =
GUID_INIT(0xF365F9A6, 0xA7DE, 0x4071,
0xA6, 0x6A, 0xB4, 0x0C, 0x0B, 0x4F, 0x8E, 0x52);
-static u64 cxl_apply_xor_maps(struct cxl_root_decoder *cxlrd, u64 addr)
+__mock_export u64 cxl_do_xormap_calc(struct cxl_cxims_data *cximsd, u64 addr, int hbiw)
{
- int nr_maps_to_apply = hbiw_to_nr_maps[cxlrd->cxlsd.nr_targets];
- struct cxl_cxims_data *cximsd = cxlrd->platform_data;
+ int nr_maps_to_apply = -1;
u64 val;
int pos;
- /* No xormaps for host bridge interleave ways of 1 or 3 */
- if (!nr_maps_to_apply)
- return addr;
+ /*
+ * Strictly validate hbiw since this function is used for testing and
+ * that nullifies any expectation of trusted parameters from the CXL
+ * Region Driver.
+ */
+ for (int i = 0; i < ARRAY_SIZE(valid_hbiw); i++) {
+ if (valid_hbiw[i] == hbiw) {
+ nr_maps_to_apply = hbiw_to_nr_maps[hbiw];
+ break;
+ }
+ }
+ if (nr_maps_to_apply == -1 || nr_maps_to_apply > cximsd->nr_maps)
+ return ULLONG_MAX;
/*
* In regions using XOR interleave arithmetic the CXL HPA may not
@@ -73,6 +79,13 @@ static u64 cxl_apply_xor_maps(struct cxl_root_decoder *cxlrd, u64 addr)
return addr;
}
+static u64 cxl_apply_xor_maps(struct cxl_root_decoder *cxlrd, u64 addr)
+{
+ struct cxl_cxims_data *cximsd = cxlrd->platform_data;
+
+ return cxl_do_xormap_calc(cximsd, addr, cxlrd->cxlsd.nr_targets);
+}
+
struct cxl_cxims_context {
struct device *dev;
struct cxl_root_decoder *cxlrd;
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index 1c5bb1e887cd..78e639a529c2 100644
--- a/include/linux/acpi.h
+++ b/include/linux/acpi.h
@@ -1616,4 +1616,11 @@ static inline bool acpi_node_backed_by_real_pxm(int nid)
}
#endif
+#if IS_ENABLED(CONFIG_CXL_ACPI)
+struct cxl_cxims_data {
+ int nr_maps;
+ u64 xormaps[] __counted_by(nr_maps);
+};
+#endif
+
#endif /*_LINUX_ACPI_H*/
--
2.37.3
next prev parent reply other threads:[~2025-08-29 7:21 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-29 7:21 [PATCH v2 0/3] CXL: Add a loadable module for address translation Alison Schofield
2025-08-29 7:21 ` [PATCH v2 1/3] cxl/region: Refactor address translation funcs for testing Alison Schofield
2025-09-04 22:05 ` Dave Jiang
2025-09-09 17:31 ` Alison Schofield
2025-09-09 16:10 ` Jonathan Cameron
2025-09-09 17:45 ` Alison Schofield
2025-09-10 12:32 ` Jonathan Cameron
2025-08-29 7:21 ` Alison Schofield [this message]
2025-09-04 23:21 ` [PATCH v2 2/3] cxl/acpi: Make the XOR calculations available " Dave Jiang
2025-09-09 17:33 ` Alison Schofield
2025-08-29 7:21 ` [PATCH v2 3/3] cxl/test: Add cxl_translate module for address translation testing Alison Schofield
2025-09-04 23:24 ` Dave Jiang
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