From: Ben Widawsky <ben.widawsky@intel.com>
To: linux-cxl@vger.kernel.org, linux-nvdimm@lists.01.org,
linux-pci@vger.kernel.org
Cc: patches@lists.linux.dev, Bjorn Helgaas <helgaas@kernel.org>,
Ben Widawsky <ben.widawsky@intel.com>,
Alison Schofield <alison.schofield@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
Jonathan Cameron <Jonathan.Cameron@Huawei.com>,
Vishal Verma <vishal.l.verma@intel.com>
Subject: [PATCH 08/13] cxl/region: Address space allocation
Date: Thu, 6 Jan 2022 16:37:51 -0800 [thread overview]
Message-ID: <20220107003756.806582-9-ben.widawsky@intel.com> (raw)
In-Reply-To: <20220107003756.806582-1-ben.widawsky@intel.com>
When a region is not assigned a host physical address, one is picked by
the driver. As the address will determine which CFMWS contains the
region, it's usually a better idea to let the driver make this
determination.
Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
---
drivers/cxl/region.c | 38 ++++++++++++++++++++++++++++++++++++--
drivers/cxl/trace.h | 3 +++
2 files changed, 39 insertions(+), 2 deletions(-)
diff --git a/drivers/cxl/region.c b/drivers/cxl/region.c
index b458d7b97120..c8e3c48dfbb9 100644
--- a/drivers/cxl/region.c
+++ b/drivers/cxl/region.c
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-only
/* Copyright(c) 2021 Intel Corporation. All rights reserved. */
#include <linux/platform_device.h>
+#include <linux/genalloc.h>
#include <linux/device.h>
#include <linux/module.h>
#include <linux/pci.h>
@@ -62,6 +63,20 @@ static struct cxl_port *get_root_decoder(const struct cxl_memdev *endpoint)
return NULL;
}
+static void release_cxl_region(void *r)
+{
+ struct cxl_region *region = (struct cxl_region *)r;
+ struct cxl_decoder *rootd = rootd_from_region(region);
+ struct resource *res = &rootd->platform_res;
+ resource_size_t start, size;
+
+ start = region->res->start;
+ size = resource_size(region->res);
+
+ __release_region(res, start, size);
+ gen_pool_free(rootd->address_space, start, size);
+}
+
/**
* sanitize_region() - Check is region is reasonably configured
* @region: The region to check
@@ -111,8 +126,27 @@ static int sanitize_region(const struct cxl_region *region)
*/
static int allocate_address_space(struct cxl_region *region)
{
- /* TODO */
- return 0;
+ struct cxl_decoder *rootd = rootd_from_region(region);
+ unsigned long start;
+
+ start = gen_pool_alloc(rootd->address_space, region->config.size);
+ if (!start) {
+ trace_allocation_failed(region,
+ "Couldn't allocate address space");
+ return -ENOMEM;
+ }
+
+ region->res = __request_region(&rootd->platform_res, start,
+ region->config.size,
+ dev_name(®ion->dev), IORESOURCE_MEM);
+ if (!region->res) {
+ trace_allocation_failed(region, "Couldn't obtain region");
+ gen_pool_free(rootd->address_space, start, region->config.size);
+ return -ENOMEM;
+ }
+
+ return devm_add_action_or_reset(®ion->dev, release_cxl_region,
+ region);
}
/**
diff --git a/drivers/cxl/trace.h b/drivers/cxl/trace.h
index 8f7f471e15b8..a53f00ba5d0e 100644
--- a/drivers/cxl/trace.h
+++ b/drivers/cxl/trace.h
@@ -35,6 +35,9 @@ DEFINE_EVENT(cxl_region_template, region_activated,
DEFINE_EVENT(cxl_region_template, sanitize_failed,
TP_PROTO(const struct cxl_region *region, char *status),
TP_ARGS(region, status));
+DEFINE_EVENT(cxl_region_template, allocation_failed,
+ TP_PROTO(const struct cxl_region *region, char *status),
+ TP_ARGS(region, status));
#endif /* if !defined (__CXL_TRACE_H__) || defined(TRACE_HEADER_MULTI_READ) */
--
2.34.1
next prev parent reply other threads:[~2022-01-07 0:38 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-07 0:37 [PATCH 00/13] CXL Region driver Ben Widawsky
2022-01-07 0:37 ` [PATCH 01/13] cxl/core: Rename find_cxl_port Ben Widawsky
2022-01-07 0:37 ` [PATCH 02/13] cxl/core: Track port depth Ben Widawsky
2022-01-07 0:37 ` [PATCH 03/13] cxl/region: Add region creation ABI Ben Widawsky
2022-01-07 0:37 ` [PATCH 04/13] cxl/region: Introduce concept of region configuration Ben Widawsky
2022-01-07 0:37 ` [PATCH 05/13] cxl/mem: Cache port created by the mem dev Ben Widawsky
2022-01-07 0:37 ` [PATCH 06/13] cxl/region: Introduce a cxl_region driver Ben Widawsky
2022-01-07 0:37 ` [PATCH 07/13] cxl/acpi: Handle address space allocation Ben Widawsky
2022-01-07 0:37 ` Ben Widawsky [this message]
2022-01-07 0:37 ` [PATCH 09/13] cxl/region: Implement XHB verification Ben Widawsky
2022-01-07 10:07 ` Jonathan Cameron
2022-01-07 11:55 ` Jonathan Cameron
2022-01-11 22:47 ` Ben Widawsky
2022-01-07 10:30 ` Jonathan Cameron
2022-01-07 10:38 ` Jonathan Cameron
2022-01-07 16:32 ` Ben Widawsky
2022-01-11 21:32 ` Ben Widawsky
2022-01-07 0:37 ` [PATCH 10/13] cxl/region: HB port config verification Ben Widawsky
2022-01-07 0:37 ` [PATCH 11/13] cxl/region: Add infrastructure for decoder programming Ben Widawsky
2022-01-07 0:37 ` [PATCH 12/13] cxl/region: Record host bridge target list Ben Widawsky
2022-01-07 18:14 ` Jonathan Cameron
2022-01-07 19:20 ` Dan Williams
2022-01-07 0:37 ` [PATCH 13/13] cxl: Program decoders for regions Ben Widawsky
2022-01-07 16:18 ` Jonathan Cameron
2022-01-07 16:33 ` Ben Widawsky
2022-01-07 17:22 ` Jonathan Cameron
2022-01-11 0:05 ` Ben Widawsky
2022-01-12 14:53 ` Jonathan Cameron
2022-01-12 16:54 ` Ben Widawsky
2022-01-15 18:54 ` [PATCH 00/13] CXL Region driver Ben Widawsky
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