Re: [PATCH v4 3/6] tools/testing/cxl: Add interleave check support to mock cxl port device

[Jonathan Cameron <Jonathan.Cameron@huawei.com>]

On Wed, 17 Aug 2022 14:21:53 -0700
Dave Jiang <dave.jiang@intel.com> wrote:

> Attach the cxl mock hdm to the port device to allow cxl_interleave_verify()
I couldn't follow what was going on here, until I realized you've renamed
this function.  Now cxl_interleave_capable().

Are the tests broken (null dereference) between patch 1 and 3?

Seem like dev_set_drvdata() should move to patch 1.

> to check the interleave configuration. Set the interleave_mask as well
> to support the new verification code.
> 
> Reviewed-by: Dan Williams <dan.j.williams@intel.com>
> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
> ---
>  tools/testing/cxl/test/cxl.c |    3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/tools/testing/cxl/test/cxl.c b/tools/testing/cxl/test/cxl.c
> index a072b2d3e726..3ce353a20b80 100644
> --- a/tools/testing/cxl/test/cxl.c
> +++ b/tools/testing/cxl/test/cxl.c
> @@ -398,6 +398,9 @@ static struct cxl_hdm *mock_cxl_setup_hdm(struct cxl_port *port)
>  		return ERR_PTR(-ENOMEM);
>  
>  	cxlhdm->port = port;
> +	cxlhdm->interleave_mask = GENMASK(14, 8);
> +	cxlhdm->interleave_cap = CXL_HDM_INTERLEAVE_CAP_DEFAULT;
> +	dev_set_drvdata(&port->dev, cxlhdm);
>  	return cxlhdm;
>  }
>  
> 
>