From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Dave Jiang <dave.jiang@intel.com>
Cc: <linux-cxl@vger.kernel.org>, <linux-acpi@vger.kernel.org>,
<dan.j.williams@intel.com>, <ira.weiny@intel.com>,
<vishal.l.verma@intel.com>, <alison.schofield@intel.com>,
<rafael@kernel.org>, <lukas@wunner.de>
Subject: Re: [PATCH v4 05/23] cxl: Add callback to parse the DSMAS subtables from CDAT
Date: Thu, 20 Apr 2023 12:35:12 +0100 [thread overview]
Message-ID: <20230420123512.0000650b@Huawei.com> (raw)
In-Reply-To: <20230420123350.000061b1@Huawei.com>
On Thu, 20 Apr 2023 12:33:50 +0100
Jonathan Cameron <Jonathan.Cameron@Huawei.com> wrote:
> On Wed, 19 Apr 2023 13:21:31 -0700
> Dave Jiang <dave.jiang@intel.com> wrote:
>
> > Provide a callback function to the CDAT parser in order to parse the Device
> > Scoped Memory Affinity Structure (DSMAS). Each DSMAS structure contains the
> > DPA range and its associated attributes in each entry. See the CDAT
> > specification for details.
> >
> > Coherent Device Attribute Table 1.03 2.1 Device Scoped memory Affinity
> > Structure (DSMAS)
>
> I'm not sure what purpose of this is. If it's just detecting problems
> with the entry because we aren't interested in the content yet, then fine
> but good to make that clear in patch intro.
>
> Maybe I'm missing something!
>
Ah. Got to next patch. Perhaps a forwards reference to that will avoid
anyone else wondering what is going on here!
> Thanks,
>
> Jonathan
>
> >
> > Signed-off-by: Dave Jiang <dave.jiang@intel.com>
> >
> > ---
> > v3:
> > - Add spec section number. (Alison)
> > - Remove cast from void *. (Alison)
> > - Refactor cxl_port_probe() block. (Alison)
> > - Move CDAT parse to cxl_endpoint_port_probe()
> >
> > v2:
> > - Add DSMAS table size check. (Lukas)
> > - Use local DSMAS header for LE handling.
> > - Remove dsmas lock. (Jonathan)
> > - Fix handle size (Jonathan)
> > - Add LE to host conversion for DSMAS address and length.
> > - Make dsmas_list local
>
>
> > diff --git a/drivers/cxl/port.c b/drivers/cxl/port.c
> > index 615e0ef6b440..3022bdd52439 100644
> > --- a/drivers/cxl/port.c
> > +++ b/drivers/cxl/port.c
> > @@ -57,6 +57,16 @@ static int discover_region(struct device *dev, void *root)
> > return 0;
> > }
>
> > static int cxl_switch_port_probe(struct cxl_port *port)
> > {
> > struct cxl_hdm *cxlhdm;
> > @@ -125,6 +135,18 @@ static int cxl_endpoint_port_probe(struct cxl_port *port)
> > device_for_each_child(&port->dev, root, discover_region);
> > put_device(&root->dev);
> >
> > + if (port->cdat.table) {
> > + LIST_HEAD(dsmas_list);
> > +
> > + rc = cdat_table_parse_dsmas(port->cdat.table,
> > + cxl_dsmas_parse_entry,
> > + (void *)&dsmas_list);
> > + if (rc < 0)
> > + dev_warn(&port->dev, "Failed to parse DSMAS: %d\n", rc);
> > +
> > + dsmas_list_destroy(&dsmas_list);
>
> I'm a little confused here. What's the point? Parse them then throw the info away?
> Maybe a comment if all we are trying to do is warn about CDAT problems.
>
>
> > + }
> > +
> > return 0;
> > }
> >
> >
> >
>
next prev parent reply other threads:[~2023-04-20 11:36 UTC|newest]
Thread overview: 70+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-19 20:21 [PATCH v4 00/23] cxl: Add support for QTG ID retrieval for CXL subsystem Dave Jiang
2023-04-19 20:21 ` [PATCH v4 01/23] cxl: Export QTG ids from CFMWS to sysfs Dave Jiang
2023-04-20 8:51 ` Jonathan Cameron
2023-04-20 20:53 ` Dave Jiang
2023-04-24 21:46 ` Dan Williams
2023-04-26 23:14 ` Dave Jiang
2023-04-19 20:21 ` [PATCH v4 02/23] cxl: Add checksum verification to CDAT from CXL Dave Jiang
2023-04-20 8:55 ` Jonathan Cameron
2023-04-24 22:01 ` Dan Williams
2023-04-26 23:24 ` Dave Jiang
2023-04-19 20:21 ` [PATCH v4 03/23] cxl: Add support for reading CXL switch CDAT table Dave Jiang
2023-04-20 9:25 ` Jonathan Cameron
2023-04-24 22:08 ` Dan Williams
2023-04-27 15:55 ` Dave Jiang
2023-04-19 20:21 ` [PATCH v4 04/23] cxl: Add common helpers for cdat parsing Dave Jiang
2023-04-20 9:41 ` Jonathan Cameron
2023-04-20 21:05 ` Dave Jiang
2023-04-21 16:06 ` Jonathan Cameron
2023-04-21 16:12 ` Dave Jiang
2023-04-24 22:33 ` Dan Williams
2023-04-25 16:00 ` Dave Jiang
2023-04-27 0:09 ` Dan Williams
2023-04-19 20:21 ` [PATCH v4 05/23] cxl: Add callback to parse the DSMAS subtables from CDAT Dave Jiang
2023-04-20 11:33 ` Jonathan Cameron
2023-04-20 11:35 ` Jonathan Cameron [this message]
2023-04-20 23:25 ` Dave Jiang
2023-04-24 22:38 ` Dan Williams
2023-04-26 3:44 ` Li, Ming
2023-04-26 18:27 ` Dave Jiang
2023-04-19 20:21 ` [PATCH v4 06/23] cxl: Add callback to parse the DSLBIS subtable " Dave Jiang
2023-04-20 11:40 ` Jonathan Cameron
2023-04-20 23:25 ` Dave Jiang
2023-04-24 22:46 ` Dan Williams
2023-04-24 22:59 ` Dave Jiang
2023-04-19 20:21 ` [PATCH v4 07/23] cxl: Add callback to parse the SSLBIS " Dave Jiang
2023-04-20 11:50 ` Jonathan Cameron
2023-04-24 23:38 ` Dan Williams
2023-04-19 20:21 ` [PATCH v4 08/23] cxl: Add support for _DSM Function for retrieving QTG ID Dave Jiang
2023-04-20 12:00 ` Jonathan Cameron
2023-04-21 0:11 ` Dave Jiang
2023-04-21 16:07 ` Jonathan Cameron
2023-04-25 0:12 ` Dan Williams
2023-04-19 20:21 ` [PATCH v4 09/23] cxl: Add helper function to retrieve ACPI handle of CXL root device Dave Jiang
2023-04-20 12:06 ` Jonathan Cameron
2023-04-21 23:24 ` Dave Jiang
2023-04-25 0:18 ` Dan Williams
2023-04-19 20:22 ` [PATCH v4 10/23] cxl: Add helpers to calculate pci latency for the CXL device Dave Jiang
2023-04-20 12:15 ` Jonathan Cameron
2023-04-25 0:30 ` Dan Williams
2023-05-01 16:29 ` Dave Jiang
2023-04-19 20:22 ` [PATCH v4 11/23] cxl: Add helper function that calculates QoS values for switches Dave Jiang
2023-04-20 12:26 ` Jonathan Cameron
2023-04-24 17:09 ` Dave Jiang
2023-04-24 17:31 ` Dave Jiang
2023-04-24 21:59 ` Jonathan Cameron
2023-04-25 0:33 ` Dan Williams
2023-04-19 20:22 ` [PATCH v4 12/23] cxl: Add helper function that calculate QoS values for PCI path Dave Jiang
2023-04-20 12:32 ` Jonathan Cameron
2023-04-25 0:45 ` Dan Williams
2023-04-19 20:22 ` [PATCH v4 13/23] ACPI: NUMA: Create enum for memory_target hmem_attrs indexing Dave Jiang
2023-04-19 20:22 ` [PATCH v4 14/23] ACPI: NUMA: Add genport target allocation to the HMAT parsing Dave Jiang
2023-04-19 20:22 ` [PATCH v4 15/23] ACPI: NUMA: Add setting of generic port locality attributes Dave Jiang
2023-04-19 20:22 ` [PATCH v4 16/23] ACPI: NUMA: Add helper function to retrieve the performance attributes Dave Jiang
2023-04-19 20:22 ` [PATCH v4 17/23] cxl: Add helper function to retrieve generic port QoS Dave Jiang
2023-04-19 20:22 ` [PATCH v4 18/23] cxl: Add latency and bandwidth calculations for the CXL path Dave Jiang
2023-04-19 20:22 ` [PATCH v4 19/23] cxl: Wait Memory_Info_Valid before access memory related info Dave Jiang
2023-04-19 20:23 ` [PATCH v4 20/23] cxl: Move identify and partition query from pci probe to port probe Dave Jiang
2023-04-19 20:23 ` [PATCH v4 21/23] cxl: Store QTG IDs and related info to the CXL memory device context Dave Jiang
2023-04-19 20:23 ` [PATCH v4 22/23] cxl: Export sysfs attributes for memory device QTG ID Dave Jiang
2023-04-19 20:23 ` [PATCH v4 23/23] cxl/mem: Add debugfs output for QTG related data Dave Jiang
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