* [PATCH v2] Documentation: Update the CXL Maturity Map
@ 2025-05-12 21:42 alison.schofield
2025-05-12 22:37 ` Dave Jiang
2025-05-13 22:21 ` Dave Jiang
0 siblings, 2 replies; 5+ messages in thread
From: alison.schofield @ 2025-05-12 21:42 UTC (permalink / raw)
To: Davidlohr Bueso, Jonathan Cameron, Dave Jiang, Alison Schofield,
Vishal Verma, Ira Weiny, Dan Williams
Cc: linux-cxl
From: Alison Schofield <alison.schofield@intel.com>
Changes for extended-linear cache, hetero-interleave, and HPA->DPA
address translation.
Signed-off-by: Alison Schofield <alison.schofield@intel.com>
---
Change in v2:
- Make ELC a '2' (DaveJ)
Documentation/driver-api/cxl/maturity-map.rst | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/Documentation/driver-api/cxl/maturity-map.rst b/Documentation/driver-api/cxl/maturity-map.rst
index a2288f9df658..1330f3f52129 100644
--- a/Documentation/driver-api/cxl/maturity-map.rst
+++ b/Documentation/driver-api/cxl/maturity-map.rst
@@ -51,9 +51,9 @@ in place, but there are several corner cases that are pending closure.
* [2] CXL Window Enumeration
- * [0] :ref:`Extended-linear memory-side cache <extended-linear>`
+ * [2] :ref:`Extended-linear memory-side cache <extended-linear>`
* [0] Low Memory-hole
- * [0] Hetero-interleave
+ * [X] Hetero-interleave
* [2] Switch Enumeration
@@ -173,7 +173,7 @@ Accelerator
User Flow Support
-----------------
-* [0] HPA->DPA Address translation (need xormaps export solution)
+* [0] Inject & clear poison by HPA
Details
=======
--
2.37.3
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v2] Documentation: Update the CXL Maturity Map
2025-05-12 21:42 alison.schofield
@ 2025-05-12 22:37 ` Dave Jiang
2025-05-13 22:21 ` Dave Jiang
1 sibling, 0 replies; 5+ messages in thread
From: Dave Jiang @ 2025-05-12 22:37 UTC (permalink / raw)
To: alison.schofield, Davidlohr Bueso, Jonathan Cameron, Vishal Verma,
Ira Weiny, Dan Williams
Cc: linux-cxl
On 5/12/25 2:42 PM, alison.schofield@intel.com wrote:
> From: Alison Schofield <alison.schofield@intel.com>
>
> Changes for extended-linear cache, hetero-interleave, and HPA->DPA
> address translation.
>
> Signed-off-by: Alison Schofield <alison.schofield@intel.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
> ---
> Change in v2:
> - Make ELC a '2' (DaveJ)
>
> Documentation/driver-api/cxl/maturity-map.rst | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/driver-api/cxl/maturity-map.rst b/Documentation/driver-api/cxl/maturity-map.rst
> index a2288f9df658..1330f3f52129 100644
> --- a/Documentation/driver-api/cxl/maturity-map.rst
> +++ b/Documentation/driver-api/cxl/maturity-map.rst
> @@ -51,9 +51,9 @@ in place, but there are several corner cases that are pending closure.
>
> * [2] CXL Window Enumeration
>
> - * [0] :ref:`Extended-linear memory-side cache <extended-linear>`
> + * [2] :ref:`Extended-linear memory-side cache <extended-linear>`
> * [0] Low Memory-hole
> - * [0] Hetero-interleave
> + * [X] Hetero-interleave
>
> * [2] Switch Enumeration
>
> @@ -173,7 +173,7 @@ Accelerator
> User Flow Support
> -----------------
>
> -* [0] HPA->DPA Address translation (need xormaps export solution)
> +* [0] Inject & clear poison by HPA
>
> Details
> =======
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2] Documentation: Update the CXL Maturity Map
2025-05-12 21:42 alison.schofield
2025-05-12 22:37 ` Dave Jiang
@ 2025-05-13 22:21 ` Dave Jiang
1 sibling, 0 replies; 5+ messages in thread
From: Dave Jiang @ 2025-05-13 22:21 UTC (permalink / raw)
To: alison.schofield, Davidlohr Bueso, Jonathan Cameron, Vishal Verma,
Ira Weiny, Dan Williams
Cc: linux-cxl
On 5/12/25 2:42 PM, alison.schofield@intel.com wrote:
> From: Alison Schofield <alison.schofield@intel.com>
>
> Changes for extended-linear cache, hetero-interleave, and HPA->DPA
> address translation.
>
> Signed-off-by: Alison Schofield <alison.schofield@intel.com>
Applied to cxl/next
> ---
> Change in v2:
> - Make ELC a '2' (DaveJ)
>
> Documentation/driver-api/cxl/maturity-map.rst | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/driver-api/cxl/maturity-map.rst b/Documentation/driver-api/cxl/maturity-map.rst
> index a2288f9df658..1330f3f52129 100644
> --- a/Documentation/driver-api/cxl/maturity-map.rst
> +++ b/Documentation/driver-api/cxl/maturity-map.rst
> @@ -51,9 +51,9 @@ in place, but there are several corner cases that are pending closure.
>
> * [2] CXL Window Enumeration
>
> - * [0] :ref:`Extended-linear memory-side cache <extended-linear>`
> + * [2] :ref:`Extended-linear memory-side cache <extended-linear>`
> * [0] Low Memory-hole
> - * [0] Hetero-interleave
> + * [X] Hetero-interleave
>
> * [2] Switch Enumeration
>
> @@ -173,7 +173,7 @@ Accelerator
> User Flow Support
> -----------------
>
> -* [0] HPA->DPA Address translation (need xormaps export solution)
> +* [0] Inject & clear poison by HPA
>
> Details
> =======
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v2] Documentation: Update the CXL Maturity Map
@ 2026-04-17 20:12 Alison Schofield
2026-04-17 22:26 ` Dave Jiang
0 siblings, 1 reply; 5+ messages in thread
From: Alison Schofield @ 2026-04-17 20:12 UTC (permalink / raw)
To: Davidlohr Bueso, Jonathan Cameron, Dave Jiang, Alison Schofield,
Vishal Verma, Ira Weiny, Dan Williams
Cc: linux-cxl
Here are a few updates to scores of existing items.
Signed-off-by: Alison Schofield <alison.schofield@intel.com>
---
Changes in v2:
- Update after walkthru w DaveJ
Documentation/driver-api/cxl/maturity-map.rst | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/Documentation/driver-api/cxl/maturity-map.rst b/Documentation/driver-api/cxl/maturity-map.rst
index 282c1102dd81..1ba528c82755 100644
--- a/Documentation/driver-api/cxl/maturity-map.rst
+++ b/Documentation/driver-api/cxl/maturity-map.rst
@@ -52,12 +52,12 @@ in place, but there are several corner cases that are pending closure.
* [2] CXL Window Enumeration
* [2] :ref:`Extended-linear memory-side cache <extended-linear>`
- * [0] Low Memory-hole
+ * [X] Low Memory-hole
* [X] Hetero-interleave
* [2] Switch Enumeration
- * [0] CXL register enumeration link-up dependency
+ * [2] CXL register enumeration link-up dependency
* [2] HDM Decoder Configuration
@@ -78,7 +78,7 @@ in place, but there are several corner cases that are pending closure.
* [2] Hotplug
(see CXL Window Enumeration)
- * [0] Handle Soft Reserved conflicts
+ * [2] Handle Soft Reserved conflicts
* [0] :ref:`RCH link status <rch-link-status>`
* [0] Fabrics / G-FAM (chapter 7)
@@ -95,15 +95,15 @@ mainly caused by the enumeration corner cases above.
* [2] Component events (FFM)
* [1] Endpoint protocol errors (OS)
* [1] Endpoint protocol errors (FFM)
-* [0] Switch protocol errors (OS)
+* [1] Switch protocol errors (OS)
* [1] Switch protocol errors (FFM)
* [2] DPA->HPA Address translation
- * [1] XOR Interleave translation
+ * [2] XOR Interleave translation
(see CXL Window Enumeration)
* [1] Memory Failure coordination
-* [0] Scrub control
+* [1] Scrub control
* [2] ACPI error injection EINJ
* [0] EINJ v2
@@ -112,8 +112,8 @@ mainly caused by the enumeration corner cases above.
* [2] Native error injection
* [3] RCH error handling
* [1] VH error handling
-* [0] PPR
-* [0] Sparing
+* [1] PPR
+* [1] Sparing
* [0] Device built in test
base-commit: 028ef9c96e96197026887c0f092424679298aae8
--
2.37.3
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v2] Documentation: Update the CXL Maturity Map
2026-04-17 20:12 [PATCH v2] Documentation: Update the CXL Maturity Map Alison Schofield
@ 2026-04-17 22:26 ` Dave Jiang
0 siblings, 0 replies; 5+ messages in thread
From: Dave Jiang @ 2026-04-17 22:26 UTC (permalink / raw)
To: Alison Schofield, Davidlohr Bueso, Jonathan Cameron, Vishal Verma,
Ira Weiny, Dan Williams
Cc: linux-cxl
On 4/17/26 1:12 PM, Alison Schofield wrote:
> Here are a few updates to scores of existing items.
>
> Signed-off-by: Alison Schofield <alison.schofield@intel.com>
With the expectation of Terry's protocol error series merged for 7.2.
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
> ---
>
> Changes in v2:
> - Update after walkthru w DaveJ
>
>
> Documentation/driver-api/cxl/maturity-map.rst | 16 ++++++++--------
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/Documentation/driver-api/cxl/maturity-map.rst b/Documentation/driver-api/cxl/maturity-map.rst
> index 282c1102dd81..1ba528c82755 100644
> --- a/Documentation/driver-api/cxl/maturity-map.rst
> +++ b/Documentation/driver-api/cxl/maturity-map.rst
> @@ -52,12 +52,12 @@ in place, but there are several corner cases that are pending closure.
> * [2] CXL Window Enumeration
>
> * [2] :ref:`Extended-linear memory-side cache <extended-linear>`
> - * [0] Low Memory-hole
> + * [X] Low Memory-hole
> * [X] Hetero-interleave
>
> * [2] Switch Enumeration
>
> - * [0] CXL register enumeration link-up dependency
> + * [2] CXL register enumeration link-up dependency
>
> * [2] HDM Decoder Configuration
>
> @@ -78,7 +78,7 @@ in place, but there are several corner cases that are pending closure.
> * [2] Hotplug
> (see CXL Window Enumeration)
>
> - * [0] Handle Soft Reserved conflicts
> + * [2] Handle Soft Reserved conflicts
>
> * [0] :ref:`RCH link status <rch-link-status>`
> * [0] Fabrics / G-FAM (chapter 7)
> @@ -95,15 +95,15 @@ mainly caused by the enumeration corner cases above.
> * [2] Component events (FFM)
> * [1] Endpoint protocol errors (OS)
> * [1] Endpoint protocol errors (FFM)
> -* [0] Switch protocol errors (OS)
> +* [1] Switch protocol errors (OS)
> * [1] Switch protocol errors (FFM)
> * [2] DPA->HPA Address translation
>
> - * [1] XOR Interleave translation
> + * [2] XOR Interleave translation
> (see CXL Window Enumeration)
>
> * [1] Memory Failure coordination
> -* [0] Scrub control
> +* [1] Scrub control
> * [2] ACPI error injection EINJ
>
> * [0] EINJ v2
> @@ -112,8 +112,8 @@ mainly caused by the enumeration corner cases above.
> * [2] Native error injection
> * [3] RCH error handling
> * [1] VH error handling
> -* [0] PPR
> -* [0] Sparing
> +* [1] PPR
> +* [1] Sparing
> * [0] Device built in test
>
>
>
> base-commit: 028ef9c96e96197026887c0f092424679298aae8
^ permalink raw reply [flat|nested] 5+ messages in thread
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