[PATCH 00/15] Add initial CXL.cache support

[Ben Cheatham <Benjamin.Cheatham@amd.com>]

This series adds support for CXL.cache devices to the CXL subsystem. The
set includes the following:
	- Updates to the existing CXL infrastructure to enable adding
	  CXL.cache devices (struct cxl_cachedev) to the driver
	- Support for cache id and snoop filter capabilities
	- IOMMU updates to allow CXL.cache ATS requests
	- Driver for struct cxl_cachedev devices that calls all of the above

The vast majority of the support is gated behind CONFIG_CXL_CACHE since
CXL.cache devices aren't commonplace. This set is untested since I don't
(currently) have access to a CXL.cache-capable device. Using multiple
devices requires cache id capabilties, which may not be available
depending on the platform (for AMD it's Venice or later).

There is a major missing piece in this set: There's no endpoint driver that
adds a cxl_cachedev device, so this code is currently unused. I was
planning on only sending this out once I had a device, but the plans for
the device I was planning to support fell through and I didn't want to
just sit on this.

Another thing that's missing is mapping host memory for CXL.cache use. I
think the DMA API *should* just work after these changes, but it's not
tested. I originally had the CXL core driver set up the DMA range for
the endpoint driver, but it didn't end up making much sense. So, I've
left the implementation for the (eventual) endpoint driver.

Thanks,
Ben

base-commit: cee9395acd8043be0644b25c34bfa86623f2b935 (v7.3-rc1)

Ben Cheatham (15):
  cxl/core: Add CXL.cache device struct
  cxl/cache: Add cxl_cache driver
  cxl/core: Change cxl_ep_load() to use device pointer parameter
  cxl/core: Update devm_cxl_enumerate_ports() for cxl_cachedevs
  cxl/port: Split endpoint port probe on device type
  cxl/core: Update devm_cxl_add_endpoint() for cxl_cachedevs
  cxl/cache: Verify port hierarchy has CXL.cache enabled
  cxl/core, cache: Add Cache ID register probing and init
  cxl/core: Add Cache ID verification
  cxl/core: Add Cache ID allocation
  cxl/core: Add support for HDM-D cache id programming
  cxl/cache: Add snoop filter creation and set up
  cxl/cache: Add snoop filter allocation
  iommu, cxl: Configure IOMMU for CXL.cache
  cxl/cache: Enable CXL.cache on successful probe

 drivers/cxl/Kconfig                 |  14 +
 drivers/cxl/Makefile                |   6 +-
 drivers/cxl/cache.c                 | 285 ++++++++++
 drivers/cxl/core/Makefile           |   2 +
 drivers/cxl/core/cache.c            | 851 ++++++++++++++++++++++++++++
 drivers/cxl/core/cachedev.c         | 131 +++++
 drivers/cxl/core/core.h             |   7 +
 drivers/cxl/core/memdev.c           |   1 +
 drivers/cxl/core/pci.c              |  78 ++-
 drivers/cxl/core/port.c             | 149 +++--
 drivers/cxl/core/region.c           |  24 +-
 drivers/cxl/core/regs.c             |  30 +
 drivers/cxl/cxl.h                   |  74 ++-
 drivers/cxl/cxlcache.h              |  50 ++
 drivers/cxl/cxlmem.h                |   4 +-
 drivers/cxl/mem.c                   |   4 +-
 drivers/cxl/port.c                  |  97 +++-
 drivers/iommu/amd/amd_iommu_types.h |   4 +
 drivers/iommu/amd/init.c            |  14 +
 drivers/iommu/amd/iommu.c           |  56 +-
 drivers/iommu/iommu.c               |  28 +
 include/cxl/cxl.h                   |  78 ++-
 include/linux/iommu.h               |   8 +
 include/uapi/linux/pci_regs.h       |   8 +
 24 files changed, 1911 insertions(+), 92 deletions(-)
 create mode 100644 drivers/cxl/cache.c
 create mode 100644 drivers/cxl/core/cache.c
 create mode 100644 drivers/cxl/core/cachedev.c
 create mode 100644 drivers/cxl/cxlcache.h

-- 
2.53.0