From: <dan.j.williams@intel.com>
To: <dan.j.williams@intel.com>, Dave Jiang <dave.jiang@intel.com>,
<linux-cxl@vger.kernel.org>
Cc: <dave@stgolabs.net>, <jonathan.cameron@huawei.com>,
<alison.schofield@intel.com>, <vishal.l.verma@intel.com>,
<ira.weiny@intel.com>, <dan.j.williams@intel.com>,
Gregory Price <gourry@gourry.net>, Li Ming <ming.li@zohomail.com>,
Jonathan Cameron <Jonathan.Cameron@huawei.com>
Subject: Re: [PATCH v7 01/10] cxl/region: Add decoder check to check_commit_order()
Date: Mon, 21 Jul 2025 15:12:02 -0700 [thread overview]
Message-ID: <687ebb328b153_137e6b1004a@dwillia2-xfh.jf.intel.com.notmuch> (raw)
In-Reply-To: <687ea083ca60e_134cc7100fd@dwillia2-xfh.jf.intel.com.notmuch>
dan.j.williams@ wrote:
> Dave Jiang wrote:
> > check_commit_order() attempts to convert a device to a decoder without
> > making sure the device is a decoder. So far this has been working due
> > to pure luck
>
> s/pure luck/cxl_port_attach_region() only handling switch port decoder
> assignment/
>
> >. Issue discovered while doing deferred dport probing when
> > child ports are now in the midst of decoders due to ordering change
>
> s/midst/mix/?
>
> So I went looking to see if this change actually makes a difference in
> the end, or if this was just the result of debugging an interim state of
> the code that ended up passing non-switch decoders through this path.
>
> The disinction matters for understanding code-flow and history here.
> Like something is wrong if this expectation is violated in some future
> refactoring and may even be worth putting a dev_WARN_ONCE() in this
> path.
>
> In fact I put a dev_WARN_ONCE in this path with all the patches applied
> and it never triggers with a cxl test suite run, so I think it is safe
> to do something like the below.
>
> ...but before going there, can you confirm the expectation that the
> safety is not strictly needed?
Ok, so I finally remembered the previous discussion here and switch
ports have both endpoint-port child devices and decoder child devices.
However, endpoint-ports are always added *after* decoders. That is
enforced by the fact that decoders are added in cxl_switch_port_probe()
and endpoint-ports serialize against that before adding new ports.
The device_for_each_child_reverse_from() staring from a decoder makes
sure to only see decoder children. So check_commit_order() seeing
endpoint ports is a bug not something that should be silently allowed.
next prev parent reply other threads:[~2025-07-21 22:12 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-14 22:35 [PATCH v7 00/10] cxl: Delay HB port and switch dport probing until endpoint dev probe Dave Jiang
2025-07-14 22:35 ` [PATCH v7 01/10] cxl/region: Add decoder check to check_commit_order() Dave Jiang
2025-07-21 11:33 ` Robert Richter
2025-07-21 20:18 ` dan.j.williams
2025-07-21 22:12 ` dan.j.williams [this message]
2025-07-21 23:18 ` Dave Jiang
2025-07-14 22:35 ` [PATCH v7 02/10] cxl: Add helper to detect top of CXL device topology Dave Jiang
2025-07-16 1:58 ` Alison Schofield
2025-07-21 20:23 ` dan.j.williams
2025-07-14 22:35 ` [PATCH v7 03/10] cxl: Add helper to reap dport Dave Jiang
2025-07-16 1:59 ` Alison Schofield
2025-07-21 20:24 ` dan.j.williams
2025-07-14 22:35 ` [PATCH v7 04/10] cxl: Defer dport allocation for switch ports Dave Jiang
2025-07-15 1:38 ` Li Ming
2025-07-16 2:00 ` Alison Schofield
2025-07-21 23:14 ` Robert Richter
2025-07-22 15:47 ` Dave Jiang
2025-07-22 15:50 ` dan.j.williams
2025-08-12 18:11 ` Dave Jiang
2025-07-14 22:35 ` [PATCH v7 05/10] cxl/test: Add cxl_test support for cxl_port_update_total_ports() Dave Jiang
2025-07-16 2:03 ` Alison Schofield
2025-07-22 16:24 ` dan.j.williams
2025-07-14 22:35 ` [PATCH v7 06/10] cxl/test: Add mock version of devm_cxl_add_dport_by_dev() Dave Jiang
2025-07-16 2:04 ` Alison Schofield
2025-07-22 17:06 ` dan.j.williams
2025-07-14 22:35 ` [PATCH v7 07/10] cxl: Change sslbis handler to only handle single dport Dave Jiang
2025-07-16 2:05 ` Alison Schofield
2025-07-21 23:18 ` Robert Richter
2025-07-21 23:25 ` Dave Jiang
2025-07-22 17:12 ` dan.j.williams
2025-07-14 22:35 ` [PATCH v7 08/10] cxl: Create an xarray to tie a host bridge to the cxl_root Dave Jiang
2025-07-16 2:06 ` Alison Schofield
2025-07-14 22:35 ` [PATCH v7 09/10] cxl: Move enumeration of hostbridge ports to the memdev probe path Dave Jiang
2025-07-16 2:07 ` Alison Schofield
2025-07-22 18:31 ` dan.j.williams
2025-07-22 19:07 ` Dave Jiang
2025-07-22 19:28 ` dan.j.williams
2025-07-14 22:35 ` [PATCH v7 10/10] cxl: Remove devm_cxl_port_enumerate_dports() that is no longer used Dave Jiang
2025-07-16 2:09 ` Alison Schofield
2025-07-22 18:32 ` dan.j.williams
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