From: Dave Jiang <dave.jiang@intel.com>
To: Dan Williams <dan.j.williams@intel.com>, <linux-cxl@vger.kernel.org>
Subject: Re: [PATCH v2 10/12] cxl/pci: Unconditionally unmask 256B Flit errors
Date: Thu, 15 Jun 2023 14:34:00 -0700 [thread overview]
Message-ID: <8daadc47-115f-79a9-a18a-a72e6f06b7ed@intel.com> (raw)
In-Reply-To: <168679263124.3436160.6228910132469454346.stgit@dwillia2-xfh.jf.intel.com>
On 6/14/23 18:30, Dan Williams wrote:
> The current check for 256B Flit mode is incomplete and unnecessary. It
> is incomplete because it fails to consider the link speed, or check for
> CXL link capabilities. It is unnecessary because unconditionally
> unmasking 256B Flit errors is a nop when 256B Flit operation is not
> available.
>
> Remove this check in preparation for creating a cxl_probe_link() helper
> to centralize this detection.
>
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
> ---
> drivers/cxl/pci.c | 18 ++----------------
> 1 file changed, 2 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c
> index 4e2845b7331a..3f78082014cc 100644
> --- a/drivers/cxl/pci.c
> +++ b/drivers/cxl/pci.c
> @@ -368,19 +368,6 @@ static bool is_cxl_restricted(struct pci_dev *pdev)
> return pci_pcie_type(pdev) == PCI_EXP_TYPE_RC_END;
> }
>
> -/*
> - * CXL v3.0 6.2.3 Table 6-4
> - * The table indicates that if PCIe Flit Mode is set, then CXL is in 256B flits
> - * mode, otherwise it's 68B flits mode.
> - */
> -static bool cxl_pci_flit_256(struct pci_dev *pdev)
> -{
> - u16 lnksta2;
> -
> - pcie_capability_read_word(pdev, PCI_EXP_LNKSTA2, &lnksta2);
> - return lnksta2 & PCI_EXP_LNKSTA2_FLIT;
> -}
> -
> static int cxl_pci_ras_unmask(struct pci_dev *pdev)
> {
> struct pci_host_bridge *host_bridge = pci_find_host_bridge(pdev->bus);
> @@ -407,9 +394,8 @@ static int cxl_pci_ras_unmask(struct pci_dev *pdev)
> addr = cxlds->regs.ras + CXL_RAS_UNCORRECTABLE_MASK_OFFSET;
> orig_val = readl(addr);
>
> - mask = CXL_RAS_UNCORRECTABLE_MASK_MASK;
> - if (!cxl_pci_flit_256(pdev))
> - mask &= ~CXL_RAS_UNCORRECTABLE_MASK_F256B_MASK;
> + mask = CXL_RAS_UNCORRECTABLE_MASK_MASK |
> + CXL_RAS_UNCORRECTABLE_MASK_F256B_MASK;
> val = orig_val & ~mask;
> writel(val, addr);
> dev_dbg(&pdev->dev,
>
next prev parent reply other threads:[~2023-06-15 21:34 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-15 1:29 [PATCH v2 00/12] Device memory prep Dan Williams
2023-06-15 1:29 ` [PATCH v2 01/12] cxl/regs: Clarify when a 'struct cxl_register_map' is input vs output Dan Williams
2023-06-15 1:29 ` [PATCH v2 02/12] tools/testing/cxl: Remove unused @cxlds argument Dan Williams
2023-06-15 1:29 ` [PATCH v2 03/12] cxl: Fix kernel-doc warnings Dan Williams
2023-06-15 21:28 ` Dave Jiang
2023-06-22 13:50 ` Jonathan Cameron
2023-06-15 1:29 ` [PATCH v2 04/12] cxl: Remove leftover attribute documentation in 'struct cxl_dev_state' Dan Williams
2023-06-15 21:29 ` Dave Jiang
2023-06-22 13:50 ` Jonathan Cameron
2023-06-15 1:30 ` [PATCH v2 05/12] cxl/mbox: Move mailbox related driver state to its own data structure Dan Williams
2023-06-15 1:30 ` [PATCH v2 06/12] cxl/memdev: Make mailbox functionality optional Dan Williams
2023-06-15 21:30 ` Dave Jiang
2023-06-22 13:52 ` Jonathan Cameron
2023-06-15 1:30 ` [PATCH v2 07/12] cxl/port: Rename CXL_DECODER_{EXPANDER, ACCELERATOR} => {HOSTONLYMEM, DEVMEM} Dan Williams
2023-06-15 21:31 ` Dave Jiang
2023-06-15 1:30 ` [PATCH v2 08/12] cxl/hdm: Default CXL_DEVTYPE_DEVMEM decoders to CXL_DECODER_DEVMEM Dan Williams
2023-06-15 21:32 ` Dave Jiang
2023-06-15 1:30 ` [PATCH v2 09/12] cxl/region: Manage decoder target_type at decoder-attach time Dan Williams
2023-06-15 1:30 ` [PATCH v2 10/12] cxl/pci: Unconditionally unmask 256B Flit errors Dan Williams
2023-06-15 21:34 ` Dave Jiang [this message]
2023-06-22 13:55 ` Jonathan Cameron
2023-06-15 1:30 ` [PATCH v2 11/12] cxl/port: Enumerate cxl link capabilities Dan Williams
2023-06-15 21:37 ` Dave Jiang
2023-06-16 0:07 ` Dan Williams
2023-06-16 19:16 ` Dan Williams
2023-06-22 14:04 ` Jonathan Cameron
2023-06-15 1:30 ` [PATCH v2 12/12] cxl/memdev: Formalize endpoint port linkage Dan Williams
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