From: Jia Wang <wangjia@ultrarisc.com>
To: Conor Dooley <conor@kernel.org>
Cc: Linus Walleij <linusw@kernel.org>,
wangjia@ultrarisc.com, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Bartosz Golaszewski <brgl@kernel.org>,
Samuel Holland <samuel.holland@sifive.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@sifive.com>,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org
Subject: Re: [PATCH 6/9] pinctrl: ultrarisc: Add UltraRISC DP1000 pinctrl driver
Date: Thu, 28 May 2026 15:46:25 +0800 [thread overview]
Message-ID: <177995438556.929162.1470247666821673655.b4-reply@b4> (raw)
In-Reply-To: <20260525-turbojet-theorize-3a7b49f41af0@spud>
On 2026-05-25 11:10 +0100, Conor Dooley wrote:
> On Mon, May 25, 2026 at 11:28:51AM +0200, Linus Walleij wrote:
> > On Fri, May 15, 2026 at 3:18 AM Jia Wang via B4 Relay
> > <devnull+wangjia.ultrarisc.com@kernel.org> wrote:
>
> > > +static int ur_legacy_parse_prop(struct pinctrl_dev *pctldev,
> > > + struct device_node *np,
> > > + const char *propname,
> > > + struct ur_legacy_prop_data *prop)
> > > +static const char *ur_legacy_get_function_name(const struct ur_pinctrl_match_data *match_data,
> > > + u32 mode)
> > > +static int ur_legacy_conf_to_configs(struct pinctrl_dev *pctldev, u32 conf,
> > > + unsigned long **configs,
> > > + unsigned int *num_configs)
> > > +static int ur_legacy_add_pinconf_maps(struct pinctrl_dev *pctldev,
> > > + struct pinctrl_map **map,
> > > + unsigned int *reserved_maps,
> > > + unsigned int *num_maps,
> > > + const struct ur_legacy_prop_data *prop)
> > > +static int ur_legacy_dt_node_to_map(struct pinctrl_dev *pctldev,
> > > + struct device_node *np,
> > > + struct pinctrl_map **map,
> > > + unsigned int *num_maps)
> >
> > What's up with all this legacy stuff?
> >
> > What is this a legacy of?
> >
> > I thought this was a *new* driver so how can it be "legacy"?
>
> Jia already agreed to drop this stuff :)
>
> >
> > > +static int ur_generic_dt_node_to_map(struct pinctrl_dev *pctldev,
> > > + struct device_node *np_config,
> > > + struct pinctrl_map **map,
> > > + unsigned int *num_maps)
> > > +{
> > > + return pinconf_generic_dt_node_to_map(pctldev, np_config, map, num_maps,
> > > + PIN_MAP_TYPE_INVALID);
> > > +}
> >
> > Hm I think Conor has new helpers for this so you don't need to wrap
> > it like this.
>
> Yeah, although "more importantly" the new helpers mean that drivers
> shouldn't need to do things like calling these home-rolled functions in
> probe, just so that they can try to use pinconf_generic_dt_node_to_map():
> | static int ur_add_pin_groups(struct ur_pinctrl *pctldata)
> | {
> | for (u32 i = 0; i < pctldata->match_data->npins; i++) {
> | int ret;
> |
> | pctldata->group_names[i] = pctldata->match_data->pins[i].name;
> | pctldata->group_pins[i] = pctldata->match_data->pins[i].number;
> |
> | ret = pinctrl_generic_add_group(pctldata->pctl_dev, pctldata->group_names[i],
> | &pctldata->group_pins[i], 1, NULL);
> | if (ret < 0)
> | return dev_err_probe(pctldata->dev, ret,
> | "failed to add pin group %s\n",
> | pctldata->group_names[i]);
> | }
> |
> | return 0;
> | }
> |
> | static int ur_add_functions(struct ur_pinctrl *pctldata)
> | {
> | for (u32 i = 0; i < pctldata->match_data->num_functions; i++) {
> | const struct ur_function_desc *desc = &pctldata->match_data->functions[i];
> | struct pinfunction func = desc->gpio ?
> | PINCTRL_GPIO_PINFUNCTION(desc->name, pctldata->group_names,
> | pctldata->match_data->npins) :
> | PINCTRL_PINFUNCTION(desc->name, pctldata->group_names,
> | pctldata->match_data->npins);
> | int ret;
> |
> | ret = pinmux_generic_add_pinfunction(pctldata->pctl_dev, &func, (void *)desc);
> | if (ret < 0)
> | return dev_err_probe(pctldata->dev, ret,
> | "failed to add function %s\n",
> | desc->name);
> | }
> |
> | return 0;
> | }
> (If I had more time, I would probably go looking to see if there are
> more candidates for conversion)
>
> Jia, the helper in question is pinctrl_generic_pins_functions_dt_node_to_map().
>
I found pinctrl_generic_pins_function_dt_node_to_map() in mainline, but
there is no pinctrl_generic_pins_functions_dt_node_to_map() as mentioned.
Did you mean the singular version, and is that the one I should use?
> Cheers,
> Conor.
>
> Also worth pointing out that this driver has match data but only one
> supported device:
> +static const struct of_device_id ur_pinctrl_of_match[] = {
> + { .compatible = "ultrarisc,dp1000-pinctrl", .data = &ur_dp1000_match_data, },
> + { }
> +};
> +MODULE_DEVICE_TABLE(of, ur_pinctrl_of_match);
>
Ack, I'll remove the match data since there's only one compatible for now.
Best regards,
Jia Wang
next prev parent reply other threads:[~2026-05-28 7:46 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-15 1:17 [PATCH 0/9] riscv: ultrarisc: add DP1000 SoC DT and pinctrl support Jia Wang via B4 Relay
2026-05-15 1:17 ` [PATCH 1/9] dt-bindings: vendor-prefixes: add Rongda Jia Wang via B4 Relay
2026-05-15 1:20 ` sashiko-bot
2026-05-15 1:25 ` Jia Wang
2026-05-21 20:51 ` Krzysztof Kozlowski
2026-05-26 7:12 ` Jia Wang
2026-05-15 1:17 ` [PATCH 2/9] dt-bindings: riscv: cpus: Add UltraRISC CP100 compatible Jia Wang via B4 Relay
2026-05-15 10:06 ` Conor Dooley
2026-05-15 1:17 ` [PATCH 3/9] dt-bindings: riscv: Add UltraRISC DP1000 bindings Jia Wang via B4 Relay
2026-05-15 10:08 ` Conor Dooley
2026-05-18 3:06 ` Jia Wang
2026-05-15 1:18 ` [PATCH 4/9] dt-bindings: pinctrl: Add UltraRISC DP1000 pinctrl bindings Jia Wang via B4 Relay
2026-05-15 1:49 ` sashiko-bot
2026-05-15 8:43 ` Jia Wang
2026-05-15 10:12 ` Conor Dooley
2026-05-18 6:03 ` Jia Wang
2026-05-21 20:56 ` Krzysztof Kozlowski
2026-05-27 1:34 ` Jia Wang
2026-05-25 9:23 ` Linus Walleij
2026-05-27 1:37 ` Jia Wang
2026-05-15 1:18 ` [PATCH 5/9] riscv: dts: ultrarisc: Add initial device tree for UltraRISC DP1000 Jia Wang via B4 Relay
2026-05-15 2:02 ` sashiko-bot
2026-05-19 6:55 ` Jia Wang
2026-05-15 10:26 ` Conor Dooley
2026-05-20 2:51 ` Jia Wang
2026-05-21 21:05 ` Krzysztof Kozlowski
2026-05-27 7:04 ` Jia Wang
2026-05-15 1:18 ` [PATCH 6/9] pinctrl: ultrarisc: Add UltraRISC DP1000 pinctrl driver Jia Wang via B4 Relay
2026-05-15 2:28 ` sashiko-bot
2026-05-20 7:15 ` Jia Wang
2026-05-21 21:09 ` Krzysztof Kozlowski
2026-05-27 7:07 ` Jia Wang
2026-05-25 9:28 ` Linus Walleij
2026-05-25 10:10 ` Conor Dooley
2026-05-28 7:46 ` Jia Wang [this message]
2026-05-28 8:55 ` Conor Dooley
2026-05-29 5:43 ` Jia Wang
2026-05-27 7:28 ` Jia Wang
2026-05-15 1:18 ` [PATCH 7/9] riscv: dts: ultrarisc: add Rongda M0 board device tree Jia Wang via B4 Relay
2026-05-15 2:37 ` sashiko-bot
2026-05-20 8:26 ` Jia Wang
2026-05-15 10:28 ` Conor Dooley
2026-05-20 8:40 ` Jia Wang
2026-05-21 20:59 ` Krzysztof Kozlowski
2026-05-28 8:02 ` Jia Wang
2026-05-15 1:18 ` [PATCH 8/9] riscv: dts: ultrarisc: add Milk-V Titan " Jia Wang via B4 Relay
2026-05-15 2:50 ` sashiko-bot
2026-05-20 9:39 ` Jia Wang
2026-05-15 1:18 ` [PATCH 9/9] riscv: defconfig: enable ARCH_ULTRARISC Jia Wang via B4 Relay
2026-05-15 2:59 ` sashiko-bot
2026-05-20 9:49 ` Jia Wang
2026-05-21 20:57 ` Krzysztof Kozlowski
2026-05-28 8:05 ` Jia Wang
2026-07-08 17:38 ` Paul Walmsley
2026-05-15 10:05 ` [PATCH 0/9] riscv: ultrarisc: add DP1000 SoC DT and pinctrl support Conor Dooley
2026-05-21 9:52 ` Jia Wang
2026-05-21 10:23 ` Conor Dooley
2026-05-22 1:41 ` Jia Wang
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