From: kernel test robot <lkp@intel.com>
To: Samuel Holland <samuel.holland@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
linux-riscv@lists.infradead.org, Conor Dooley <conor@kernel.org>
Cc: llvm@lists.linux.dev, oe-kbuild-all@lists.linux.dev,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Alexandre Ghiti <alexghiti@rivosinc.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
Emil Renner Berthing <kernel@esmil.dk>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzk@kernel.org>,
Samuel Holland <samuel.holland@sifive.com>
Subject: Re: [PATCH 10/11] riscv: mm: Use physical memory aliases to apply PMAs
Date: Sat, 2 Nov 2024 23:28:33 +0800 [thread overview]
Message-ID: <202411022337.JHozQieV-lkp@intel.com> (raw)
In-Reply-To: <20241102000843.1301099-11-samuel.holland@sifive.com>
Hi Samuel,
kernel test robot noticed the following build errors:
[auto build test ERROR on robh/for-next]
[also build test ERROR on linus/master v6.12-rc5 next-20241101]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Samuel-Holland/dt-bindings-riscv-Describe-physical-memory-regions/20241102-081311
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
patch link: https://lore.kernel.org/r/20241102000843.1301099-11-samuel.holland%40sifive.com
patch subject: [PATCH 10/11] riscv: mm: Use physical memory aliases to apply PMAs
config: riscv-defconfig (https://download.01.org/0day-ci/archive/20241102/202411022337.JHozQieV-lkp@intel.com/config)
compiler: clang version 20.0.0git (https://github.com/llvm/llvm-project 639a7ac648f1e50ccd2556e17d401c04f9cce625)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241102/202411022337.JHozQieV-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202411022337.JHozQieV-lkp@intel.com/
All errors (new ones prefixed by >>, old ones prefixed by <<):
>> ERROR: modpost: "riscv_fixup_memory_alias" [arch/riscv/kvm/kvm.ko] undefined!
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
next prev parent reply other threads:[~2024-11-02 15:28 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-02 0:07 [PATCH 00/11] riscv: Memory type control for platforms with physical memory aliases Samuel Holland
2024-11-02 0:07 ` [PATCH 01/11] dt-bindings: riscv: Describe physical memory regions Samuel Holland
2024-11-02 1:31 ` Rob Herring (Arm)
2024-11-02 0:07 ` [PATCH 02/11] riscv: mm: Increment PFN in place when splitting mappings Samuel Holland
2024-11-05 10:25 ` Alexandre Ghiti
2024-11-02 0:07 ` [PATCH 03/11] riscv: mm: Deduplicate pgtable address conversion functions Samuel Holland
2024-11-05 9:58 ` Alexandre Ghiti
2024-11-02 0:07 ` [PATCH 04/11] riscv: mm: Deduplicate _PAGE_CHG_MASK definition Samuel Holland
2024-11-05 10:00 ` Alexandre Ghiti
2024-11-02 0:07 ` [PATCH 05/11] riscv: ptdump: Only show N and MT bits when enabled in the kernel Samuel Holland
2024-11-05 10:06 ` Alexandre Ghiti
2024-11-02 0:08 ` [PATCH 06/11] riscv: mm: Fix up memory types when writing page tables Samuel Holland
2024-11-05 11:03 ` Alexandre Ghiti
2025-10-09 2:12 ` Samuel Holland
2024-11-02 0:08 ` [PATCH 07/11] riscv: mm: Expose all page table bits to assembly code Samuel Holland
2024-11-02 0:08 ` [PATCH 08/11] riscv: alternative: Add an ALTERNATIVE_3 macro Samuel Holland
2024-11-15 13:05 ` Andrew Jones
2024-11-02 0:08 ` [PATCH 09/11] riscv: alternative: Allow calls with alternate link registers Samuel Holland
2024-11-02 0:08 ` [PATCH 10/11] riscv: mm: Use physical memory aliases to apply PMAs Samuel Holland
2024-11-02 15:28 ` kernel test robot [this message]
2024-11-05 13:21 ` Emil Renner Berthing
2024-11-02 0:08 ` [PATCH 11/11] riscv: dts: starfive: jh7100: Use physical memory ranges for DMA Samuel Holland
2024-11-04 15:26 ` Emil Renner Berthing
2025-09-22 23:55 ` [PATCH 00/11] riscv: Memory type control for platforms with physical memory aliases Bo Gan
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