[PATCH v4 00/12] iio: dac: ad5446: Refactor and add support for AD5542

[PATCH v4 00/12] iio: dac: ad5446: Refactor and add support for AD5542

[Nuno Sá via B4 Relay]

Alright, what was suposed to be a simple one liner patch ended up being
a full refactor (modernization) of the whole thing :). I think the
changes are anyways fairly simple so hopefully nothing was broken.

I'm also aware of the checkpatch failure in Patch 7 ("iio: dac: ad5446:
Separate I2C/SPI into different drivers") but I'm really not seeing the
added value of adding the kconfig help text to the core symbol. 

---
Changes in v4:
- Patch 3
  * New patch
- Patch 6
  * Include err.h and asm/byteorder;
  * Changed Module description as suggested by Jonathan;
- Patch 8
  * New patch
- Link to v3: https://lore.kernel.org/r/20251031-dev-add-ad5542-v3-0-d3541036c0e6@analog.com

---
Michael Hennerich (1):
      iio: dac: ad5446: Add AD5542 to the spi id table

Nuno Sá (11):
      dt-bindings: iio: dac: Document AD5446 and similar devices
      iio: dac: ad5446: Use DMA safe buffer for transfers
      iio: dac: ad5446: Drop duplicated spi_id entry
      iio: dac: ad5446: Don't ignore missing regulator
      iio: dac: ad5446: Move to single chip_info structures
      iio: dac: ad5456: Add missing DT compatibles
      iio: dac: ad5446: Separate I2C/SPI into different drivers
      iio: dac: ad5446: Make use of devm_mutex_init()
      iio: dac: ad5446: Make use of the cleanup helpers
      iio: dac: ad5446: Refactor header inclusion
      iio: dac: ad5446: Fix coding style issues

 .../devicetree/bindings/iio/dac/adi,ad5446.yaml    | 138 ++++++
 MAINTAINERS                                        |  12 +
 drivers/iio/dac/Kconfig                            |  31 +-
 drivers/iio/dac/Makefile                           |   2 +
 drivers/iio/dac/ad5446-i2c.c                       | 102 +++++
 drivers/iio/dac/ad5446-spi.c                       | 252 ++++++++++
 drivers/iio/dac/ad5446.c                           | 506 +++------------------
 drivers/iio/dac/ad5446.h                           |  76 ++++
 8 files changed, 664 insertions(+), 455 deletions(-)
---
base-commit: 4b17a60d1e1c2d9d2ccbd58642f6f4ac2fa364ba
change-id: 20251014-dev-add-ad5542-8c8934de80ee
--

Thanks!
- Nuno Sá

[PATCH v4 01/12] dt-bindings: iio: dac: Document AD5446 and similar devices

[Nuno Sá via B4 Relay]

From: Nuno Sá <nuno.sa@analog.com>

Add device tree binding documentation for the Analog Devices AD5446
family of Digital-to-Analog Converters and derivative devices from
Texas Instruments. There's both SPI and I2C interfaces and feature
resolutions ranging from 8-bit to 16-bit.

The binding covers 29 derivatives devices including the AD5446 series,
AD5600 series, AD5620/5640/5660 variants with different voltage ranges,
and TI DAC081s101/DAC101s101/DAC121s101 devices.

Signed-off-by: Nuno Sá <nuno.sa@analog.com>
---
 .../devicetree/bindings/iio/dac/adi,ad5446.yaml    | 138 +++++++++++++++++++++
 MAINTAINERS                                        |   8 ++
 2 files changed, 146 insertions(+)

diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad5446.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad5446.yaml
new file mode 100644
index 000000000000..2669d2c4948b
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/dac/adi,ad5446.yaml
@@ -0,0 +1,138 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/dac/adi,ad5446.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Analog Devices AD5446 and similar DACs
+
+maintainers:
+  - Michael Hennerich <michael.hennerich@analog.com>
+  - Nuno Sá <nuno.sa@analog.com>
+
+description:
+  Digital to Analog Converter devices supporting both SPI and I2C interfaces.
+  These devices feature a range of resolutions from 8-bit to 16-bit.
+
+properties:
+  compatible:
+    oneOf:
+      - description: SPI DACs
+        enum:
+          - adi,ad5300
+          - adi,ad5310
+          - adi,ad5320
+          - adi,ad5444
+          - adi,ad5446
+          - adi,ad5450
+          - adi,ad5451
+          - adi,ad5452
+          - adi,ad5453
+          - adi,ad5512a
+          - adi,ad5541a
+          - adi,ad5542
+          - adi,ad5542a
+          - adi,ad5543
+          - adi,ad5553
+          - adi,ad5600
+          - adi,ad5601
+          - adi,ad5611
+          - adi,ad5621
+          - adi,ad5641
+          - adi,ad5620-2500
+          - adi,ad5620-1250
+          - adi,ad5640-2500
+          - adi,ad5640-1250
+          - adi,ad5660-2500
+          - adi,ad5660-1250
+          - adi,ad5662
+          - ti,dac081s101
+          - ti,dac101s101
+          - ti,dac121s101
+      - description: I2C DACs
+        enum:
+          - adi,ad5301
+          - adi,ad5311
+          - adi,ad5321
+          - adi,ad5602
+          - adi,ad5612
+          - adi,ad5622
+
+  reg:
+    maxItems: 1
+
+  vcc-supply:
+    description:
+      Reference voltage supply. If not supplied, devices with internal
+      voltage reference will use that.
+
+required:
+  - compatible
+  - reg
+
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - adi,ad5300
+              - adi,ad5310
+              - adi,ad5320
+              - adi,ad5444
+              - adi,ad5446
+              - adi,ad5450
+              - adi,ad5451
+              - adi,ad5452
+              - adi,ad5453
+              - adi,ad5512a
+              - adi,ad5541a
+              - adi,ad5542
+              - adi,ad5542a
+              - adi,ad5543
+              - adi,ad5553
+              - adi,ad5600
+              - adi,ad5601
+              - adi,ad5611
+              - adi,ad5621
+              - adi,ad5641
+              - adi,ad5620-2500
+              - adi,ad5620-1250
+              - adi,ad5640-2500
+              - adi,ad5640-1250
+              - adi,ad5660-2500
+              - adi,ad5660-1250
+              - adi,ad5662
+              - ti,dac081s101
+              - ti,dac101s101
+              - ti,dac121s101
+    then:
+      allOf:
+        - $ref: /schemas/spi/spi-peripheral-props.yaml#
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    spi {
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        dac@0 {
+            compatible = "adi,ad5446";
+            reg = <0>;
+            vcc-supply = <&dac_vref>;
+        };
+    };
+  - |
+    i2c {
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        dac@42 {
+            compatible = "adi,ad5622";
+            reg = <0x42>;
+            vcc-supply = <&dac_vref>;
+        };
+    };
+...
diff --git a/MAINTAINERS b/MAINTAINERS
index 8082081ea742..9654f0c25423 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -440,6 +440,14 @@ W:	http://wiki.analog.com/AD5398
 W:	https://ez.analog.com/linux-software-drivers
 F:	drivers/regulator/ad5398.c
 
+AD5446	ANALOG DEVICES INC AD5446 DAC DRIVER
+M:	Michael Hennerich <michael.hennerich@analog.com>
+M:	Nuno Sá <nuno.sa@analog.com>
+L:	linux-iio@vger.kernel.org
+S:	Supported
+W:	https://ez.analog.com/linux-software-drivers
+F:	Documentation/devicetree/bindings/iio/dac/adi,ad5446.yaml
+
 AD714X CAPACITANCE TOUCH SENSOR DRIVER (AD7142/3/7/8/7A)
 M:	Michael Hennerich <michael.hennerich@analog.com>
 S:	Supported

-- 
2.51.0

Re: [PATCH v5 6/7] dt-bindings: clock: rockchip: Add RK3506 clock and reset unit

[Conor Dooley]

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Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable

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Re: [PATCH v5 6/7] dt-bindings: clock: rockchip: Add RK3506 clock and reset unit

[Jonathan Cameron]

On Tue, 4 Nov 2025 17:51:25 +0000
Conor Dooley <conor@kernel.org> wrote:

> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> pw-bot: not-applicable

Hi Conor,

Strange email subject given you replied to:

20251104-dev-add-ad5542-v4-1-6fe35458bf8c@analog.com

I'll assume intent was to Ack that.

Re: [PATCH v5 6/7] dt-bindings: clock: rockchip: Add RK3506 clock and reset unit

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 563 bytes --]

On Sun, Nov 09, 2025 at 03:57:57PM +0000, Jonathan Cameron wrote:
> On Tue, 4 Nov 2025 17:51:25 +0000
> Conor Dooley <conor@kernel.org> wrote:
> 
> > Acked-by: Conor Dooley <conor.dooley@microchip.com>
> > pw-bot: not-applicable
> 
> Hi Conor,
> 
> Strange email subject given you replied to:
> 
> 20251104-dev-add-ad5542-v4-1-6fe35458bf8c@analog.com
> 
> I'll assume intent was to Ack that.

Bug in mutt I believe, not the first time it has happened recently.
The rockchip patch did not get an ack from me, so this is where it was
meant to go.

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Re: [PATCH v4 01/12] dt-bindings: iio: dac: Document AD5446 and similar devices

[Jonathan Cameron]

On Tue, 04 Nov 2025 15:35:06 +0000
Nuno Sá via B4 Relay <devnull+nuno.sa.analog.com@kernel.org> wrote:

> From: Nuno Sá <nuno.sa@analog.com>
> 
> Add device tree binding documentation for the Analog Devices AD5446
> family of Digital-to-Analog Converters and derivative devices from
> Texas Instruments. There's both SPI and I2C interfaces and feature
> resolutions ranging from 8-bit to 16-bit.
> 
> The binding covers 29 derivatives devices including the AD5446 series,
> AD5600 series, AD5620/5640/5660 variants with different voltage ranges,
> and TI DAC081s101/DAC101s101/DAC121s101 devices.
> 
> Signed-off-by: Nuno Sá <nuno.sa@analog.com>
> ---
Applied.

[PATCH v4 02/12] iio: dac: ad5446: Use DMA safe buffer for transfers

[Nuno Sá via B4 Relay]

From: Nuno Sá <nuno.sa@analog.com>

Make sure to use DMA safe buffer. While for i2c we could be fine without
them, we need it for spi anyways.

As we now have DMA safe buffers, use i2c_master_send_dmasafe().

Signed-off-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/dac/ad5446.c | 19 +++++++++++--------
 1 file changed, 11 insertions(+), 8 deletions(-)

diff --git a/drivers/iio/dac/ad5446.c b/drivers/iio/dac/ad5446.c
index ad304b0fec08..de5e4e0e397e 100644
--- a/drivers/iio/dac/ad5446.c
+++ b/drivers/iio/dac/ad5446.c
@@ -47,6 +47,10 @@ struct ad5446_state {
 	unsigned			pwr_down_mode;
 	unsigned			pwr_down;
 	struct mutex			lock;
+	union {
+		__be16 d16;
+		u8 d24[3];
+	} __aligned(IIO_DMA_MINALIGN);
 };
 
 /**
@@ -265,19 +269,18 @@ static int ad5446_probe(struct device *dev, const char *name,
 static int ad5446_write(struct ad5446_state *st, unsigned val)
 {
 	struct spi_device *spi = to_spi_device(st->dev);
-	__be16 data = cpu_to_be16(val);
+	st->d16 = cpu_to_be16(val);
 
-	return spi_write(spi, &data, sizeof(data));
+	return spi_write(spi, &st->d16, sizeof(st->d16));
 }
 
 static int ad5660_write(struct ad5446_state *st, unsigned val)
 {
 	struct spi_device *spi = to_spi_device(st->dev);
-	uint8_t data[3];
 
-	put_unaligned_be24(val, &data[0]);
+	put_unaligned_be24(val, &st->d24[0]);
 
-	return spi_write(spi, data, sizeof(data));
+	return spi_write(spi, st->d24, sizeof(st->d24));
 }
 
 /*
@@ -489,13 +492,13 @@ static inline void ad5446_spi_unregister_driver(void) { }
 static int ad5622_write(struct ad5446_state *st, unsigned val)
 {
 	struct i2c_client *client = to_i2c_client(st->dev);
-	__be16 data = cpu_to_be16(val);
+	st->d16 = cpu_to_be16(val);
 	int ret;
 
-	ret = i2c_master_send(client, (char *)&data, sizeof(data));
+	ret = i2c_master_send_dmasafe(client, (char *)&st->d16, sizeof(st->d16));
 	if (ret < 0)
 		return ret;
-	if (ret != sizeof(data))
+	if (ret != sizeof(st->d16))
 		return -EIO;
 
 	return 0;

-- 
2.51.0

Re: [PATCH v4 02/12] iio: dac: ad5446: Use DMA safe buffer for transfers

[Andy Shevchenko]

On Tue, Nov 04, 2025 at 03:35:07PM +0000, Nuno Sá via B4 Relay wrote:
> 
> Make sure to use DMA safe buffer. While for i2c we could be fine without
> them, we need it for spi anyways.
> 
> As we now have DMA safe buffers, use i2c_master_send_dmasafe().

...

> -	put_unaligned_be24(val, &data[0]);
> +	put_unaligned_be24(val, &st->d24[0]);

Now this &...[0] are redundant as you defined (by name) that the variable is to
be used as 24-bit one, i.o.w. as a whole.

	put_unaligned_be24(val, st->d24);

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v4 02/12] iio: dac: ad5446: Use DMA safe buffer for transfers

[Jonathan Cameron]

On Tue, 4 Nov 2025 19:10:41 +0200
Andy Shevchenko <andriy.shevchenko@intel.com> wrote:

> On Tue, Nov 04, 2025 at 03:35:07PM +0000, Nuno Sá via B4 Relay wrote:
> > 
> > Make sure to use DMA safe buffer. While for i2c we could be fine without
> > them, we need it for spi anyways.
> > 
> > As we now have DMA safe buffers, use i2c_master_send_dmasafe().  
> 
> ...
> 
> > -	put_unaligned_be24(val, &data[0]);
> > +	put_unaligned_be24(val, &st->d24[0]);  
> 
> Now this &...[0] are redundant as you defined (by name) that the variable is to
> be used as 24-bit one, i.o.w. as a whole.
> 
> 	put_unaligned_be24(val, st->d24);
> 

Tweaked and add docs for be16 and be24 given rest of the structure has docs.

J

[PATCH v4 03/12] iio: dac: ad5446: Drop duplicated spi_id entry

[Nuno Sá via B4 Relay]

From: Nuno Sá <nuno.sa@analog.com>

AD5600 and AD5541A are compatible so there's no need to have a dedicated
entry for ID_AD5600.

Signed-off-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/dac/ad5446.c | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/drivers/iio/dac/ad5446.c b/drivers/iio/dac/ad5446.c
index de5e4e0e397e..c0a38f642451 100644
--- a/drivers/iio/dac/ad5446.c
+++ b/drivers/iio/dac/ad5446.c
@@ -301,7 +301,6 @@ enum ad5446_supported_spi_device_ids {
 	ID_AD5541A,
 	ID_AD5512A,
 	ID_AD5553,
-	ID_AD5600,
 	ID_AD5601,
 	ID_AD5611,
 	ID_AD5621,
@@ -356,10 +355,6 @@ static const struct ad5446_chip_info ad5446_spi_chip_info[] = {
 		.channel = AD5446_CHANNEL(14, 16, 0),
 		.write = ad5446_write,
 	},
-	[ID_AD5600] = {
-		.channel = AD5446_CHANNEL(16, 16, 0),
-		.write = ad5446_write,
-	},
 	[ID_AD5601] = {
 		.channel = AD5446_CHANNEL_POWERDOWN(8, 16, 6),
 		.write = ad5446_write,
@@ -427,7 +422,7 @@ static const struct spi_device_id ad5446_spi_ids[] = {
 	{"ad5542a", ID_AD5541A}, /* ad5541a and ad5542a are compatible */
 	{"ad5543", ID_AD5541A}, /* ad5541a and ad5543 are compatible */
 	{"ad5553", ID_AD5553},
-	{"ad5600", ID_AD5600},
+	{"ad5600", ID_AD5541A}, /* ad5541a and ad5600 are compatible  */
 	{"ad5601", ID_AD5601},
 	{"ad5611", ID_AD5611},
 	{"ad5621", ID_AD5621},

-- 
2.51.0

Re: [PATCH v4 03/12] iio: dac: ad5446: Drop duplicated spi_id entry

[Andy Shevchenko]

On Tue, Nov 04, 2025 at 03:35:08PM +0000, Nuno Sá via B4 Relay wrote:
> 
> AD5600 and AD5541A are compatible so there's no need to have a dedicated
> entry for ID_AD5600.

Suggested-by?
Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v4 03/12] iio: dac: ad5446: Drop duplicated spi_id entry

[Nuno Sá]

On Tue, 2025-11-04 at 19:12 +0200, Andy Shevchenko wrote:
> On Tue, Nov 04, 2025 at 03:35:08PM +0000, Nuno Sá via B4 Relay wrote:
> > 
> > AD5600 and AD5541A are compatible so there's no need to have a dedicated
> > entry for ID_AD5600.
> 
> Suggested-by?

Oh sure, that would make sense yes. Maybe Jonathan can do it when applying...

- Nuno Sá
> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>

Re: [PATCH v4 03/12] iio: dac: ad5446: Drop duplicated spi_id entry

[Jonathan Cameron]

On Wed, 05 Nov 2025 10:16:07 +0000
Nuno Sá <noname.nuno@gmail.com> wrote:

> On Tue, 2025-11-04 at 19:12 +0200, Andy Shevchenko wrote:
> > On Tue, Nov 04, 2025 at 03:35:08PM +0000, Nuno Sá via B4 Relay wrote:  
> > > 
> > > AD5600 and AD5541A are compatible so there's no need to have a dedicated
> > > entry for ID_AD5600.  
> > 
> > Suggested-by?  
> 
> Oh sure, that would make sense yes. Maybe Jonathan can do it when applying...
Done whilst applying.

J
> 
> - Nuno Sá
> > Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>  

[PATCH v4 04/12] iio: dac: ad5446: Don't ignore missing regulator

[Nuno Sá via B4 Relay]

From: Nuno Sá <nuno.sa@analog.com>

If the chip does not have an internal reference, do not ignore a missing
regulator as we won't be able to actually provide a proper scale for the
DAC. Since it's now seen as an error, flip the if() logic so errors are
treated first (which is the typical pattern).

Signed-off-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/dac/ad5446.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/iio/dac/ad5446.c b/drivers/iio/dac/ad5446.c
index c0a38f642451..cbe2a6862f10 100644
--- a/drivers/iio/dac/ad5446.c
+++ b/drivers/iio/dac/ad5446.c
@@ -253,10 +253,11 @@ static int ad5446_probe(struct device *dev, const char *name,
 	if (ret < 0 && ret != -ENODEV)
 		return ret;
 	if (ret == -ENODEV) {
-		if (chip_info->int_vref_mv)
-			st->vref_mv = chip_info->int_vref_mv;
-		else
-			dev_warn(dev, "reference voltage unspecified\n");
+		if (!chip_info->int_vref_mv)
+			return dev_err_probe(dev, ret,
+					     "reference voltage unspecified\n");
+
+		st->vref_mv = chip_info->int_vref_mv;
 	} else {
 		st->vref_mv = ret / 1000;
 	}

-- 
2.51.0

Re: [PATCH v4 04/12] iio: dac: ad5446: Don't ignore missing regulator

[Jonathan Cameron]

On Tue, 04 Nov 2025 15:35:09 +0000
Nuno Sá via B4 Relay <devnull+nuno.sa.analog.com@kernel.org> wrote:

> From: Nuno Sá <nuno.sa@analog.com>
> 
> If the chip does not have an internal reference, do not ignore a missing
> regulator as we won't be able to actually provide a proper scale for the
> DAC. Since it's now seen as an error, flip the if() logic so errors are
> treated first (which is the typical pattern).
> 
> Signed-off-by: Nuno Sá <nuno.sa@analog.com>
Applied.
> ---
>  drivers/iio/dac/ad5446.c | 9 +++++----
>  1 file changed, 5 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/iio/dac/ad5446.c b/drivers/iio/dac/ad5446.c
> index c0a38f642451..cbe2a6862f10 100644
> --- a/drivers/iio/dac/ad5446.c
> +++ b/drivers/iio/dac/ad5446.c
> @@ -253,10 +253,11 @@ static int ad5446_probe(struct device *dev, const char *name,
>  	if (ret < 0 && ret != -ENODEV)
>  		return ret;
>  	if (ret == -ENODEV) {
> -		if (chip_info->int_vref_mv)
> -			st->vref_mv = chip_info->int_vref_mv;
> -		else
> -			dev_warn(dev, "reference voltage unspecified\n");
> +		if (!chip_info->int_vref_mv)
> +			return dev_err_probe(dev, ret,
> +					     "reference voltage unspecified\n");
> +
> +		st->vref_mv = chip_info->int_vref_mv;
>  	} else {
>  		st->vref_mv = ret / 1000;
>  	}
> 

[PATCH v4 05/12] iio: dac: ad5446: Move to single chip_info structures

[Nuno Sá via B4 Relay]

From: Nuno Sá <nuno.sa@analog.com>

Do not use an array with an enum id kind of thing. Use the more
maintainable chip_info variable per chip.

Adapt the probe functions to use the proper helpers (for SPI and I2c).
Note that in a following patch we'll also add the chip_info variables to
the of_device_id tables. Hence already use the helpers that internally use
device_get_match_data().

Signed-off-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/dac/ad5446.c | 340 +++++++++++++++++++++++------------------------
 1 file changed, 170 insertions(+), 170 deletions(-)

diff --git a/drivers/iio/dac/ad5446.c b/drivers/iio/dac/ad5446.c
index cbe2a6862f10..539a8fcc7078 100644
--- a/drivers/iio/dac/ad5446.c
+++ b/drivers/iio/dac/ad5446.c
@@ -291,154 +291,150 @@ static int ad5660_write(struct ad5446_state *st, unsigned val)
  * (and a bit cryptic), however this style is used to make clear which
  * parts are supported here.
  */
-enum ad5446_supported_spi_device_ids {
-	ID_AD5300,
-	ID_AD5310,
-	ID_AD5320,
-	ID_AD5444,
-	ID_AD5446,
-	ID_AD5450,
-	ID_AD5451,
-	ID_AD5541A,
-	ID_AD5512A,
-	ID_AD5553,
-	ID_AD5601,
-	ID_AD5611,
-	ID_AD5621,
-	ID_AD5641,
-	ID_AD5620_2500,
-	ID_AD5620_1250,
-	ID_AD5640_2500,
-	ID_AD5640_1250,
-	ID_AD5660_2500,
-	ID_AD5660_1250,
-	ID_AD5662,
+
+static const struct ad5446_chip_info ad5300_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(8, 16, 4),
+	.write = ad5446_write,
 };
 
-static const struct ad5446_chip_info ad5446_spi_chip_info[] = {
-	[ID_AD5300] = {
-		.channel = AD5446_CHANNEL_POWERDOWN(8, 16, 4),
-		.write = ad5446_write,
-	},
-	[ID_AD5310] = {
-		.channel = AD5446_CHANNEL_POWERDOWN(10, 16, 2),
-		.write = ad5446_write,
-	},
-	[ID_AD5320] = {
-		.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 0),
-		.write = ad5446_write,
-	},
-	[ID_AD5444] = {
-		.channel = AD5446_CHANNEL(12, 16, 2),
-		.write = ad5446_write,
-	},
-	[ID_AD5446] = {
-		.channel = AD5446_CHANNEL(14, 16, 0),
-		.write = ad5446_write,
-	},
-	[ID_AD5450] = {
-		.channel = AD5446_CHANNEL(8, 16, 6),
-		.write = ad5446_write,
-	},
-	[ID_AD5451] = {
-		.channel = AD5446_CHANNEL(10, 16, 4),
-		.write = ad5446_write,
-	},
-	[ID_AD5541A] = {
-		.channel = AD5446_CHANNEL(16, 16, 0),
-		.write = ad5446_write,
-	},
-	[ID_AD5512A] = {
-		.channel = AD5446_CHANNEL(12, 16, 4),
-		.write = ad5446_write,
-	},
-	[ID_AD5553] = {
-		.channel = AD5446_CHANNEL(14, 16, 0),
-		.write = ad5446_write,
-	},
-	[ID_AD5601] = {
-		.channel = AD5446_CHANNEL_POWERDOWN(8, 16, 6),
-		.write = ad5446_write,
-	},
-	[ID_AD5611] = {
-		.channel = AD5446_CHANNEL_POWERDOWN(10, 16, 4),
-		.write = ad5446_write,
-	},
-	[ID_AD5621] = {
-		.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
-		.write = ad5446_write,
-	},
-	[ID_AD5641] = {
-		.channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
-		.write = ad5446_write,
-	},
-	[ID_AD5620_2500] = {
-		.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
-		.int_vref_mv = 2500,
-		.write = ad5446_write,
-	},
-	[ID_AD5620_1250] = {
-		.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
-		.int_vref_mv = 1250,
-		.write = ad5446_write,
-	},
-	[ID_AD5640_2500] = {
-		.channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
-		.int_vref_mv = 2500,
-		.write = ad5446_write,
-	},
-	[ID_AD5640_1250] = {
-		.channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
-		.int_vref_mv = 1250,
-		.write = ad5446_write,
-	},
-	[ID_AD5660_2500] = {
-		.channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
-		.int_vref_mv = 2500,
-		.write = ad5660_write,
-	},
-	[ID_AD5660_1250] = {
-		.channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
-		.int_vref_mv = 1250,
-		.write = ad5660_write,
-	},
-	[ID_AD5662] = {
-		.channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
-		.write = ad5660_write,
-	},
+static const struct ad5446_chip_info ad5310_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(10, 16, 2),
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5320_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 0),
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5444_chip_info = {
+	.channel = AD5446_CHANNEL(12, 16, 2),
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5446_chip_info = {
+	.channel = AD5446_CHANNEL(14, 16, 0),
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5450_chip_info = {
+	.channel = AD5446_CHANNEL(8, 16, 6),
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5451_chip_info = {
+	.channel = AD5446_CHANNEL(10, 16, 4),
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5541a_chip_info = {
+	.channel = AD5446_CHANNEL(16, 16, 0),
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5512a_chip_info = {
+	.channel = AD5446_CHANNEL(12, 16, 4),
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5553_chip_info = {
+	.channel = AD5446_CHANNEL(14, 16, 0),
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5601_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(8, 16, 6),
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5611_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(10, 16, 4),
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5621_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5641_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5620_2500_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
+	.int_vref_mv = 2500,
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5620_1250_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
+	.int_vref_mv = 1250,
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5640_2500_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
+	.int_vref_mv = 2500,
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5640_1250_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
+	.int_vref_mv = 1250,
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5660_2500_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
+	.int_vref_mv = 2500,
+	.write = ad5660_write,
+};
+
+static const struct ad5446_chip_info ad5660_1250_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
+	.int_vref_mv = 1250,
+	.write = ad5660_write,
+};
+
+static const struct ad5446_chip_info ad5662_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
+	.write = ad5660_write,
 };
 
 static const struct spi_device_id ad5446_spi_ids[] = {
-	{"ad5300", ID_AD5300},
-	{"ad5310", ID_AD5310},
-	{"ad5320", ID_AD5320},
-	{"ad5444", ID_AD5444},
-	{"ad5446", ID_AD5446},
-	{"ad5450", ID_AD5450},
-	{"ad5451", ID_AD5451},
-	{"ad5452", ID_AD5444}, /* ad5452 is compatible to the ad5444 */
-	{"ad5453", ID_AD5446}, /* ad5453 is compatible to the ad5446 */
-	{"ad5512a", ID_AD5512A},
-	{"ad5541a", ID_AD5541A},
-	{"ad5542a", ID_AD5541A}, /* ad5541a and ad5542a are compatible */
-	{"ad5543", ID_AD5541A}, /* ad5541a and ad5543 are compatible */
-	{"ad5553", ID_AD5553},
-	{"ad5600", ID_AD5541A}, /* ad5541a and ad5600 are compatible  */
-	{"ad5601", ID_AD5601},
-	{"ad5611", ID_AD5611},
-	{"ad5621", ID_AD5621},
-	{"ad5641", ID_AD5641},
-	{"ad5620-2500", ID_AD5620_2500}, /* AD5620/40/60: */
-	{"ad5620-1250", ID_AD5620_1250}, /* part numbers may look differently */
-	{"ad5640-2500", ID_AD5640_2500},
-	{"ad5640-1250", ID_AD5640_1250},
-	{"ad5660-2500", ID_AD5660_2500},
-	{"ad5660-1250", ID_AD5660_1250},
-	{"ad5662", ID_AD5662},
-	{"dac081s101", ID_AD5300}, /* compatible Texas Instruments chips */
-	{"dac101s101", ID_AD5310},
-	{"dac121s101", ID_AD5320},
-	{"dac7512", ID_AD5320},
+	{"ad5300", (kernel_ulong_t)&ad5300_chip_info},
+	{"ad5310", (kernel_ulong_t)&ad5310_chip_info},
+	{"ad5320", (kernel_ulong_t)&ad5320_chip_info},
+	{"ad5444", (kernel_ulong_t)&ad5444_chip_info},
+	{"ad5446", (kernel_ulong_t)&ad5446_chip_info},
+	{"ad5450", (kernel_ulong_t)&ad5450_chip_info},
+	{"ad5451", (kernel_ulong_t)&ad5451_chip_info},
+	{"ad5452", (kernel_ulong_t)&ad5444_chip_info}, /* ad5452 is compatible to the ad5444 */
+	{"ad5453", (kernel_ulong_t)&ad5446_chip_info}, /* ad5453 is compatible to the ad5446 */
+	{"ad5512a", (kernel_ulong_t)&ad5512a_chip_info},
+	{"ad5541a", (kernel_ulong_t)&ad5541a_chip_info},
+	{"ad5542a", (kernel_ulong_t)&ad5541a_chip_info}, /* ad5541a and ad5542a are compatible */
+	{"ad5543", (kernel_ulong_t)&ad5541a_chip_info}, /* ad5541a and ad5543 are compatible */
+	{"ad5553", (kernel_ulong_t)&ad5553_chip_info},
+	{"ad5600", (kernel_ulong_t)&ad5541a_chip_info}, /* ad5541a and ad5600 are compatible  */
+	{"ad5601", (kernel_ulong_t)&ad5601_chip_info},
+	{"ad5611", (kernel_ulong_t)&ad5611_chip_info},
+	{"ad5621", (kernel_ulong_t)&ad5621_chip_info},
+	{"ad5641", (kernel_ulong_t)&ad5641_chip_info},
+	{"ad5620-2500", (kernel_ulong_t)&ad5620_2500_chip_info}, /* AD5620/40/60: */
+	/* part numbers may look differently */
+	{"ad5620-1250", (kernel_ulong_t)&ad5620_1250_chip_info},
+	{"ad5640-2500", (kernel_ulong_t)&ad5640_2500_chip_info},
+	{"ad5640-1250", (kernel_ulong_t)&ad5640_1250_chip_info},
+	{"ad5660-2500", (kernel_ulong_t)&ad5660_2500_chip_info},
+	{"ad5660-1250", (kernel_ulong_t)&ad5660_1250_chip_info},
+	{"ad5662", (kernel_ulong_t)&ad5662_chip_info},
+	{"dac081s101", (kernel_ulong_t)&ad5300_chip_info}, /* compatible Texas Instruments chips */
+	{"dac101s101", (kernel_ulong_t)&ad5310_chip_info},
+	{"dac121s101", (kernel_ulong_t)&ad5320_chip_info},
+	{"dac7512", (kernel_ulong_t)&ad5320_chip_info},
 	{ }
 };
 MODULE_DEVICE_TABLE(spi, ad5446_spi_ids);
@@ -452,9 +448,13 @@ MODULE_DEVICE_TABLE(of, ad5446_of_ids);
 static int ad5446_spi_probe(struct spi_device *spi)
 {
 	const struct spi_device_id *id = spi_get_device_id(spi);
+	const struct ad5446_chip_info *chip_info;
 
-	return ad5446_probe(&spi->dev, id->name,
-		&ad5446_spi_chip_info[id->driver_data]);
+	chip_info = spi_get_device_match_data(spi);
+	if (!chip_info)
+		return -ENODEV;
+
+	return ad5446_probe(&spi->dev, id->name, chip_info);
 }
 
 static struct spi_driver ad5446_spi_driver = {
@@ -507,41 +507,41 @@ static int ad5622_write(struct ad5446_state *st, unsigned val)
  * (and a bit cryptic), however this style is used to make clear which
  * parts are supported here.
  */
-enum ad5446_supported_i2c_device_ids {
-	ID_AD5602,
-	ID_AD5612,
-	ID_AD5622,
+
+static const struct ad5446_chip_info ad5602_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(8, 16, 4),
+	.write = ad5622_write,
 };
 
-static const struct ad5446_chip_info ad5446_i2c_chip_info[] = {
-	[ID_AD5602] = {
-		.channel = AD5446_CHANNEL_POWERDOWN(8, 16, 4),
-		.write = ad5622_write,
-	},
-	[ID_AD5612] = {
-		.channel = AD5446_CHANNEL_POWERDOWN(10, 16, 2),
-		.write = ad5622_write,
-	},
-	[ID_AD5622] = {
-		.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 0),
-		.write = ad5622_write,
-	},
+static const struct ad5446_chip_info ad5612_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(10, 16, 2),
+	.write = ad5622_write,
+};
+
+static const struct ad5446_chip_info ad5622_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 0),
+	.write = ad5622_write,
 };
 
 static int ad5446_i2c_probe(struct i2c_client *i2c)
 {
 	const struct i2c_device_id *id = i2c_client_get_device_id(i2c);
-	return ad5446_probe(&i2c->dev, id->name,
-		&ad5446_i2c_chip_info[id->driver_data]);
+	const struct ad5446_chip_info *chip_info;
+
+	chip_info = i2c_get_match_data(i2c);
+	if (!chip_info)
+		return -ENODEV;
+
+	return ad5446_probe(&i2c->dev, id->name, chip_info);
 }
 
 static const struct i2c_device_id ad5446_i2c_ids[] = {
-	{"ad5301", ID_AD5602},
-	{"ad5311", ID_AD5612},
-	{"ad5321", ID_AD5622},
-	{"ad5602", ID_AD5602},
-	{"ad5612", ID_AD5612},
-	{"ad5622", ID_AD5622},
+	{"ad5301", (kernel_ulong_t)&ad5602_chip_info},
+	{"ad5311", (kernel_ulong_t)&ad5612_chip_info},
+	{"ad5321", (kernel_ulong_t)&ad5622_chip_info},
+	{"ad5602", (kernel_ulong_t)&ad5602_chip_info},
+	{"ad5612", (kernel_ulong_t)&ad5612_chip_info},
+	{"ad5622", (kernel_ulong_t)&ad5622_chip_info},
 	{ }
 };
 MODULE_DEVICE_TABLE(i2c, ad5446_i2c_ids);

-- 
2.51.0

Re: [PATCH v4 05/12] iio: dac: ad5446: Move to single chip_info structures

[Jonathan Cameron]

On Tue, 04 Nov 2025 15:35:10 +0000
Nuno Sá via B4 Relay <devnull+nuno.sa.analog.com@kernel.org> wrote:

> From: Nuno Sá <nuno.sa@analog.com>
> 
> Do not use an array with an enum id kind of thing. Use the more
> maintainable chip_info variable per chip.
> 
> Adapt the probe functions to use the proper helpers (for SPI and I2c).
> Note that in a following patch we'll also add the chip_info variables to
> the of_device_id tables. Hence already use the helpers that internally use
> device_get_match_data().
> 
> Signed-off-by: Nuno Sá <nuno.sa@analog.com>
Applied.

[PATCH v4 06/12] iio: dac: ad5456: Add missing DT compatibles

[Nuno Sá via B4 Relay]

From: Nuno Sá <nuno.sa@analog.com>

Add missing of_device_id compatibles for the i2c and spi drivers.

Signed-off-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/dac/ad5446.c | 41 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/drivers/iio/dac/ad5446.c b/drivers/iio/dac/ad5446.c
index 539a8fcc7078..01f934036185 100644
--- a/drivers/iio/dac/ad5446.c
+++ b/drivers/iio/dac/ad5446.c
@@ -440,6 +440,35 @@ static const struct spi_device_id ad5446_spi_ids[] = {
 MODULE_DEVICE_TABLE(spi, ad5446_spi_ids);
 
 static const struct of_device_id ad5446_of_ids[] = {
+	{ .compatible = "adi,ad5300", .data = &ad5300_chip_info },
+	{ .compatible = "adi,ad5310", .data = &ad5310_chip_info },
+	{ .compatible = "adi,ad5320", .data = &ad5320_chip_info },
+	{ .compatible = "adi,ad5444", .data = &ad5444_chip_info },
+	{ .compatible = "adi,ad5446", .data = &ad5446_chip_info },
+	{ .compatible = "adi,ad5450", .data = &ad5450_chip_info },
+	{ .compatible = "adi,ad5451", .data = &ad5451_chip_info },
+	{ .compatible = "adi,ad5452", .data = &ad5444_chip_info },
+	{ .compatible = "adi,ad5453", .data = &ad5446_chip_info },
+	{ .compatible = "adi,ad5512a", .data = &ad5512a_chip_info },
+	{ .compatible = "adi,ad5541a", .data = &ad5541a_chip_info },
+	{ .compatible = "adi,ad5542a", .data = &ad5541a_chip_info },
+	{ .compatible = "adi,ad5543", .data = &ad5541a_chip_info },
+	{ .compatible = "adi,ad5553", .data = &ad5553_chip_info },
+	{ .compatible = "adi,ad5600", .data = &ad5541a_chip_info },
+	{ .compatible = "adi,ad5601", .data = &ad5601_chip_info },
+	{ .compatible = "adi,ad5611", .data = &ad5611_chip_info },
+	{ .compatible = "adi,ad5621", .data = &ad5621_chip_info },
+	{ .compatible = "adi,ad5641", .data = &ad5641_chip_info },
+	{ .compatible = "adi,ad5620-2500", .data = &ad5620_2500_chip_info },
+	{ .compatible = "adi,ad5620-1250", .data = &ad5620_1250_chip_info },
+	{ .compatible = "adi,ad5640-2500", .data = &ad5640_2500_chip_info },
+	{ .compatible = "adi,ad5640-1250", .data = &ad5640_1250_chip_info },
+	{ .compatible = "adi,ad5660-2500", .data = &ad5660_2500_chip_info },
+	{ .compatible = "adi,ad5660-1250", .data = &ad5660_1250_chip_info },
+	{ .compatible = "adi,ad5662", .data = &ad5662_chip_info },
+	{ .compatible = "ti,dac081s101", .data = &ad5300_chip_info },
+	{ .compatible = "ti,dac101s101", .data = &ad5310_chip_info },
+	{ .compatible = "ti,dac121s101", .data = &ad5320_chip_info },
 	{ .compatible = "ti,dac7512" },
 	{ }
 };
@@ -546,9 +575,21 @@ static const struct i2c_device_id ad5446_i2c_ids[] = {
 };
 MODULE_DEVICE_TABLE(i2c, ad5446_i2c_ids);
 
+static const struct of_device_id ad5446_i2c_of_ids[] = {
+	{ .compatible = "adi,ad5301", .data = &ad5602_chip_info },
+	{ .compatible = "adi,ad5311", .data = &ad5612_chip_info },
+	{ .compatible = "adi,ad5321", .data = &ad5622_chip_info },
+	{ .compatible = "adi,ad5602", .data = &ad5602_chip_info },
+	{ .compatible = "adi,ad5612", .data = &ad5612_chip_info },
+	{ .compatible = "adi,ad5622", .data = &ad5622_chip_info },
+	{ }
+};
+MODULE_DEVICE_TABLE(of, ad5446_i2c_of_ids);
+
 static struct i2c_driver ad5446_i2c_driver = {
 	.driver = {
 		   .name = "ad5446",
+		   .of_match_table = ad5446_i2c_of_ids,
 	},
 	.probe = ad5446_i2c_probe,
 	.id_table = ad5446_i2c_ids,

-- 
2.51.0

Re: [PATCH v4 06/12] iio: dac: ad5456: Add missing DT compatibles

[Jonathan Cameron]

On Tue, 04 Nov 2025 15:35:11 +0000
Nuno Sá via B4 Relay <devnull+nuno.sa.analog.com@kernel.org> wrote:

> From: Nuno Sá <nuno.sa@analog.com>
> 
> Add missing of_device_id compatibles for the i2c and spi drivers.
> 
> Signed-off-by: Nuno Sá <nuno.sa@analog.com>
Applied.

[PATCH v4 07/12] iio: dac: ad5446: Separate I2C/SPI into different drivers

[Nuno Sá via B4 Relay]

From: Nuno Sá <nuno.sa@analog.com>

Properly separate the I2C and SPI drivers into two different drivers
living in their own source file (as usual). So that no need for the
hacky ifdefery.

Signed-off-by: Nuno Sá <nuno.sa@analog.com>
---
 MAINTAINERS                  |   4 +
 drivers/iio/dac/Kconfig      |  31 ++-
 drivers/iio/dac/Makefile     |   2 +
 drivers/iio/dac/ad5446-i2c.c | 102 ++++++++++
 drivers/iio/dac/ad5446-spi.c | 250 ++++++++++++++++++++++++
 drivers/iio/dac/ad5446.c     | 450 +------------------------------------------
 drivers/iio/dac/ad5446.h     |  76 ++++++++
 7 files changed, 466 insertions(+), 449 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 9654f0c25423..c845ad7307fb 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -447,6 +447,10 @@ L:	linux-iio@vger.kernel.org
 S:	Supported
 W:	https://ez.analog.com/linux-software-drivers
 F:	Documentation/devicetree/bindings/iio/dac/adi,ad5446.yaml
+F:	drivers/iio/dac/ad5446-i2c.c
+F:	drivers/iio/dac/ad5446-spi.c
+F:	drivers/iio/dac/ad5446.c
+F:	drivers/iio/dac/ad5446.h
 
 AD714X CAPACITANCE TOUCH SENSOR DRIVER (AD7142/3/7/8/7A)
 M:	Michael Hennerich <michael.hennerich@analog.com>
diff --git a/drivers/iio/dac/Kconfig b/drivers/iio/dac/Kconfig
index e0996dc014a3..7cd3caec1262 100644
--- a/drivers/iio/dac/Kconfig
+++ b/drivers/iio/dac/Kconfig
@@ -97,17 +97,32 @@ config AD5421
 	  ad5421.
 
 config AD5446
-	tristate "Analog Devices AD5446 and similar single channel DACs driver"
-	depends on (SPI_MASTER && I2C!=m) || I2C
+	tristate
+
+config AD5446_SPI
+	tristate "Analog Devices AD5446 and similar single channel DACs driver (SPI)"
+	depends on SPI
+	select AD5446
 	help
-	  Say yes here to build support for Analog Devices AD5300, AD5301, AD5310,
-	  AD5311, AD5320, AD5321, AD5444, AD5446, AD5450, AD5451, AD5452, AD5453,
-	  AD5512A, AD5541A, AD5542A, AD5543, AD5553, AD5600, AD5601, AD5602, AD5611,
-	  AD5612, AD5620, AD5621, AD5622, AD5640, AD5641, AD5660, AD5662 DACs
-	  as well as Texas Instruments DAC081S101, DAC101S101, DAC121S101.
+	  Say yes here to build support for Analog Devices AD5300, AD5310,
+	  AD5320, AD5444, AD5446, AD5450, AD5451, AD5452, AD5453, AD5512A,
+	  AD5541A, AD5542A, AD5543, AD5553, AD5600, AD5601, AD5611, AD5620,
+	  AD5621, AD5640, AD5641, AD5660, AD5662 DACs as well as
+	  Texas Instruments DAC081S101, DAC101S101, DAC121S101.
 
 	  To compile this driver as a module, choose M here: the
-	  module will be called ad5446.
+	  module will be called ad5446-spi.
+
+config AD5446_I2C
+	tristate "Analog Devices AD5446 and similar single channel DACs driver (I2C)"
+	depends on I2C
+	select AD5446
+	help
+	  Say yes here to build support for Analog Devices AD5301, AD5311, AD5321,
+	  AD5602, AD5612, AD5622 DACs.
+
+	  To compile this driver as a module, choose M here: the
+	  module will be called ad5446-i2c.
 
 config AD5449
 	tristate "Analog Devices AD5449 and similar DACs driver"
diff --git a/drivers/iio/dac/Makefile b/drivers/iio/dac/Makefile
index 3684cd52b7fa..e6ac4c67e337 100644
--- a/drivers/iio/dac/Makefile
+++ b/drivers/iio/dac/Makefile
@@ -15,6 +15,8 @@ obj-$(CONFIG_AD5624R_SPI) += ad5624r_spi.o
 obj-$(CONFIG_AD5064) += ad5064.o
 obj-$(CONFIG_AD5504) += ad5504.o
 obj-$(CONFIG_AD5446) += ad5446.o
+obj-$(CONFIG_AD5446_SPI) += ad5446-spi.o
+obj-$(CONFIG_AD5446_I2C) += ad5446-i2c.o
 obj-$(CONFIG_AD5449) += ad5449.o
 obj-$(CONFIG_AD5592R_BASE) += ad5592r-base.o
 obj-$(CONFIG_AD5592R) += ad5592r.o
diff --git a/drivers/iio/dac/ad5446-i2c.c b/drivers/iio/dac/ad5446-i2c.c
new file mode 100644
index 000000000000..40fe7e17fce4
--- /dev/null
+++ b/drivers/iio/dac/ad5446-i2c.c
@@ -0,0 +1,102 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * AD5446 SPI I2C driver
+ *
+ * Copyright 2025 Analog Devices Inc.
+ */
+#include <linux/err.h>
+#include <linux/module.h>
+#include <linux/mod_devicetable.h>
+#include <linux/i2c.h>
+
+#include <asm/byteorder.h>
+
+#include "ad5446.h"
+
+static int ad5622_write(struct ad5446_state *st, unsigned int val)
+{
+	struct i2c_client *client = to_i2c_client(st->dev);
+	int ret;
+
+	st->d16 = cpu_to_be16(val);
+
+	ret = i2c_master_send_dmasafe(client, (char *)&st->d16, sizeof(st->d16));
+	if (ret < 0)
+		return ret;
+	if (ret != sizeof(st->d16))
+		return -EIO;
+
+	return 0;
+}
+
+static int ad5446_i2c_probe(struct i2c_client *i2c)
+{
+	const struct i2c_device_id *id = i2c_client_get_device_id(i2c);
+	const struct ad5446_chip_info *chip_info;
+
+	chip_info = i2c_get_match_data(i2c);
+	if (!chip_info)
+		return -ENODEV;
+
+	return ad5446_probe(&i2c->dev, id->name, chip_info);
+}
+
+/*
+ * ad5446_supported_i2c_device_ids:
+ * The AD5620/40/60 parts are available in different fixed internal reference
+ * voltage options. The actual part numbers may look differently
+ * (and a bit cryptic), however this style is used to make clear which
+ * parts are supported here.
+ */
+
+static const struct ad5446_chip_info ad5602_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(8, 16, 4),
+	.write = ad5622_write,
+};
+
+static const struct ad5446_chip_info ad5612_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(10, 16, 2),
+	.write = ad5622_write,
+};
+
+static const struct ad5446_chip_info ad5622_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 0),
+	.write = ad5622_write,
+};
+
+static const struct i2c_device_id ad5446_i2c_ids[] = {
+	{"ad5301", (kernel_ulong_t)&ad5602_chip_info},
+	{"ad5311", (kernel_ulong_t)&ad5612_chip_info},
+	{"ad5321", (kernel_ulong_t)&ad5622_chip_info},
+	{"ad5602", (kernel_ulong_t)&ad5602_chip_info},
+	{"ad5612", (kernel_ulong_t)&ad5612_chip_info},
+	{"ad5622", (kernel_ulong_t)&ad5622_chip_info},
+	{ }
+};
+MODULE_DEVICE_TABLE(i2c, ad5446_i2c_ids);
+
+static const struct of_device_id ad5446_i2c_of_ids[] = {
+	{ .compatible = "adi,ad5301", .data = &ad5602_chip_info },
+	{ .compatible = "adi,ad5311", .data = &ad5612_chip_info },
+	{ .compatible = "adi,ad5321", .data = &ad5622_chip_info },
+	{ .compatible = "adi,ad5602", .data = &ad5602_chip_info },
+	{ .compatible = "adi,ad5612", .data = &ad5612_chip_info },
+	{ .compatible = "adi,ad5622", .data = &ad5622_chip_info },
+	{ }
+};
+MODULE_DEVICE_TABLE(OF, ad5446_i2c_of_ids);
+
+static struct i2c_driver ad5446_i2c_driver = {
+	.driver = {
+		.name	= "ad5446",
+		.of_match_table = ad5446_i2c_of_ids,
+	},
+	.probe = ad5446_i2c_probe,
+	.id_table = ad5446_i2c_ids,
+};
+module_i2c_driver(ad5446_i2c_driver);
+
+MODULE_AUTHOR("Nuno Sá <nuno.sa@analog.com>");
+MODULE_DESCRIPTION("Analog Devices AD5622 and similar I2C DACs");
+MODULE_LICENSE("GPL");
+MODULE_IMPORT_NS("IIO_AD5446");
diff --git a/drivers/iio/dac/ad5446-spi.c b/drivers/iio/dac/ad5446-spi.c
new file mode 100644
index 000000000000..1a52f6014fad
--- /dev/null
+++ b/drivers/iio/dac/ad5446-spi.c
@@ -0,0 +1,250 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * AD5446 SPI DAC driver
+ *
+ * Copyright 2025 Analog Devices Inc.
+ */
+#include <linux/err.h>
+#include <linux/module.h>
+#include <linux/mod_devicetable.h>
+#include <linux/spi/spi.h>
+#include <linux/unaligned.h>
+
+#include <asm/byteorder.h>
+
+#include "ad5446.h"
+
+static int ad5446_write(struct ad5446_state *st, unsigned int val)
+{
+	struct spi_device *spi = to_spi_device(st->dev);
+
+	st->d16 = cpu_to_be16(val);
+
+	return spi_write(spi, &st->d16, sizeof(st->d16));
+}
+
+static int ad5660_write(struct ad5446_state *st, unsigned int val)
+{
+	struct spi_device *spi = to_spi_device(st->dev);
+
+	put_unaligned_be24(val, &st->d24[0]);
+
+	return spi_write(spi, st->d24, sizeof(st->d24));
+}
+
+static int ad5446_spi_probe(struct spi_device *spi)
+{
+	const struct spi_device_id *id = spi_get_device_id(spi);
+	const struct ad5446_chip_info *chip_info;
+
+	chip_info = spi_get_device_match_data(spi);
+	if (!chip_info)
+		return -ENODEV;
+
+	return ad5446_probe(&spi->dev, id->name, chip_info);
+}
+
+/*
+ * ad5446_supported_spi_device_ids:
+ * The AD5620/40/60 parts are available in different fixed internal reference
+ * voltage options. The actual part numbers may look differently
+ * (and a bit cryptic), however this style is used to make clear which
+ * parts are supported here.
+ */
+
+static const struct ad5446_chip_info ad5300_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(8, 16, 4),
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5310_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(10, 16, 2),
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5320_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 0),
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5444_chip_info = {
+	.channel = AD5446_CHANNEL(12, 16, 2),
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5446_chip_info = {
+	.channel = AD5446_CHANNEL(14, 16, 0),
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5450_chip_info = {
+	.channel = AD5446_CHANNEL(8, 16, 6),
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5451_chip_info = {
+	.channel = AD5446_CHANNEL(10, 16, 4),
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5541a_chip_info = {
+	.channel = AD5446_CHANNEL(16, 16, 0),
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5512a_chip_info = {
+	.channel = AD5446_CHANNEL(12, 16, 4),
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5553_chip_info = {
+	.channel = AD5446_CHANNEL(14, 16, 0),
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5601_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(8, 16, 6),
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5611_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(10, 16, 4),
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5621_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5641_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5620_2500_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
+	.int_vref_mv = 2500,
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5620_1250_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
+	.int_vref_mv = 1250,
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5640_2500_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
+	.int_vref_mv = 2500,
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5640_1250_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
+	.int_vref_mv = 1250,
+	.write = ad5446_write,
+};
+
+static const struct ad5446_chip_info ad5660_2500_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
+	.int_vref_mv = 2500,
+	.write = ad5660_write,
+};
+
+static const struct ad5446_chip_info ad5660_1250_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
+	.int_vref_mv = 1250,
+	.write = ad5660_write,
+};
+
+static const struct ad5446_chip_info ad5662_chip_info = {
+	.channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
+	.write = ad5660_write,
+};
+
+static const struct spi_device_id ad5446_spi_ids[] = {
+	{"ad5300", (kernel_ulong_t)&ad5300_chip_info},
+	{"ad5310", (kernel_ulong_t)&ad5310_chip_info},
+	{"ad5320", (kernel_ulong_t)&ad5320_chip_info},
+	{"ad5444", (kernel_ulong_t)&ad5444_chip_info},
+	{"ad5446", (kernel_ulong_t)&ad5446_chip_info},
+	{"ad5450", (kernel_ulong_t)&ad5450_chip_info},
+	{"ad5451", (kernel_ulong_t)&ad5451_chip_info},
+	{"ad5452", (kernel_ulong_t)&ad5444_chip_info}, /* ad5452 is compatible to the ad5444 */
+	{"ad5453", (kernel_ulong_t)&ad5446_chip_info}, /* ad5453 is compatible to the ad5446 */
+	{"ad5512a", (kernel_ulong_t)&ad5512a_chip_info},
+	{"ad5541a", (kernel_ulong_t)&ad5541a_chip_info},
+	{"ad5542a", (kernel_ulong_t)&ad5541a_chip_info}, /* ad5541a and ad5542a are compatible */
+	{"ad5543", (kernel_ulong_t)&ad5541a_chip_info}, /* ad5541a and ad5543 are compatible */
+	{"ad5553", (kernel_ulong_t)&ad5553_chip_info},
+	{"ad5600", (kernel_ulong_t)&ad5541a_chip_info}, /* ad5541a and ad5600 are compatible */
+	{"ad5601", (kernel_ulong_t)&ad5601_chip_info},
+	{"ad5611", (kernel_ulong_t)&ad5611_chip_info},
+	{"ad5621", (kernel_ulong_t)&ad5621_chip_info},
+	{"ad5641", (kernel_ulong_t)&ad5641_chip_info},
+	{"ad5620-2500", (kernel_ulong_t)&ad5620_2500_chip_info}, /* AD5620/40/60: */
+	/* part numbers may look differently */
+	{"ad5620-1250", (kernel_ulong_t)&ad5620_1250_chip_info},
+	{"ad5640-2500", (kernel_ulong_t)&ad5640_2500_chip_info},
+	{"ad5640-1250", (kernel_ulong_t)&ad5640_1250_chip_info},
+	{"ad5660-2500", (kernel_ulong_t)&ad5660_2500_chip_info},
+	{"ad5660-1250", (kernel_ulong_t)&ad5660_1250_chip_info},
+	{"ad5662", (kernel_ulong_t)&ad5662_chip_info},
+	{"dac081s101", (kernel_ulong_t)&ad5300_chip_info}, /* compatible Texas Instruments chips */
+	{"dac101s101", (kernel_ulong_t)&ad5310_chip_info},
+	{"dac121s101", (kernel_ulong_t)&ad5320_chip_info},
+	{"dac7512", (kernel_ulong_t)&ad5320_chip_info},
+	{ }
+};
+MODULE_DEVICE_TABLE(spi, ad5446_spi_ids);
+
+static const struct of_device_id ad5446_of_ids[] = {
+	{ .compatible = "adi,ad5300", .data = &ad5300_chip_info },
+	{ .compatible = "adi,ad5310", .data = &ad5310_chip_info },
+	{ .compatible = "adi,ad5320", .data = &ad5320_chip_info },
+	{ .compatible = "adi,ad5444", .data = &ad5444_chip_info },
+	{ .compatible = "adi,ad5446", .data = &ad5446_chip_info },
+	{ .compatible = "adi,ad5450", .data = &ad5450_chip_info },
+	{ .compatible = "adi,ad5451", .data = &ad5451_chip_info },
+	{ .compatible = "adi,ad5452", .data = &ad5444_chip_info },
+	{ .compatible = "adi,ad5453", .data = &ad5446_chip_info },
+	{ .compatible = "adi,ad5512a", .data = &ad5512a_chip_info },
+	{ .compatible = "adi,ad5541a", .data = &ad5541a_chip_info },
+	{ .compatible = "adi,ad5542a", .data = &ad5541a_chip_info },
+	{ .compatible = "adi,ad5543", .data = &ad5541a_chip_info },
+	{ .compatible = "adi,ad5553", .data = &ad5553_chip_info },
+	{ .compatible = "adi,ad5600", .data = &ad5541a_chip_info },
+	{ .compatible = "adi,ad5601", .data = &ad5601_chip_info },
+	{ .compatible = "adi,ad5611", .data = &ad5611_chip_info },
+	{ .compatible = "adi,ad5621", .data = &ad5621_chip_info },
+	{ .compatible = "adi,ad5641", .data = &ad5641_chip_info },
+	{ .compatible = "adi,ad5620-2500", .data = &ad5620_2500_chip_info },
+	{ .compatible = "adi,ad5620-1250", .data = &ad5620_1250_chip_info },
+	{ .compatible = "adi,ad5640-2500", .data = &ad5640_2500_chip_info },
+	{ .compatible = "adi,ad5640-1250", .data = &ad5640_1250_chip_info },
+	{ .compatible = "adi,ad5660-2500", .data = &ad5660_2500_chip_info },
+	{ .compatible = "adi,ad5660-1250", .data = &ad5660_1250_chip_info },
+	{ .compatible = "adi,ad5662", .data = &ad5662_chip_info },
+	{ .compatible = "ti,dac081s101", .data = &ad5300_chip_info },
+	{ .compatible = "ti,dac101s101", .data = &ad5310_chip_info },
+	{ .compatible = "ti,dac121s101", .data = &ad5320_chip_info },
+	{ .compatible = "ti,dac7512", .data = &ad5320_chip_info },
+	{ }
+};
+MODULE_DEVICE_TABLE(of, ad5446_of_ids);
+
+static struct spi_driver ad5446_spi_driver = {
+	.driver = {
+		.name	= "ad5446",
+		.of_match_table = ad5446_of_ids,
+	},
+	.probe = ad5446_spi_probe,
+	.id_table = ad5446_spi_ids,
+};
+module_spi_driver(ad5446_spi_driver);
+
+MODULE_AUTHOR("Nuno Sá <nuno.sa@analog.com>");
+MODULE_DESCRIPTION("Analog Devices AD5446 and similar SPI DACs");
+MODULE_LICENSE("GPL");
+MODULE_IMPORT_NS("IIO_AD5446");
diff --git a/drivers/iio/dac/ad5446.c b/drivers/iio/dac/ad5446.c
index 01f934036185..c7876217c7ec 100644
--- a/drivers/iio/dac/ad5446.c
+++ b/drivers/iio/dac/ad5446.c
@@ -1,10 +1,11 @@
 // SPDX-License-Identifier: GPL-2.0-or-later
 /*
- * AD5446 SPI DAC driver
+ * AD5446 CORE DAC driver
  *
  * Copyright 2010 Analog Devices Inc.
  */
 
+#include <linux/export.h>
 #include <linux/interrupt.h>
 #include <linux/workqueue.h>
 #include <linux/device.h>
@@ -12,60 +13,19 @@
 #include <linux/slab.h>
 #include <linux/sysfs.h>
 #include <linux/list.h>
-#include <linux/spi/spi.h>
-#include <linux/i2c.h>
 #include <linux/regulator/consumer.h>
 #include <linux/err.h>
 #include <linux/module.h>
-#include <linux/mod_devicetable.h>
 
 #include <linux/iio/iio.h>
 #include <linux/iio/sysfs.h>
 
-#include <linux/unaligned.h>
+#include "ad5446.h"
 
 #define MODE_PWRDWN_1k		0x1
 #define MODE_PWRDWN_100k	0x2
 #define MODE_PWRDWN_TRISTATE	0x3
 
-/**
- * struct ad5446_state - driver instance specific data
- * @dev:		this device
- * @chip_info:		chip model specific constants, available modes etc
- * @vref_mv:		actual reference voltage used
- * @cached_val:		store/retrieve values during power down
- * @pwr_down_mode:	power down mode (1k, 100k or tristate)
- * @pwr_down:		true if the device is in power down
- * @lock:		lock to protect the data buffer during write ops
- */
-
-struct ad5446_state {
-	struct device		*dev;
-	const struct ad5446_chip_info	*chip_info;
-	unsigned short			vref_mv;
-	unsigned			cached_val;
-	unsigned			pwr_down_mode;
-	unsigned			pwr_down;
-	struct mutex			lock;
-	union {
-		__be16 d16;
-		u8 d24[3];
-	} __aligned(IIO_DMA_MINALIGN);
-};
-
-/**
- * struct ad5446_chip_info - chip specific information
- * @channel:		channel spec for the DAC
- * @int_vref_mv:	AD5620/40/60: the internal reference voltage
- * @write:		chip specific helper function to write to the register
- */
-
-struct ad5446_chip_info {
-	struct iio_chan_spec	channel;
-	u16			int_vref_mv;
-	int			(*write)(struct ad5446_state *st, unsigned val);
-};
-
 static const char * const ad5446_powerdown_modes[] = {
 	"1kohm_to_gnd", "100kohm_to_gnd", "three_state"
 };
@@ -136,7 +96,7 @@ static ssize_t ad5446_write_dac_powerdown(struct iio_dev *indio_dev,
 	return ret ? ret : len;
 }
 
-static const struct iio_chan_spec_ext_info ad5446_ext_info_powerdown[] = {
+const struct iio_chan_spec_ext_info ad5446_ext_info_powerdown[] = {
 	{
 		.name = "powerdown",
 		.read = ad5446_read_dac_powerdown,
@@ -147,28 +107,7 @@ static const struct iio_chan_spec_ext_info ad5446_ext_info_powerdown[] = {
 	IIO_ENUM_AVAILABLE("powerdown_mode", IIO_SHARED_BY_TYPE, &ad5446_powerdown_mode_enum),
 	{ }
 };
-
-#define _AD5446_CHANNEL(bits, storage, _shift, ext) { \
-	.type = IIO_VOLTAGE, \
-	.indexed = 1, \
-	.output = 1, \
-	.channel = 0, \
-	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
-	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
-	.scan_type = { \
-		.sign = 'u', \
-		.realbits = (bits), \
-		.storagebits = (storage), \
-		.shift = (_shift), \
-		}, \
-	.ext_info = (ext), \
-}
-
-#define AD5446_CHANNEL(bits, storage, shift) \
-	_AD5446_CHANNEL(bits, storage, shift, NULL)
-
-#define AD5446_CHANNEL_POWERDOWN(bits, storage, shift) \
-	_AD5446_CHANNEL(bits, storage, shift, ad5446_ext_info_powerdown)
+EXPORT_SYMBOL_NS_GPL(ad5446_ext_info_powerdown, "IIO_AD5446");
 
 static int ad5446_read_raw(struct iio_dev *indio_dev,
 			   struct iio_chan_spec const *chan,
@@ -223,8 +162,8 @@ static const struct iio_info ad5446_info = {
 	.write_raw = ad5446_write_raw,
 };
 
-static int ad5446_probe(struct device *dev, const char *name,
-			const struct ad5446_chip_info *chip_info)
+int ad5446_probe(struct device *dev, const char *name,
+		 const struct ad5446_chip_info *chip_info)
 {
 	struct ad5446_state *st;
 	struct iio_dev *indio_dev;
@@ -264,379 +203,8 @@ static int ad5446_probe(struct device *dev, const char *name,
 
 	return devm_iio_device_register(dev, indio_dev);
 }
-
-#if IS_ENABLED(CONFIG_SPI_MASTER)
-
-static int ad5446_write(struct ad5446_state *st, unsigned val)
-{
-	struct spi_device *spi = to_spi_device(st->dev);
-	st->d16 = cpu_to_be16(val);
-
-	return spi_write(spi, &st->d16, sizeof(st->d16));
-}
-
-static int ad5660_write(struct ad5446_state *st, unsigned val)
-{
-	struct spi_device *spi = to_spi_device(st->dev);
-
-	put_unaligned_be24(val, &st->d24[0]);
-
-	return spi_write(spi, st->d24, sizeof(st->d24));
-}
-
-/*
- * ad5446_supported_spi_device_ids:
- * The AD5620/40/60 parts are available in different fixed internal reference
- * voltage options. The actual part numbers may look differently
- * (and a bit cryptic), however this style is used to make clear which
- * parts are supported here.
- */
-
-static const struct ad5446_chip_info ad5300_chip_info = {
-	.channel = AD5446_CHANNEL_POWERDOWN(8, 16, 4),
-	.write = ad5446_write,
-};
-
-static const struct ad5446_chip_info ad5310_chip_info = {
-	.channel = AD5446_CHANNEL_POWERDOWN(10, 16, 2),
-	.write = ad5446_write,
-};
-
-static const struct ad5446_chip_info ad5320_chip_info = {
-	.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 0),
-	.write = ad5446_write,
-};
-
-static const struct ad5446_chip_info ad5444_chip_info = {
-	.channel = AD5446_CHANNEL(12, 16, 2),
-	.write = ad5446_write,
-};
-
-static const struct ad5446_chip_info ad5446_chip_info = {
-	.channel = AD5446_CHANNEL(14, 16, 0),
-	.write = ad5446_write,
-};
-
-static const struct ad5446_chip_info ad5450_chip_info = {
-	.channel = AD5446_CHANNEL(8, 16, 6),
-	.write = ad5446_write,
-};
-
-static const struct ad5446_chip_info ad5451_chip_info = {
-	.channel = AD5446_CHANNEL(10, 16, 4),
-	.write = ad5446_write,
-};
-
-static const struct ad5446_chip_info ad5541a_chip_info = {
-	.channel = AD5446_CHANNEL(16, 16, 0),
-	.write = ad5446_write,
-};
-
-static const struct ad5446_chip_info ad5512a_chip_info = {
-	.channel = AD5446_CHANNEL(12, 16, 4),
-	.write = ad5446_write,
-};
-
-static const struct ad5446_chip_info ad5553_chip_info = {
-	.channel = AD5446_CHANNEL(14, 16, 0),
-	.write = ad5446_write,
-};
-
-static const struct ad5446_chip_info ad5601_chip_info = {
-	.channel = AD5446_CHANNEL_POWERDOWN(8, 16, 6),
-	.write = ad5446_write,
-};
-
-static const struct ad5446_chip_info ad5611_chip_info = {
-	.channel = AD5446_CHANNEL_POWERDOWN(10, 16, 4),
-	.write = ad5446_write,
-};
-
-static const struct ad5446_chip_info ad5621_chip_info = {
-	.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
-	.write = ad5446_write,
-};
-
-static const struct ad5446_chip_info ad5641_chip_info = {
-	.channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
-	.write = ad5446_write,
-};
-
-static const struct ad5446_chip_info ad5620_2500_chip_info = {
-	.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
-	.int_vref_mv = 2500,
-	.write = ad5446_write,
-};
-
-static const struct ad5446_chip_info ad5620_1250_chip_info = {
-	.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
-	.int_vref_mv = 1250,
-	.write = ad5446_write,
-};
-
-static const struct ad5446_chip_info ad5640_2500_chip_info = {
-	.channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
-	.int_vref_mv = 2500,
-	.write = ad5446_write,
-};
-
-static const struct ad5446_chip_info ad5640_1250_chip_info = {
-	.channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
-	.int_vref_mv = 1250,
-	.write = ad5446_write,
-};
-
-static const struct ad5446_chip_info ad5660_2500_chip_info = {
-	.channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
-	.int_vref_mv = 2500,
-	.write = ad5660_write,
-};
-
-static const struct ad5446_chip_info ad5660_1250_chip_info = {
-	.channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
-	.int_vref_mv = 1250,
-	.write = ad5660_write,
-};
-
-static const struct ad5446_chip_info ad5662_chip_info = {
-	.channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
-	.write = ad5660_write,
-};
-
-static const struct spi_device_id ad5446_spi_ids[] = {
-	{"ad5300", (kernel_ulong_t)&ad5300_chip_info},
-	{"ad5310", (kernel_ulong_t)&ad5310_chip_info},
-	{"ad5320", (kernel_ulong_t)&ad5320_chip_info},
-	{"ad5444", (kernel_ulong_t)&ad5444_chip_info},
-	{"ad5446", (kernel_ulong_t)&ad5446_chip_info},
-	{"ad5450", (kernel_ulong_t)&ad5450_chip_info},
-	{"ad5451", (kernel_ulong_t)&ad5451_chip_info},
-	{"ad5452", (kernel_ulong_t)&ad5444_chip_info}, /* ad5452 is compatible to the ad5444 */
-	{"ad5453", (kernel_ulong_t)&ad5446_chip_info}, /* ad5453 is compatible to the ad5446 */
-	{"ad5512a", (kernel_ulong_t)&ad5512a_chip_info},
-	{"ad5541a", (kernel_ulong_t)&ad5541a_chip_info},
-	{"ad5542a", (kernel_ulong_t)&ad5541a_chip_info}, /* ad5541a and ad5542a are compatible */
-	{"ad5543", (kernel_ulong_t)&ad5541a_chip_info}, /* ad5541a and ad5543 are compatible */
-	{"ad5553", (kernel_ulong_t)&ad5553_chip_info},
-	{"ad5600", (kernel_ulong_t)&ad5541a_chip_info}, /* ad5541a and ad5600 are compatible  */
-	{"ad5601", (kernel_ulong_t)&ad5601_chip_info},
-	{"ad5611", (kernel_ulong_t)&ad5611_chip_info},
-	{"ad5621", (kernel_ulong_t)&ad5621_chip_info},
-	{"ad5641", (kernel_ulong_t)&ad5641_chip_info},
-	{"ad5620-2500", (kernel_ulong_t)&ad5620_2500_chip_info}, /* AD5620/40/60: */
-	/* part numbers may look differently */
-	{"ad5620-1250", (kernel_ulong_t)&ad5620_1250_chip_info},
-	{"ad5640-2500", (kernel_ulong_t)&ad5640_2500_chip_info},
-	{"ad5640-1250", (kernel_ulong_t)&ad5640_1250_chip_info},
-	{"ad5660-2500", (kernel_ulong_t)&ad5660_2500_chip_info},
-	{"ad5660-1250", (kernel_ulong_t)&ad5660_1250_chip_info},
-	{"ad5662", (kernel_ulong_t)&ad5662_chip_info},
-	{"dac081s101", (kernel_ulong_t)&ad5300_chip_info}, /* compatible Texas Instruments chips */
-	{"dac101s101", (kernel_ulong_t)&ad5310_chip_info},
-	{"dac121s101", (kernel_ulong_t)&ad5320_chip_info},
-	{"dac7512", (kernel_ulong_t)&ad5320_chip_info},
-	{ }
-};
-MODULE_DEVICE_TABLE(spi, ad5446_spi_ids);
-
-static const struct of_device_id ad5446_of_ids[] = {
-	{ .compatible = "adi,ad5300", .data = &ad5300_chip_info },
-	{ .compatible = "adi,ad5310", .data = &ad5310_chip_info },
-	{ .compatible = "adi,ad5320", .data = &ad5320_chip_info },
-	{ .compatible = "adi,ad5444", .data = &ad5444_chip_info },
-	{ .compatible = "adi,ad5446", .data = &ad5446_chip_info },
-	{ .compatible = "adi,ad5450", .data = &ad5450_chip_info },
-	{ .compatible = "adi,ad5451", .data = &ad5451_chip_info },
-	{ .compatible = "adi,ad5452", .data = &ad5444_chip_info },
-	{ .compatible = "adi,ad5453", .data = &ad5446_chip_info },
-	{ .compatible = "adi,ad5512a", .data = &ad5512a_chip_info },
-	{ .compatible = "adi,ad5541a", .data = &ad5541a_chip_info },
-	{ .compatible = "adi,ad5542a", .data = &ad5541a_chip_info },
-	{ .compatible = "adi,ad5543", .data = &ad5541a_chip_info },
-	{ .compatible = "adi,ad5553", .data = &ad5553_chip_info },
-	{ .compatible = "adi,ad5600", .data = &ad5541a_chip_info },
-	{ .compatible = "adi,ad5601", .data = &ad5601_chip_info },
-	{ .compatible = "adi,ad5611", .data = &ad5611_chip_info },
-	{ .compatible = "adi,ad5621", .data = &ad5621_chip_info },
-	{ .compatible = "adi,ad5641", .data = &ad5641_chip_info },
-	{ .compatible = "adi,ad5620-2500", .data = &ad5620_2500_chip_info },
-	{ .compatible = "adi,ad5620-1250", .data = &ad5620_1250_chip_info },
-	{ .compatible = "adi,ad5640-2500", .data = &ad5640_2500_chip_info },
-	{ .compatible = "adi,ad5640-1250", .data = &ad5640_1250_chip_info },
-	{ .compatible = "adi,ad5660-2500", .data = &ad5660_2500_chip_info },
-	{ .compatible = "adi,ad5660-1250", .data = &ad5660_1250_chip_info },
-	{ .compatible = "adi,ad5662", .data = &ad5662_chip_info },
-	{ .compatible = "ti,dac081s101", .data = &ad5300_chip_info },
-	{ .compatible = "ti,dac101s101", .data = &ad5310_chip_info },
-	{ .compatible = "ti,dac121s101", .data = &ad5320_chip_info },
-	{ .compatible = "ti,dac7512" },
-	{ }
-};
-MODULE_DEVICE_TABLE(of, ad5446_of_ids);
-
-static int ad5446_spi_probe(struct spi_device *spi)
-{
-	const struct spi_device_id *id = spi_get_device_id(spi);
-	const struct ad5446_chip_info *chip_info;
-
-	chip_info = spi_get_device_match_data(spi);
-	if (!chip_info)
-		return -ENODEV;
-
-	return ad5446_probe(&spi->dev, id->name, chip_info);
-}
-
-static struct spi_driver ad5446_spi_driver = {
-	.driver = {
-		.name	= "ad5446",
-		.of_match_table = ad5446_of_ids,
-	},
-	.probe		= ad5446_spi_probe,
-	.id_table	= ad5446_spi_ids,
-};
-
-static int __init ad5446_spi_register_driver(void)
-{
-	return spi_register_driver(&ad5446_spi_driver);
-}
-
-static void ad5446_spi_unregister_driver(void)
-{
-	spi_unregister_driver(&ad5446_spi_driver);
-}
-
-#else
-
-static inline int ad5446_spi_register_driver(void) { return 0; }
-static inline void ad5446_spi_unregister_driver(void) { }
-
-#endif
-
-#if IS_ENABLED(CONFIG_I2C)
-
-static int ad5622_write(struct ad5446_state *st, unsigned val)
-{
-	struct i2c_client *client = to_i2c_client(st->dev);
-	st->d16 = cpu_to_be16(val);
-	int ret;
-
-	ret = i2c_master_send_dmasafe(client, (char *)&st->d16, sizeof(st->d16));
-	if (ret < 0)
-		return ret;
-	if (ret != sizeof(st->d16))
-		return -EIO;
-
-	return 0;
-}
-
-/*
- * ad5446_supported_i2c_device_ids:
- * The AD5620/40/60 parts are available in different fixed internal reference
- * voltage options. The actual part numbers may look differently
- * (and a bit cryptic), however this style is used to make clear which
- * parts are supported here.
- */
-
-static const struct ad5446_chip_info ad5602_chip_info = {
-	.channel = AD5446_CHANNEL_POWERDOWN(8, 16, 4),
-	.write = ad5622_write,
-};
-
-static const struct ad5446_chip_info ad5612_chip_info = {
-	.channel = AD5446_CHANNEL_POWERDOWN(10, 16, 2),
-	.write = ad5622_write,
-};
-
-static const struct ad5446_chip_info ad5622_chip_info = {
-	.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 0),
-	.write = ad5622_write,
-};
-
-static int ad5446_i2c_probe(struct i2c_client *i2c)
-{
-	const struct i2c_device_id *id = i2c_client_get_device_id(i2c);
-	const struct ad5446_chip_info *chip_info;
-
-	chip_info = i2c_get_match_data(i2c);
-	if (!chip_info)
-		return -ENODEV;
-
-	return ad5446_probe(&i2c->dev, id->name, chip_info);
-}
-
-static const struct i2c_device_id ad5446_i2c_ids[] = {
-	{"ad5301", (kernel_ulong_t)&ad5602_chip_info},
-	{"ad5311", (kernel_ulong_t)&ad5612_chip_info},
-	{"ad5321", (kernel_ulong_t)&ad5622_chip_info},
-	{"ad5602", (kernel_ulong_t)&ad5602_chip_info},
-	{"ad5612", (kernel_ulong_t)&ad5612_chip_info},
-	{"ad5622", (kernel_ulong_t)&ad5622_chip_info},
-	{ }
-};
-MODULE_DEVICE_TABLE(i2c, ad5446_i2c_ids);
-
-static const struct of_device_id ad5446_i2c_of_ids[] = {
-	{ .compatible = "adi,ad5301", .data = &ad5602_chip_info },
-	{ .compatible = "adi,ad5311", .data = &ad5612_chip_info },
-	{ .compatible = "adi,ad5321", .data = &ad5622_chip_info },
-	{ .compatible = "adi,ad5602", .data = &ad5602_chip_info },
-	{ .compatible = "adi,ad5612", .data = &ad5612_chip_info },
-	{ .compatible = "adi,ad5622", .data = &ad5622_chip_info },
-	{ }
-};
-MODULE_DEVICE_TABLE(of, ad5446_i2c_of_ids);
-
-static struct i2c_driver ad5446_i2c_driver = {
-	.driver = {
-		   .name = "ad5446",
-		   .of_match_table = ad5446_i2c_of_ids,
-	},
-	.probe = ad5446_i2c_probe,
-	.id_table = ad5446_i2c_ids,
-};
-
-static int __init ad5446_i2c_register_driver(void)
-{
-	return i2c_add_driver(&ad5446_i2c_driver);
-}
-
-static void __exit ad5446_i2c_unregister_driver(void)
-{
-	i2c_del_driver(&ad5446_i2c_driver);
-}
-
-#else
-
-static inline int ad5446_i2c_register_driver(void) { return 0; }
-static inline void ad5446_i2c_unregister_driver(void) { }
-
-#endif
-
-static int __init ad5446_init(void)
-{
-	int ret;
-
-	ret = ad5446_spi_register_driver();
-	if (ret)
-		return ret;
-
-	ret = ad5446_i2c_register_driver();
-	if (ret) {
-		ad5446_spi_unregister_driver();
-		return ret;
-	}
-
-	return 0;
-}
-module_init(ad5446_init);
-
-static void __exit ad5446_exit(void)
-{
-	ad5446_i2c_unregister_driver();
-	ad5446_spi_unregister_driver();
-}
-module_exit(ad5446_exit);
+EXPORT_SYMBOL_NS_GPL(ad5446_probe, "IIO_AD5446");
 
 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
-MODULE_DESCRIPTION("Analog Devices AD5444/AD5446 DAC");
+MODULE_DESCRIPTION("Analog Devices CORE AD5446 DAC and similar devices");
 MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/dac/ad5446.h b/drivers/iio/dac/ad5446.h
new file mode 100644
index 000000000000..ee3d2c7d1764
--- /dev/null
+++ b/drivers/iio/dac/ad5446.h
@@ -0,0 +1,76 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _LINUX_AD5446_H
+#define _LINUX_AD5446_H
+
+#include <linux/bits.h>
+#include <linux/iio/iio.h>
+#include <linux/mutex.h>
+#include <linux/types.h>
+
+struct device;
+
+extern const struct iio_chan_spec_ext_info ad5446_ext_info_powerdown[];
+
+#define _AD5446_CHANNEL(bits, storage, _shift, ext) { \
+	.type = IIO_VOLTAGE, \
+	.indexed = 1, \
+	.output = 1, \
+	.channel = 0, \
+	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
+	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
+	.scan_type = { \
+		.sign = 'u', \
+		.realbits = (bits), \
+		.storagebits = (storage), \
+		.shift = (_shift), \
+		}, \
+	.ext_info = (ext), \
+}
+
+#define AD5446_CHANNEL(bits, storage, shift) \
+	_AD5446_CHANNEL(bits, storage, shift, NULL)
+
+#define AD5446_CHANNEL_POWERDOWN(bits, storage, shift) \
+	_AD5446_CHANNEL(bits, storage, shift, ad5446_ext_info_powerdown)
+
+/**
+ * struct ad5446_state - driver instance specific data
+ * @dev:		this device
+ * @chip_info:		chip model specific constants, available modes etc
+ * @vref_mv:		actual reference voltage used
+ * @cached_val:		store/retrieve values during power down
+ * @pwr_down_mode:	power down mode (1k, 100k or tristate)
+ * @pwr_down:		true if the device is in power down
+ * @lock:		lock to protect the data buffer during write ops
+ */
+struct ad5446_state {
+	struct device *dev;
+	const struct ad5446_chip_info *chip_info;
+	unsigned short vref_mv;
+	unsigned int cached_val;
+	unsigned int pwr_down_mode;
+	unsigned int pwr_down;
+	/* mutex to protect device shared data */
+	struct mutex lock;
+	union {
+		__be16 d16;
+		u8 d24[3];
+	} __aligned(IIO_DMA_MINALIGN);
+};
+
+/**
+ * struct ad5446_chip_info - chip specific information
+ * @channel:		channel spec for the DAC
+ * @int_vref_mv:	AD5620/40/60: the internal reference voltage
+ * @write:		chip specific helper function to write to the register
+ */
+struct ad5446_chip_info {
+	struct iio_chan_spec channel;
+	u16 int_vref_mv;
+	int (*write)(struct ad5446_state *st, unsigned int val);
+};
+
+int ad5446_probe(struct device *dev, const char *name,
+		 const struct ad5446_chip_info *chip_info);
+
+#endif

-- 
2.51.0

Re: [PATCH v4 07/12] iio: dac: ad5446: Separate I2C/SPI into different drivers

[Andy Shevchenko]

On Tue, Nov 04, 2025 at 03:35:12PM +0000, Nuno Sá via B4 Relay wrote:
> 
> Properly separate the I2C and SPI drivers into two different drivers
> living in their own source file (as usual). So that no need for the
> hacky ifdefery.

...

> +#include <linux/iio/iio.h>
> +#include <linux/mutex.h>
> +#include <linux/types.h>
> +
> +struct device;
> +
> +extern const struct iio_chan_spec_ext_info ad5446_ext_info_powerdown[];
> +
> +#define _AD5446_CHANNEL(bits, storage, _shift, ext) { \
> +	.type = IIO_VOLTAGE, \
> +	.indexed = 1, \
> +	.output = 1, \

> +	.channel = 0, \

Unneeded.

> +	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
> +	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
> +	.scan_type = { \
> +		.sign = 'u', \
> +		.realbits = (bits), \
> +		.storagebits = (storage), \
> +		.shift = (_shift), \
> +		}, \
> +	.ext_info = (ext), \
> +}
> +
> +#define AD5446_CHANNEL(bits, storage, shift) \
> +	_AD5446_CHANNEL(bits, storage, shift, NULL)
> +#define AD5446_CHANNEL_POWERDOWN(bits, storage, shift) \
> +	_AD5446_CHANNEL(bits, storage, shift, ad5446_ext_info_powerdown)
> +
> +/**
> + * struct ad5446_state - driver instance specific data
> + * @dev:		this device
> + * @chip_info:		chip model specific constants, available modes etc
> + * @vref_mv:		actual reference voltage used
> + * @cached_val:		store/retrieve values during power down
> + * @pwr_down_mode:	power down mode (1k, 100k or tristate)
> + * @pwr_down:		true if the device is in power down
> + * @lock:		lock to protect the data buffer during write ops
> + */
> +struct ad5446_state {
> +	struct device *dev;
> +	const struct ad5446_chip_info *chip_info;
> +	unsigned short vref_mv;

_mV?

> +	unsigned int cached_val;
> +	unsigned int pwr_down_mode;
> +	unsigned int pwr_down;
> +	/* mutex to protect device shared data */
> +	struct mutex lock;
> +	union {
> +		__be16 d16;
> +		u8 d24[3];
> +	} __aligned(IIO_DMA_MINALIGN);
> +};
> +
> +/**
> + * struct ad5446_chip_info - chip specific information
> + * @channel:		channel spec for the DAC
> + * @int_vref_mv:	AD5620/40/60: the internal reference voltage
> + * @write:		chip specific helper function to write to the register
> + */
> +struct ad5446_chip_info {
> +	struct iio_chan_spec channel;
> +	u16 int_vref_mv;

_mV?

> +	int (*write)(struct ad5446_state *st, unsigned int val);
> +};
> +
> +int ad5446_probe(struct device *dev, const char *name,
> +		 const struct ad5446_chip_info *chip_info);
> +
> +#endif

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v4 07/12] iio: dac: ad5446: Separate I2C/SPI into different drivers

[Jonathan Cameron]

On Tue, 4 Nov 2025 20:20:31 +0200
Andy Shevchenko <andriy.shevchenko@intel.com> wrote:

> On Tue, Nov 04, 2025 at 03:35:12PM +0000, Nuno Sá via B4 Relay wrote:
> > 
> > Properly separate the I2C and SPI drivers into two different drivers
> > living in their own source file (as usual). So that no need for the
> > hacky ifdefery.  
> 
> ...
> 
> > +#include <linux/iio/iio.h>
> > +#include <linux/mutex.h>
> > +#include <linux/types.h>
> > +
> > +struct device;
> > +
> > +extern const struct iio_chan_spec_ext_info ad5446_ext_info_powerdown[];
> > +
> > +#define _AD5446_CHANNEL(bits, storage, _shift, ext) { \
> > +	.type = IIO_VOLTAGE, \
> > +	.indexed = 1, \
> > +	.output = 1, \  
> 
> > +	.channel = 0, \  
> 
> Unneeded.
Even though it is indeed not strictly needed:
As it's indexed I'd normally suggest we keep this as explicitly
set.  There isn't an obvious default for a channel number.
> 
> > +	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
> > +	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
> > +	.scan_type = { \
> > +		.sign = 'u', \
> > +		.realbits = (bits), \
> > +		.storagebits = (storage), \
> > +		.shift = (_shift), \
> > +		}, \
> > +	.ext_info = (ext), \
> > +}
> > +
> > +#define AD5446_CHANNEL(bits, storage, shift) \
> > +	_AD5446_CHANNEL(bits, storage, shift, NULL)
> > +#define AD5446_CHANNEL_POWERDOWN(bits, storage, shift) \
> > +	_AD5446_CHANNEL(bits, storage, shift, ad5446_ext_info_powerdown)
> > +
> > +/**
> > + * struct ad5446_state - driver instance specific data
> > + * @dev:		this device
> > + * @chip_info:		chip model specific constants, available modes etc
> > + * @vref_mv:		actual reference voltage used
> > + * @cached_val:		store/retrieve values during power down
> > + * @pwr_down_mode:	power down mode (1k, 100k or tristate)
> > + * @pwr_down:		true if the device is in power down
> > + * @lock:		lock to protect the data buffer during write ops
> > + */
> > +struct ad5446_state {
> > +	struct device *dev;
> > +	const struct ad5446_chip_info *chip_info;
> > +	unsigned short vref_mv;  
> 
> _mV?
> 
> > +	unsigned int cached_val;
> > +	unsigned int pwr_down_mode;
> > +	unsigned int pwr_down;
> > +	/* mutex to protect device shared data */
> > +	struct mutex lock;
> > +	union {
> > +		__be16 d16;
> > +		u8 d24[3];
> > +	} __aligned(IIO_DMA_MINALIGN);
> > +};
> > +
> > +/**
> > + * struct ad5446_chip_info - chip specific information
> > + * @channel:		channel spec for the DAC
> > + * @int_vref_mv:	AD5620/40/60: the internal reference voltage
> > + * @write:		chip specific helper function to write to the register
> > + */
> > +struct ad5446_chip_info {
> > +	struct iio_chan_spec channel;
> > +	u16 int_vref_mv;  
> 
> _mV?
> 
> > +	int (*write)(struct ad5446_state *st, unsigned int val);
> > +};
> > +
> > +int ad5446_probe(struct device *dev, const char *name,
> > +		 const struct ad5446_chip_info *chip_info);
> > +
> > +#endif  
> 

Re: [PATCH v4 07/12] iio: dac: ad5446: Separate I2C/SPI into different drivers

[Jonathan Cameron]

> > +
> > +#define AD5446_CHANNEL(bits, storage, shift) \
> > +	_AD5446_CHANNEL(bits, storage, shift, NULL)
> > +#define AD5446_CHANNEL_POWERDOWN(bits, storage, shift) \
> > +	_AD5446_CHANNEL(bits, storage, shift, ad5446_ext_info_powerdown)
> > +
> > +/**
> > + * struct ad5446_state - driver instance specific data
> > + * @dev:		this device
> > + * @chip_info:		chip model specific constants, available modes etc
> > + * @vref_mv:		actual reference voltage used
> > + * @cached_val:		store/retrieve values during power down
> > + * @pwr_down_mode:	power down mode (1k, 100k or tristate)
> > + * @pwr_down:		true if the device is in power down
> > + * @lock:		lock to protect the data buffer during write ops
> > + */
> > +struct ad5446_state {
> > +	struct device *dev;
> > +	const struct ad5446_chip_info *chip_info;
> > +	unsigned short vref_mv;  
> 
> _mV?

I'm fine with tidying these up, but not in a code move patch.
Nuno, please considering doing this as a follow up.

> 
> > +	unsigned int cached_val;
> > +	unsigned int pwr_down_mode;
> > +	unsigned int pwr_down;
> > +	/* mutex to protect device shared data */
> > +	struct mutex lock;
> > +	union {
> > +		__be16 d16;
> > +		u8 d24[3];
> > +	} __aligned(IIO_DMA_MINALIGN);
> > +};
> > +
> > +/**
> > + * struct ad5446_chip_info - chip specific information
> > + * @channel:		channel spec for the DAC
> > + * @int_vref_mv:	AD5620/40/60: the internal reference voltage
> > + * @write:		chip specific helper function to write to the register
> > + */
> > +struct ad5446_chip_info {
> > +	struct iio_chan_spec channel;
> > +	u16 int_vref_mv;  
> 
> _mV?
> 
> > +	int (*write)(struct ad5446_state *st, unsigned int val);
> > +};
> > +
> > +int ad5446_probe(struct device *dev, const char *name,
> > +		 const struct ad5446_chip_info *chip_info);
> > +
> > +#endif  
> 

Re: [PATCH v4 07/12] iio: dac: ad5446: Separate I2C/SPI into different drivers

[Jonathan Cameron]

On Tue, 04 Nov 2025 15:35:12 +0000
Nuno Sá via B4 Relay <devnull+nuno.sa.analog.com@kernel.org> wrote:

> From: Nuno Sá <nuno.sa@analog.com>
> 
> Properly separate the I2C and SPI drivers into two different drivers
> living in their own source file (as usual). So that no need for the
> hacky ifdefery.
> 
> Signed-off-by: Nuno Sá <nuno.sa@analog.com>
Applied in a fairly manual process due to earlier tweaks. Please sanity check
I didn't mess it up!

Re: [PATCH v4 07/12] iio: dac: ad5446: Separate I2C/SPI into different drivers

[Nuno Sá]

On Sun, 2025-11-09 at 16:16 +0000, Jonathan Cameron wrote:
> On Tue, 04 Nov 2025 15:35:12 +0000
> Nuno Sá via B4 Relay <devnull+nuno.sa.analog.com@kernel.org> wrote:
> 
> > From: Nuno Sá <nuno.sa@analog.com>
> > 
> > Properly separate the I2C and SPI drivers into two different drivers
> > living in their own source file (as usual). So that no need for the
> > hacky ifdefery.
> > 
> > Signed-off-by: Nuno Sá <nuno.sa@analog.com>
> Applied in a fairly manual process due to earlier tweaks. Please sanity check
> I didn't mess it up!

Yeps, checked testing and patch looks good.

- Nuno Sá

[PATCH v4 08/12] iio: dac: ad5446: Make use of devm_mutex_init()

[Nuno Sá via B4 Relay]

From: Nuno Sá <nuno.sa@analog.com>

Use devm_mutex_init() which is helpful with CONFIG_DEBUG_MUTEXES.

Signed-off-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/dac/ad5446.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/iio/dac/ad5446.c b/drivers/iio/dac/ad5446.c
index c7876217c7ec..59e1f67ef334 100644
--- a/drivers/iio/dac/ad5446.c
+++ b/drivers/iio/dac/ad5446.c
@@ -184,7 +184,9 @@ int ad5446_probe(struct device *dev, const char *name,
 	indio_dev->channels = &st->chip_info->channel;
 	indio_dev->num_channels = 1;
 
-	mutex_init(&st->lock);
+	ret = devm_mutex_init(dev, &st->lock);
+	if (ret)
+		return ret;
 
 	st->pwr_down_mode = MODE_PWRDWN_1k;
 

-- 
2.51.0

Re: [PATCH v4 08/12] iio: dac: ad5446: Make use of devm_mutex_init()

[Jonathan Cameron]

On Tue, 04 Nov 2025 15:35:13 +0000
Nuno Sá via B4 Relay <devnull+nuno.sa.analog.com@kernel.org> wrote:

> From: Nuno Sá <nuno.sa@analog.com>
> 
> Use devm_mutex_init() which is helpful with CONFIG_DEBUG_MUTEXES.
> 
> Signed-off-by: Nuno Sá <nuno.sa@analog.com>
Applied.

> ---
>  drivers/iio/dac/ad5446.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/iio/dac/ad5446.c b/drivers/iio/dac/ad5446.c
> index c7876217c7ec..59e1f67ef334 100644
> --- a/drivers/iio/dac/ad5446.c
> +++ b/drivers/iio/dac/ad5446.c
> @@ -184,7 +184,9 @@ int ad5446_probe(struct device *dev, const char *name,
>  	indio_dev->channels = &st->chip_info->channel;
>  	indio_dev->num_channels = 1;
>  
> -	mutex_init(&st->lock);
> +	ret = devm_mutex_init(dev, &st->lock);
> +	if (ret)
> +		return ret;
>  
>  	st->pwr_down_mode = MODE_PWRDWN_1k;
>  
> 

[PATCH v4 09/12] iio: dac: ad5446: Make use of the cleanup helpers

[Nuno Sá via B4 Relay]

From: Nuno Sá <nuno.sa@analog.com>

Use the auto unlocking helpers from cleanup.h. Allows for some code
simplification.

While at it, don't use the ternary operator in
ad5446_write_dac_powerdown() and add an helper function to write the DAC
code. The reason for the function was purely to avoid having to use
unreachable().

Signed-off-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/dac/ad5446.c | 45 ++++++++++++++++++++++++++-------------------
 1 file changed, 26 insertions(+), 19 deletions(-)

diff --git a/drivers/iio/dac/ad5446.c b/drivers/iio/dac/ad5446.c
index 59e1f67ef334..1943e8014990 100644
--- a/drivers/iio/dac/ad5446.c
+++ b/drivers/iio/dac/ad5446.c
@@ -5,6 +5,7 @@
  * Copyright 2010 Analog Devices Inc.
  */
 
+#include <linux/cleanup.h>
 #include <linux/export.h>
 #include <linux/interrupt.h>
 #include <linux/workqueue.h>
@@ -80,7 +81,7 @@ static ssize_t ad5446_write_dac_powerdown(struct iio_dev *indio_dev,
 	if (ret)
 		return ret;
 
-	mutex_lock(&st->lock);
+	guard(mutex)(&st->lock);
 	st->pwr_down = powerdown;
 
 	if (st->pwr_down) {
@@ -91,9 +92,10 @@ static ssize_t ad5446_write_dac_powerdown(struct iio_dev *indio_dev,
 	}
 
 	ret = st->chip_info->write(st, val);
-	mutex_unlock(&st->lock);
+	if (ret)
+		return ret;
 
-	return ret ? ret : len;
+	return len;
 }
 
 const struct iio_chan_spec_ext_info ad5446_ext_info_powerdown[] = {
@@ -129,32 +131,37 @@ static int ad5446_read_raw(struct iio_dev *indio_dev,
 	return -EINVAL;
 }
 
+static int ad5446_write_dac_raw(struct iio_dev *indio_dev,
+				const struct iio_chan_spec *chan,
+				int val)
+{
+	struct ad5446_state *st = iio_priv(indio_dev);
+
+	if (val >= (1 << chan->scan_type.realbits) || val < 0)
+		return -EINVAL;
+
+	val <<= chan->scan_type.shift;
+	guard(mutex)(&st->lock);
+
+	st->cached_val = val;
+	if (st->pwr_down)
+		return 0;
+
+	return st->chip_info->write(st, val);
+}
+
 static int ad5446_write_raw(struct iio_dev *indio_dev,
 			       struct iio_chan_spec const *chan,
 			       int val,
 			       int val2,
 			       long mask)
 {
-	struct ad5446_state *st = iio_priv(indio_dev);
-	int ret = 0;
-
 	switch (mask) {
 	case IIO_CHAN_INFO_RAW:
-		if (val >= (1 << chan->scan_type.realbits) || val < 0)
-			return -EINVAL;
-
-		val <<= chan->scan_type.shift;
-		mutex_lock(&st->lock);
-		st->cached_val = val;
-		if (!st->pwr_down)
-			ret = st->chip_info->write(st, val);
-		mutex_unlock(&st->lock);
-		break;
+		return ad5446_write_dac_raw(indio_dev, chan, val);
 	default:
-		ret = -EINVAL;
+		return -EINVAL;
 	}
-
-	return ret;
 }
 
 static const struct iio_info ad5446_info = {

-- 
2.51.0

Re: [PATCH v4 09/12] iio: dac: ad5446: Make use of the cleanup helpers

[Andy Shevchenko]

On Tue, Nov 04, 2025 at 03:35:14PM +0000, Nuno Sá via B4 Relay wrote:

> Use the auto unlocking helpers from cleanup.h. Allows for some code
> simplification.
> 
> While at it, don't use the ternary operator in
> ad5446_write_dac_powerdown() and add an helper function to write the DAC
> code. The reason for the function was purely to avoid having to use
> unreachable().

...

> +static int ad5446_write_dac_raw(struct iio_dev *indio_dev,
> +				const struct iio_chan_spec *chan,
> +				int val)
> +{
> +	struct ad5446_state *st = iio_priv(indio_dev);

> +	if (val >= (1 << chan->scan_type.realbits) || val < 0)
> +		return -EINVAL;

BIT() ?
in_range() ?

> +	val <<= chan->scan_type.shift;
> +	guard(mutex)(&st->lock);
> +
> +	st->cached_val = val;
> +	if (st->pwr_down)
> +		return 0;
> +
> +	return st->chip_info->write(st, val);
> +}


-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v4 09/12] iio: dac: ad5446: Make use of the cleanup helpers

[Jonathan Cameron]

On Tue, 4 Nov 2025 20:23:09 +0200
Andy Shevchenko <andriy.shevchenko@intel.com> wrote:

> On Tue, Nov 04, 2025 at 03:35:14PM +0000, Nuno Sá via B4 Relay wrote:
> 
> > Use the auto unlocking helpers from cleanup.h. Allows for some code
> > simplification.
> > 
> > While at it, don't use the ternary operator in
> > ad5446_write_dac_powerdown() and add an helper function to write the DAC
> > code. The reason for the function was purely to avoid having to use
> > unreachable().  
> 
> ...
> 
> > +static int ad5446_write_dac_raw(struct iio_dev *indio_dev,
> > +				const struct iio_chan_spec *chan,
> > +				int val)
> > +{
> > +	struct ad5446_state *st = iio_priv(indio_dev);  
> 
> > +	if (val >= (1 << chan->scan_type.realbits) || val < 0)
> > +		return -EINVAL;  
> 
> BIT() ?
> in_range() ?
> 
It's a code move, so I'd rather that change if made is a separate patch.
BIT() is fine, but in_range() is a bit odd when the start is 0.

Hence applied this as it stands.
> > +	val <<= chan->scan_type.shift;
> > +	guard(mutex)(&st->lock);
> > +
> > +	st->cached_val = val;
> > +	if (st->pwr_down)
> > +		return 0;
> > +
> > +	return st->chip_info->write(st, val);
> > +}  
> 
> 

[PATCH v4 10/12] iio: dac: ad5446: Refactor header inclusion

[Nuno Sá via B4 Relay]

From: Nuno Sá <nuno.sa@analog.com>

Make sure include files are given in alphabetical order and that we include
the ones that were missing and remove the ones we don't really use.

Signed-off-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/dac/ad5446.c | 18 +++++++-----------
 1 file changed, 7 insertions(+), 11 deletions(-)

diff --git a/drivers/iio/dac/ad5446.c b/drivers/iio/dac/ad5446.c
index 1943e8014990..0556ce78c2f6 100644
--- a/drivers/iio/dac/ad5446.c
+++ b/drivers/iio/dac/ad5446.c
@@ -5,21 +5,17 @@
  * Copyright 2010 Analog Devices Inc.
  */
 
+#include <linux/array_size.h>
 #include <linux/cleanup.h>
-#include <linux/export.h>
-#include <linux/interrupt.h>
-#include <linux/workqueue.h>
 #include <linux/device.h>
-#include <linux/kernel.h>
-#include <linux/slab.h>
-#include <linux/sysfs.h>
-#include <linux/list.h>
-#include <linux/regulator/consumer.h>
 #include <linux/err.h>
-#include <linux/module.h>
-
+#include <linux/export.h>
 #include <linux/iio/iio.h>
-#include <linux/iio/sysfs.h>
+#include <linux/kstrtox.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/regulator/consumer.h>
+#include <linux/sysfs.h>
 
 #include "ad5446.h"
 

-- 
2.51.0

Re: [PATCH v4 10/12] iio: dac: ad5446: Refactor header inclusion

[Andy Shevchenko]

On Tue, Nov 04, 2025 at 03:35:15PM +0000, Nuno Sá via B4 Relay wrote:
> 
> Make sure include files are given in alphabetical order and that we include
> the ones that were missing and remove the ones we don't really use.

...

> +#include <linux/export.h>
>  #include <linux/iio/iio.h>
> +#include <linux/kstrtox.h>
> +#include <linux/module.h>
> +#include <linux/mutex.h>
> +#include <linux/regulator/consumer.h>
> +#include <linux/sysfs.h>

Most likely the types.h is missing and maybe more...

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v4 10/12] iio: dac: ad5446: Refactor header inclusion

[Jonathan Cameron]

On Tue, 4 Nov 2025 20:24:19 +0200
Andy Shevchenko <andriy.shevchenko@intel.com> wrote:

> On Tue, Nov 04, 2025 at 03:35:15PM +0000, Nuno Sá via B4 Relay wrote:
> > 
> > Make sure include files are given in alphabetical order and that we include
> > the ones that were missing and remove the ones we don't really use.  
> 
> ...
> 
> > +#include <linux/export.h>
> >  #include <linux/iio/iio.h>
> > +#include <linux/kstrtox.h>
> > +#include <linux/module.h>
> > +#include <linux/mutex.h>
> > +#include <linux/regulator/consumer.h>
> > +#include <linux/sysfs.h>  
> 
> Most likely the types.h is missing and maybe more...
> 

Looks like types.h belongs only in the header.

FWIW I ran iwyu against this with my usual iio.imp file
(shared previously on list)

drivers/iio/dac/ad5446.h should add these lines:
#include <linux/compiler.h>  // for __aligned
#include <linux/minmax.h>    // for __cmp_op_max
#include <linux/stddef.h>    // for NULL

drivers/iio/dac/ad5446.h should remove these lines:

The full include-list for drivers/iio/dac/ad5446.h:
#include <linux/bits.h>      // for BIT
#include <linux/compiler.h>  // for __aligned
#include <linux/iio/iio.h>   // for IIO_DMA_MINALIGN, iio_chan_spec
#include <linux/minmax.h>    // for __cmp_op_max
#include <linux/mutex.h>     // for mutex
#include <linux/stddef.h>    // for NULL
#include <linux/types.h>     // for __be16, u16, u8
struct device;  // lines 10-10
---

(drivers/iio/dac/ad5446.c has correct #includes/fwd-decls)

(drivers/iio/dac/ad5446-spi.c has correct #includes/fwd-decls)

(drivers/iio/dac/ad5446-i2c.c has correct #includes/fwd-decls)


So maybe those 3 extra in the header  but seem not much needed in the c file.

Hence applied with the compiler.h one added to the header.
Whereever that minmax is coming from is burried deep in macro
so probably isn't appropriate anyway and including stddef for NULL seems
over the top.


Jonathan

Re: [PATCH v4 10/12] iio: dac: ad5446: Refactor header inclusion

[Andy Shevchenko]

On Sun, Nov 09, 2025 at 04:30:30PM +0000, Jonathan Cameron wrote:
> On Tue, 4 Nov 2025 20:24:19 +0200
> Andy Shevchenko <andriy.shevchenko@intel.com> wrote:
> > On Tue, Nov 04, 2025 at 03:35:15PM +0000, Nuno Sá via B4 Relay wrote:

...

> > > +#include <linux/export.h>
> > >  #include <linux/iio/iio.h>
> > > +#include <linux/kstrtox.h>
> > > +#include <linux/module.h>
> > > +#include <linux/mutex.h>
> > > +#include <linux/regulator/consumer.h>
> > > +#include <linux/sysfs.h>  
> > 
> > Most likely the types.h is missing and maybe more...
> 
> Looks like types.h belongs only in the header.

Hmm... IIRC my suggestion was based on seeing one of uXX/sXX in the code,
but now I lost the context and maybe I memorised that wrongly.

> FWIW I ran iwyu against this with my usual iio.imp file
> (shared previously on list)
> 
> drivers/iio/dac/ad5446.h should add these lines:
> #include <linux/compiler.h>  // for __aligned
> #include <linux/minmax.h>    // for __cmp_op_max
> #include <linux/stddef.h>    // for NULL
> 
> drivers/iio/dac/ad5446.h should remove these lines:
> 
> The full include-list for drivers/iio/dac/ad5446.h:
> #include <linux/bits.h>      // for BIT
> #include <linux/compiler.h>  // for __aligned
> #include <linux/iio/iio.h>   // for IIO_DMA_MINALIGN, iio_chan_spec
> #include <linux/minmax.h>    // for __cmp_op_max
> #include <linux/mutex.h>     // for mutex
> #include <linux/stddef.h>    // for NULL
> #include <linux/types.h>     // for __be16, u16, u8
> struct device;  // lines 10-10
> ---
> 
> So maybe those 3 extra in the header  but seem not much needed in the c file.
> 
> Hence applied with the compiler.h one added to the header.
> Whereever that minmax is coming from is burried deep in macro
> so probably isn't appropriate anyway

If we use min()/max() or something from there it relies on the __cmp_op_max(),
so probably it's needed.

> and including stddef for NULL seems over the top.

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v4 10/12] iio: dac: ad5446: Refactor header inclusion

[Jonathan Cameron]

On Sun, 9 Nov 2025 21:32:35 +0200
Andy Shevchenko <andriy.shevchenko@intel.com> wrote:

> On Sun, Nov 09, 2025 at 04:30:30PM +0000, Jonathan Cameron wrote:
> > On Tue, 4 Nov 2025 20:24:19 +0200
> > Andy Shevchenko <andriy.shevchenko@intel.com> wrote:  
> > > On Tue, Nov 04, 2025 at 03:35:15PM +0000, Nuno Sá via B4 Relay wrote:  
> 
> ...
> 
> > > > +#include <linux/export.h>
> > > >  #include <linux/iio/iio.h>
> > > > +#include <linux/kstrtox.h>
> > > > +#include <linux/module.h>
> > > > +#include <linux/mutex.h>
> > > > +#include <linux/regulator/consumer.h>
> > > > +#include <linux/sysfs.h>    
> > > 
> > > Most likely the types.h is missing and maybe more...  
> > 
> > Looks like types.h belongs only in the header.  
> 
> Hmm... IIRC my suggestion was based on seeing one of uXX/sXX in the code,
> but now I lost the context and maybe I memorised that wrongly.
> 
> > FWIW I ran iwyu against this with my usual iio.imp file
> > (shared previously on list)
> > 
> > drivers/iio/dac/ad5446.h should add these lines:
> > #include <linux/compiler.h>  // for __aligned
> > #include <linux/minmax.h>    // for __cmp_op_max
> > #include <linux/stddef.h>    // for NULL
> > 
> > drivers/iio/dac/ad5446.h should remove these lines:
> > 
> > The full include-list for drivers/iio/dac/ad5446.h:
> > #include <linux/bits.h>      // for BIT
> > #include <linux/compiler.h>  // for __aligned
> > #include <linux/iio/iio.h>   // for IIO_DMA_MINALIGN, iio_chan_spec
> > #include <linux/minmax.h>    // for __cmp_op_max
> > #include <linux/mutex.h>     // for mutex
> > #include <linux/stddef.h>    // for NULL
> > #include <linux/types.h>     // for __be16, u16, u8
> > struct device;  // lines 10-10
> > ---
> > 
> > So maybe those 3 extra in the header  but seem not much needed in the c file.
> > 
> > Hence applied with the compiler.h one added to the header.
> > Whereever that minmax is coming from is burried deep in macro
> > so probably isn't appropriate anyway  
> 
> If we use min()/max() or something from there it relies on the __cmp_op_max(),
> so probably it's needed.

That was where I got stuck.  Neither min nor max is used in this file.
Anyhow, I played guess where it might be.
I think it is probablythe MAX() call in iio.h (which includes minmax.h)
Hence I'm not bothered about that being included directly in this c file.

If anyone can spot a more direct use then shout and I'll be happy to add
that include.

Jonathan


> 
> > and including stddef for NULL seems over the top.  
> 

[PATCH v4 11/12] iio: dac: ad5446: Fix coding style issues

[Nuno Sá via B4 Relay]

From: Nuno Sá <nuno.sa@analog.com>

Fix style issues as reported by checkpatch.

Signed-off-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/dac/ad5446.c | 23 +++++++++++------------
 1 file changed, 11 insertions(+), 12 deletions(-)

diff --git a/drivers/iio/dac/ad5446.c b/drivers/iio/dac/ad5446.c
index 0556ce78c2f6..46a2eadb1d9b 100644
--- a/drivers/iio/dac/ad5446.c
+++ b/drivers/iio/dac/ad5446.c
@@ -28,7 +28,8 @@ static const char * const ad5446_powerdown_modes[] = {
 };
 
 static int ad5446_set_powerdown_mode(struct iio_dev *indio_dev,
-	const struct iio_chan_spec *chan, unsigned int mode)
+				     const struct iio_chan_spec *chan,
+				     unsigned int mode)
 {
 	struct ad5446_state *st = iio_priv(indio_dev);
 
@@ -38,7 +39,7 @@ static int ad5446_set_powerdown_mode(struct iio_dev *indio_dev,
 }
 
 static int ad5446_get_powerdown_mode(struct iio_dev *indio_dev,
-	const struct iio_chan_spec *chan)
+				     const struct iio_chan_spec *chan)
 {
 	struct ad5446_state *st = iio_priv(indio_dev);
 
@@ -53,9 +54,9 @@ static const struct iio_enum ad5446_powerdown_mode_enum = {
 };
 
 static ssize_t ad5446_read_dac_powerdown(struct iio_dev *indio_dev,
-					   uintptr_t private,
-					   const struct iio_chan_spec *chan,
-					   char *buf)
+					 uintptr_t private,
+					 const struct iio_chan_spec *chan,
+					 char *buf)
 {
 	struct ad5446_state *st = iio_priv(indio_dev);
 
@@ -63,9 +64,9 @@ static ssize_t ad5446_read_dac_powerdown(struct iio_dev *indio_dev,
 }
 
 static ssize_t ad5446_write_dac_powerdown(struct iio_dev *indio_dev,
-					    uintptr_t private,
-					    const struct iio_chan_spec *chan,
-					    const char *buf, size_t len)
+					  uintptr_t private,
+					  const struct iio_chan_spec *chan,
+					  const char *buf, size_t len)
 {
 	struct ad5446_state *st = iio_priv(indio_dev);
 	unsigned int shift;
@@ -147,10 +148,8 @@ static int ad5446_write_dac_raw(struct iio_dev *indio_dev,
 }
 
 static int ad5446_write_raw(struct iio_dev *indio_dev,
-			       struct iio_chan_spec const *chan,
-			       int val,
-			       int val2,
-			       long mask)
+			    struct iio_chan_spec const *chan, int val,
+			    int val2, long mask)
 {
 	switch (mask) {
 	case IIO_CHAN_INFO_RAW:

-- 
2.51.0

Re: [PATCH v4 11/12] iio: dac: ad5446: Fix coding style issues

[Andy Shevchenko]

On Tue, Nov 04, 2025 at 03:35:16PM +0000, Nuno Sá via B4 Relay wrote:

> Fix style issues as reported by checkpatch.

Can we do this before splitting the driver?
This sounds to me like a change towards the fix, however quite minor, but still
better to move it closer to the beginning of the series.

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v4 11/12] iio: dac: ad5446: Fix coding style issues

[Jonathan Cameron]

On Tue, 4 Nov 2025 20:26:16 +0200
Andy Shevchenko <andriy.shevchenko@intel.com> wrote:

> On Tue, Nov 04, 2025 at 03:35:16PM +0000, Nuno Sá via B4 Relay wrote:
> 
> > Fix style issues as reported by checkpatch.  
> 
> Can we do this before splitting the driver?
> This sounds to me like a change towards the fix, however quite minor, but still
> better to move it closer to the beginning of the series.
> 

If it was more than whitespace tweaks I'd agree with you.  For this I'm not
caring enough to insist on it.  + too many threads flying around so I want
to merge some :)

Applied.

[PATCH v4 12/12] iio: dac: ad5446: Add AD5542 to the spi id table

[Nuno Sá via B4 Relay]

From: Michael Hennerich <michael.hennerich@analog.com>

This adds support for the AD5542 single channel Current Source and
Voltage Output DACs.

It is similar to the AD5542A model so just use the same id.

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Co-developed-by: Nuno Sá <nuno.sa@analog.com>
Signed-off-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/dac/ad5446-spi.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/iio/dac/ad5446-spi.c b/drivers/iio/dac/ad5446-spi.c
index 1a52f6014fad..487268d52ce2 100644
--- a/drivers/iio/dac/ad5446-spi.c
+++ b/drivers/iio/dac/ad5446-spi.c
@@ -175,6 +175,7 @@ static const struct spi_device_id ad5446_spi_ids[] = {
 	{"ad5453", (kernel_ulong_t)&ad5446_chip_info}, /* ad5453 is compatible to the ad5446 */
 	{"ad5512a", (kernel_ulong_t)&ad5512a_chip_info},
 	{"ad5541a", (kernel_ulong_t)&ad5541a_chip_info},
+	{"ad5542", (kernel_ulong_t)&ad5541a_chip_info}, /* ad5541a and ad5542 are compatible */
 	{"ad5542a", (kernel_ulong_t)&ad5541a_chip_info}, /* ad5541a and ad5542a are compatible */
 	{"ad5543", (kernel_ulong_t)&ad5541a_chip_info}, /* ad5541a and ad5543 are compatible */
 	{"ad5553", (kernel_ulong_t)&ad5553_chip_info},
@@ -211,6 +212,7 @@ static const struct of_device_id ad5446_of_ids[] = {
 	{ .compatible = "adi,ad5453", .data = &ad5446_chip_info },
 	{ .compatible = "adi,ad5512a", .data = &ad5512a_chip_info },
 	{ .compatible = "adi,ad5541a", .data = &ad5541a_chip_info },
+	{ .compatible = "adi,ad5542", .data = &ad5541a_chip_info },
 	{ .compatible = "adi,ad5542a", .data = &ad5541a_chip_info },
 	{ .compatible = "adi,ad5543", .data = &ad5541a_chip_info },
 	{ .compatible = "adi,ad5553", .data = &ad5553_chip_info },

-- 
2.51.0

Re: [PATCH v4 12/12] iio: dac: ad5446: Add AD5542 to the spi id table

[Jonathan Cameron]

On Tue, 04 Nov 2025 15:35:17 +0000
Nuno Sá via B4 Relay <devnull+nuno.sa.analog.com@kernel.org> wrote:

> From: Michael Hennerich <michael.hennerich@analog.com>
> 
> This adds support for the AD5542 single channel Current Source and
> Voltage Output DACs.
> 
> It is similar to the AD5542A model so just use the same id.
> 
> Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
> Co-developed-by: Nuno Sá <nuno.sa@analog.com>
> Signed-off-by: Nuno Sá <nuno.sa@analog.com>
> ---
>  drivers/iio/dac/ad5446-spi.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/iio/dac/ad5446-spi.c b/drivers/iio/dac/ad5446-spi.c
> index 1a52f6014fad..487268d52ce2 100644
> --- a/drivers/iio/dac/ad5446-spi.c
> +++ b/drivers/iio/dac/ad5446-spi.c
> @@ -175,6 +175,7 @@ static const struct spi_device_id ad5446_spi_ids[] = {
>  	{"ad5453", (kernel_ulong_t)&ad5446_chip_info}, /* ad5453 is compatible to the ad5446 */
>  	{"ad5512a", (kernel_ulong_t)&ad5512a_chip_info},
>  	{"ad5541a", (kernel_ulong_t)&ad5541a_chip_info},
> +	{"ad5542", (kernel_ulong_t)&ad5541a_chip_info}, /* ad5541a and ad5542 are compatible */
>  	{"ad5542a", (kernel_ulong_t)&ad5541a_chip_info}, /* ad5541a and ad5542a are compatible */
>  	{"ad5543", (kernel_ulong_t)&ad5541a_chip_info}, /* ad5541a and ad5543 are compatible */
>  	{"ad5553", (kernel_ulong_t)&ad5553_chip_info},
> @@ -211,6 +212,7 @@ static const struct of_device_id ad5446_of_ids[] = {
>  	{ .compatible = "adi,ad5453", .data = &ad5446_chip_info },
>  	{ .compatible = "adi,ad5512a", .data = &ad5512a_chip_info },
>  	{ .compatible = "adi,ad5541a", .data = &ad5541a_chip_info },
> +	{ .compatible = "adi,ad5542", .data = &ad5541a_chip_info },
>  	{ .compatible = "adi,ad5542a", .data = &ad5541a_chip_info },
>  	{ .compatible = "adi,ad5543", .data = &ad5541a_chip_info },
>  	{ .compatible = "adi,ad5553", .data = &ad5553_chip_info },
> 

Applied.

Re: [PATCH v4 00/12] iio: dac: ad5446: Refactor and add support for AD5542

[Andy Shevchenko]

On Tue, Nov 04, 2025 at 03:35:05PM +0000, Nuno Sá via B4 Relay wrote:
> Alright, what was suposed to be a simple one liner patch ended up being
> a full refactor (modernization) of the whole thing :). I think the
> changes are anyways fairly simple so hopefully nothing was broken.
> 
> I'm also aware of the checkpatch failure in Patch 7 ("iio: dac: ad5446:
> Separate I2C/SPI into different drivers") but I'm really not seeing the
> added value of adding the kconfig help text to the core symbol. 

I don't see any major issue with the series, just a bunch of minor nit-picks.
FWIW,
Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>


-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v4 00/12] iio: dac: ad5446: Refactor and add support for AD5542

[Nuno Sá]

On Tue, 2025-11-04 at 20:30 +0200, Andy Shevchenko wrote:
> On Tue, Nov 04, 2025 at 03:35:05PM +0000, Nuno Sá via B4 Relay wrote:
> > Alright, what was suposed to be a simple one liner patch ended up being
> > a full refactor (modernization) of the whole thing :). I think the
> > changes are anyways fairly simple so hopefully nothing was broken.
> > 
> > I'm also aware of the checkpatch failure in Patch 7 ("iio: dac: ad5446:
> > Separate I2C/SPI into different drivers") but I'm really not seeing the
> > added value of adding the kconfig help text to the core symbol. 
> 
> I don't see any major issue with the series, just a bunch of minor nit-picks.
> FWIW,
> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
> 

Thanks!

If I do need to re-spin, I might get some (or all) of the nit-picks included.

- Nuno Sá

[PATCH v5 0/7] clk: rockchip: Add clock controller for the

[Elaine Zhang]

Add yaml and dt-bindings for the RV1126B and RK3506.
RK3506 depend on patches 1/7 and 5/7, so it is merged and submitted.

Change in V5:
[PATCH v5 1/7]: No change
[PATCH v5 2/7]: No change
[PATCH v5 3/7]: Drop RV1126B_GRF_SOC_STATUS0
[PATCH v5 4/7]: Drop syscon
[PATCH v5 5/7]: No change
[PATCH v5 6/7]: Add clocks and clock-names, fix id define
[PATCH v5 7/7]: Drop RK3506_GRF_SOC_STATUS

Change in V4:
[PATCH v4 1/7]: No change
[PATCH v4 2/7]: remove label
[PATCH v4 3/7]: No change
[PATCH v4 4/7]: remove label,fix order
[PATCH v4 5/7]: No change
[PATCH v4 6/7]: Add yaml and dt-bindings for the RK3506
[PATCH v4 7/7]: Add clock controller for the RK3506

Change in V3:
[PATCH v3 1/5]: No change
[PATCH v3 2/5]: Fix define error
[PATCH v3 3/5]: update driver,fix errir
[PATCH v3 4/5]: fix error
[PATCH v3 5/5]: No change

Change in V2:
[PATCH v2 1/5]: update commit message, rename v2 to multi_pll
[PATCH v2 2/5]: Modify DT binding headers license
[PATCH v2 3/5]: update driver
[PATCH v2 4/5]: fix error
[PATCH v2 5/5]: update commit message


Elaine Zhang (6):
  clk: rockchip: Implement rockchip_clk_register_armclk_multi_pll()
  dt-bindings: clock, reset: Add support for rv1126b
  clk: rockchip: Add clock controller for the RV1126B
  dt-bindings: clock: Add support for rockchip pvtpll
  clk: rockchip: add support for pvtpll clk
  clk: rockchip: Add clock and reset driver for RK3506

Finley Xiao (1):
  dt-bindings: clock: rockchip: Add RK3506 clock and reset unit

 .../bindings/clock/rockchip,pvtpll.yaml       |   98 ++
 .../bindings/clock/rockchip,rk3506-cru.yaml   |   51 +
 .../bindings/clock/rockchip,rv1126b-cru.yaml  |   52 +
 drivers/clk/rockchip/Kconfig                  |   14 +
 drivers/clk/rockchip/Makefile                 |    2 +
 drivers/clk/rockchip/clk-cpu.c                |  165 +++
 drivers/clk/rockchip/clk-pvtpll.c             |  925 ++++++++++++++
 drivers/clk/rockchip/clk-rk3506.c             |  869 +++++++++++++
 drivers/clk/rockchip/clk-rv1126b.c            | 1103 +++++++++++++++++
 drivers/clk/rockchip/clk.c                    |   24 +
 drivers/clk/rockchip/clk.h                    |   96 ++
 drivers/clk/rockchip/rst-rk3506.c             |  226 ++++
 drivers/clk/rockchip/rst-rv1126b.c            |  444 +++++++
 .../dt-bindings/clock/rockchip,rk3506-cru.h   |  285 +++++
 .../dt-bindings/clock/rockchip,rv1126b-cru.h  |  392 ++++++
 .../dt-bindings/reset/rockchip,rk3506-cru.h   |  211 ++++
 .../dt-bindings/reset/rockchip,rv1126b-cru.h  |  405 ++++++
 17 files changed, 5362 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/rockchip,pvtpll.yaml
 create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3506-cru.yaml
 create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rv1126b-cru.yaml
 create mode 100644 drivers/clk/rockchip/clk-pvtpll.c
 create mode 100644 drivers/clk/rockchip/clk-rk3506.c
 create mode 100644 drivers/clk/rockchip/clk-rv1126b.c
 create mode 100644 drivers/clk/rockchip/rst-rk3506.c
 create mode 100644 drivers/clk/rockchip/rst-rv1126b.c
 create mode 100644 include/dt-bindings/clock/rockchip,rk3506-cru.h
 create mode 100644 include/dt-bindings/clock/rockchip,rv1126b-cru.h
 create mode 100644 include/dt-bindings/reset/rockchip,rk3506-cru.h
 create mode 100644 include/dt-bindings/reset/rockchip,rv1126b-cru.h


base-commit: 9893549e592ad22d0a18de97acfb30204109290a
-- 
2.34.1

[PATCH v5 6/7] dt-bindings: clock: rockchip: Add RK3506 clock and reset unit

[Elaine Zhang]

From: Finley Xiao <finley.xiao@rock-chips.com>

Add device tree bindings for clock and reset unit on RK3506 SoC.
Add clock and reset IDs for RK3506 SoC.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 .../bindings/clock/rockchip,rk3506-cru.yaml   |  51 ++++
 .../dt-bindings/clock/rockchip,rk3506-cru.h   | 285 ++++++++++++++++++
 .../dt-bindings/reset/rockchip,rk3506-cru.h   | 211 +++++++++++++
 3 files changed, 547 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3506-cru.yaml
 create mode 100644 include/dt-bindings/clock/rockchip,rk3506-cru.h
 create mode 100644 include/dt-bindings/reset/rockchip,rk3506-cru.h

diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3506-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3506-cru.yaml
new file mode 100644
index 000000000000..ecb5fa497747
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/rockchip,rk3506-cru.yaml
@@ -0,0 +1,51 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/rockchip,rk3506-cru.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Rockchip RK3506 Clock and Reset Unit (CRU)
+
+maintainers:
+  - Finley Xiao <finley.xiao@rock-chips.com>
+  - Heiko Stuebner <heiko@sntech.de>
+
+description: |
+  The RK3506 CRU generates the clock and also implements reset for SoC
+  peripherals.
+
+properties:
+  compatible:
+    const: rockchip,rk3506-cru
+
+  reg:
+    maxItems: 1
+
+  "#clock-cells":
+    const: 1
+
+  "#reset-cells":
+    const: 1
+
+  clocks:
+    maxItems: 1
+
+  clock-names:
+    const: xin24m
+
+required:
+  - compatible
+  - reg
+  - "#clock-cells"
+  - "#reset-cells"
+
+additionalProperties: false
+
+examples:
+  - |
+    clock-controller@ff9a0000 {
+      compatible = "rockchip,rk3506-cru";
+      reg = <0xff9a0000 0x20000>;
+      #clock-cells = <1>;
+      #reset-cells = <1>;
+    };
diff --git a/include/dt-bindings/clock/rockchip,rk3506-cru.h b/include/dt-bindings/clock/rockchip,rk3506-cru.h
new file mode 100644
index 000000000000..71d7dda23cc9
--- /dev/null
+++ b/include/dt-bindings/clock/rockchip,rk3506-cru.h
@@ -0,0 +1,285 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright (c) 2023-2025 Rockchip Electronics Co., Ltd.
+ * Author: Finley Xiao <finley.xiao@rock-chips.com>
+ */
+
+#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3506_H
+#define _DT_BINDINGS_CLK_ROCKCHIP_RK3506_H
+
+/* cru plls */
+#define PLL_GPLL			0
+#define PLL_V0PLL			1
+#define PLL_V1PLL			2
+
+/* cru-clocks indices */
+#define ARMCLK				3
+#define CLK_DDR				4
+#define XIN24M_GATE			5
+#define CLK_GPLL_GATE			6
+#define CLK_V0PLL_GATE			7
+#define CLK_V1PLL_GATE			8
+#define CLK_GPLL_DIV			9
+#define CLK_GPLL_DIV_100M		10
+#define CLK_V0PLL_DIV			11
+#define CLK_V1PLL_DIV			12
+#define CLK_INT_VOICE_MATRIX0		13
+#define CLK_INT_VOICE_MATRIX1		14
+#define CLK_INT_VOICE_MATRIX2		15
+#define CLK_FRAC_UART_MATRIX0_MUX	16
+#define CLK_FRAC_UART_MATRIX1_MUX	17
+#define CLK_FRAC_VOICE_MATRIX0_MUX	18
+#define CLK_FRAC_VOICE_MATRIX1_MUX	19
+#define CLK_FRAC_COMMON_MATRIX0_MUX	20
+#define CLK_FRAC_COMMON_MATRIX1_MUX	21
+#define CLK_FRAC_COMMON_MATRIX2_MUX	22
+#define CLK_FRAC_UART_MATRIX0		23
+#define CLK_FRAC_UART_MATRIX1		24
+#define CLK_FRAC_VOICE_MATRIX0		25
+#define CLK_FRAC_VOICE_MATRIX1		26
+#define CLK_FRAC_COMMON_MATRIX0		27
+#define CLK_FRAC_COMMON_MATRIX1		28
+#define CLK_FRAC_COMMON_MATRIX2		29
+#define CLK_REF_USBPHY_TOP		30
+#define CLK_REF_DPHY_TOP		31
+#define ACLK_CORE_ROOT			32
+#define PCLK_CORE_ROOT			33
+#define PCLK_DBG			34
+#define PCLK_CORE_GRF			35
+#define PCLK_CORE_CRU			36
+#define CLK_CORE_EMA_DETECT		37
+#define CLK_REF_PVTPLL_CORE		38
+#define PCLK_GPIO1			39
+#define DBCLK_GPIO1			40
+#define ACLK_CORE_PERI_ROOT		41
+#define HCLK_CORE_PERI_ROOT		42
+#define PCLK_CORE_PERI_ROOT		43
+#define CLK_DSMC			44
+#define ACLK_DSMC			45
+#define PCLK_DSMC			46
+#define CLK_FLEXBUS_TX			47
+#define CLK_FLEXBUS_RX			48
+#define ACLK_FLEXBUS			49
+#define HCLK_FLEXBUS			50
+#define ACLK_DSMC_SLV			51
+#define HCLK_DSMC_SLV			52
+#define ACLK_BUS_ROOT			53
+#define HCLK_BUS_ROOT			54
+#define PCLK_BUS_ROOT			55
+#define ACLK_SYSRAM			56
+#define HCLK_SYSRAM			57
+#define ACLK_DMAC0			58
+#define ACLK_DMAC1			59
+#define HCLK_M0				60
+#define PCLK_BUS_GRF			61
+#define PCLK_TIMER			62
+#define CLK_TIMER0_CH0			63
+#define CLK_TIMER0_CH1			64
+#define CLK_TIMER0_CH2			65
+#define CLK_TIMER0_CH3			66
+#define CLK_TIMER0_CH4			67
+#define CLK_TIMER0_CH5			68
+#define PCLK_WDT0			69
+#define TCLK_WDT0			70
+#define PCLK_WDT1			71
+#define TCLK_WDT1			72
+#define PCLK_MAILBOX			73
+#define PCLK_INTMUX			74
+#define PCLK_SPINLOCK			75
+#define PCLK_DDRC			76
+#define HCLK_DDRPHY			77
+#define PCLK_DDRMON			78
+#define CLK_DDRMON_OSC			79
+#define PCLK_STDBY			80
+#define HCLK_USBOTG0			81
+#define HCLK_USBOTG0_PMU		82
+#define CLK_USBOTG0_ADP			83
+#define HCLK_USBOTG1			84
+#define HCLK_USBOTG1_PMU		85
+#define CLK_USBOTG1_ADP			86
+#define PCLK_USBPHY			87
+#define ACLK_DMA2DDR			88
+#define PCLK_DMA2DDR			89
+#define STCLK_M0			90
+#define CLK_DDRPHY			91
+#define CLK_DDRC_SRC			92
+#define ACLK_DDRC_0			93
+#define ACLK_DDRC_1			94
+#define CLK_DDRC			95
+#define CLK_DDRMON			96
+#define HCLK_LSPERI_ROOT		97
+#define PCLK_LSPERI_ROOT		98
+#define PCLK_UART0			99
+#define PCLK_UART1			100
+#define PCLK_UART2			101
+#define PCLK_UART3			102
+#define PCLK_UART4			103
+#define SCLK_UART0			104
+#define SCLK_UART1			105
+#define SCLK_UART2			106
+#define SCLK_UART3			107
+#define SCLK_UART4			108
+#define PCLK_I2C0			109
+#define CLK_I2C0			110
+#define PCLK_I2C1			111
+#define CLK_I2C1			112
+#define PCLK_I2C2			113
+#define CLK_I2C2			114
+#define PCLK_PWM1			115
+#define CLK_PWM1			116
+#define CLK_OSC_PWM1			117
+#define CLK_RC_PWM1			118
+#define CLK_FREQ_PWM1			119
+#define CLK_COUNTER_PWM1		120
+#define PCLK_SPI0			121
+#define CLK_SPI0			122
+#define PCLK_SPI1			123
+#define CLK_SPI1			124
+#define PCLK_GPIO2			125
+#define DBCLK_GPIO2			126
+#define PCLK_GPIO3			127
+#define DBCLK_GPIO3			128
+#define PCLK_GPIO4			129
+#define DBCLK_GPIO4			130
+#define HCLK_CAN0			131
+#define CLK_CAN0			132
+#define HCLK_CAN1			133
+#define CLK_CAN1			134
+#define HCLK_PDM			135
+#define MCLK_PDM			136
+#define CLKOUT_PDM			137
+#define MCLK_SPDIFTX			138
+#define HCLK_SPDIFTX			139
+#define HCLK_SPDIFRX			140
+#define MCLK_SPDIFRX			141
+#define MCLK_SAI0			142
+#define HCLK_SAI0			143
+#define MCLK_OUT_SAI0			144
+#define MCLK_SAI1			145
+#define HCLK_SAI1			146
+#define MCLK_OUT_SAI1			147
+#define HCLK_ASRC0			148
+#define CLK_ASRC0			149
+#define HCLK_ASRC1			150
+#define CLK_ASRC1			151
+#define PCLK_CRU			152
+#define PCLK_PMU_ROOT			153
+#define MCLK_ASRC0			154
+#define MCLK_ASRC1			155
+#define MCLK_ASRC2			156
+#define MCLK_ASRC3			157
+#define LRCK_ASRC0_SRC			158
+#define LRCK_ASRC0_DST			159
+#define LRCK_ASRC1_SRC			160
+#define LRCK_ASRC1_DST			161
+#define ACLK_HSPERI_ROOT		162
+#define HCLK_HSPERI_ROOT		163
+#define PCLK_HSPERI_ROOT		164
+#define CCLK_SRC_SDMMC			165
+#define HCLK_SDMMC			166
+#define HCLK_FSPI			167
+#define SCLK_FSPI			168
+#define PCLK_SPI2			169
+#define ACLK_MAC0			170
+#define ACLK_MAC1			171
+#define PCLK_MAC0			172
+#define PCLK_MAC1			173
+#define CLK_MAC_ROOT			174
+#define CLK_MAC0			175
+#define CLK_MAC1			176
+#define MCLK_SAI2			177
+#define HCLK_SAI2			178
+#define MCLK_OUT_SAI2			179
+#define MCLK_SAI3_SRC			180
+#define HCLK_SAI3			181
+#define MCLK_SAI3			182
+#define MCLK_OUT_SAI3			183
+#define MCLK_SAI4_SRC			184
+#define HCLK_SAI4			185
+#define MCLK_SAI4			186
+#define HCLK_DSM			187
+#define MCLK_DSM			188
+#define PCLK_AUDIO_ADC			189
+#define MCLK_AUDIO_ADC			190
+#define MCLK_AUDIO_ADC_DIV4		191
+#define PCLK_SARADC			192
+#define CLK_SARADC			193
+#define PCLK_OTPC_NS			194
+#define CLK_SBPI_OTPC_NS		195
+#define CLK_USER_OTPC_NS		196
+#define PCLK_UART5			197
+#define SCLK_UART5			198
+#define PCLK_GPIO234_IOC		199
+#define CLK_MAC_PTP_ROOT		200
+#define CLK_MAC0_PTP			201
+#define CLK_MAC1_PTP			202
+#define CLK_SPI2			203
+#define ACLK_VIO_ROOT			204
+#define HCLK_VIO_ROOT			205
+#define PCLK_VIO_ROOT			206
+#define HCLK_RGA			207
+#define ACLK_RGA			208
+#define CLK_CORE_RGA			209
+#define ACLK_VOP			210
+#define HCLK_VOP			211
+#define DCLK_VOP			212
+#define PCLK_DPHY			213
+#define PCLK_DSI_HOST			214
+#define PCLK_TSADC			215
+#define CLK_TSADC			216
+#define CLK_TSADC_TSEN			217
+#define PCLK_GPIO1_IOC			218
+#define PCLK_OTPC_S			219
+#define CLK_SBPI_OTPC_S			220
+#define CLK_USER_OTPC_S			221
+#define PCLK_OTP_MASK			222
+#define PCLK_KEYREADER			223
+#define HCLK_BOOTROM			224
+#define PCLK_DDR_SERVICE		225
+#define HCLK_CRYPTO_S			226
+#define HCLK_KEYLAD			227
+#define CLK_CORE_CRYPTO			228
+#define CLK_PKA_CRYPTO			229
+#define CLK_CORE_CRYPTO_S		230
+#define CLK_PKA_CRYPTO_S		231
+#define ACLK_CRYPTO_S			232
+#define HCLK_RNG_S			233
+#define CLK_CORE_CRYPTO_NS		234
+#define CLK_PKA_CRYPTO_NS		235
+#define ACLK_CRYPTO_NS			236
+#define HCLK_CRYPTO_NS			237
+#define HCLK_RNG			238
+#define CLK_PMU				239
+#define PCLK_PMU			240
+#define CLK_PMU_32K			241
+#define PCLK_PMU_CRU			242
+#define PCLK_PMU_GRF			243
+#define PCLK_GPIO0_IOC			244
+#define PCLK_GPIO0			245
+#define DBCLK_GPIO0			246
+#define PCLK_GPIO1_SHADOW		247
+#define DBCLK_GPIO1_SHADOW		248
+#define PCLK_PMU_HP_TIMER		249
+#define CLK_PMU_HP_TIMER		250
+#define CLK_PMU_HP_TIMER_32K		251
+#define PCLK_PWM0			252
+#define CLK_PWM0			253
+#define CLK_OSC_PWM0			254
+#define CLK_RC_PWM0			255
+#define CLK_MAC_OUT			256
+#define CLK_REF_OUT0			257
+#define CLK_REF_OUT1			258
+#define CLK_32K_FRAC			259
+#define CLK_32K_RC			260
+#define CLK_32K				261
+#define CLK_32K_PMU			262
+#define PCLK_TOUCH_KEY			263
+#define CLK_TOUCH_KEY			264
+#define CLK_REF_PHY_PLL			265
+#define CLK_REF_PHY_PMU_MUX		266
+#define CLK_WIFI_OUT			267
+#define CLK_V0PLL_REF			268
+#define CLK_V1PLL_REF			269
+#define CLK_32K_FRAC_MUX		270
+
+#endif
diff --git a/include/dt-bindings/reset/rockchip,rk3506-cru.h b/include/dt-bindings/reset/rockchip,rk3506-cru.h
new file mode 100644
index 000000000000..f38cc066009b
--- /dev/null
+++ b/include/dt-bindings/reset/rockchip,rk3506-cru.h
@@ -0,0 +1,211 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright (c) 2023-2025 Rockchip Electronics Co., Ltd.
+ * Author: Finley Xiao <finley.xiao@rock-chips.com>
+ */
+
+#ifndef _DT_BINDINGS_REST_ROCKCHIP_RK3506_H
+#define _DT_BINDINGS_REST_ROCKCHIP_RK3506_H
+
+/* CRU-->SOFTRST_CON00 */
+#define SRST_NCOREPORESET0_AC		0
+#define SRST_NCOREPORESET1_AC		1
+#define SRST_NCOREPORESET2_AC		2
+#define SRST_NCORESET0_AC		3
+#define SRST_NCORESET1_AC		4
+#define SRST_NCORESET2_AC		5
+#define SRST_NL2RESET_AC		6
+#define SRST_ARESETN_CORE_BIU_AC	7
+#define SRST_HRESETN_M0_AC		8
+
+/* CRU-->SOFTRST_CON02 */
+#define SRST_NDBGRESET			9
+#define SRST_PRESETN_CORE_BIU		10
+#define SRST_RESETN_PMU			11
+
+/* CRU-->SOFTRST_CON03 */
+#define SRST_PRESETN_DBG		12
+#define SRST_POTRESETN_DBG		13
+#define SRST_PRESETN_CORE_GRF		14
+#define SRST_RESETN_CORE_EMA_DETECT	15
+#define SRST_RESETN_REF_PVTPLL_CORE	16
+#define SRST_PRESETN_GPIO1		17
+#define SRST_DBRESETN_GPIO1		18
+
+/* CRU-->SOFTRST_CON04 */
+#define SRST_ARESETN_CORE_PERI_BIU	19
+#define SRST_ARESETN_DSMC		20
+#define SRST_PRESETN_DSMC		21
+#define SRST_RESETN_FLEXBUS		22
+#define SRST_ARESETN_FLEXBUS		23
+#define SRST_HRESETN_FLEXBUS		24
+#define SRST_ARESETN_DSMC_SLV		25
+#define SRST_HRESETN_DSMC_SLV		26
+#define SRST_RESETN_DSMC_SLV		27
+
+/* CRU-->SOFTRST_CON05 */
+#define SRST_ARESETN_BUS_BIU		28
+#define SRST_HRESETN_BUS_BIU		29
+#define SRST_PRESETN_BUS_BIU		30
+#define SRST_ARESETN_SYSRAM		31
+#define SRST_HRESETN_SYSRAM		32
+#define SRST_ARESETN_DMAC0		33
+#define SRST_ARESETN_DMAC1		34
+#define SRST_HRESETN_M0			35
+#define SRST_RESETN_M0_JTAG		36
+#define SRST_HRESETN_CRYPTO		37
+
+/* CRU-->SOFTRST_CON06 */
+#define SRST_HRESETN_RNG		38
+#define SRST_PRESETN_BUS_GRF		39
+#define SRST_PRESETN_TIMER0		40
+#define SRST_RESETN_TIMER0_CH0		41
+#define SRST_RESETN_TIMER0_CH1		42
+#define SRST_RESETN_TIMER0_CH2		43
+#define SRST_RESETN_TIMER0_CH3		44
+#define SRST_RESETN_TIMER0_CH4		45
+#define SRST_RESETN_TIMER0_CH5		46
+#define SRST_PRESETN_WDT0		47
+#define SRST_TRESETN_WDT0		48
+#define SRST_PRESETN_WDT1		49
+#define SRST_TRESETN_WDT1		50
+#define SRST_PRESETN_MAILBOX		51
+#define SRST_PRESETN_INTMUX		52
+#define SRST_PRESETN_SPINLOCK		53
+
+/* CRU-->SOFTRST_CON07 */
+#define SRST_PRESETN_DDRC		54
+#define SRST_HRESETN_DDRPHY		55
+#define SRST_PRESETN_DDRMON		56
+#define SRST_RESETN_DDRMON_OSC		57
+#define SRST_PRESETN_DDR_LPC		58
+#define SRST_HRESETN_USBOTG0		59
+#define SRST_RESETN_USBOTG0_ADP		60
+#define SRST_HRESETN_USBOTG1		61
+#define SRST_RESETN_USBOTG1_ADP		62
+#define SRST_PRESETN_USBPHY		63
+#define SRST_RESETN_USBPHY_POR		64
+#define SRST_RESETN_USBPHY_OTG0		65
+#define SRST_RESETN_USBPHY_OTG1		66
+
+/* CRU-->SOFTRST_CON08 */
+#define SRST_ARESETN_DMA2DDR		67
+#define SRST_PRESETN_DMA2DDR		68
+
+/* CRU-->SOFTRST_CON09 */
+#define SRST_RESETN_USBOTG0_UTMI	69
+#define SRST_RESETN_USBOTG1_UTMI	70
+
+/* CRU-->SOFTRST_CON10 */
+#define SRST_ARESETN_DDRC_0		71
+#define SRST_ARESETN_DDRC_1		72
+#define SRST_ARESETN_DDR_BIU		73
+#define SRST_RESETN_DDRC		74
+#define SRST_RESETN_DDRMON		75
+
+/* CRU-->SOFTRST_CON11 */
+#define SRST_HRESETN_LSPERI_BIU		76
+#define SRST_PRESETN_UART0		77
+#define SRST_PRESETN_UART1		78
+#define SRST_PRESETN_UART2		79
+#define SRST_PRESETN_UART3		80
+#define SRST_PRESETN_UART4		81
+#define SRST_RESETN_UART0		82
+#define SRST_RESETN_UART1		83
+#define SRST_RESETN_UART2		84
+#define SRST_RESETN_UART3		85
+#define SRST_RESETN_UART4		86
+#define SRST_PRESETN_I2C0		87
+#define SRST_RESETN_I2C0		88
+
+/* CRU-->SOFTRST_CON12 */
+#define SRST_PRESETN_I2C1		89
+#define SRST_RESETN_I2C1		90
+#define SRST_PRESETN_I2C2		91
+#define SRST_RESETN_I2C2		92
+#define SRST_PRESETN_PWM1		93
+#define SRST_RESETN_PWM1		94
+#define SRST_PRESETN_SPI0		95
+#define SRST_RESETN_SPI0		96
+#define SRST_PRESETN_SPI1		97
+#define SRST_RESETN_SPI1		98
+#define SRST_PRESETN_GPIO2		99
+#define SRST_DBRESETN_GPIO2		100
+
+/* CRU-->SOFTRST_CON13 */
+#define SRST_PRESETN_GPIO3		101
+#define SRST_DBRESETN_GPIO3		102
+#define SRST_PRESETN_GPIO4		103
+#define SRST_DBRESETN_GPIO4		104
+#define SRST_HRESETN_CAN0		105
+#define SRST_RESETN_CAN0		106
+#define SRST_HRESETN_CAN1		107
+#define SRST_RESETN_CAN1		108
+#define SRST_HRESETN_PDM		109
+#define SRST_MRESETN_PDM		110
+#define SRST_RESETN_PDM			111
+#define SRST_RESETN_SPDIFTX		112
+#define SRST_HRESETN_SPDIFTX		113
+#define SRST_HRESETN_SPDIFRX		114
+#define SRST_RESETN_SPDIFRX		115
+#define SRST_MRESETN_SAI0		116
+
+/* CRU-->SOFTRST_CON14 */
+#define SRST_HRESETN_SAI0		117
+#define SRST_MRESETN_SAI1		118
+#define SRST_HRESETN_SAI1		119
+#define SRST_HRESETN_ASRC0		120
+#define SRST_RESETN_ASRC0		121
+#define SRST_HRESETN_ASRC1		122
+#define SRST_RESETN_ASRC1		123
+
+/* CRU-->SOFTRST_CON17 */
+#define SRST_HRESETN_HSPERI_BIU		124
+#define SRST_HRESETN_SDMMC		125
+#define SRST_HRESETN_FSPI		126
+#define SRST_SRESETN_FSPI		127
+#define SRST_PRESETN_SPI2		128
+#define SRST_ARESETN_MAC0		129
+#define SRST_ARESETN_MAC1		130
+
+/* CRU-->SOFTRST_CON18 */
+#define SRST_MRESETN_SAI2		131
+#define SRST_HRESETN_SAI2		132
+#define SRST_HRESETN_SAI3		133
+#define SRST_MRESETN_SAI3		134
+#define SRST_HRESETN_SAI4		135
+#define SRST_MRESETN_SAI4		136
+#define SRST_HRESETN_DSM		137
+#define SRST_MRESETN_DSM		138
+#define SRST_PRESETN_AUDIO_ADC		139
+#define SRST_MRESETN_AUDIO_ADC		140
+
+/* CRU-->SOFTRST_CON19 */
+#define SRST_PRESETN_SARADC		141
+#define SRST_RESETN_SARADC		142
+#define SRST_RESETN_SARADC_PHY		143
+#define SRST_PRESETN_OTPC_NS		144
+#define SRST_RESETN_SBPI_OTPC_NS	145
+#define SRST_RESETN_USER_OTPC_NS	146
+#define SRST_PRESETN_UART5		147
+#define SRST_RESETN_UART5		148
+#define SRST_PRESETN_GPIO234_IOC	149
+
+/* CRU-->SOFTRST_CON21 */
+#define SRST_ARESETN_VIO_BIU		150
+#define SRST_HRESETN_VIO_BIU		151
+#define SRST_HRESETN_RGA		152
+#define SRST_ARESETN_RGA		153
+#define SRST_RESETN_CORE_RGA		154
+#define SRST_ARESETN_VOP		155
+#define SRST_HRESETN_VOP		156
+#define SRST_RESETN_VOP			157
+#define SRST_PRESETN_DPHY		158
+#define SRST_PRESETN_DSI_HOST		159
+#define SRST_PRESETN_TSADC		160
+#define SRST_RESETN_TSADC		161
+
+/* CRU-->SOFTRST_CON22 */
+#define SRST_PRESETN_GPIO1_IOC		162
+
+#endif
-- 
2.34.1

Re: [PATCH v5 6/7] dt-bindings: clock: rockchip: Add RK3506 clock and reset unit

[Conor Dooley]

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On Mon, Oct 27, 2025 at 04:41:46PM +0800, Elaine Zhang wrote:
> From: Finley Xiao <finley.xiao@rock-chips.com>
> 
> Add device tree bindings for clock and reset unit on RK3506 SoC.
> Add clock and reset IDs for RK3506 SoC.
> 
> Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
> ---
>  .../bindings/clock/rockchip,rk3506-cru.yaml   |  51 ++++
>  .../dt-bindings/clock/rockchip,rk3506-cru.h   | 285 ++++++++++++++++++
>  .../dt-bindings/reset/rockchip,rk3506-cru.h   | 211 +++++++++++++
>  3 files changed, 547 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3506-cru.yaml
>  create mode 100644 include/dt-bindings/clock/rockchip,rk3506-cru.h
>  create mode 100644 include/dt-bindings/reset/rockchip,rk3506-cru.h
> 
> diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3506-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3506-cru.yaml
> new file mode 100644
> index 000000000000..ecb5fa497747
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3506-cru.yaml
> @@ -0,0 +1,51 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/rockchip,rk3506-cru.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Rockchip RK3506 Clock and Reset Unit (CRU)
> +
> +maintainers:
> +  - Finley Xiao <finley.xiao@rock-chips.com>
> +  - Heiko Stuebner <heiko@sntech.de>
> +
> +description: |
> +  The RK3506 CRU generates the clock and also implements reset for SoC
> +  peripherals.
> +
> +properties:
> +  compatible:
> +    const: rockchip,rk3506-cru
> +
> +  reg:
> +    maxItems: 1
> +
> +  "#clock-cells":
> +    const: 1
> +
> +  "#reset-cells":
> +    const: 1
> +
> +  clocks:
> +    maxItems: 1

Can you explain somewhere why the input clock is not required?
Feels like it really should be required, if it is what the output clocks
are generated from, but I can also see why it might be optional either.
pw-bot: changes-requested

> +
> +  clock-names:
> +    const: xin24m
> +
> +required:
> +  - compatible
> +  - reg
> +  - "#clock-cells"
> +  - "#reset-cells"

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Re: [PATCH v5 6/7] dt-bindings: clock: rockchip: Add RK3506 clock and reset unit

[Conor Dooley]

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On Tue, Nov 04, 2025 at 09:48:56AM +0800, zhangqing wrote:
> 
> 在 2025/10/28 0:47, Conor Dooley 写道:
> > On Mon, Oct 27, 2025 at 04:41:46PM +0800, Elaine Zhang wrote:
> > > From: Finley Xiao<finley.xiao@rock-chips.com>
> > > 
> > > Add device tree bindings for clock and reset unit on RK3506 SoC.
> > > Add clock and reset IDs for RK3506 SoC.
> > > 
> > > Signed-off-by: Finley Xiao<finley.xiao@rock-chips.com>
> > > ---
> > >   .../bindings/clock/rockchip,rk3506-cru.yaml   |  51 ++++
> > >   .../dt-bindings/clock/rockchip,rk3506-cru.h   | 285 ++++++++++++++++++
> > >   .../dt-bindings/reset/rockchip,rk3506-cru.h   | 211 +++++++++++++
> > >   3 files changed, 547 insertions(+)
> > >   create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3506-cru.yaml
> > >   create mode 100644 include/dt-bindings/clock/rockchip,rk3506-cru.h
> > >   create mode 100644 include/dt-bindings/reset/rockchip,rk3506-cru.h
> > > 
> > > diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3506-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3506-cru.yaml
> > > new file mode 100644
> > > index 000000000000..ecb5fa497747
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3506-cru.yaml
> > > @@ -0,0 +1,51 @@
> > > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> > > +%YAML 1.2
> > > +---
> > > +$id:http://devicetree.org/schemas/clock/rockchip,rk3506-cru.yaml#
> > > +$schema:http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: Rockchip RK3506 Clock and Reset Unit (CRU)
> > > +
> > > +maintainers:
> > > +  - Finley Xiao<finley.xiao@rock-chips.com>
> > > +  - Heiko Stuebner<heiko@sntech.de>
> > > +
> > > +description: |
> > > +  The RK3506 CRU generates the clock and also implements reset for SoC
> > > +  peripherals.
> > > +
> > > +properties:
> > > +  compatible:
> > > +    const: rockchip,rk3506-cru
> > > +
> > > +  reg:
> > > +    maxItems: 1
> > > +
> > > +  "#clock-cells":
> > > +    const: 1
> > > +
> > > +  "#reset-cells":
> > > +    const: 1
> > > +
> > > +  clocks:
> > > +    maxItems: 1
> > Can you explain somewhere why the input clock is not required?
> > Feels like it really should be required, if it is what the output clocks
> > are generated from, but I can also see why it might be optional either.
> > pw-bot: changes-requested
> 
> Our default hardware input clock is 24M.
> 
>  Some Socs and hardware input clocks support 24M、24.576M、26M. For

Other SoCs get other compatibles, so that is not relevant.

> different input frequencies, there is a need to configure clocks.

That seems like it should be required, because there's always one being
provided.

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Re: [PATCH v5 6/7] dt-bindings: clock: rockchip: Add RK3506 clock and reset unit

[Jonas Karlman]

Hi Elaine,

On 10/27/2025 9:41 AM, Elaine Zhang wrote:
> From: Finley Xiao <finley.xiao@rock-chips.com>
> 
> Add device tree bindings for clock and reset unit on RK3506 SoC.
> Add clock and reset IDs for RK3506 SoC.
> 
> Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
> ---
>  .../bindings/clock/rockchip,rk3506-cru.yaml   |  51 ++++
>  .../dt-bindings/clock/rockchip,rk3506-cru.h   | 285 ++++++++++++++++++
>  .../dt-bindings/reset/rockchip,rk3506-cru.h   | 211 +++++++++++++
>  3 files changed, 547 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3506-cru.yaml
>  create mode 100644 include/dt-bindings/clock/rockchip,rk3506-cru.h
>  create mode 100644 include/dt-bindings/reset/rockchip,rk3506-cru.h

[snip]

> diff --git a/include/dt-bindings/reset/rockchip,rk3506-cru.h b/include/dt-bindings/reset/rockchip,rk3506-cru.h
> new file mode 100644
> index 000000000000..f38cc066009b
> --- /dev/null
> +++ b/include/dt-bindings/reset/rockchip,rk3506-cru.h
> @@ -0,0 +1,211 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> +/*
> + * Copyright (c) 2023-2025 Rockchip Electronics Co., Ltd.
> + * Author: Finley Xiao <finley.xiao@rock-chips.com>
> + */
> +
> +#ifndef _DT_BINDINGS_REST_ROCKCHIP_RK3506_H
> +#define _DT_BINDINGS_REST_ROCKCHIP_RK3506_H
> +
> +/* CRU-->SOFTRST_CON00 */
> +#define SRST_NCOREPORESET0_AC		0
> +#define SRST_NCOREPORESET1_AC		1
> +#define SRST_NCOREPORESET2_AC		2
> +#define SRST_NCORESET0_AC		3
> +#define SRST_NCORESET1_AC		4
> +#define SRST_NCORESET2_AC		5
> +#define SRST_NL2RESET_AC		6
> +#define SRST_ARESETN_CORE_BIU_AC	7
> +#define SRST_HRESETN_M0_AC		8
> +
> +/* CRU-->SOFTRST_CON02 */
> +#define SRST_NDBGRESET			9
> +#define SRST_PRESETN_CORE_BIU		10
> +#define SRST_RESETN_PMU			11
> +
> +/* CRU-->SOFTRST_CON03 */
> +#define SRST_PRESETN_DBG		12
> +#define SRST_POTRESETN_DBG		13
> +#define SRST_PRESETN_CORE_GRF		14
> +#define SRST_RESETN_CORE_EMA_DETECT	15
> +#define SRST_RESETN_REF_PVTPLL_CORE	16
> +#define SRST_PRESETN_GPIO1		17
> +#define SRST_DBRESETN_GPIO1		18
> +
> +/* CRU-->SOFTRST_CON04 */
> +#define SRST_ARESETN_CORE_PERI_BIU	19
> +#define SRST_ARESETN_DSMC		20
> +#define SRST_PRESETN_DSMC		21
> +#define SRST_RESETN_FLEXBUS		22
> +#define SRST_ARESETN_FLEXBUS		23
> +#define SRST_HRESETN_FLEXBUS		24
> +#define SRST_ARESETN_DSMC_SLV		25
> +#define SRST_HRESETN_DSMC_SLV		26
> +#define SRST_RESETN_DSMC_SLV		27
> +
> +/* CRU-->SOFTRST_CON05 */
> +#define SRST_ARESETN_BUS_BIU		28
> +#define SRST_HRESETN_BUS_BIU		29
> +#define SRST_PRESETN_BUS_BIU		30
> +#define SRST_ARESETN_SYSRAM		31
> +#define SRST_HRESETN_SYSRAM		32
> +#define SRST_ARESETN_DMAC0		33
> +#define SRST_ARESETN_DMAC1		34
> +#define SRST_HRESETN_M0			35
> +#define SRST_RESETN_M0_JTAG		36
> +#define SRST_HRESETN_CRYPTO		37

Is there a reason why this (and the RV1126B) reset names now include the
RESETN name in all reset constant?

For RK3528 and prior mainline SoCs the RESETN part of the name has been
striped from the constant, suggest we also strip the RESETN part for
RK3506 and RV1126B for consistency with other RK SoCs.

Regards,
Jonas

[snip]

Re: [PATCH v5 6/7] dt-bindings: clock: rockchip: Add RK3506 clock and reset unit

[zhangqing]

在 2025/10/30 21:55, Jonas Karlman 写道:
> Hi Elaine,
>
> On 10/27/2025 9:41 AM, Elaine Zhang wrote:
>> From: Finley Xiao <finley.xiao@rock-chips.com>
>>
>> Add device tree bindings for clock and reset unit on RK3506 SoC.
>> Add clock and reset IDs for RK3506 SoC.
>>
>> Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
>> ---
>>   .../bindings/clock/rockchip,rk3506-cru.yaml   |  51 ++++
>>   .../dt-bindings/clock/rockchip,rk3506-cru.h   | 285 ++++++++++++++++++
>>   .../dt-bindings/reset/rockchip,rk3506-cru.h   | 211 +++++++++++++
>>   3 files changed, 547 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3506-cru.yaml
>>   create mode 100644 include/dt-bindings/clock/rockchip,rk3506-cru.h
>>   create mode 100644 include/dt-bindings/reset/rockchip,rk3506-cru.h
> [snip]
>
>> diff --git a/include/dt-bindings/reset/rockchip,rk3506-cru.h b/include/dt-bindings/reset/rockchip,rk3506-cru.h
>> new file mode 100644
>> index 000000000000..f38cc066009b
>> --- /dev/null
>> +++ b/include/dt-bindings/reset/rockchip,rk3506-cru.h
>> @@ -0,0 +1,211 @@
>> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
>> +/*
>> + * Copyright (c) 2023-2025 Rockchip Electronics Co., Ltd.
>> + * Author: Finley Xiao <finley.xiao@rock-chips.com>
>> + */
>> +
>> +#ifndef _DT_BINDINGS_REST_ROCKCHIP_RK3506_H
>> +#define _DT_BINDINGS_REST_ROCKCHIP_RK3506_H
>> +
>> +/* CRU-->SOFTRST_CON00 */
>> +#define SRST_NCOREPORESET0_AC		0
>> +#define SRST_NCOREPORESET1_AC		1
>> +#define SRST_NCOREPORESET2_AC		2
>> +#define SRST_NCORESET0_AC		3
>> +#define SRST_NCORESET1_AC		4
>> +#define SRST_NCORESET2_AC		5
>> +#define SRST_NL2RESET_AC		6
>> +#define SRST_ARESETN_CORE_BIU_AC	7
>> +#define SRST_HRESETN_M0_AC		8
>> +
>> +/* CRU-->SOFTRST_CON02 */
>> +#define SRST_NDBGRESET			9
>> +#define SRST_PRESETN_CORE_BIU		10
>> +#define SRST_RESETN_PMU			11
>> +
>> +/* CRU-->SOFTRST_CON03 */
>> +#define SRST_PRESETN_DBG		12
>> +#define SRST_POTRESETN_DBG		13
>> +#define SRST_PRESETN_CORE_GRF		14
>> +#define SRST_RESETN_CORE_EMA_DETECT	15
>> +#define SRST_RESETN_REF_PVTPLL_CORE	16
>> +#define SRST_PRESETN_GPIO1		17
>> +#define SRST_DBRESETN_GPIO1		18
>> +
>> +/* CRU-->SOFTRST_CON04 */
>> +#define SRST_ARESETN_CORE_PERI_BIU	19
>> +#define SRST_ARESETN_DSMC		20
>> +#define SRST_PRESETN_DSMC		21
>> +#define SRST_RESETN_FLEXBUS		22
>> +#define SRST_ARESETN_FLEXBUS		23
>> +#define SRST_HRESETN_FLEXBUS		24
>> +#define SRST_ARESETN_DSMC_SLV		25
>> +#define SRST_HRESETN_DSMC_SLV		26
>> +#define SRST_RESETN_DSMC_SLV		27
>> +
>> +/* CRU-->SOFTRST_CON05 */
>> +#define SRST_ARESETN_BUS_BIU		28
>> +#define SRST_HRESETN_BUS_BIU		29
>> +#define SRST_PRESETN_BUS_BIU		30
>> +#define SRST_ARESETN_SYSRAM		31
>> +#define SRST_HRESETN_SYSRAM		32
>> +#define SRST_ARESETN_DMAC0		33
>> +#define SRST_ARESETN_DMAC1		34
>> +#define SRST_HRESETN_M0			35
>> +#define SRST_RESETN_M0_JTAG		36
>> +#define SRST_HRESETN_CRYPTO		37
> Is there a reason why this (and the RV1126B) reset names now include the
> RESETN name in all reset constant?
>
> For RK3528 and prior mainline SoCs the RESETN part of the name has been
> striped from the constant, suggest we also strip the RESETN part for
> RK3506 and RV1126B for consistency with other RK SoCs.

The current practice is to separate the reset id from the clk id.

Follow with others RK socs(RK3528、RK3588、RK3576.....)
>
> Regards,
> Jonas
>
> [snip]
>
-- 
张晴
瑞芯微电子股份有限公司
Rockchip Electronics Co.,Ltd
地址：福建省福州市铜盘路软件大道89号软件园A区21号楼
Add:No.21 Building, A District, No.89 Software Boulevard Fuzhou, Fujian 350003, P.R.China
Tel:+86-0591-83991906-8601
邮编：350003
E-mail:elaine.zhang@rock-chips.com
****************************************************************************
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IMPORTANT NOTICE: This email is from Fuzhou Rockchip Electronics Co., Ltd .The contents of this email and any attachments may contain information that is privileged, confidential and/or exempt from disclosure under applicable law and relevant NDA. If you are not the intended recipient, you are hereby notified that any disclosure, copying, distribution, or use of the information is STRICTLY PROHIBITED. Please immediately contact the sender as soon as possible and destroy the material in its entirety in any format. Thank you.

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Re: [PATCH v5 6/7] dt-bindings: clock: rockchip: Add RK3506 clock and reset unit

[zhangqing]

在 2025/10/30 21:55, Jonas Karlman 写道:
> Hi Elaine,
>
> On 10/27/2025 9:41 AM, Elaine Zhang wrote:
>> From: Finley Xiao <finley.xiao@rock-chips.com>
>>
>> Add device tree bindings for clock and reset unit on RK3506 SoC.
>> Add clock and reset IDs for RK3506 SoC.
>>
>> Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
>> ---
>>   .../bindings/clock/rockchip,rk3506-cru.yaml   |  51 ++++
>>   .../dt-bindings/clock/rockchip,rk3506-cru.h   | 285 ++++++++++++++++++
>>   .../dt-bindings/reset/rockchip,rk3506-cru.h   | 211 +++++++++++++
>>   3 files changed, 547 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3506-cru.yaml
>>   create mode 100644 include/dt-bindings/clock/rockchip,rk3506-cru.h
>>   create mode 100644 include/dt-bindings/reset/rockchip,rk3506-cru.h
> [snip]
>
>> diff --git a/include/dt-bindings/reset/rockchip,rk3506-cru.h b/include/dt-bindings/reset/rockchip,rk3506-cru.h
>> new file mode 100644
>> index 000000000000..f38cc066009b
>> --- /dev/null
>> +++ b/include/dt-bindings/reset/rockchip,rk3506-cru.h
>> @@ -0,0 +1,211 @@
>> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
>> +/*
>> + * Copyright (c) 2023-2025 Rockchip Electronics Co., Ltd.
>> + * Author: Finley Xiao <finley.xiao@rock-chips.com>
>> + */
>> +
>> +#ifndef _DT_BINDINGS_REST_ROCKCHIP_RK3506_H
>> +#define _DT_BINDINGS_REST_ROCKCHIP_RK3506_H
>> +
>> +/* CRU-->SOFTRST_CON00 */
>> +#define SRST_NCOREPORESET0_AC		0
>> +#define SRST_NCOREPORESET1_AC		1
>> +#define SRST_NCOREPORESET2_AC		2
>> +#define SRST_NCORESET0_AC		3
>> +#define SRST_NCORESET1_AC		4
>> +#define SRST_NCORESET2_AC		5
>> +#define SRST_NL2RESET_AC		6
>> +#define SRST_ARESETN_CORE_BIU_AC	7
>> +#define SRST_HRESETN_M0_AC		8
>> +
>> +/* CRU-->SOFTRST_CON02 */
>> +#define SRST_NDBGRESET			9
>> +#define SRST_PRESETN_CORE_BIU		10
>> +#define SRST_RESETN_PMU			11
>> +
>> +/* CRU-->SOFTRST_CON03 */
>> +#define SRST_PRESETN_DBG		12
>> +#define SRST_POTRESETN_DBG		13
>> +#define SRST_PRESETN_CORE_GRF		14
>> +#define SRST_RESETN_CORE_EMA_DETECT	15
>> +#define SRST_RESETN_REF_PVTPLL_CORE	16
>> +#define SRST_PRESETN_GPIO1		17
>> +#define SRST_DBRESETN_GPIO1		18
>> +
>> +/* CRU-->SOFTRST_CON04 */
>> +#define SRST_ARESETN_CORE_PERI_BIU	19
>> +#define SRST_ARESETN_DSMC		20
>> +#define SRST_PRESETN_DSMC		21
>> +#define SRST_RESETN_FLEXBUS		22
>> +#define SRST_ARESETN_FLEXBUS		23
>> +#define SRST_HRESETN_FLEXBUS		24
>> +#define SRST_ARESETN_DSMC_SLV		25
>> +#define SRST_HRESETN_DSMC_SLV		26
>> +#define SRST_RESETN_DSMC_SLV		27
>> +
>> +/* CRU-->SOFTRST_CON05 */
>> +#define SRST_ARESETN_BUS_BIU		28
>> +#define SRST_HRESETN_BUS_BIU		29
>> +#define SRST_PRESETN_BUS_BIU		30
>> +#define SRST_ARESETN_SYSRAM		31
>> +#define SRST_HRESETN_SYSRAM		32
>> +#define SRST_ARESETN_DMAC0		33
>> +#define SRST_ARESETN_DMAC1		34
>> +#define SRST_HRESETN_M0			35
>> +#define SRST_RESETN_M0_JTAG		36
>> +#define SRST_HRESETN_CRYPTO		37
> Is there a reason why this (and the RV1126B) reset names now include the
> RESETN name in all reset constant?
>
> For RK3528 and prior mainline SoCs the RESETN part of the name has been
> striped from the constant, suggest we also strip the RESETN part for
> RK3506 and RV1126B for consistency with other RK SoCs.
The reset id and rst-rk3506.c were automatically generated from our trm 
using tools, while some of the previous chips were filled in manually.

It is not recommended to manually modify the content generated by the 
tool to avoid unnecessary errors.

It is not necessary to change SRST_HRESETN_CRYPTO to SRST_H_CRYPTO.

>
> Regards,
> Jonas
>
> [snip]
>
-- 
张晴
瑞芯微电子股份有限公司
Rockchip Electronics Co.,Ltd
地址：福建省福州市铜盘路软件大道89号软件园A区21号楼
Add:No.21 Building, A District, No.89 Software Boulevard Fuzhou, Fujian 350003, P.R.China
Tel:+86-0591-83991906-8601
邮编：350003
E-mail:elaine.zhang@rock-chips.com
****************************************************************************
保密提示：本邮件及其附件含有机密信息，仅发送给本邮件所指特定收件人。若非该特定收件人，请勿复制、使用或披露本邮件的任何内容。若误收本邮件，请从系统中永久性删除本邮件及所有附件，并以回复邮件或其他方式即刻告知发件人。福州瑞芯微电子有限公司拥有本邮件信息的著作权及解释权，禁止任何未经授权许可的侵权行为。

IMPORTANT NOTICE: This email is from Fuzhou Rockchip Electronics Co., Ltd .The contents of this email and any attachments may contain information that is privileged, confidential and/or exempt from disclosure under applicable law and relevant NDA. If you are not the intended recipient, you are hereby notified that any disclosure, copying, distribution, or use of the information is STRICTLY PROHIBITED. Please immediately contact the sender as soon as possible and destroy the material in its entirety in any format. Thank you.

****************************************************************************