* [PATCH 1/2] dt-bindings: socfpga: Add the Agilex7 series SoC's
@ 2026-04-13 14:45 Dinh Nguyen
2026-04-13 14:45 ` [PATCH 2/2] arm64: dts: Add SoCFPGA Agilex7M devkit Dinh Nguyen
` (2 more replies)
0 siblings, 3 replies; 8+ messages in thread
From: Dinh Nguyen @ 2026-04-13 14:45 UTC (permalink / raw)
To: robh, krzk+dt, conor+dt; +Cc: dinguyen, devicetree
The Agilex7 is a series of devices from Altera that are derived from
the Agilex family.
The Agilex7F device supports PCIE 4.0 and DDR4. The Agilex7I device supports
PCIE 5.0 and DDR4, while the Agilex7M device supports DDR4, DDR5, LPDDR5
and PCIE 5.0.
All other peripherals from these devices are the same as the Agilex
device.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
Documentation/devicetree/bindings/arm/altera.yaml | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml
index 206686f3eebc..5ee09f8d4698 100644
--- a/Documentation/devicetree/bindings/arm/altera.yaml
+++ b/Documentation/devicetree/bindings/arm/altera.yaml
@@ -115,6 +115,16 @@ properties:
- intel,socfpga-agilex5-socdk-nand
- const: intel,socfpga-agilex5
+ - description: Agilex7 series F, I and M boards
+ items:
+ - enum:
+ - intel,socfpga-agilex7m-socdk
+ - enum:
+ - intel,socfpga-agilex7f
+ - intel,socfpga-agilex7i
+ - intel,socfpga-agilex7m
+ - const: intel,socfpga-agilex
+
- description: SoCFPGA VT
items:
- const: altr,socfpga-vt
--
2.42.0.411.g813d9a9188
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH 2/2] arm64: dts: Add SoCFPGA Agilex7M devkit 2026-04-13 14:45 [PATCH 1/2] dt-bindings: socfpga: Add the Agilex7 series SoC's Dinh Nguyen @ 2026-04-13 14:45 ` Dinh Nguyen 2026-04-14 7:16 ` [PATCH 1/2] dt-bindings: socfpga: Add the Agilex7 series SoC's Krzysztof Kozlowski 2026-04-14 7:17 ` Krzysztof Kozlowski 2 siblings, 0 replies; 8+ messages in thread From: Dinh Nguyen @ 2026-04-13 14:45 UTC (permalink / raw) To: robh, krzk+dt, conor+dt; +Cc: dinguyen, devicetree, Niravkumar L Rabara The Agilex7-M SoCDK is largely compatible with the Agilex SoCDK. Reuse the existing Agilex device tree while disabling the QSPI controller, which is not present on Agilex7-M. Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> --- arch/arm64/boot/dts/intel/Makefile | 1 + .../boot/dts/intel/socfpga_agilex7m_socdk.dts | 15 +++++++++++++++ 2 files changed, 16 insertions(+) create mode 100644 arch/arm64/boot/dts/intel/socfpga_agilex7m_socdk.dts diff --git a/arch/arm64/boot/dts/intel/Makefile b/arch/arm64/boot/dts/intel/Makefile index 33fcc55d0cb9..088a03b89c99 100644 --- a/arch/arm64/boot/dts/intel/Makefile +++ b/arch/arm64/boot/dts/intel/Makefile @@ -8,5 +8,6 @@ dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga_agilex_n6000.dtb \ socfpga_agilex5_socdk_013b.dtb \ socfpga_agilex5_socdk_modular.dtb \ socfpga_agilex5_socdk_nand.dtb \ + socfpga_agilex7m_socdk.dtb \ socfpga_n5x_socdk.dtb dtb-$(CONFIG_ARCH_KEEMBAY) += keembay-evm.dtb diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex7m_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_agilex7m_socdk.dts new file mode 100644 index 000000000000..164556e0a785 --- /dev/null +++ b/arch/arm64/boot/dts/intel/socfpga_agilex7m_socdk.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// Copyright (c) 2023 Intel Corporation + +#include "socfpga_agilex_socdk.dts" + +/ { + model = "Intel SoCFPGA Agilex7-M SoCDK"; + compatible = "intel,socfpga-agilex7m-socdk", + "intel,socfpga-agilex7m", + "intel,socfpga-agilex"; +}; + +&qspi { + status = "disabled"; +}; -- 2.42.0.411.g813d9a9188 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] dt-bindings: socfpga: Add the Agilex7 series SoC's 2026-04-13 14:45 [PATCH 1/2] dt-bindings: socfpga: Add the Agilex7 series SoC's Dinh Nguyen 2026-04-13 14:45 ` [PATCH 2/2] arm64: dts: Add SoCFPGA Agilex7M devkit Dinh Nguyen @ 2026-04-14 7:16 ` Krzysztof Kozlowski 2026-04-14 7:17 ` Krzysztof Kozlowski 2 siblings, 0 replies; 8+ messages in thread From: Krzysztof Kozlowski @ 2026-04-14 7:16 UTC (permalink / raw) To: Dinh Nguyen; +Cc: robh, krzk+dt, conor+dt, devicetree On Mon, Apr 13, 2026 at 09:45:52AM -0500, Dinh Nguyen wrote: > The Agilex7 is a series of devices from Altera that are derived from > the Agilex family. SoCs? > > The Agilex7F device supports PCIE 4.0 and DDR4. The Agilex7I device supports Please run scripts/checkpatch.pl on the patches and fix reported warnings. After that, run also 'scripts/checkpatch.pl --strict' on the patches and (probably) fix more warnings. Some warnings can be ignored, especially from --strict run, but the code here looks like it needs a fix. Feel free to get in touch if the warning is not clear. > PCIE 5.0 and DDR4, while the Agilex7M device supports DDR4, DDR5, LPDDR5 > and PCIE 5.0. > > All other peripherals from these devices are the same as the Agilex > device. > > Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> > --- > Documentation/devicetree/bindings/arm/altera.yaml | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml > index 206686f3eebc..5ee09f8d4698 100644 > --- a/Documentation/devicetree/bindings/arm/altera.yaml > +++ b/Documentation/devicetree/bindings/arm/altera.yaml > @@ -115,6 +115,16 @@ properties: > - intel,socfpga-agilex5-socdk-nand > - const: intel,socfpga-agilex5 > > + - description: Agilex7 series F, I and M boards > + items: > + - enum: > + - intel,socfpga-agilex7m-socdk Why does "7m-socdk" go with "7i" and "7m"? If these are SoCs, then board using soc 7m cannot use 7i or 7f fallback. Or board is not using 7m SoC, but then the name is misleading. > + - enum: > + - intel,socfpga-agilex7f > + - intel,socfpga-agilex7i > + - intel,socfpga-agilex7m > + - const: intel,socfpga-agilex Best regards, Krzysztof ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] dt-bindings: socfpga: Add the Agilex7 series SoC's 2026-04-13 14:45 [PATCH 1/2] dt-bindings: socfpga: Add the Agilex7 series SoC's Dinh Nguyen 2026-04-13 14:45 ` [PATCH 2/2] arm64: dts: Add SoCFPGA Agilex7M devkit Dinh Nguyen 2026-04-14 7:16 ` [PATCH 1/2] dt-bindings: socfpga: Add the Agilex7 series SoC's Krzysztof Kozlowski @ 2026-04-14 7:17 ` Krzysztof Kozlowski 2026-04-14 12:53 ` Dinh Nguyen 2 siblings, 1 reply; 8+ messages in thread From: Krzysztof Kozlowski @ 2026-04-14 7:17 UTC (permalink / raw) To: Dinh Nguyen; +Cc: robh, krzk+dt, conor+dt, devicetree On Mon, Apr 13, 2026 at 09:45:52AM -0500, Dinh Nguyen wrote: > The Agilex7 is a series of devices from Altera that are derived from > the Agilex family. > > The Agilex7F device supports PCIE 4.0 and DDR4. The Agilex7I device supports > PCIE 5.0 and DDR4, while the Agilex7M device supports DDR4, DDR5, LPDDR5 > and PCIE 5.0. > > All other peripherals from these devices are the same as the Agilex > device. > > Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> > --- > Documentation/devicetree/bindings/arm/altera.yaml | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml > index 206686f3eebc..5ee09f8d4698 100644 > --- a/Documentation/devicetree/bindings/arm/altera.yaml > +++ b/Documentation/devicetree/bindings/arm/altera.yaml > @@ -115,6 +115,16 @@ properties: > - intel,socfpga-agilex5-socdk-nand > - const: intel,socfpga-agilex5 > > + - description: Agilex7 series F, I and M boards > + items: > + - enum: > + - intel,socfpga-agilex7m-socdk > + - enum: > + - intel,socfpga-agilex7f > + - intel,socfpga-agilex7i > + - intel,socfpga-agilex7m > + - const: intel,socfpga-agilex And separate question - why previous soc "agilex" is used as fallback? Even more confusing. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] dt-bindings: socfpga: Add the Agilex7 series SoC's 2026-04-14 7:17 ` Krzysztof Kozlowski @ 2026-04-14 12:53 ` Dinh Nguyen 2026-04-14 12:55 ` Krzysztof Kozlowski 0 siblings, 1 reply; 8+ messages in thread From: Dinh Nguyen @ 2026-04-14 12:53 UTC (permalink / raw) To: Krzysztof Kozlowski; +Cc: robh, krzk+dt, conor+dt, devicetree On 4/14/26 02:17, Krzysztof Kozlowski wrote: > On Mon, Apr 13, 2026 at 09:45:52AM -0500, Dinh Nguyen wrote: >> The Agilex7 is a series of devices from Altera that are derived from >> the Agilex family. >> >> The Agilex7F device supports PCIE 4.0 and DDR4. The Agilex7I device supports >> PCIE 5.0 and DDR4, while the Agilex7M device supports DDR4, DDR5, LPDDR5 >> and PCIE 5.0. >> >> All other peripherals from these devices are the same as the Agilex >> device. >> >> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> >> --- >> Documentation/devicetree/bindings/arm/altera.yaml | 10 ++++++++++ >> 1 file changed, 10 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml >> index 206686f3eebc..5ee09f8d4698 100644 >> --- a/Documentation/devicetree/bindings/arm/altera.yaml >> +++ b/Documentation/devicetree/bindings/arm/altera.yaml >> @@ -115,6 +115,16 @@ properties: >> - intel,socfpga-agilex5-socdk-nand >> - const: intel,socfpga-agilex5 >> >> + - description: Agilex7 series F, I and M boards >> + items: >> + - enum: >> + - intel,socfpga-agilex7m-socdk >> + - enum: >> + - intel,socfpga-agilex7f >> + - intel,socfpga-agilex7i >> + - intel,socfpga-agilex7m >> + - const: intel,socfpga-agilex > > And separate question - why previous soc "agilex" is used as fallback? > Even more confusing. > You're right. Sorry for the confusion. The Agilex7M, I, F devices are basically "agilex" devices with some few additions (PCIE, DDR5). Maybe I should place the Agilex7M/I/F devices into the "agilex" boards area? Thanks, Dinh ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] dt-bindings: socfpga: Add the Agilex7 series SoC's 2026-04-14 12:53 ` Dinh Nguyen @ 2026-04-14 12:55 ` Krzysztof Kozlowski 2026-04-16 15:20 ` Dinh Nguyen 0 siblings, 1 reply; 8+ messages in thread From: Krzysztof Kozlowski @ 2026-04-14 12:55 UTC (permalink / raw) To: Dinh Nguyen; +Cc: robh, krzk+dt, conor+dt, devicetree On 14/04/2026 14:53, Dinh Nguyen wrote: > > > On 4/14/26 02:17, Krzysztof Kozlowski wrote: >> On Mon, Apr 13, 2026 at 09:45:52AM -0500, Dinh Nguyen wrote: >>> The Agilex7 is a series of devices from Altera that are derived from >>> the Agilex family. >>> >>> The Agilex7F device supports PCIE 4.0 and DDR4. The Agilex7I device supports >>> PCIE 5.0 and DDR4, while the Agilex7M device supports DDR4, DDR5, LPDDR5 >>> and PCIE 5.0. >>> >>> All other peripherals from these devices are the same as the Agilex >>> device. >>> >>> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> >>> --- >>> Documentation/devicetree/bindings/arm/altera.yaml | 10 ++++++++++ >>> 1 file changed, 10 insertions(+) >>> >>> diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml >>> index 206686f3eebc..5ee09f8d4698 100644 >>> --- a/Documentation/devicetree/bindings/arm/altera.yaml >>> +++ b/Documentation/devicetree/bindings/arm/altera.yaml >>> @@ -115,6 +115,16 @@ properties: >>> - intel,socfpga-agilex5-socdk-nand >>> - const: intel,socfpga-agilex5 >>> >>> + - description: Agilex7 series F, I and M boards >>> + items: >>> + - enum: >>> + - intel,socfpga-agilex7m-socdk >>> + - enum: >>> + - intel,socfpga-agilex7f >>> + - intel,socfpga-agilex7i >>> + - intel,socfpga-agilex7m >>> + - const: intel,socfpga-agilex >> >> And separate question - why previous soc "agilex" is used as fallback? >> Even more confusing. >> > > You're right. Sorry for the confusion. The Agilex7M, I, F devices are > basically "agilex" devices with some few additions (PCIE, DDR5). Maybe I > should place the Agilex7M/I/F devices into the "agilex" boards area? Compatibles should be specific and not based on families, thus what is "intel,socfpga-agilex"? SoC, right? Then "intel,socfpga-agilex7f" is a new SoC, no? Best regards, Krzysztof ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] dt-bindings: socfpga: Add the Agilex7 series SoC's 2026-04-14 12:55 ` Krzysztof Kozlowski @ 2026-04-16 15:20 ` Dinh Nguyen 2026-04-17 6:43 ` Krzysztof Kozlowski 0 siblings, 1 reply; 8+ messages in thread From: Dinh Nguyen @ 2026-04-16 15:20 UTC (permalink / raw) To: Krzysztof Kozlowski; +Cc: robh, krzk+dt, conor+dt, devicetree On 4/14/26 07:55, Krzysztof Kozlowski wrote: > On 14/04/2026 14:53, Dinh Nguyen wrote: >> >> >> On 4/14/26 02:17, Krzysztof Kozlowski wrote: >>> On Mon, Apr 13, 2026 at 09:45:52AM -0500, Dinh Nguyen wrote: >>>> The Agilex7 is a series of devices from Altera that are derived from >>>> the Agilex family. >>>> >>>> The Agilex7F device supports PCIE 4.0 and DDR4. The Agilex7I device supports >>>> PCIE 5.0 and DDR4, while the Agilex7M device supports DDR4, DDR5, LPDDR5 >>>> and PCIE 5.0. >>>> >>>> All other peripherals from these devices are the same as the Agilex >>>> device. >>>> >>>> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> >>>> --- >>>> Documentation/devicetree/bindings/arm/altera.yaml | 10 ++++++++++ >>>> 1 file changed, 10 insertions(+) >>>> >>>> diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml >>>> index 206686f3eebc..5ee09f8d4698 100644 >>>> --- a/Documentation/devicetree/bindings/arm/altera.yaml >>>> +++ b/Documentation/devicetree/bindings/arm/altera.yaml >>>> @@ -115,6 +115,16 @@ properties: >>>> - intel,socfpga-agilex5-socdk-nand >>>> - const: intel,socfpga-agilex5 >>>> >>>> + - description: Agilex7 series F, I and M boards >>>> + items: >>>> + - enum: >>>> + - intel,socfpga-agilex7m-socdk >>>> + - enum: >>>> + - intel,socfpga-agilex7f >>>> + - intel,socfpga-agilex7i >>>> + - intel,socfpga-agilex7m >>>> + - const: intel,socfpga-agilex >>> >>> And separate question - why previous soc "agilex" is used as fallback? >>> Even more confusing. >>> >> >> You're right. Sorry for the confusion. The Agilex7M, I, F devices are >> basically "agilex" devices with some few additions (PCIE, DDR5). Maybe I >> should place the Agilex7M/I/F devices into the "agilex" boards area? > > Compatibles should be specific and not based on families, thus what is > "intel,socfpga-agilex"? SoC, right? > > Then "intel,socfpgaa-agilex7f" is a new SoC, no? > The Agilex7 is re-branded name for the original Agilex soc, "intel, socfga-agilex". From a software perspective, they are the same device. I looked over the commits to see how I could handle a rebranding, but couldn't come up with a conclusion. I could create a new SoC like you've suggested: + - description: Agilex7m boards + items: + - enum: + - altr,socfpga-agilex7m-socdk + - const: altr,socfpga-agilex7m + - const: altr,socfpga-agilex7 Or I can use the original "intel,socfpga-agilex"? + - description: Agilex7m boards + items: + - enum: + - altr,socfpga-agilex7m-socdk + - const: altr,socfpga-agilex7m + - const: altr,socfpga-agilex If I create a new "altr,socfpga-agilex7" binding, then I would have to add the new binding to a few drivers. But if I use the original "intel,socfpga-agilex", then no drivers will need to be updated. Thanks, Dinh ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] dt-bindings: socfpga: Add the Agilex7 series SoC's 2026-04-16 15:20 ` Dinh Nguyen @ 2026-04-17 6:43 ` Krzysztof Kozlowski 0 siblings, 0 replies; 8+ messages in thread From: Krzysztof Kozlowski @ 2026-04-17 6:43 UTC (permalink / raw) To: Dinh Nguyen; +Cc: robh, krzk+dt, conor+dt, devicetree On 16/04/2026 17:20, Dinh Nguyen wrote: > > > On 4/14/26 07:55, Krzysztof Kozlowski wrote: >> On 14/04/2026 14:53, Dinh Nguyen wrote: >>> >>> >>> On 4/14/26 02:17, Krzysztof Kozlowski wrote: >>>> On Mon, Apr 13, 2026 at 09:45:52AM -0500, Dinh Nguyen wrote: >>>>> The Agilex7 is a series of devices from Altera that are derived from >>>>> the Agilex family. >>>>> >>>>> The Agilex7F device supports PCIE 4.0 and DDR4. The Agilex7I device supports >>>>> PCIE 5.0 and DDR4, while the Agilex7M device supports DDR4, DDR5, LPDDR5 >>>>> and PCIE 5.0. >>>>> >>>>> All other peripherals from these devices are the same as the Agilex >>>>> device. >>>>> >>>>> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> >>>>> --- >>>>> Documentation/devicetree/bindings/arm/altera.yaml | 10 ++++++++++ >>>>> 1 file changed, 10 insertions(+) >>>>> >>>>> diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml >>>>> index 206686f3eebc..5ee09f8d4698 100644 >>>>> --- a/Documentation/devicetree/bindings/arm/altera.yaml >>>>> +++ b/Documentation/devicetree/bindings/arm/altera.yaml >>>>> @@ -115,6 +115,16 @@ properties: >>>>> - intel,socfpga-agilex5-socdk-nand >>>>> - const: intel,socfpga-agilex5 >>>>> >>>>> + - description: Agilex7 series F, I and M boards >>>>> + items: >>>>> + - enum: >>>>> + - intel,socfpga-agilex7m-socdk >>>>> + - enum: >>>>> + - intel,socfpga-agilex7f >>>>> + - intel,socfpga-agilex7i >>>>> + - intel,socfpga-agilex7m >>>>> + - const: intel,socfpga-agilex >>>> >>>> And separate question - why previous soc "agilex" is used as fallback? >>>> Even more confusing. >>>> >>> >>> You're right. Sorry for the confusion. The Agilex7M, I, F devices are >>> basically "agilex" devices with some few additions (PCIE, DDR5). Maybe I >>> should place the Agilex7M/I/F devices into the "agilex" boards area? >> >> Compatibles should be specific and not based on families, thus what is >> "intel,socfpga-agilex"? SoC, right? >> >> Then "intel,socfpgaa-agilex7f" is a new SoC, no? >> > > The Agilex7 is re-branded name for the original Agilex soc, > "intel, socfga-agilex". From a software perspective, they are the same > device. I looked over the commits to see how I could handle a > rebranding, but couldn't come up with a conclusion. The family does not matter. What is "socfga-agilex"? One given soc. Not a family. > > I could create a new SoC like you've suggested: > > + - description: Agilex7m boards > + items: > + - enum: > + - altr,socfpga-agilex7m-socdk > + - const: altr,socfpga-agilex7m > + - const: altr,socfpga-agilex7 So what is "altr,socfpga-agilex7"? Why SoC has two compatibles? > > Or I can use the original "intel,socfpga-agilex"? > > + - description: Agilex7m boards > + items: > + - enum: > + - altr,socfpga-agilex7m-socdk > + - const: altr,socfpga-agilex7m > + - const: altr,socfpga-agilex But why? Why are you using one SoC compatible in other context? It's really no different than all other SoCs. > > If I create a new "altr,socfpga-agilex7" binding, then I would have to > add the new binding to a few drivers. But if I use the original > "intel,socfpga-agilex", then no drivers will need to be updated. You anyway MUST have new binding for each device. Please carefully follow writing bindings and DTS 101. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2026-04-17 6:43 UTC | newest] Thread overview: 8+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-04-13 14:45 [PATCH 1/2] dt-bindings: socfpga: Add the Agilex7 series SoC's Dinh Nguyen 2026-04-13 14:45 ` [PATCH 2/2] arm64: dts: Add SoCFPGA Agilex7M devkit Dinh Nguyen 2026-04-14 7:16 ` [PATCH 1/2] dt-bindings: socfpga: Add the Agilex7 series SoC's Krzysztof Kozlowski 2026-04-14 7:17 ` Krzysztof Kozlowski 2026-04-14 12:53 ` Dinh Nguyen 2026-04-14 12:55 ` Krzysztof Kozlowski 2026-04-16 15:20 ` Dinh Nguyen 2026-04-17 6:43 ` Krzysztof Kozlowski
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