* [PATCH V8 0/2] Enable ADSP and CDSP for Glymur SoC
@ 2026-05-20 14:18 Sibi Sankar
2026-05-20 14:18 ` [PATCH V8 1/2] arm64: dts: glymur: Add LPASS macro codecs and pinctrl Sibi Sankar
2026-05-20 14:18 ` [PATCH V8 2/2] arm64: dts: qcom: glymur-crd: add Audio sound card node Sibi Sankar
0 siblings, 2 replies; 5+ messages in thread
From: Sibi Sankar @ 2026-05-20 14:18 UTC (permalink / raw)
To: robh, srini, krzk+dt, conor+dt, andersson, konradybcio
Cc: linux-arm-msm, devicetree, linux-kernel
Qualcomm Glymur SoC variants predominantly boot Linux at EL2. This means
that the firmware streams of the remote processors are managed in kernel
and not in Gunyah hypervisor. Given that the Peripheral Image Loader for
Qualcomm SoCs now support running Linux Host at EL2 [1], this series
documents and enables ADSP and CDSP on Qualcomm Glymur SoCs with its
fastrpc nodes. A few variants of the SoC are expected to run Linux at EL1
hence the iommus properties are left optional.
[1] - https://lore.kernel.org/all/20260105-kvmrprocv10-v10-0-022e96815380@oss.qualcomm.com/
Changes in v8:
- Drop bindings and remoteproc nodes since they've already been picked up by Greg/Bjorn.
- Fix SID duplication between gpr and fastrpc nodes. [Sibi]
- Fix Incomplete DCO. [Krzysztof]
- Match model name to the one already used in Audioreach topology. [Krzysztof]
- Link to v7: https://lore.kernel.org/lkml/20260331032121.1279203-1-sibi.sankar@oss.qualcomm.com/
Changes in v7:
- Rebased on the latest Linux-next
- Split patch series so that Greg can pick this one up so that
the dt changes can be picked up by Bjorn.
- Link to v6: https://lore.kernel.org/lkml/20260325035338.1393287-1-sibi.sankar@oss.qualcomm.com/
Changes in v6:
- Pick the audio series up. [Srini]
- Pickup Rbs from the list.
- Rebase on top of the lastest linux-next.
- Fix up address size and other misc fixes. [Konrad]
- Fix the ordering the various audio nodes. [Sibi]
- Link to v5: https://lore.kernel.org/lkml/20260313120814.1312410-1-sibi.sankar@oss.qualcomm.com/
- Link to v0 audio series: https://lore.kernel.org/lkml/20260311124230.2241781-1-srinivas.kandagatla@oss.qualcomm.com/
Changes in v5:
- Fix commit messages (patch 1/2) to accurately describe compatibility [Krzysztof]
- Link to v4: https://lore.kernel.org/lkml/20260310033617.3108675-1-sibi.sankar@oss.qualcomm.com/
Changes in v4:
- Fix SID used in ADSP/CDSP for correctness [Konrad]
- Link to v3: https://lore.kernel.org/lkml/20260129001358.770053-1-sibi.sankar@oss.qualcomm.com/
Changes in v3:
- A few variants of the SoC are expected to run Linux at EL1 hence the
iommus properties are left optional.
- Add fastrpc bindings and nodes.
- Link to v2: https://lore.kernel.org/all/20251029-knp-remoteproc-v2-0-6c81993b52ea@oss.qualcomm.com/
Changes in v2:
- Combined into Kaanapali series since they are fully compatible.
- Link to v1: https://lore.kernel.org/all/20250924183726.509202-1-sibi.sankar@oss.qualcomm.com/
Srinivas Kandagatla (2):
arm64: dts: glymur: Add LPASS macro codecs and pinctrl
arm64: dts: qcom: glymur-crd: add Audio sound card node
arch/arm64/boot/dts/qcom/glymur-crd.dtsi | 110 ++++++++++
arch/arm64/boot/dts/qcom/glymur.dtsi | 263 +++++++++++++++++++++++
2 files changed, 373 insertions(+)
base-commit: 6a50ba100ace43f43c87384367eb2d2605fcc16c
--
2.34.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH V8 1/2] arm64: dts: glymur: Add LPASS macro codecs and pinctrl
2026-05-20 14:18 [PATCH V8 0/2] Enable ADSP and CDSP for Glymur SoC Sibi Sankar
@ 2026-05-20 14:18 ` Sibi Sankar
2026-05-20 14:44 ` sashiko-bot
2026-05-20 14:18 ` [PATCH V8 2/2] arm64: dts: qcom: glymur-crd: add Audio sound card node Sibi Sankar
1 sibling, 1 reply; 5+ messages in thread
From: Sibi Sankar @ 2026-05-20 14:18 UTC (permalink / raw)
To: robh, srini, krzk+dt, conor+dt, andersson, konradybcio
Cc: linux-arm-msm, devicetree, linux-kernel, Mohammad Rafi Shaik,
Konrad Dybcio
From: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
Add LPASS macro codecs and LPASS TLMM pin controller on Qualcomm glymur
for proper sound support.
Also add GPR (Generic Pack router) node along with APM (Audio Process
Manager) and PRM (Proxy resource Manager) audio services.
Co-developed-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
Signed-off-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/glymur.dtsi | 263 +++++++++++++++++++++++++++
1 file changed, 263 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
index 72c7dc6e4f09..f89b9c3b5452 100644
--- a/arch/arm64/boot/dts/qcom/glymur.dtsi
+++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
@@ -20,7 +20,9 @@
#include <dt-bindings/power/qcom,rpmhpd.h>
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
+#include <dt-bindings/soc/qcom,gpr.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
+#include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
#include <dt-bindings/spmi/spmi.h>
#include "glymur-ipcc.h"
@@ -3891,9 +3893,138 @@ compute-cb@8 {
dma-coherent;
};
};
+
+ gpr {
+ compatible = "qcom,gpr";
+ qcom,glink-channels = "adsp_apps";
+ qcom,domain = <GPR_DOMAIN_ID_ADSP>;
+ qcom,intents = <512 20>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ q6apm: service@1 {
+ compatible = "qcom,q6apm";
+ reg = <GPR_APM_MODULE_IID>;
+ #sound-dai-cells = <0>;
+ qcom,protection-domain = "avs/audio",
+ "msm/adsp/audio_pd";
+
+ q6apmbedai: bedais {
+ compatible = "qcom,q6apm-lpass-dais";
+ #sound-dai-cells = <1>;
+ };
+
+ q6apmdai: dais {
+ compatible = "qcom,q6apm-dais";
+ iommus = <&apps_smmu 0x1001 0x80>,
+ <&apps_smmu 0x1061 0x20>;
+ };
+ };
+
+ q6prm: service@2 {
+ compatible = "qcom,q6prm";
+ reg = <GPR_PRM_MODULE_IID>;
+ qcom,protection-domain = "avs/audio",
+ "msm/adsp/audio_pd";
+
+ q6prmcc: clock-controller {
+ compatible = "qcom,q6prm-lpass-clocks";
+ #clock-cells = <2>;
+ };
+ };
+ };
};
};
+ swr0: soundwire@6c80000 {
+ compatible = "qcom,soundwire-v3.1.0";
+ reg = <0x0 0x06c80000 0x0 0x10000>;
+ interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&lpass_wsamacro>;
+ clock-names = "iface";
+ label = "WSA";
+
+ pinctrl-0 = <&wsa_swr_active>;
+ pinctrl-names = "default";
+
+ qcom,ports-block-pack-mode = /bits/ 8 <0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x00 0x00 0x01 0x01>;
+ qcom,ports-word-length = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0xff 0x18 0x18 0xff 0xff>;
+ qcom,ports-offset1 = /bits/ 8 <0x01 0x03 0x05 0x02 0x04 0x15 0x00 0xff 0xff 0xff 0xff 0x06 0x0d 0x0 0x19 0x06 0x06>;
+ qcom,ports-offset2 = /bits/ 8 <0xff 0x07 0x1f 0xff 0x07 0x1f 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
+ qcom,ports-sinterval = /bits/ 16 <0x07 0x1f 0x3f 0x07 0x1f 0x3f 0xc8 0xff 0xff 0xff 0xff 0x0f 0x0f 0x31f 0x31f 0x0f 0x0f >;
+ qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0xff 0xf 0xf 0xff 0xff>;
+ qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0xff 0x0f 0x0f 0xff 0xff>;
+ qcom,ports-lane-control = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
+ qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
+ #address-cells = <2>;
+ #size-cells = <0>;
+ #sound-dai-cells = <1>;
+ status = "disabled";
+ };
+
+ lpass_wsamacro: codec@6c90000 {
+ compatible = "qcom,glymur-lpass-wsa-macro", "qcom,sm8550-lpass-wsa-macro";
+ reg = <0x0 0x06c90000 0x0 0x1000>;
+ clocks = <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&lpass_vamacro>;
+ clock-names = "mclk",
+ "macro",
+ "dcodec",
+ "fsgen";
+
+ #clock-cells = <0>;
+ clock-output-names = "mclk";
+ #sound-dai-cells = <1>;
+ sound-name-prefix = "WSA";
+ };
+
+ swr3: soundwire@6ca0000 {
+ compatible = "qcom,soundwire-v3.1.0";
+ reg = <0x0 0x06ca0000 0x0 0x10000>;
+ interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&lpass_wsa2macro>;
+ clock-names = "iface";
+ label = "WSA2";
+
+ pinctrl-0 = <&wsa2_swr_active>;
+ pinctrl-names = "default";
+
+ qcom,ports-block-pack-mode = /bits/ 8 <0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x00 0x00 0x01 0x01>;
+ qcom,ports-word-length = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0xff 0x18 0x18 0xff 0xff>;
+ qcom,ports-offset1 = /bits/ 8 <0x01 0x03 0x05 0x02 0x04 0x15 0x00 0xff 0xff 0xff 0xff 0x06 0x0d 0x0 0x19 0x06 0x06>;
+ qcom,ports-offset2 = /bits/ 8 <0xff 0x07 0x1f 0xff 0x07 0x1f 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
+ qcom,ports-sinterval = /bits/ 16 <0x07 0x1f 0x3f 0x07 0x1f 0x3f 0xc8 0xff 0xff 0xff 0xff 0x0f 0x0f 0x31f 0x31f 0x0f 0x0f >;
+ qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0xff 0xf 0xf 0xff 0xff>;
+ qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0xff 0x0f 0x0f 0xff 0xff>;
+ qcom,ports-lane-control = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
+ qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
+
+ #address-cells = <2>;
+ #size-cells = <0>;
+ #sound-dai-cells = <1>;
+ status = "disabled";
+ };
+
+ lpass_wsa2macro: codec@6cb0000 {
+ compatible = "qcom,glymur-lpass-wsa-macro", "qcom,sm8550-lpass-wsa-macro";
+ reg = <0x0 0x06cb0000 0x0 0x1000>;
+ clocks = <&q6prmcc LPASS_CLK_ID_WSA2_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&lpass_vamacro>;
+ clock-names = "mclk",
+ "macro",
+ "dcodec",
+ "fsgen";
+
+ #clock-cells = <0>;
+ clock-output-names = "wsa2-mclk";
+ #sound-dai-cells = <1>;
+ sound-name-prefix = "WSA2";
+ };
+
lpass_lpiaon_noc: interconnect@7400000 {
compatible = "qcom,glymur-lpass-lpiaon-noc";
reg = <0x0 0x07400000 0x0 0x19080>;
@@ -3908,6 +4039,138 @@ lpass_lpicx_noc: interconnect@7420000 {
#interconnect-cells = <2>;
};
+ lpass_vamacro: codec@7660000 {
+ compatible = "qcom,glymur-lpass-va-macro", "qcom,sm8550-lpass-va-macro";
+ reg = <0x0 0x07660000 0x0 0x2000>;
+ clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+ clock-names = "mclk",
+ "macro",
+ "dcodec";
+
+ #clock-cells = <0>;
+ clock-output-names = "fsgen";
+ #sound-dai-cells = <1>;
+ };
+
+ lpass_tlmm: pinctrl@7760000 {
+ compatible = "qcom,glymur-lpass-lpi-pinctrl", "qcom,sm8650-lpass-lpi-pinctrl";
+ reg = <0x0 0x07760000 0x0 0x20000>;
+
+ clocks = <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+ clock-names = "core", "audio";
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&lpass_tlmm 0 0 23>;
+
+ tx_swr_active: tx-swr-active-state {
+ clk-pins {
+ pins = "gpio0";
+ function = "swr_tx_clk";
+ drive-strength = <2>;
+ slew-rate = <1>;
+ bias-disable;
+ };
+
+ data-pins {
+ pins = "gpio1", "gpio2";
+ function = "swr_tx_data";
+ drive-strength = <2>;
+ slew-rate = <1>;
+ bias-bus-hold;
+ };
+ };
+
+ rx_swr_active: rx-swr-active-state {
+ clk-pins {
+ pins = "gpio3";
+ function = "swr_rx_clk";
+ drive-strength = <2>;
+ slew-rate = <1>;
+ bias-disable;
+ };
+
+ data-pins {
+ pins = "gpio4", "gpio5";
+ function = "swr_rx_data";
+ drive-strength = <2>;
+ slew-rate = <1>;
+ bias-bus-hold;
+ };
+ };
+
+ dmic01_default: dmic01-default-state {
+ clk-pins {
+ pins = "gpio6";
+ function = "dmic1_clk";
+ drive-strength = <8>;
+ output-high;
+ };
+
+ data-pins {
+ pins = "gpio7";
+ function = "dmic1_data";
+ drive-strength = <8>;
+ input-enable;
+ };
+ };
+
+ dmic23_default: dmic23-default-state {
+ clk-pins {
+ pins = "gpio8";
+ function = "dmic2_clk";
+ drive-strength = <8>;
+ output-high;
+ };
+
+ data-pins {
+ pins = "gpio9";
+ function = "dmic2_data";
+ drive-strength = <8>;
+ input-enable;
+ };
+ };
+
+ wsa_swr_active: wsa-swr-active-state {
+ clk-pins {
+ pins = "gpio10";
+ function = "wsa_swr_clk";
+ drive-strength = <2>;
+ slew-rate = <1>;
+ bias-disable;
+ };
+
+ data-pins {
+ pins = "gpio11";
+ function = "wsa_swr_data";
+ drive-strength = <2>;
+ slew-rate = <1>;
+ bias-bus-hold;
+ };
+ };
+
+ wsa2_swr_active: wsa2-swr-active-state {
+ clk-pins {
+ pins = "gpio15";
+ function = "wsa2_swr_clk";
+ drive-strength = <2>;
+ slew-rate = <1>;
+ bias-disable;
+ };
+
+ data-pins {
+ pins = "gpio16";
+ function = "wsa2_swr_data";
+ drive-strength = <2>;
+ slew-rate = <1>;
+ bias-bus-hold;
+ };
+ };
+ };
+
lpass_ag_noc: interconnect@7e40000 {
compatible = "qcom,glymur-lpass-ag-noc";
reg = <0x0 0x07e40000 0x0 0xe080>;
--
2.34.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH V8 2/2] arm64: dts: qcom: glymur-crd: add Audio sound card node
2026-05-20 14:18 [PATCH V8 0/2] Enable ADSP and CDSP for Glymur SoC Sibi Sankar
2026-05-20 14:18 ` [PATCH V8 1/2] arm64: dts: glymur: Add LPASS macro codecs and pinctrl Sibi Sankar
@ 2026-05-20 14:18 ` Sibi Sankar
2026-05-20 15:06 ` sashiko-bot
1 sibling, 1 reply; 5+ messages in thread
From: Sibi Sankar @ 2026-05-20 14:18 UTC (permalink / raw)
To: robh, srini, krzk+dt, conor+dt, andersson, konradybcio
Cc: linux-arm-msm, devicetree, linux-kernel, Mohammad Rafi Shaik,
Konrad Dybcio
From: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
Add the sound card of Glymur-crd board with the routing for speakers.
Add device nodes for the sound support with WSA884x smart speakers
and playback via speakers and recording via DMIC microphones.
Co-developed-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
Signed-off-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/glymur-crd.dtsi | 110 +++++++++++++++++++++++
1 file changed, 110 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/glymur-crd.dtsi b/arch/arm64/boot/dts/qcom/glymur-crd.dtsi
index e784b538f42e..4c00d09f766c 100644
--- a/arch/arm64/boot/dts/qcom/glymur-crd.dtsi
+++ b/arch/arm64/boot/dts/qcom/glymur-crd.dtsi
@@ -68,6 +68,54 @@ switch-lid {
};
};
+ sound {
+ compatible = "qcom,glymur-sndcard";
+ model = "GLYMUR-CRD";
+ audio-routing = "wooferleft in", "wsa wsa_spk1 out",
+ "tweeterleft in", "wsa wsa_spk2 out",
+ "wooferright in", "wsa2 wsa_spk2 out",
+ "tweeterright in", "wsa2 wsa_spk2 out",
+ "VA DMIC0", "vdd-micb",
+ "VA DMIC1", "vdd-micb",
+ "VA DMIC2", "vdd-micb",
+ "VA DMIC3", "vdd-micb";
+
+ wsa-dai-link {
+ link-name = "WSA Playback";
+
+ cpu {
+ sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>;
+ };
+
+ codec {
+ sound-dai = <&left_woofer>, <&left_tweeter>,
+ <&swr0 0>, <&lpass_wsamacro 0>,
+ <&right_woofer>, <&right_tweeter>,
+ <&swr3 0>, <&lpass_wsa2macro 0>;
+ };
+
+ platform {
+ sound-dai = <&q6apm>;
+ };
+ };
+
+ va-dai-link {
+ link-name = "VA Capture";
+
+ cpu {
+ sound-dai = <&q6apmbedai VA_CODEC_DMA_TX_0>;
+ };
+
+ codec {
+ sound-dai = <&lpass_vamacro 0>;
+ };
+
+ platform {
+ sound-dai = <&q6apm>;
+ };
+ };
+ };
+
vreg_nvme: regulator-nvme {
compatible = "regulator-fixed";
@@ -444,6 +492,12 @@ vreg_l4h_e0_1p2: ldo4 {
};
};
+&lpass_vamacro {
+ pinctrl-0 = <&dmic01_default>, <&dmic23_default>;
+ pinctrl-names = "default";
+ qcom,dmic-sample-rate = <4800000>;
+};
+
&pcie3b {
vddpe-3v3-supply = <&vreg_nvmesec>;
@@ -571,6 +625,62 @@ &pon_resin {
status = "okay";
};
+&swr0 {
+ status = "okay";
+
+ /* WSA8845, Left Woofer */
+ left_woofer: speaker@0,0 {
+ compatible = "sdw20217020400";
+ reg = <0 0>;
+ reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>;
+ #sound-dai-cells = <0>;
+ sound-name-prefix = "WooferLeft";
+ vdd-1p8-supply = <&vreg_l15b_e0_1p8>;
+ vdd-io-supply = <&vreg_l18b_e0_1p2>;
+ qcom,port-mapping = <1 2 3 7 12 14>;
+ };
+
+ /* WSA8845, Left Tweeter */
+ left_tweeter: speaker@0,1 {
+ compatible = "sdw20217020400";
+ reg = <0 1>;
+ reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>;
+ #sound-dai-cells = <0>;
+ sound-name-prefix = "TweeterLeft";
+ vdd-1p8-supply = <&vreg_l15b_e0_1p8>;
+ vdd-io-supply = <&vreg_l18b_e0_1p2>;
+ qcom,port-mapping = <4 5 6 7 13 15>;
+ };
+};
+
+&swr3 {
+ status = "okay";
+
+ /* WSA8845, Right Woofer */
+ right_woofer: speaker@0,0 {
+ compatible = "sdw20217020400";
+ reg = <0 0>;
+ reset-gpios = <&lpass_tlmm 13 GPIO_ACTIVE_LOW>;
+ #sound-dai-cells = <0>;
+ sound-name-prefix = "WooferRight";
+ vdd-1p8-supply = <&vreg_l15b_e0_1p8>;
+ vdd-io-supply = <&vreg_l18b_e0_1p2>;
+ qcom,port-mapping = <1 2 3 7 12 14>;
+ };
+
+ /* WSA8845, Right Tweeter */
+ right_tweeter: speaker@0,1 {
+ compatible = "sdw20217020400";
+ reg = <0 1>;
+ reset-gpios = <&lpass_tlmm 13 GPIO_ACTIVE_LOW>;
+ #sound-dai-cells = <0>;
+ sound-name-prefix = "TweeterRight";
+ vdd-1p8-supply = <&vreg_l15b_e0_1p8>;
+ vdd-io-supply = <&vreg_l18b_e0_1p2>;
+ qcom,port-mapping = <4 5 6 7 13 15>;
+ };
+};
+
&remoteproc_adsp {
firmware-name = "qcom/glymur/adsp.mbn",
"qcom/glymur/adsp_dtb.mbn";
--
2.34.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH V8 1/2] arm64: dts: glymur: Add LPASS macro codecs and pinctrl
2026-05-20 14:18 ` [PATCH V8 1/2] arm64: dts: glymur: Add LPASS macro codecs and pinctrl Sibi Sankar
@ 2026-05-20 14:44 ` sashiko-bot
0 siblings, 0 replies; 5+ messages in thread
From: sashiko-bot @ 2026-05-20 14:44 UTC (permalink / raw)
To: Sibi Sankar; +Cc: devicetree, conor+dt, robh
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] The SoundWire nodes ('swr0' and 'swr3') define 17 elements for 'qcom,ports-*' arrays, which violates the DT binding schema.
--
commit 46878976f64d7da2480d0d9a2b1541da162ac28d
Author: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
arm64: dts: glymur: Add LPASS macro codecs and pinctrl
Add LPASS macro codecs, LPASS TLMM pin controller, and GPR node along with
APM and PRM audio services on Qualcomm glymur for proper sound support.
> diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
> index 72c7dc6e4f098..f89b9c3b54521 100644
> --- a/arch/arm64/boot/dts/qcom/glymur.dtsi
> +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
[ ... ]
> + swr0: soundwire@6c80000 {
> + compatible = "qcom,soundwire-v3.1.0";
> + reg = <0x0 0x06c80000 0x0 0x10000>;
> + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&lpass_wsamacro>;
> + clock-names = "iface";
> + label = "WSA";
> +
> + pinctrl-0 = <&wsa_swr_active>;
> + pinctrl-names = "default";
> +
> + qcom,ports-block-pack-mode = /bits/ 8 <0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x00 0x00 0x01 0x01>;
> + qcom,ports-word-length = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0xff 0x18 0x18 0xff 0xff>;
> + qcom,ports-offset1 = /bits/ 8 <0x01 0x03 0x05 0x02 0x04 0x15 0x00 0xff 0xff 0xff 0xff 0x06 0x0d 0x0 0x19 0x06 0x06>;
> + qcom,ports-offset2 = /bits/ 8 <0xff 0x07 0x1f 0xff 0x07 0x1f 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
> + qcom,ports-sinterval = /bits/ 16 <0x07 0x1f 0x3f 0x07 0x1f 0x3f 0xc8 0xff 0xff 0xff 0xff 0x0f 0x0f 0x31f 0x31f 0x0f 0x0f >;
> + qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0xff 0xf 0xf 0xff 0xff>;
> + qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0xff 0x0f 0x0f 0xff 0xff>;
> + qcom,ports-lane-control = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
> + qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
[Severity: Low]
Is it possible that these arrays define too many elements for the binding
schema?
The DT binding schema for qcom,soundwire enforces a maximum of 16 items for
properties like qcom,ports-block-pack-mode and qcom,ports-word-length. It
appears these arrays define 17 elements, which might cause DT validation to
fail during dtbs_check.
[ ... ]
> + swr3: soundwire@6ca0000 {
> + compatible = "qcom,soundwire-v3.1.0";
> + reg = <0x0 0x06ca0000 0x0 0x10000>;
> + interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&lpass_wsa2macro>;
> + clock-names = "iface";
> + label = "WSA2";
> +
> + pinctrl-0 = <&wsa2_swr_active>;
> + pinctrl-names = "default";
> +
> + qcom,ports-block-pack-mode = /bits/ 8 <0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x00 0x00 0x01 0x01>;
> + qcom,ports-word-length = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0xff 0x18 0x18 0xff 0xff>;
> + qcom,ports-offset1 = /bits/ 8 <0x01 0x03 0x05 0x02 0x04 0x15 0x00 0xff 0xff 0xff 0xff 0x06 0x0d 0x0 0x19 0x06 0x06>;
> + qcom,ports-offset2 = /bits/ 8 <0xff 0x07 0x1f 0xff 0x07 0x1f 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
> + qcom,ports-sinterval = /bits/ 16 <0x07 0x1f 0x3f 0x07 0x1f 0x3f 0xc8 0xff 0xff 0xff 0xff 0x0f 0x0f 0x31f 0x31f 0x0f 0x0f >;
> + qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0xff 0xf 0xf 0xff 0xff>;
> + qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0xff 0x0f 0x0f 0xff 0xff>;
> + qcom,ports-lane-control = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
> + qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
[Severity: Low]
Could this node also trigger the same validation issue?
These arrays similarly define 17 elements.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260520141828.2724689-1-sibi.sankar@oss.qualcomm.com?part=1
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH V8 2/2] arm64: dts: qcom: glymur-crd: add Audio sound card node
2026-05-20 14:18 ` [PATCH V8 2/2] arm64: dts: qcom: glymur-crd: add Audio sound card node Sibi Sankar
@ 2026-05-20 15:06 ` sashiko-bot
0 siblings, 0 replies; 5+ messages in thread
From: sashiko-bot @ 2026-05-20 15:06 UTC (permalink / raw)
To: Sibi Sankar; +Cc: devicetree, robh, conor+dt
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] The `audio-routing` property uses lowercase strings, which will fail to match the dynamically created ALSA ASoC DAPM widgets, leaving the speakers disconnected.
- [High] The right woofer is incorrectly routed to the SPK2 output instead of SPK1, which breaks the audio stream routing.
--
commit 4086f61ae4a41fcc2e29b8dbcc7878956275252b
Author: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
arm64: dts: qcom: glymur-crd: add Audio sound card node
This commit adds the sound card node for the Glymur-crd board. It defines
the audio routing for speakers and adds device nodes for the WSA884x
smart speakers and DMIC microphones.
> diff --git a/arch/arm64/boot/dts/qcom/glymur-crd.dtsi b/arch/arm64/boot/dts/qcom/glymur-crd.dtsi
> index e784b538f42e1..4c00d09f766c2 100644
> --- a/arch/arm64/boot/dts/qcom/glymur-crd.dtsi
> +++ b/arch/arm64/boot/dts/qcom/glymur-crd.dtsi
> @@ -68,6 +68,54 @@ switch-lid {
> };
> };
>
> + sound {
> + compatible = "qcom,glymur-sndcard";
> + model = "GLYMUR-CRD";
> + audio-routing = "wooferleft in", "wsa wsa_spk1 out",
> + "tweeterleft in", "wsa wsa_spk2 out",
> + "wooferright in", "wsa2 wsa_spk2 out",
[Severity: High]
ALSA DAPM string matching for audio routing is exact and case-sensitive.
The widgets are created with names derived from sound-name-prefix (e.g.,
WooferLeft) and the widget type suffix (e.g., IN), making the expected name
"WooferLeft IN".
Similarly, the WSA macros create widgets with uppercase names like
"WSA WSA_SPK1 OUT".
Does using lowercase names here cause snd_soc_dapm_add_route() to silently
fail to find the matching widgets, leaving the speakers disconnected?
[Severity: High]
The right_woofer node defines qcom,port-mapping = <1 2 3 7 12 14>, which
corresponds to the first SoundWire stream on the WSA2 macro. This first
stream connects to the WSA2 WSA_SPK1 OUT DAPM widget.
Could routing wooferright to wsa2 wsa_spk2 out connect the woofer to the
tweeter's stream instead, breaking the crossover and preventing the right
woofer from receiving its proper audio stream?
[ ... ]
> +&swr3 {
> + status = "okay";
> +
> + /* WSA8845, Right Woofer */
> + right_woofer: speaker@0,0 {
> + compatible = "sdw20217020400";
> + reg = <0 0>;
> + reset-gpios = <&lpass_tlmm 13 GPIO_ACTIVE_LOW>;
> + #sound-dai-cells = <0>;
> + sound-name-prefix = "WooferRight";
> + vdd-1p8-supply = <&vreg_l15b_e0_1p8>;
> + vdd-io-supply = <&vreg_l18b_e0_1p2>;
> + qcom,port-mapping = <1 2 3 7 12 14>;
> + };
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260520141828.2724689-1-sibi.sankar@oss.qualcomm.com?part=2
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2026-05-20 15:06 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-05-20 14:18 [PATCH V8 0/2] Enable ADSP and CDSP for Glymur SoC Sibi Sankar
2026-05-20 14:18 ` [PATCH V8 1/2] arm64: dts: glymur: Add LPASS macro codecs and pinctrl Sibi Sankar
2026-05-20 14:44 ` sashiko-bot
2026-05-20 14:18 ` [PATCH V8 2/2] arm64: dts: qcom: glymur-crd: add Audio sound card node Sibi Sankar
2026-05-20 15:06 ` sashiko-bot
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