Re: [PATCH v4 4/4] regulator: Add regulator driver for Unisoc SC2730 PMIC

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The register offset for `SC2730_LDO_VDDCAMIO_VOL` is defined as `0x28`, which breaks the LDO register layout pattern and points to the DCDC/global control region. This is highly likely a typo and could cause silent corruption of another PMIC register when setting the LDO voltage.
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commit 5c1a2f6397caa4ad7997b2f6f912d7c202d97041
Author: Otto Pflüger <otto.pflueger@abscue.de>
Subject: regulator: Add regulator driver for Unisoc SC2730 PMIC

This commit adds a regulator driver for the Spreadtrum/Unisoc SC2730 PMIC,
which is used with SoCs like the UMS512 and UMS9230. The new driver is
based on a downstream Unisoc driver and the existing SC2731 driver.

> diff --git a/drivers/regulator/sc2730-regulator.c b/drivers/regulator/sc2730-regulator.c
> new file mode 100644
> index 0000000000000..9e40c6eae4943
> --- /dev/null
> +++ b/drivers/regulator/sc2730-regulator.c

[ ... ]

> +/*
> + * SC2730 vsel register
> + */
> +#define SC2730_DCDC_CPU_VOL		(SC2730_REGULATOR_BASE + 0x44)

[ ... ]

> +#define SC2730_LDO_AVDD18_VOL		(SC2730_REGULATOR_BASE + 0x104)
> +#define SC2730_LDO_VDDRF18_VOL		(SC2730_REGULATOR_BASE + 0x110)
> +#define SC2730_LDO_VDDCAMIO_VOL		(SC2730_REGULATOR_BASE + 0x28)

[Severity: High]
Is 0x28 the correct offset for the VDDCAMIO voltage register?

All other LDO voltage and power-down registers are clustered in the 0x100
to 0x210 range. Defining this at 0x28 places it in the DCDC or global
control region.

Could writing voltage configurations to this offset fail to configure the
VDDCAMIO regulator and potentially corrupt another PMIC register instead?

> +#define SC2730_LDO_VDDWCN_VOL		(SC2730_REGULATOR_BASE + 0x120)
> +#define SC2730_LDO_VDDCAMD1_VOL		(SC2730_REGULATOR_BASE + 0x12c)

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Sashiko AI review · https://sashiko.dev/#/patchset/20260521-sc2730-regulators-v4-0-1ac8a3b5ed82@abscue.de?part=4