Re: [PATCH v3 RESEND 3/5] arm64: dts: qcom: Add device tree for Nord SA8797P SoC

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The commit message claims to configure SCMI power domains only for UART controllers, completely omitting the massive changes to dozens of I2C and SPI controllers.
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commit 8aedf4e02d9c2b72f74522328779082b0ccb3f99
Author: Deepti Jaggi <deepti.jaggi@oss.qualcomm.com>

arm64: dts: qcom: Add device tree for Nord SA8797P SoC

This patch adds the SoC-level device tree include for the SA8797P, an
automotive variant of the Nord SoC family. It includes reserved shared
memory regions for SCMI, QUPV3 GENI SE blocks, and a UFS host controller.
It also introduces a common SCMI include file for shared firmware channels.

>  - Three QUPV3 GENI SE QUP blocks (qupv3_0/1/2) with UART controllers
>    using SCMI power and performance domains via scmi11

[Severity: Medium]
Is this description complete?

The commit message explicitly mentions UART controllers using SCMI power
and performance domains, but the patch also configures 21 I2C controllers
and 21 SPI controllers to use the scmi11 domains.

Could the commit message be updated to accurately reflect the additions of
the I2C and SPI controllers?

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Sashiko AI review · https://sashiko.dev/#/patchset/20260526051300.1669201-1-shengchao.guo@oss.qualcomm.com?part=3