From: sashiko-bot@kernel.org
To: "Santhosh Kumar K" <s-k6@ti.com>
Cc: devicetree@vger.kernel.org, conor+dt@kernel.org, robh@kernel.org
Subject: Re: [PATCH v3 04/13] spi: spi-mem: add spi_mem_apply_base_freq_cap()
Date: Wed, 27 May 2026 18:32:12 +0000 [thread overview]
Message-ID: <20260527183213.0EFBA1F00A3D@smtp.kernel.org> (raw)
In-Reply-To: <20260527175527.2247679-5-s-k6@ti.com>
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Critical] The base frequency cap is omitted from validation, duration calculation, and native execution paths, leading to bypassed limits and inconsistent behavior.
- [High] spi_mem_apply_base_freq_cap() incorrectly overrides explicitly requested intermediate frequencies, heavily throttling them to the base speed.
--
commit 6ec1a9a4c4cab8ccebd526a9ea576bc96e8ba16e
Author: Santhosh Kumar K <s-k6@ti.com>
spi: spi-mem: add spi_mem_apply_base_freq_cap()
This patch introduces spi_mem_apply_base_freq_cap() to cap operation
frequencies to a conservative base speed when they are not explicitly
configured for maximum speed. It aims to prevent unconfigured operations
from being silently raised to the device's maximum speed.
> diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
> index f64eda9bbd9f0..37d10c4e614b2 100644
> --- a/drivers/spi/spi-mem.c
> +++ b/drivers/spi/spi-mem.c
> @@ -391,7 +391,11 @@ int spi_mem_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
> u8 *tmpbuf;
> int ret;
>
> - /* Make sure the operation frequency is correct before going futher */
> + /*
> + * Ops not configured for maximum speed are limited to the conservative
> + * base speed; spi_mem_adjust_op_freq() then caps to the device maximum.
> + */
> + spi_mem_apply_base_freq_cap(mem, (struct spi_mem_op *)op);
[Severity: Critical]
Are we omitting the base frequency cap from validation, duration calculation,
and native execution paths, which could lead to bypassed limits and
inconsistent behavior?
For instance, spi_mem_supports_op() evaluates templates during initialization
and mutates their max_freq to max_speed_hz, which modifies the underlying
static .data arrays. When these mutated ops are later executed, the equality
check op->max_freq == max_speed_hz evaluates as true and bypasses the cap
entirely before phy tuning occurs.
Native direct mapping paths like dirmap_read or dirmap_write completely bypass
spi_mem_exec_op(). The spi_mem_dirmap_create() function uses
spi_mem_adjust_op_freq(), locking templates to max_speed_hz without applying
the base cap. This causes untuned reads to run at uncapped maximum speeds.
Also, spi_mem_calc_op_duration() calculates timeouts based on max_speed_hz
instead of applying the base cap. This drastically underestimates the duration
for operations actually executed at base_speed_hz, potentially causing
premature timeouts.
[ ... ]
> @@ -592,6 +596,26 @@ void spi_mem_adjust_op_freq(struct spi_mem *mem, struct spi_mem_op *op)
> }
> EXPORT_SYMBOL_GPL(spi_mem_adjust_op_freq);
>
> +/**
> + * spi_mem_apply_base_freq_cap() - Enforce the conservative base speed for
> + * operations that are not explicitly validated
> + * @mem: the SPI memory
> + * @op: the operation to adjust
> + *
> + * When @mem->spi->base_speed_hz is non-zero, caps @op->max_freq to that
> + * value unless @op->max_freq is already set to @mem->spi->max_speed_hz,
> + * which signals the operation has been configured for max-speed use.
> + */
> +void spi_mem_apply_base_freq_cap(struct spi_mem *mem, struct spi_mem_op *op)
> +{
> + if (!mem->spi->base_speed_hz || op->max_freq == mem->spi->max_speed_hz)
> + return;
> +
> + if (!op->max_freq || op->max_freq > mem->spi->base_speed_hz)
> + op->max_freq = mem->spi->base_speed_hz;
[Severity: High]
Could this logic unintentionally override explicitly requested intermediate
frequencies, heavily throttling them to the base speed?
If a driver intentionally limits specific operations to a safe intermediate
frequency, such as 86 MHz for read_cache_octal_variants in the Winbond
driver, the exact equality check for max_speed_hz will fail.
If base_speed_hz < op->max_freq < max_speed_hz, this function will discard
the driver's intentional constraint, aggressively downgrading op->max_freq
to base_speed_hz even after phy tuning.
Would it be better to apply the cap only to unconfigured operations where
op->max_freq == 0?
> +}
> +EXPORT_SYMBOL_GPL(spi_mem_apply_base_freq_cap);
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260527175527.2247679-1-s-k6@ti.com?part=4
next prev parent reply other threads:[~2026-05-27 18:32 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-27 17:55 [PATCH v3 00/13] spi: cadence-quadspi: add PHY tuning support Santhosh Kumar K
2026-05-27 17:55 ` [PATCH v3 01/13] spi: dt-bindings: allow spi-max-frequency to specify a frequency pair Santhosh Kumar K
2026-05-27 18:17 ` sashiko-bot
2026-05-28 8:32 ` Miquel Raynal
2026-05-27 17:55 ` [PATCH v3 02/13] spi: dt-bindings: cdns,qspi-nor: add PHY tuning pattern partition property Santhosh Kumar K
2026-05-27 18:11 ` sashiko-bot
2026-05-28 8:34 ` Miquel Raynal
2026-05-27 17:55 ` [PATCH v3 03/13] spi: parse two-element spi-max-frequency property Santhosh Kumar K
2026-05-27 18:19 ` sashiko-bot
2026-05-28 8:37 ` Miquel Raynal
2026-05-27 17:55 ` [PATCH v3 04/13] spi: spi-mem: add spi_mem_apply_base_freq_cap() Santhosh Kumar K
2026-05-27 18:32 ` sashiko-bot [this message]
2026-05-28 8:43 ` Miquel Raynal
2026-05-27 17:55 ` [PATCH v3 05/13] spi: spi-mem: add execute_tuning callback and spi_mem_execute_tuning() Santhosh Kumar K
2026-05-27 18:21 ` sashiko-bot
2026-05-28 8:44 ` Miquel Raynal
2026-05-27 17:55 ` [PATCH v3 06/13] spi: cadence-quadspi: move cqspi_readdata_capture earlier Santhosh Kumar K
2026-05-27 17:55 ` [PATCH v3 07/13] spi: cadence-quadspi: add DQS support to read data capture Santhosh Kumar K
2026-05-27 18:17 ` sashiko-bot
2026-05-27 17:55 ` [PATCH v3 08/13] spi: cadence-quadspi: add PHY tuning support Santhosh Kumar K
2026-05-27 18:44 ` sashiko-bot
2026-05-28 8:54 ` Miquel Raynal
2026-05-27 17:55 ` [PATCH v3 09/13] spi: cadence-quadspi: reject 2-byte-address DDR ops on PHY-tunable hardware Santhosh Kumar K
2026-05-28 9:01 ` Miquel Raynal
2026-05-27 17:55 ` [PATCH v3 10/13] spi: cadence-quadspi: enable PHY for direct reads and indirect writes Santhosh Kumar K
2026-05-27 18:36 ` sashiko-bot
2026-05-28 9:09 ` Miquel Raynal
2026-05-27 17:55 ` [PATCH v3 11/13] mtd: spinand: run PHY tuning after init and update dirmap frequencies Santhosh Kumar K
2026-05-27 19:04 ` sashiko-bot
2026-05-28 9:27 ` Miquel Raynal
2026-05-27 17:55 ` [PATCH v3 12/13] mtd: spi-nor: extract read op template construction into helper Santhosh Kumar K
2026-05-27 17:55 ` [PATCH v3 13/13] mtd: spi-nor: run PHY tuning after init and update dirmap frequency Santhosh Kumar K
2026-05-27 18:59 ` sashiko-bot
2026-05-28 8:30 ` [PATCH v3 00/13] spi: cadence-quadspi: add PHY tuning support Miquel Raynal
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260527183213.0EFBA1F00A3D@smtp.kernel.org \
--to=sashiko-bot@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=robh@kernel.org \
--cc=s-k6@ti.com \
--cc=sashiko-reviews@lists.linux.dev \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox