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From: sashiko-bot@kernel.org
To: "Santhosh Kumar K" <s-k6@ti.com>
Cc: robh@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v3 11/13] mtd: spinand: run PHY tuning after init and update dirmap frequencies
Date: Wed, 27 May 2026 19:04:39 +0000	[thread overview]
Message-ID: <20260527190440.9DB221F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260527175527.2247679-12-s-k6@ti.com>

Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:

New issues:
- [High] Mutating `spi_mem_dirmap_desc` fields after creation bypasses SPI controller hardware configuration and validation checks.
- [High] Validated frequencies from `read_cache` and `write_cache` are blindly applied to mismatched or unvalidated secondary operation templates.

Pre-existing issues:
- [High] Teardown symmetry violation in `spinand_remove` leads to a Use-After-Free of the `spinand` device and memory leaks if `mtd_device_unregister` fails.
--

commit 82e2a165fb470e6047a759242be19d68a59ffe43
Author: Santhosh Kumar K <s-k6@ti.com>

mtd: spinand: run PHY tuning after init and update dirmap frequencies

This commit modifies spinand_probe() to run PHY tuning after spinand_init()
has completed. It then directly updates the dirmaps with the newly validated
maximum frequencies for both primary and secondary operation templates.

> diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
> --- a/drivers/mtd/nand/spi/core.c
> +++ b/drivers/mtd/nand/spi/core.c

[ ... ]

> @@ -2050,6 +2050,41 @@ static int spinand_probe(struct spi_mem *mem)

[ ... ]

> +	if (!ret) {
> +		struct nand_device *nand = spinand_to_nand(spinand);
> +		int i;
> +
> +		for (i = 0; i < nand->memorg.planes_per_lun; i++) {
> +			if (spinand->dirmaps[i].rdesc) {
> +				spinand->dirmaps[i].rdesc->info.primary_op_tmpl.max_freq =
> +					spinand->max_read_op.max_freq;

[Severity: High]
Does mutating spi_mem_dirmap_desc fields after creation bypass the SPI
controller hardware configuration and validation checks?

The dirmap is fully initialized earlier during spinand_init(), where
controllers execute their dirmap_create callbacks to calculate clock
dividers and cache hardware registers based on the initial max_freq.

If we directly mutate the frequency here without notifying the controller,
will the hardware remain configured for the old, un-tuned frequency while
the SPI core assumes the new frequency, potentially causing a state
desynchronization or data corruption?

> +				spinand->dirmaps[i].rdesc->info.secondary_op_tmpl.max_freq =
> +					spinand->max_read_op.max_freq;
> +			}
> +			if (spinand->dirmaps[i].wdesc)
> +				spinand->dirmaps[i].wdesc->info.primary_op_tmpl.max_freq =
> +					spinand->max_write_op.max_freq;

[Severity: High]
Is it safe to apply the validated frequencies from the read_cache and
write_cache templates directly to these other operation templates?

The PHY tuning is executed specifically on the write_cache and read_cache
templates. However, wdesc->info.primary_op_tmpl is based on update_cache,
and rdesc->info.secondary_op_tmpl is used for cont_read_cache.

Since these operations utilize different opcodes and potentially different
dummy cycles, could applying the frequency of one tuned operation to a
different unvalidated operation cause silent data corruption?

> +		}
> +	}
> +
>  	ret = mtd_device_register(mtd, NULL, 0);

[Severity: High]
This is a pre-existing issue, but can spinand_remove() cause a use-after-free
and memory leak if mtd_device_unregister() fails?

If mtd_device_unregister() returns an error code, spinand_remove()
immediately returns this error and skips spinand_cleanup(), leaking
databuf and scratchbuf.

Because the SPI framework's wrapper spi_mem_remove() returns void and ignores
the error, the driver core will proceed to unbind the device and free all
devm_kzalloc allocated memory, including the spinand structure.

Since the MTD device wasn't unregistered, the MTD subsystem retains active
pointers to the freed spinand structure. Could this lead to a use-after-free
vulnerability upon subsequent accesses?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260527175527.2247679-1-s-k6@ti.com?part=11

  reply	other threads:[~2026-05-27 19:04 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-27 17:55 [PATCH v3 00/13] spi: cadence-quadspi: add PHY tuning support Santhosh Kumar K
2026-05-27 17:55 ` [PATCH v3 01/13] spi: dt-bindings: allow spi-max-frequency to specify a frequency pair Santhosh Kumar K
2026-05-27 18:17   ` sashiko-bot
2026-05-28  8:32   ` Miquel Raynal
2026-05-28 17:36   ` Conor Dooley
2026-05-27 17:55 ` [PATCH v3 02/13] spi: dt-bindings: cdns,qspi-nor: add PHY tuning pattern partition property Santhosh Kumar K
2026-05-27 18:11   ` sashiko-bot
2026-05-28  8:34   ` Miquel Raynal
2026-05-27 17:55 ` [PATCH v3 03/13] spi: parse two-element spi-max-frequency property Santhosh Kumar K
2026-05-27 18:19   ` sashiko-bot
2026-05-28  8:37   ` Miquel Raynal
2026-05-27 17:55 ` [PATCH v3 04/13] spi: spi-mem: add spi_mem_apply_base_freq_cap() Santhosh Kumar K
2026-05-27 18:32   ` sashiko-bot
2026-05-28  8:43   ` Miquel Raynal
2026-05-27 17:55 ` [PATCH v3 05/13] spi: spi-mem: add execute_tuning callback and spi_mem_execute_tuning() Santhosh Kumar K
2026-05-27 18:21   ` sashiko-bot
2026-05-28  8:44   ` Miquel Raynal
2026-05-27 17:55 ` [PATCH v3 06/13] spi: cadence-quadspi: move cqspi_readdata_capture earlier Santhosh Kumar K
2026-05-27 17:55 ` [PATCH v3 07/13] spi: cadence-quadspi: add DQS support to read data capture Santhosh Kumar K
2026-05-27 18:17   ` sashiko-bot
2026-05-27 17:55 ` [PATCH v3 08/13] spi: cadence-quadspi: add PHY tuning support Santhosh Kumar K
2026-05-27 18:44   ` sashiko-bot
2026-05-28  8:54   ` Miquel Raynal
2026-05-27 17:55 ` [PATCH v3 09/13] spi: cadence-quadspi: reject 2-byte-address DDR ops on PHY-tunable hardware Santhosh Kumar K
2026-05-28  9:01   ` Miquel Raynal
2026-05-27 17:55 ` [PATCH v3 10/13] spi: cadence-quadspi: enable PHY for direct reads and indirect writes Santhosh Kumar K
2026-05-27 18:36   ` sashiko-bot
2026-05-28  9:09   ` Miquel Raynal
2026-05-27 17:55 ` [PATCH v3 11/13] mtd: spinand: run PHY tuning after init and update dirmap frequencies Santhosh Kumar K
2026-05-27 19:04   ` sashiko-bot [this message]
2026-05-28  9:27   ` Miquel Raynal
2026-05-27 17:55 ` [PATCH v3 12/13] mtd: spi-nor: extract read op template construction into helper Santhosh Kumar K
2026-05-27 17:55 ` [PATCH v3 13/13] mtd: spi-nor: run PHY tuning after init and update dirmap frequency Santhosh Kumar K
2026-05-27 18:59   ` sashiko-bot
2026-05-28  8:30 ` [PATCH v3 00/13] spi: cadence-quadspi: add PHY tuning support Miquel Raynal

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