* [PATCH v2 1/3] dt-bindings: riscv: spacemit: Add Banana Pi BPI-CM6 compatible
2026-05-28 5:22 [PATCH v2 0/3] spacemit: k1: Add support for Banana Pi BPI-CM6 IO board Junhui Liu
@ 2026-05-28 5:22 ` Junhui Liu
2026-05-28 5:22 ` [PATCH v2 2/3] riscv: dts: spacemit: k1: Split gmac_clk_ref into independent pinctrl groups Junhui Liu
2026-05-28 5:22 ` [PATCH v2 3/3] riscv: dts: spacemit: k1: Add Banana Pi BPI-CM6 IO board Junhui Liu
2 siblings, 0 replies; 7+ messages in thread
From: Junhui Liu @ 2026-05-28 5:22 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Paul Walmsley,
Palmer Dabbelt, Albert Ou, Alexandre Ghiti, Yixun Lan,
Vivian Wang, Paolo Abeni, Guodong Xu, Yangyu Chen
Cc: devicetree, linux-riscv, spacemit, linux-kernel, Junhui Liu,
Conor Dooley
The Banana Pi BPI-CM6 IO board consists of the BPI-CM6 compute module
plugged into an IO carrier board, which is used for evaluation and
development.
The core CM6 module is based on the SpacemiT K1 SoC and provides PMIC,
DDR, the eth0 PHY and wireless connectivity. The carrier board extends
this by adding the eth1 PHY and external interfaces including Ethernet,
PCIe M.2, USB, MicroSD, QSPI, and serial console connectivity.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
---
Documentation/devicetree/bindings/riscv/spacemit.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/riscv/spacemit.yaml b/Documentation/devicetree/bindings/riscv/spacemit.yaml
index af8030242bdc..3e868383eb4a 100644
--- a/Documentation/devicetree/bindings/riscv/spacemit.yaml
+++ b/Documentation/devicetree/bindings/riscv/spacemit.yaml
@@ -19,6 +19,11 @@ properties:
const: '/'
compatible:
oneOf:
+ - items:
+ - enum:
+ - bananapi,bpi-cm6-io
+ - const: bananapi,bpi-cm6
+ - const: spacemit,k1
- items:
- enum:
- bananapi,bpi-f3
--
2.54.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v2 2/3] riscv: dts: spacemit: k1: Split gmac_clk_ref into independent pinctrl groups
2026-05-28 5:22 [PATCH v2 0/3] spacemit: k1: Add support for Banana Pi BPI-CM6 IO board Junhui Liu
2026-05-28 5:22 ` [PATCH v2 1/3] dt-bindings: riscv: spacemit: Add Banana Pi BPI-CM6 compatible Junhui Liu
@ 2026-05-28 5:22 ` Junhui Liu
2026-05-28 5:45 ` sashiko-bot
2026-05-28 17:13 ` Conor Dooley
2026-05-28 5:22 ` [PATCH v2 3/3] riscv: dts: spacemit: k1: Add Banana Pi BPI-CM6 IO board Junhui Liu
2 siblings, 2 replies; 7+ messages in thread
From: Junhui Liu @ 2026-05-28 5:22 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Paul Walmsley,
Palmer Dabbelt, Albert Ou, Alexandre Ghiti, Yixun Lan,
Vivian Wang, Paolo Abeni, Guodong Xu, Yangyu Chen
Cc: devicetree, linux-riscv, spacemit, linux-kernel, Junhui Liu
The gmac_clk_ref signal is optional for the GMAC controller and is not
strictly required for all hardware designs. The pins for gmac0_clk_ref
(GPIO 45) and gmac1_clk_ref (GPIO 46) may also be used as GPIOs for
other functions even when the Ethernet controller is active.
Split the refclk pins into independent pinctrl groups so boards can
request them only when the reference clock path is actually needed.
Among the already mainlined boards, BPI-F3, Jupiter and MusePi Pro have
optional hardware paths for the GMAC refclk pins. BPI-F3 and Jupiter
route both GMAC refclk pins to the PHYs through NC/0R option resistors,
while MusePi Pro only does so for GMAC0. Keep referencing the new
clk-ref pinctrl groups on these boards so the optional hardware paths
remain usable if the option resistors are populated.
OrangePi R2S has no publicly available schematic, so also keep the
clk-ref groups there to preserve the previous pinmux behavior.
Fixes: 60775f28cfb7 ("riscv: dts: spacemit: Add Ethernet support for K1")
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
---
arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts | 4 ++--
arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts | 4 ++--
arch/riscv/boot/dts/spacemit/k1-musepi-pro.dts | 2 +-
arch/riscv/boot/dts/spacemit/k1-orangepi-r2s.dts | 4 ++--
arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi | 24 +++++++++++++++++++----
5 files changed, 27 insertions(+), 11 deletions(-)
diff --git a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
index 72f77e9edd63..e6ab43be301a 100644
--- a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
+++ b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
@@ -101,7 +101,7 @@ ð0 {
phy-handle = <&rgmii0>;
phy-mode = "rgmii-id";
pinctrl-names = "default";
- pinctrl-0 = <&gmac0_cfg>;
+ pinctrl-0 = <&gmac0_cfg>, <&gmac0_clk_ref_cfg>;
rx-internal-delay-ps = <0>;
tx-internal-delay-ps = <0>;
status = "okay";
@@ -124,7 +124,7 @@ ð1 {
phy-handle = <&rgmii1>;
phy-mode = "rgmii-id";
pinctrl-names = "default";
- pinctrl-0 = <&gmac1_cfg>;
+ pinctrl-0 = <&gmac1_cfg>, <&gmac1_clk_ref_cfg>;
rx-internal-delay-ps = <0>;
tx-internal-delay-ps = <250>;
status = "okay";
diff --git a/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts b/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts
index 2fc8d6533786..b61f5995ec77 100644
--- a/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts
+++ b/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts
@@ -121,7 +121,7 @@ ð0 {
phy-handle = <&rgmii0>;
phy-mode = "rgmii-id";
pinctrl-names = "default";
- pinctrl-0 = <&gmac0_cfg>;
+ pinctrl-0 = <&gmac0_cfg>, <&gmac0_clk_ref_cfg>;
rx-internal-delay-ps = <0>;
tx-internal-delay-ps = <0>;
status = "okay";
@@ -144,7 +144,7 @@ ð1 {
phy-handle = <&rgmii1>;
phy-mode = "rgmii-id";
pinctrl-names = "default";
- pinctrl-0 = <&gmac1_cfg>;
+ pinctrl-0 = <&gmac1_cfg>, <&gmac1_clk_ref_cfg>;
rx-internal-delay-ps = <0>;
tx-internal-delay-ps = <250>;
status = "okay";
diff --git a/arch/riscv/boot/dts/spacemit/k1-musepi-pro.dts b/arch/riscv/boot/dts/spacemit/k1-musepi-pro.dts
index 0d809e4ad3b1..3078ffb5cb87 100644
--- a/arch/riscv/boot/dts/spacemit/k1-musepi-pro.dts
+++ b/arch/riscv/boot/dts/spacemit/k1-musepi-pro.dts
@@ -102,7 +102,7 @@ &combo_phy {
ð0 {
phy-handle = <&rgmii0>;
phy-mode = "rgmii-id";
- pinctrl-0 = <&gmac0_cfg>;
+ pinctrl-0 = <&gmac0_cfg>, <&gmac0_clk_ref_cfg>;
pinctrl-names = "default";
rx-internal-delay-ps = <0>;
tx-internal-delay-ps = <0>;
diff --git a/arch/riscv/boot/dts/spacemit/k1-orangepi-r2s.dts b/arch/riscv/boot/dts/spacemit/k1-orangepi-r2s.dts
index 1ecc40749e5a..018072722d55 100644
--- a/arch/riscv/boot/dts/spacemit/k1-orangepi-r2s.dts
+++ b/arch/riscv/boot/dts/spacemit/k1-orangepi-r2s.dts
@@ -50,7 +50,7 @@ ð0 {
phy-handle = <&rgmii0>;
phy-mode = "rgmii-id";
pinctrl-names = "default";
- pinctrl-0 = <&gmac0_cfg>;
+ pinctrl-0 = <&gmac0_cfg>, <&gmac0_clk_ref_cfg>;
rx-internal-delay-ps = <0>;
tx-internal-delay-ps = <0>;
status = "okay";
@@ -74,7 +74,7 @@ ð1 {
phy-handle = <&rgmii1>;
phy-mode = "rgmii-id";
pinctrl-names = "default";
- pinctrl-0 = <&gmac1_cfg>;
+ pinctrl-0 = <&gmac1_cfg>, <&gmac1_clk_ref_cfg>;
rx-internal-delay-ps = <0>;
tx-internal-delay-ps = <250>;
status = "okay";
diff --git a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
index 4e9a62d0e85b..8c57ca05dabd 100644
--- a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
@@ -27,8 +27,16 @@ gmac0-pins {
<K1_PADCONF(11, 1)>, /* gmac0_tx_en */
<K1_PADCONF(12, 1)>, /* gmac0_mdc */
<K1_PADCONF(13, 1)>, /* gmac0_mdio */
- <K1_PADCONF(14, 1)>, /* gmac0_int_n */
- <K1_PADCONF(45, 1)>; /* gmac0_clk_ref */
+ <K1_PADCONF(14, 1)>; /* gmac0_int_n */
+
+ bias-pull-up = <0>;
+ drive-strength = <21>;
+ };
+ };
+
+ gmac0_clk_ref_cfg: gmac0-clk-ref-cfg {
+ gmac0-clk-ref-pins {
+ pinmux = <K1_PADCONF(45, 1)>; /* gmac0_clk_ref */
bias-pull-up = <0>;
drive-strength = <21>;
@@ -51,8 +59,16 @@ gmac1-pins {
<K1_PADCONF(40, 1)>, /* gmac1_tx_en */
<K1_PADCONF(41, 1)>, /* gmac1_mdc */
<K1_PADCONF(42, 1)>, /* gmac1_mdio */
- <K1_PADCONF(43, 1)>, /* gmac1_int_n */
- <K1_PADCONF(46, 1)>; /* gmac1_clk_ref */
+ <K1_PADCONF(43, 1)>; /* gmac1_int_n */
+
+ bias-pull-up = <0>;
+ drive-strength = <21>;
+ };
+ };
+
+ gmac1_clk_ref_cfg: gmac1-clk-ref-cfg {
+ gmac1-clk-ref-pins {
+ pinmux = <K1_PADCONF(46, 1)>; /* gmac1_clk_ref */
bias-pull-up = <0>;
drive-strength = <21>;
--
2.54.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH v2 2/3] riscv: dts: spacemit: k1: Split gmac_clk_ref into independent pinctrl groups
2026-05-28 5:22 ` [PATCH v2 2/3] riscv: dts: spacemit: k1: Split gmac_clk_ref into independent pinctrl groups Junhui Liu
@ 2026-05-28 5:45 ` sashiko-bot
2026-05-28 17:13 ` Conor Dooley
1 sibling, 0 replies; 7+ messages in thread
From: sashiko-bot @ 2026-05-28 5:45 UTC (permalink / raw)
To: Junhui Liu; +Cc: conor+dt, devicetree, robh
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The patch separates `gmac_clk_ref` pins into independent pinctrl groups but fails to update the OrangePi RV2 board device tree (`k1-orangepi-rv2.dts`), silently dropping its Ethernet reference clock pinmux configuration.
--
commit 4736202eaeb8dff5f83c1f6977e4a98ac6644bcc
Author: Junhui Liu <junhui.liu@pigmoral.tech>
riscv: dts: spacemit: k1: Split gmac_clk_ref into independent pinctrl groups
The gmac_clk_ref signal is optional for the GMAC controller and is not
strictly required for all hardware designs. The pins for gmac0_clk_ref
(GPIO 45) and gmac1_clk_ref (GPIO 46) may also be used as GPIOs for
other functions even when the Ethernet controller is active.
> diff --git a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
> index b13dcb10f4d66..39682e8b4ed91 100644
> --- a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
> +++ b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
> @@ -27,8 +27,16 @@ gmac0-pins {
> <K1_PADCONF(11, 1)>, /* gmac0_tx_en */
> <K1_PADCONF(12, 1)>, /* gmac0_mdc */
> <K1_PADCONF(13, 1)>, /* gmac0_mdio */
> - <K1_PADCONF(14, 1)>, /* gmac0_int_n */
> - <K1_PADCONF(45, 1)>; /* gmac0_clk_ref */
> + <K1_PADCONF(14, 1)>; /* gmac0_int_n */
> +
> + bias-pull-up = <0>;
> + drive-strength = <21>;
> + };
> + };
[ ... ]
> @@ -51,8 +59,16 @@ gmac1-pins {
> <K1_PADCONF(40, 1)>, /* gmac1_tx_en */
> <K1_PADCONF(41, 1)>, /* gmac1_mdc */
> <K1_PADCONF(42, 1)>, /* gmac1_mdio */
> - <K1_PADCONF(43, 1)>, /* gmac1_int_n */
> - <K1_PADCONF(46, 1)>; /* gmac1_clk_ref */
> + <K1_PADCONF(43, 1)>; /* gmac1_int_n */
> +
> + bias-pull-up = <0>;
> + drive-strength = <21>;
> + };
> + };
[Severity: High]
Does this change silently drop the Ethernet reference clock pinmux
configuration for the OrangePi RV2 board?
The k1-orangepi-rv2.dts board file still relies on &gmac0_cfg and &gmac1_cfg
but wasn't updated in this patch to include the new &gmac0_clk_ref_cfg and
&gmac1_clk_ref_cfg groups. Without this update, OrangePi RV2 will lose the
pinmux configurations for GPIO 45 and 46, which may cause network failure.
The commit message mentions an intent to preserve the previous pinmux behavior
for boards without public schematics. It seems the omission of OrangePi RV2
breaks this contract. A search forward in the patch series confirms this issue
is not resolved by a later commit.
Could k1-orangepi-rv2.dts be updated to include the new pinmux groups to
preserve its original configuration?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260528-bpi-cm6-v2-0-d0eb3f236cea@pigmoral.tech?part=2
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH v2 2/3] riscv: dts: spacemit: k1: Split gmac_clk_ref into independent pinctrl groups
2026-05-28 5:22 ` [PATCH v2 2/3] riscv: dts: spacemit: k1: Split gmac_clk_ref into independent pinctrl groups Junhui Liu
2026-05-28 5:45 ` sashiko-bot
@ 2026-05-28 17:13 ` Conor Dooley
1 sibling, 0 replies; 7+ messages in thread
From: Conor Dooley @ 2026-05-28 17:13 UTC (permalink / raw)
To: Junhui Liu
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Paul Walmsley,
Palmer Dabbelt, Albert Ou, Alexandre Ghiti, Yixun Lan,
Vivian Wang, Paolo Abeni, Guodong Xu, Yangyu Chen, devicetree,
linux-riscv, spacemit, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 2762 bytes --]
On Thu, May 28, 2026 at 01:22:48PM +0800, Junhui Liu wrote:
> The gmac_clk_ref signal is optional for the GMAC controller and is not
> strictly required for all hardware designs. The pins for gmac0_clk_ref
> (GPIO 45) and gmac1_clk_ref (GPIO 46) may also be used as GPIOs for
> other functions even when the Ethernet controller is active.
>
> Split the refclk pins into independent pinctrl groups so boards can
> request them only when the reference clock path is actually needed.
>
> Among the already mainlined boards, BPI-F3, Jupiter and MusePi Pro have
> optional hardware paths for the GMAC refclk pins. BPI-F3 and Jupiter
> route both GMAC refclk pins to the PHYs through NC/0R option resistors,
> while MusePi Pro only does so for GMAC0. Keep referencing the new
> clk-ref pinctrl groups on these boards so the optional hardware paths
> remain usable if the option resistors are populated.
>
> OrangePi R2S has no publicly available schematic, so also keep the
> clk-ref groups there to preserve the previous pinmux behavior.
>
> Fixes: 60775f28cfb7 ("riscv: dts: spacemit: Add Ethernet support for K1")
> Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
> diff --git a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
> index 4e9a62d0e85b..8c57ca05dabd 100644
> --- a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
> +++ b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
> @@ -27,8 +27,16 @@ gmac0-pins {
> <K1_PADCONF(11, 1)>, /* gmac0_tx_en */
> <K1_PADCONF(12, 1)>, /* gmac0_mdc */
> <K1_PADCONF(13, 1)>, /* gmac0_mdio */
> - <K1_PADCONF(14, 1)>, /* gmac0_int_n */
> - <K1_PADCONF(45, 1)>; /* gmac0_clk_ref */
The point sashiko made here seems valid, odd that these aren't added to
another group.
> + <K1_PADCONF(14, 1)>; /* gmac0_int_n */
> +
> + bias-pull-up = <0>;
> + drive-strength = <21>;
> + };
> + };
> +
> + gmac0_clk_ref_cfg: gmac0-clk-ref-cfg {
> + gmac0-clk-ref-pins {
> + pinmux = <K1_PADCONF(45, 1)>; /* gmac0_clk_ref */
>
> bias-pull-up = <0>;
> drive-strength = <21>;
> @@ -51,8 +59,16 @@ gmac1-pins {
> <K1_PADCONF(40, 1)>, /* gmac1_tx_en */
> <K1_PADCONF(41, 1)>, /* gmac1_mdc */
> <K1_PADCONF(42, 1)>, /* gmac1_mdio */
> - <K1_PADCONF(43, 1)>, /* gmac1_int_n */
> - <K1_PADCONF(46, 1)>; /* gmac1_clk_ref */
> + <K1_PADCONF(43, 1)>; /* gmac1_int_n */
> +
> + bias-pull-up = <0>;
> + drive-strength = <21>;
> + };
> + };
> +
> + gmac1_clk_ref_cfg: gmac1-clk-ref-cfg {
> + gmac1-clk-ref-pins {
> + pinmux = <K1_PADCONF(46, 1)>; /* gmac1_clk_ref */
>
> bias-pull-up = <0>;
> drive-strength = <21>;
>
> --
> 2.54.0
>
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v2 3/3] riscv: dts: spacemit: k1: Add Banana Pi BPI-CM6 IO board
2026-05-28 5:22 [PATCH v2 0/3] spacemit: k1: Add support for Banana Pi BPI-CM6 IO board Junhui Liu
2026-05-28 5:22 ` [PATCH v2 1/3] dt-bindings: riscv: spacemit: Add Banana Pi BPI-CM6 compatible Junhui Liu
2026-05-28 5:22 ` [PATCH v2 2/3] riscv: dts: spacemit: k1: Split gmac_clk_ref into independent pinctrl groups Junhui Liu
@ 2026-05-28 5:22 ` Junhui Liu
2026-05-28 6:19 ` sashiko-bot
2 siblings, 1 reply; 7+ messages in thread
From: Junhui Liu @ 2026-05-28 5:22 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Paul Walmsley,
Palmer Dabbelt, Albert Ou, Alexandre Ghiti, Yixun Lan,
Vivian Wang, Paolo Abeni, Guodong Xu, Yangyu Chen
Cc: devicetree, linux-riscv, spacemit, linux-kernel, Junhui Liu,
Michael Opdenacker
The Banana Pi BPI-CM6 IO board combines the BPI-CM6 compute module with
an IO carrier board. The core module integrates the SpacemiT K1 SoC,
PMIC, DDR, eMMC, the eth0 PHY, and wireless connectivity. The companion
IO carrier board extends it by providing the eth1 PHY and exposing
standard interfaces, including dual Gigabit Ethernet, MicroSD, two USB-A
ports, a USB Type-C port, two PCIe M.2 slots, and a serial console.
The board also has two I2C EEPROMs. One is on the core module, which
stores factory manufacturing data and is marked read-only. The other is
on the carrier board, which is shipped unprogrammed and left writable
for evaluation purposes.
Add initial support for UART console, eMMC, SD card, I2C, EEPROMs,
PCIe, USB, and dual Ethernet interfaces.
Link: https://docs.banana-pi.org/en/BPI-CM6/BananaPi_BPI-CM6
Reviewed-by: Michael Opdenacker <michael.opdenacker@rootcommit.com>
Tested-by: Michael Opdenacker <michael.opdenacker@rootcommit.com>
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
---
arch/riscv/boot/dts/spacemit/Makefile | 1 +
.../riscv/boot/dts/spacemit/k1-bananapi-cm6-io.dts | 213 +++++++++++++++++++
arch/riscv/boot/dts/spacemit/k1-bananapi-cm6.dtsi | 227 +++++++++++++++++++++
3 files changed, 441 insertions(+)
diff --git a/arch/riscv/boot/dts/spacemit/Makefile b/arch/riscv/boot/dts/spacemit/Makefile
index acb993c452ba..dd6125dc2012 100644
--- a/arch/riscv/boot/dts/spacemit/Makefile
+++ b/arch/riscv/boot/dts/spacemit/Makefile
@@ -1,4 +1,5 @@
# SPDX-License-Identifier: GPL-2.0
+dtb-$(CONFIG_ARCH_SPACEMIT) += k1-bananapi-cm6-io.dtb
dtb-$(CONFIG_ARCH_SPACEMIT) += k1-bananapi-f3.dtb
dtb-$(CONFIG_ARCH_SPACEMIT) += k1-milkv-jupiter.dtb
dtb-$(CONFIG_ARCH_SPACEMIT) += k1-musepi-pro.dtb
diff --git a/arch/riscv/boot/dts/spacemit/k1-bananapi-cm6-io.dts b/arch/riscv/boot/dts/spacemit/k1-bananapi-cm6-io.dts
new file mode 100644
index 000000000000..137b7ef3fc7b
--- /dev/null
+++ b/arch/riscv/boot/dts/spacemit/k1-bananapi-cm6-io.dts
@@ -0,0 +1,213 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright (C) 2026 Junhui Liu <junhui.liu@pigmoral.tech>
+ */
+
+#include "k1-bananapi-cm6.dtsi"
+
+#include <dt-bindings/leds/common.h>
+
+/ {
+ model = "Banana Pi BPI-CM6 IO Board";
+ compatible = "bananapi,bpi-cm6-io", "bananapi,bpi-cm6", "spacemit,k1";
+
+ aliases {
+ ethernet0 = ð0;
+ ethernet1 = ð1;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led0 {
+ color = <LED_COLOR_ID_RED>;
+ gpios = <&gpio K1_GPIO(96) GPIO_ACTIVE_LOW>;
+ };
+
+ led1 {
+ color = <LED_COLOR_ID_BLUE>;
+ gpios = <&gpio K1_GPIO(97) GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ vdd_sys_12v: regulator-vdd-sys-12v {
+ compatible = "regulator-fixed";
+ regulator-name = "VDD_SYS";
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_vdd_5v0: regulator-vdd-5v0 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDD_5V0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ vin-supply = <&vdd_sys_12v>;
+ };
+
+ pcie_vcc_3v3: regulator-pcie-vcc-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "NGFF_KEYM_VDD";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ vin-supply = <&vdd_sys_12v>;
+ };
+
+ usb_vbus_5v: regulator-usb-vbus-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "VBUS_A_B";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio K1_GPIO(124) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ vin-supply = <®_vdd_5v0>;
+ };
+
+ reg_vdd_3v3: regulator-vdd-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDD_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ vin-supply = <&vdd_sys_12v>;
+ };
+
+ sd_vcc_3v3: regulator-sd-vcc-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "3.3VS_CARD";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio K1_GPIO(127) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ vin-supply = <®_vdd_3v3>;
+ };
+};
+
+&combo_phy {
+ status = "okay";
+};
+
+ð0 {
+ status = "okay";
+};
+
+ð1 {
+ nvmem-cells = <&mac_address 1>;
+ nvmem-cell-names = "mac-address";
+ phy-handle = <&rgmii1>;
+ phy-mode = "rgmii-id";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac1_cfg>;
+ rx-internal-delay-ps = <0>;
+ tx-internal-delay-ps = <250>;
+ status = "okay";
+
+ mdio-bus {
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+
+ reset-gpios = <&gpio K1_GPIO(46) GPIO_ACTIVE_LOW>;
+ reset-delay-us = <10000>;
+ reset-post-delay-us = <100000>;
+
+ rgmii1: phy@1 {
+ reg = <0x1>;
+ };
+ };
+};
+
+&i2c2 {
+ eeprom@54 {
+ compatible = "atmel,24c08";
+ reg = <0x54>;
+ vcc-supply = <&buck3_1v8>;
+ pagesize = <16>;
+ size = <1024>;
+ };
+};
+
+&pcie1_phy {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie1_3_cfg>;
+ status = "okay";
+};
+
+&pcie1_port {
+ phys = <&pcie1_phy>;
+ vpcie3v3-supply = <&pcie_vcc_3v3>;
+};
+
+&pcie1 {
+ status = "okay";
+};
+
+&pcie2_phy {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie2_4_cfg>;
+ status = "okay";
+};
+
+&pcie2_port {
+ phys = <&pcie2_phy>;
+ vpcie3v3-supply = <&pcie_vcc_3v3>;
+};
+
+&pcie2 {
+ status = "okay";
+};
+
+&qspi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&qspi_cfg>;
+ status = "okay";
+};
+
+&sdhci0 {
+ pinctrl-names = "default", "uhs";
+ pinctrl-0 = <&mmc1_cfg>;
+ pinctrl-1 = <&mmc1_uhs_cfg>;
+ bus-width = <4>;
+ cd-gpios = <&gpio K1_GPIO(80) (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ no-mmc;
+ no-sdio;
+ disable-wp;
+ cap-sd-highspeed;
+ vmmc-supply = <&sd_vcc_3v3>;
+ vqmmc-supply = <&aldo1>;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_2_cfg>;
+ status = "okay";
+};
+
+&usbphy2 {
+ status = "okay";
+};
+
+&usb_dwc3 {
+ dr_mode = "host";
+ vbus-supply = <&usb_vbus_5v>;
+ status = "okay";
+};
+
+&vddin_sys_5v {
+ vin-supply = <®_vdd_5v0>;
+};
diff --git a/arch/riscv/boot/dts/spacemit/k1-bananapi-cm6.dtsi b/arch/riscv/boot/dts/spacemit/k1-bananapi-cm6.dtsi
new file mode 100644
index 000000000000..9b91128edb34
--- /dev/null
+++ b/arch/riscv/boot/dts/spacemit/k1-bananapi-cm6.dtsi
@@ -0,0 +1,227 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright (C) 2026 Junhui Liu <junhui.liu@pigmoral.tech>
+ */
+
+#include "k1.dtsi"
+#include "k1-pinctrl.dtsi"
+
+/ {
+ model = "Banana Pi BPI-CM6 Module";
+ compatible = "bananapi,bpi-cm6", "spacemit,k1";
+
+ aliases {
+ i2c2 = &i2c2;
+ i2c8 = &i2c8;
+ };
+
+ vddin_sys_5v: regulator-vddin-sys-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDIN_SYS";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_vcc_4v: regulator-vcc-4v {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC4V0_SYS";
+ regulator-min-microvolt = <4000000>;
+ regulator-max-microvolt = <4000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ vin-supply = <&vddin_sys_5v>;
+ };
+};
+
+&emmc {
+ bus-width = <8>;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ non-removable;
+ no-sd;
+ no-sdio;
+ status = "okay";
+};
+
+ð0 {
+ nvmem-cells = <&mac_address 0>;
+ nvmem-cell-names = "mac-address";
+ phy-handle = <&rgmii0>;
+ phy-mode = "rgmii-id";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac0_cfg>;
+ rx-internal-delay-ps = <0>;
+ tx-internal-delay-ps = <0>;
+
+ mdio-bus {
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+
+ reset-gpios = <&gpio K1_GPIO(45) GPIO_ACTIVE_LOW>;
+ reset-delay-us = <10000>;
+ reset-post-delay-us = <100000>;
+
+ rgmii0: phy@1 {
+ reg = <0x1>;
+ };
+ };
+};
+
+&pdma {
+ status = "okay";
+};
+
+&i2c2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_0_cfg>;
+ status = "okay";
+
+ eeprom@50 {
+ compatible = "atmel,24c02";
+ reg = <0x50>;
+ vcc-supply = <&buck3_1v8>;
+ pagesize = <16>;
+ read-only;
+ size = <256>;
+
+ nvmem-layout {
+ compatible = "onie,tlv-layout";
+
+ mac_address: mac-address {
+ #nvmem-cell-cells = <1>;
+ };
+
+ num-macs {
+ };
+
+ serial-number {
+ };
+ };
+ };
+};
+
+&i2c8 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c8_cfg>;
+ status = "okay";
+
+ pmic@41 {
+ compatible = "spacemit,p1";
+ reg = <0x41>;
+ interrupts = <64>;
+ vin1-supply = <®_vcc_4v>;
+ vin2-supply = <®_vcc_4v>;
+ vin3-supply = <®_vcc_4v>;
+ vin4-supply = <®_vcc_4v>;
+ vin5-supply = <®_vcc_4v>;
+ vin6-supply = <®_vcc_4v>;
+ aldoin-supply = <®_vcc_4v>;
+ dldoin1-supply = <&buck5>;
+ dldoin2-supply = <&buck5>;
+
+ regulators {
+ buck1 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3450000>;
+ regulator-ramp-delay = <5000>;
+ regulator-always-on;
+ };
+
+ buck2 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3450000>;
+ regulator-ramp-delay = <5000>;
+ regulator-always-on;
+ };
+
+ buck3_1v8: buck3 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-ramp-delay = <5000>;
+ regulator-always-on;
+ };
+
+ buck4 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-ramp-delay = <5000>;
+ regulator-always-on;
+ };
+
+ buck5: buck5 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3450000>;
+ regulator-ramp-delay = <5000>;
+ regulator-always-on;
+ };
+
+ buck6 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3450000>;
+ regulator-ramp-delay = <5000>;
+ regulator-always-on;
+ };
+
+ aldo1: aldo1 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ regulator-boot-on;
+ };
+
+ aldo2 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ };
+
+ aldo3 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ };
+
+ aldo4 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ };
+
+ dldo1 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ regulator-boot-on;
+ };
+
+ dldo2 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ };
+
+ dldo3 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ };
+
+ dldo4 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ regulator-always-on;
+ };
+
+ dldo5 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ };
+
+ dldo6 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ regulator-always-on;
+ };
+
+ dldo7 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ };
+ };
+ };
+};
--
2.54.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH v2 3/3] riscv: dts: spacemit: k1: Add Banana Pi BPI-CM6 IO board
2026-05-28 5:22 ` [PATCH v2 3/3] riscv: dts: spacemit: k1: Add Banana Pi BPI-CM6 IO board Junhui Liu
@ 2026-05-28 6:19 ` sashiko-bot
0 siblings, 0 replies; 7+ messages in thread
From: sashiko-bot @ 2026-05-28 6:19 UTC (permalink / raw)
To: Junhui Liu; +Cc: conor+dt, robh, devicetree
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] The `&sdhci0` node references `&mmc1_cfg` and `&mmc1_uhs_cfg` via `pinctrl-0` and `pinctrl-1`, but these nodes are not defined anywhere in the included DTSI files or the patch itself.
--
commit c74b8c1d21d14e7c0a04fc8690e5deac751ac08a
Author: Junhui Liu <junhui.liu@pigmoral.tech>
riscv: dts: spacemit: k1: Add Banana Pi BPI-CM6 IO board
This commit adds initial support for the Banana Pi BPI-CM6 IO board, which
combines the BPI-CM6 compute module with an IO carrier board. It introduces
the necessary device tree nodes to enable peripherals like UART, eMMC, SD
card, I2C, PCIe, USB, and dual Ethernet interfaces.
Link: https://docs.banana-pi.org/en/BPI-CM6/BananaPi_BPI-CM6
> diff --git a/arch/riscv/boot/dts/spacemit/k1-bananapi-cm6-io.dts b/arch/riscv/boot/dts/spacemit/k1-bananapi-cm6-io.dts
> new file mode 100644
> index 0000000000000..137b7ef3fc7b4
> --- /dev/null
> +++ b/arch/riscv/boot/dts/spacemit/k1-bananapi-cm6-io.dts
[ ... ]
> +&sdhci0 {
> + pinctrl-names = "default", "uhs";
> + pinctrl-0 = <&mmc1_cfg>;
> + pinctrl-1 = <&mmc1_uhs_cfg>;
[Severity: Low]
Will this cause a device tree compilation failure?
It appears that mmc1_cfg and mmc1_uhs_cfg are not defined in the included
dtsi files or in this patch. Could this result in an unresolved phandle
error when building the device tree?
> + bus-width = <4>;
> + cd-gpios = <&gpio K1_GPIO(80) (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260528-bpi-cm6-v2-0-d0eb3f236cea@pigmoral.tech?part=3
^ permalink raw reply [flat|nested] 7+ messages in thread