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From: sashiko-bot@kernel.org
To: "Svyatoslav Ryhel" <clamor95@gmail.com>
Cc: robh@kernel.org, devicetree@vger.kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH v1 06/10] ARM: tegra: tf701t: Tune MMC devices
Date: Thu, 04 Jun 2026 07:10:18 +0000	[thread overview]
Message-ID: <20260604071018.BD6F51F00898@smtp.kernel.org> (raw)
In-Reply-To: <20260604065556.137614-7-clamor95@gmail.com>

Thank you for your contribution! Sashiko AI review found 4 potential issue(s) to consider:
- [High] Replacing the dedicated fixed regulator (`vdd_2v9_usd`) with a static `power-gpios` property on the MicroSD slot breaks SD card power cycling, permanently trapping the card in 1.8V mode after soft reboots.
- [High] Enabling 1.8V SDR104 mode on an I/O regulator explicitly documented as unstable at 1.8V risks data corruption.
- [High] Removing `mmc-ddr-1_8v` from the eMMC node drops support for eMMC DDR52 mode, causing a potential performance regression.
- [Low] The `mmc-ddr-1_8v` property is incorrectly applied to the MicroSD card node, failing to enable SD UHS-I DDR50 mode.
--

commit 78c4925ea5d1e41f4aa23b26404a535575996cfc
Author: Svyatoslav Ryhel <clamor95@gmail.com>

ARM: tegra: tf701t: Tune MMC devices
    
Set WiFi sdmmc device to SDR104 and improve power sequence. Set uSD sdmmc
device to SDR104 and reconfigure its power supply. Set eMMC sdmmc device
to HS200.

> diff --git a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts b/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts
> index 3e2bc611e2f7a..73276f2aa7fe4 100644
> --- a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts
> +++ b/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts
> @@ -1645,9 +1645,9 @@ ldo8 {
>  
>  					vddio_usd: ldo9 {
>  						regulator-name = "vddio_usd";
> -						/* min voltage of 1.8v is not stable */
> -						regulator-min-microvolt = <2900000>;
> +						regulator-min-microvolt = <1800000>;

[Severity: High]
Is it safe to remove this hardware instability warning and lower the voltage
to 1.8V?

Enabling sd-uhs-sdr104 on the MicroSD node forces 1.8V signaling at high
frequencies. Operating high-speed SD transfers over a voltage rail known to
be unstable might lead to voltage droops, random card disconnects, read/write
I/O errors, and filesystem corruption.

[ ... ]

> @@ -2396,14 +2394,18 @@ wifi@1 {
>  	/* MicroSD card */
>  	mmc@78000400 {
>  		status = "okay";
> -
>  		bus-width = <4>;
> +
>  		cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
> +		power-gpios = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
> +
> +		sd-uhs-sdr104;
> +		mmc-ddr-1_8v;

[Severity: Low]
Is this the correct property for a MicroSD card?

The mmc-ddr-1_8v property is specific to eMMC devices. The SD card
initialization logic does not check this capability for enabling DDR modes.

To advertise and enable UHS-I DDR50 support for an SD card, should this be
sd-uhs-ddr50?

>  
>  		nvidia,default-tap = <0x3>;
>  		nvidia,default-trim = <0x3>;
>  
> -		vmmc-supply = <&vdd_2v9_usd>;
> +		vmmc-supply = <&vcore_emmc>;

[Severity: High]
Will replacing the dedicated fixed regulator (vdd_2v9_usd) with a static
power-gpios property prevent the SD card from being power cycled?

The vcore_emmc regulator cannot be toggled independently since it is held
active by the non-removable eMMC. Looking at sdhci_tegra_probe() in
drivers/mmc/host/sdhci-tegra.c, power-gpios is acquired as GPIOD_OUT_HIGH
and is not toggled dynamically:

    tegra_host->power_gpio = devm_gpiod_get_optional(&pdev->dev, "power", GPIOD_OUT_HIGH);

Without the ability to drop VDD to 0V during mmc_power_cycle(), won't the SD
card be trapped in 1.8V mode after warm reboots or error recovery? The SD
specification requires dropping VDD to 0V to reset the card's internal I/O
state from 1.8V back to 3.3V.

>  		vqmmc-supply = <&vddio_usd>;
>  	};
>  
> @@ -2413,7 +2415,7 @@ mmc@78000600 {
>  		bus-width = <8>;
>  
>  		non-removable;
> -		mmc-ddr-1_8v;
> +		mmc-hs200-1_8v;

[Severity: High]
Could removing mmc-ddr-1_8v cause a performance regression by dropping
support for eMMC DDR52 mode?

These modes are not mutually exclusive. For Tegra114, the host driver relies
entirely on the mmc-ddr-1_8v property to set MMC_CAP_1_8V_DDR, as
soc_data_tegra114 in drivers/mmc/host/sdhci-tegra.c does not set
NVQUIRK_ENABLE_DDR50.

If HS200 initialization or tuning fails, wouldn't the eMMC fall back to
legacy High Speed (SDR) mode at half the bandwidth instead of DDR52 without
this property?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260604065556.137614-1-clamor95@gmail.com?part=6

  reply	other threads:[~2026-06-04  7:10 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-04  6:55 [PATCH v1 00/10] ARM: tegra: tf701t: Add new features Svyatoslav Ryhel
2026-06-04  6:55 ` [PATCH v1 01/10] ARM: tegra: tf701t: Configure CPU DFLL clock node Svyatoslav Ryhel
2026-06-04  7:15   ` sashiko-bot
2026-06-04  6:55 ` [PATCH v1 02/10] ARM: tegra: tf701t: Add core-supply to PMC node Svyatoslav Ryhel
2026-06-04  6:55 ` [PATCH v1 03/10] ARM: tegra: tf701t: Add MC and EMC timing nodes Svyatoslav Ryhel
2026-06-04  6:55 ` [PATCH v1 04/10] ARM: tegra: tf701t: Remove pin_ prefix from PMIC pinmux Svyatoslav Ryhel
2026-06-04  6:55 ` [PATCH v1 05/10] ARM: tegra: tf701t: Add thermal zones for nct1008 sensor Svyatoslav Ryhel
2026-06-04  7:05   ` sashiko-bot
2026-06-04  6:55 ` [PATCH v1 06/10] ARM: tegra: tf701t: Tune MMC devices Svyatoslav Ryhel
2026-06-04  7:10   ` sashiko-bot [this message]
2026-06-04  6:55 ` [PATCH v1 07/10] ARM: tegra: tf701t: Fix BCM4334 configuration Svyatoslav Ryhel
2026-06-04  7:08   ` sashiko-bot
2026-06-04  6:55 ` [PATCH v1 08/10] ARM: tegra: tf701t: Complete power sensor node Svyatoslav Ryhel
2026-06-04  6:55 ` [PATCH v1 09/10] ARM: tegra: tf701t: Configure UART-B line used for GPS Svyatoslav Ryhel
2026-06-04  6:55 ` [PATCH v1 10/10] ARM: tegra: tf701t: Add chosen node Svyatoslav Ryhel

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