From: Shawn Guo <shengchao.guo@oss.qualcomm.com>
To: Bjorn Andersson <andersson@kernel.org>
Cc: Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Bartosz Golaszewski <brgl@kernel.org>,
Deepti Jaggi <deepti.jaggi@oss.qualcomm.com>,
devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org,
Shawn Guo <shengchao.guo@oss.qualcomm.com>
Subject: [PATCH v5 4/7] arm64: dts: qcom: Add device tree for SA8797P Ride board
Date: Thu, 9 Jul 2026 21:20:10 +0800 [thread overview]
Message-ID: <20260709132013.4096850-5-shengchao.guo@oss.qualcomm.com> (raw)
In-Reply-To: <20260709132013.4096850-1-shengchao.guo@oss.qualcomm.com>
From: Deepti Jaggi <deepti.jaggi@oss.qualcomm.com>
Add initial device tree for the Qualcomm SA8797P Ride reference board,
which is built on Nord GearVM variant.
- Configure UART15 as the primary console and UART4 as the secondary
serial port
- Enable UFS storage support
- Define thermal zones for PMIC dies, UFS, and two SDRAM sensors,
all sourced from SCMI sensor protocol on channel 23
Signed-off-by: Deepti Jaggi <deepti.jaggi@oss.qualcomm.com>
Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/Makefile | 1 +
arch/arm64/boot/dts/qcom/sa8797p-ride.dts | 240 ++++++++++++++++++++++
2 files changed, 241 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/sa8797p-ride.dts
diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index fb1a99a3e01c..8e6ef4116146 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -217,6 +217,7 @@ dtb-$(CONFIG_ARCH_QCOM) += qru1000-idp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sa8155p-adp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sa8295p-adp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sa8540p-ride.dtb
+dtb-$(CONFIG_ARCH_QCOM) += sa8797p-ride.dtb
sc7180-acer-aspire1-el2-dtbs := sc7180-acer-aspire1.dtb sc7180-el2.dtbo
dtb-$(CONFIG_ARCH_QCOM) += sc7180-acer-aspire1.dtb sc7180-acer-aspire1-el2.dtb
sc7180-ecs-liva-qc710-el2-dtbs := sc7180-ecs-liva-qc710.dtb sc7180-el2.dtbo
diff --git a/arch/arm64/boot/dts/qcom/sa8797p-ride.dts b/arch/arm64/boot/dts/qcom/sa8797p-ride.dts
new file mode 100644
index 000000000000..4ced77e3482e
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sa8797p-ride.dts
@@ -0,0 +1,240 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+/dts-v1/;
+
+#include "nord-gearvm.dtsi"
+
+/ {
+ model = "Qualcomm Technologies, Inc. SA8797P Ride";
+ compatible = "qcom,sa8797p-ride", "qcom,nord";
+
+ aliases {
+ serial0 = &uart15;
+ serial1 = &uart4;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ clocks {
+ xo_board_clk: xo-board-clk {
+ compatible = "fixed-clock";
+ clock-frequency = <38400000>;
+ #clock-cells = <0>;
+ };
+
+ sleep_clk: sleep-clk {
+ compatible = "fixed-clock";
+ clock-frequency = <32000>;
+ #clock-cells = <0>;
+ };
+ };
+};
+
+&scmi3 {
+ status = "okay";
+};
+
+&scmi11 {
+ status = "okay";
+};
+
+&scmi15 {
+ status = "okay";
+};
+
+&scmi23 {
+ status = "okay";
+};
+
+&thermal_zones {
+ pmic_kobra_thermal: pmic-a-die-thermal {
+ polling-delay-passive = <100>;
+ thermal-sensors = <&scmi23_sensor 3>;
+
+ trips {
+ trip0 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ pmic_kai_0_thermal: pmic-e-die-thermal {
+ polling-delay-passive = <100>;
+ thermal-sensors = <&scmi23_sensor 4>;
+
+ trips {
+ trip0 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ pmic_kai_1_thermal: pmic-f-die-thermal {
+ polling-delay-passive = <100>;
+ thermal-sensors = <&scmi23_sensor 5>;
+
+ trips {
+ trip0 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ pmic_kai_2_thermal: pmic-g-die-thermal {
+ polling-delay-passive = <100>;
+ thermal-sensors = <&scmi23_sensor 6>;
+
+ trips {
+ trip0 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ pmic_kai_3_thermal: pmic-h-die-thermal {
+ polling-delay-passive = <100>;
+ thermal-sensors = <&scmi23_sensor 7>;
+
+ trips {
+ trip0 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ pmic_kai_4_thermal: pmic-i-die-thermal {
+ polling-delay-passive = <100>;
+ thermal-sensors = <&scmi23_sensor 8>;
+
+ trips {
+ trip0 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ pmic_kai_5_thermal: pmic-j-die-thermal {
+ polling-delay-passive = <100>;
+ thermal-sensors = <&scmi23_sensor 9>;
+
+ trips {
+ trip0 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ pmic_kai_6_thermal: pmic-k-die-thermal {
+ polling-delay-passive = <100>;
+ thermal-sensors = <&scmi23_sensor 10>;
+
+ trips {
+ trip0 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ pmic_kai_7_thermal: pmic-l-die-thermal {
+ polling-delay-passive = <100>;
+ thermal-sensors = <&scmi23_sensor 11>;
+
+ trips {
+ trip0 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ pmic_kai_ufs_thermal: ufs-thermal {
+ polling-delay-passive = <0>;
+ thermal-sensors = <&scmi23_sensor 0>;
+
+ trips {
+ trip0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ trip1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "critical";
+ };
+ };
+ };
+
+ pmic_kai_sdram0_thermal: sdram0-thermal {
+ polling-delay-passive = <0>;
+ thermal-sensors = <&scmi23_sensor 1>;
+
+ trips {
+ trip0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ trip1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "critical";
+ };
+ };
+ };
+
+ pmic_kai_sdram1_thermal: sdram1-thermal {
+ polling-delay-passive = <0>;
+ thermal-sensors = <&scmi23_sensor 2>;
+
+ trips {
+ trip0 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ trip1 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "critical";
+ };
+ };
+ };
+};
+
+&uart4 {
+ status = "okay";
+};
+
+&uart15 {
+ status = "okay";
+};
+
+&ufs_mem_hc {
+ status = "okay";
+};
--
2.43.0
next prev parent reply other threads:[~2026-07-09 13:21 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-09 13:20 [PATCH v5 0/7] Add initial device trees for Nord platform Shawn Guo
2026-07-09 13:20 ` [PATCH v5 1/7] arm64: dts: qcom: Add device tree for Nord SoC series Shawn Guo
2026-07-09 13:38 ` sashiko-bot
2026-07-09 13:20 ` [PATCH v5 2/7] arm64: dts: qcom: Add device tree for Nord GearVM variant Shawn Guo
2026-07-09 13:51 ` sashiko-bot
2026-07-09 13:20 ` [PATCH v5 3/7] dt-bindings: arm: qcom: Document SA8797P Ride board Shawn Guo
2026-07-09 13:20 ` Shawn Guo [this message]
2026-07-09 13:20 ` [PATCH v5 5/7] arm64: dts: qcom: Add device tree for Nord Embedded variant Shawn Guo
2026-07-09 13:20 ` [PATCH v5 6/7] dt-bindings: arm: qcom: Document Nord IQ10 RRD board Shawn Guo
2026-07-10 7:04 ` Krzysztof Kozlowski
2026-07-10 7:07 ` Krzysztof Kozlowski
2026-07-09 13:20 ` [PATCH v5 7/7] arm64: dts: qcom: Add device tree for " Shawn Guo
2026-07-09 14:30 ` sashiko-bot
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260709132013.4096850-5-shengchao.guo@oss.qualcomm.com \
--to=shengchao.guo@oss.qualcomm.com \
--cc=andersson@kernel.org \
--cc=brgl@kernel.org \
--cc=conor+dt@kernel.org \
--cc=deepti.jaggi@oss.qualcomm.com \
--cc=devicetree@vger.kernel.org \
--cc=konradybcio@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox