From: sashiko-bot@kernel.org
To: "Dmitry Baryshkov" <dmitry.baryshkov@oss.qualcomm.com>
Cc: conor+dt@kernel.org, devicetree@vger.kernel.org, robh@kernel.org
Subject: Re: [PATCH 03/12] iommu: qcom_iommu: extract context bank programming into a helper
Date: Sun, 09 Aug 2026 20:27:09 +0000 [thread overview]
Message-ID: <20260809202710.15F0A1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260809-msm8974-iommu-upstream-v1-3-87f5cd492560@oss.qualcomm.com>
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
New issues:
- [Low] The `qcom_iommu` parameter in the new helper `qcom_iommu_program_ctx` is never used.
Pre-existing issues:
- [High] A use-after-free (UAF) condition exists on the error path of `qcom_iommu_init_domain` where a dangling pointer is left in `ctx->domain` and accessed by the IRQ handler.
--
--- Patch [3]: [PATCH 03/12] iommu: qcom_iommu: extract context bank programming into a helper ---
commit 7d60ff7e8f25f085f5b849ae6ddac1aa47c3809d
Author: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Subject: iommu: qcom_iommu: extract context bank programming into a helper
This patch extracts the inline context bank programming sequence into a new
helper function qcom_iommu_program_ctx(). It also stores the computed
register values into the qcom_iommu_ctx struct. This allows the registers to
be reprogrammed upon runtime resume for MSM8974 QSMMU instances.
> diff --git a/drivers/iommu/arm/arm-smmu/qcom_iommu.c b/drivers/iommu/arm/arm-smmu/qcom_iommu.c
> index 21d18ce67b982..5bbb51d9bd653 100644
> --- a/drivers/iommu/arm/arm-smmu/qcom_iommu.c
> +++ b/drivers/iommu/arm/arm-smmu/qcom_iommu.c
[ ... ]
> @@ -213,6 +218,32 @@ static irqreturn_t qcom_iommu_fault(int irq, void *dev)
> return IRQ_HANDLED;
> }
>
> +static void qcom_iommu_program_ctx(struct qcom_iommu_dev *qcom_iommu,
> + struct qcom_iommu_ctx *ctx)
> +{
[Severity: Low]
Is the qcom_iommu parameter needed here? It does not appear to be used
anywhere inside this helper function.
> + /* Disable context bank before programming */
> + iommu_writel(ctx, ARM_SMMU_CB_SCTLR, 0);
[ ... ]
> @@ -301,7 +313,9 @@ static int qcom_iommu_init_domain(struct iommu_domain *domain,
> if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
> reg |= ARM_SMMU_SCTLR_E;
>
> - iommu_writel(ctx, ARM_SMMU_CB_SCTLR, reg);
> + ctx->sctlr = reg;
> +
> + qcom_iommu_program_ctx(qcom_iommu, ctx);
>
> ctx->domain = domain;
> }
[Severity: High]
This is a pre-existing issue, but does the error path in
qcom_iommu_init_domain() handle partially initialized context banks correctly?
If an early iteration of the context bank setup succeeds, ctx->domain is set:
drivers/iommu/arm/arm-smmu/qcom_iommu.c:qcom_iommu_init_domain() {
...
qcom_iommu_program_ctx(qcom_iommu, ctx);
ctx->domain = domain;
...
}
If a subsequent iteration fails, the function jumps to out_clear_iommu
but leaves ctx->domain pointing to the domain.
When the IOMMU core frees the domain, could a subsequent hardware fault
trigger a use-after-free when the IRQ handler dereferences it?
drivers/iommu/arm/arm-smmu/qcom_iommu.c:qcom_iommu_fault() {
...
if (report_iommu_fault(ctx->domain, ctx->dev, iova, 0)) {
...
}
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260809-msm8974-iommu-upstream-v1-0-87f5cd492560@oss.qualcomm.com?part=3
next prev parent reply other threads:[~2026-08-09 20:27 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-09 20:15 [PATCH 00/12] iommu: qcom_iommu: implement support for instances on MSM8974 Dmitry Baryshkov
2026-08-09 20:15 ` [PATCH 01/12] dt-bindings: iommu: qcom,iommu: document the MSM8974 IOMMUs Dmitry Baryshkov
2026-08-09 20:28 ` sashiko-bot
2026-08-09 20:15 ` [PATCH 02/12] iommu: arm-smmu: add global register definitions used by the QSMMU Dmitry Baryshkov
2026-08-09 20:15 ` [PATCH 03/12] iommu: qcom_iommu: extract context bank programming into a helper Dmitry Baryshkov
2026-08-09 20:27 ` sashiko-bot [this message]
2026-08-09 20:15 ` [PATCH 04/12] iommu: qcom_iommu: support the short-descriptor pagetable format Dmitry Baryshkov
2026-08-09 20:30 ` sashiko-bot
2026-08-09 20:15 ` [PATCH 05/12] iommu: qcom_iommu: handle the SMMU global register space Dmitry Baryshkov
2026-08-09 20:29 ` sashiko-bot
2026-08-09 20:15 ` [PATCH 06/12] iommu: qcom_iommu: support non-TZ-managed instances Dmitry Baryshkov
2026-08-09 20:39 ` sashiko-bot
2026-08-09 20:15 ` [PATCH 07/12] iommu: qcom_iommu: restore context bank state after power collapse Dmitry Baryshkov
2026-08-09 20:28 ` sashiko-bot
2026-08-09 20:15 ` [PATCH 08/12] iommu: qcom_iommu: halt the micro-MMU while programming context banks Dmitry Baryshkov
2026-08-09 20:33 ` sashiko-bot
2026-08-09 20:15 ` [PATCH 09/12] iommu: qcom_iommu: allow faulting transactions to terminate Dmitry Baryshkov
2026-08-09 20:28 ` sashiko-bot
2026-08-09 20:15 ` [PATCH 10/12] iommu: qcom_iommu: program BFP (prefetch) settings Dmitry Baryshkov
2026-08-09 20:28 ` sashiko-bot
2026-08-09 20:15 ` [PATCH 11/12] iommu: qcom_iommu: add the MSM8974 instances Dmitry Baryshkov
2026-08-09 20:28 ` sashiko-bot
2026-08-09 20:15 ` [PATCH 12/12] ARM: dts: qcom: msm8974: add the IOMMUs Dmitry Baryshkov
2026-08-10 10:16 ` [PATCH 00/12] iommu: qcom_iommu: implement support for instances on MSM8974 Luca Weiss
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