Devicetree
 help / color / mirror / Atom feed
From: sashiko-bot@kernel.org
To: "Dmitry Baryshkov" <dmitry.baryshkov@oss.qualcomm.com>
Cc: robh@kernel.org, devicetree@vger.kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH 01/12] dt-bindings: iommu: qcom,iommu: document the MSM8974 IOMMUs
Date: Sun, 09 Aug 2026 20:28:31 +0000	[thread overview]
Message-ID: <20260809202832.140031F00A3A@smtp.kernel.org> (raw)
In-Reply-To: <20260809-msm8974-iommu-upstream-v1-1-87f5cd492560@oss.qualcomm.com>

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] Missing top-level 'interrupts' property and incorrect unconditional requirements for new direct-mapped instances.
- [Low] The schema fails to conditionally require the `reg` property for the newly added MSM8974 per-instance compatibles.
--

--- Patch [1]: [PATCH 01/12] dt-bindings: iommu: qcom,iommu: document the MSM8974 IOMMUs ---
commit b29444ad6a6fa61aa71980a7c581393333c88d6a
Author: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>

dt-bindings: iommu: qcom,iommu: document the MSM8974 IOMMUs

This patch adds per-instance compatibles for the display, Venus and GPU
MSM8974 IOMMU instances based on the ARM SMMU v1 spec. It allows the driver
to carry per-instance prefetch tuning tables and stream ID maps, and updates
property documentation for direct-mapped instances.

> diff --git a/Documentation/devicetree/bindings/iommu/qcom,iommu.yaml b/Documentation/devicetree/bindings/iommu/qcom,iommu.yaml
> index 93a4890253170..43dffe41e3b8f 100644
> --- a/Documentation/devicetree/bindings/iommu/qcom,iommu.yaml
> +++ b/Documentation/devicetree/bindings/iommu/qcom,iommu.yaml
> @@ -30,6 +30,10 @@ properties:
>                - qcom,msm8953-iommu
>                - qcom,msm8976-iommu
>            - const: qcom,msm-iommu-v2
> +      - enum:
> +          - qcom,msm8974-gpu-iommu
> +          - qcom,msm8974-mdp-iommu
> +          - qcom,msm8974-venus-iommu

[Severity: Medium]
Will valid configurations for these direct-mapped instances fail schema
validation when qcom,iommu-secure-id is missing?

If the OS programs the global register space directly, statically assigned
iommu-ctx@ child nodes aren't used, requiring interrupts to be defined at the
top level. Because interrupts is not defined at the top level and child node
properties are unconditionally required, adding a node for these compatibles
without qcom,iommu-secure-id appears to fail dt_binding_check.

Could the global schema constraints be adjusted to allow top-level interrupts
and conditionally relax child-node requirements for these new non-secured
instances?

[ ... ]

> @@ -50,13 +54,23 @@ properties:
>  
>    reg:
>      maxItems: 1
> +    description:
> +      For instances using the qcom,msm-iommu-v1/-v2 fallbacks, the
> +      optional "SMMU local" register region used for interrupt routing
> +      configuration. For instances with per-instance compatibles, the
> +      SMMU global register space, used for stream mapping configuration
> +      on non-secured instances and for the implementation-defined
> +      prefetch registers on all instances.

[Severity: Low]
Is a conditional allOf block missing to enforce the presence of the reg
property for the new MSM8974 per-instance compatibles?

The description states that reg is used for the implementation-defined
prefetch registers on all instances with per-instance compatibles. Without
requiring it conditionally, incomplete device tree nodes missing the reg
property will silently pass validation.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260809-msm8974-iommu-upstream-v1-0-87f5cd492560@oss.qualcomm.com?part=1

  reply	other threads:[~2026-08-09 20:28 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-09 20:15 [PATCH 00/12] iommu: qcom_iommu: implement support for instances on MSM8974 Dmitry Baryshkov
2026-08-09 20:15 ` [PATCH 01/12] dt-bindings: iommu: qcom,iommu: document the MSM8974 IOMMUs Dmitry Baryshkov
2026-08-09 20:28   ` sashiko-bot [this message]
2026-08-09 20:15 ` [PATCH 02/12] iommu: arm-smmu: add global register definitions used by the QSMMU Dmitry Baryshkov
2026-08-09 20:15 ` [PATCH 03/12] iommu: qcom_iommu: extract context bank programming into a helper Dmitry Baryshkov
2026-08-09 20:27   ` sashiko-bot
2026-08-09 20:15 ` [PATCH 04/12] iommu: qcom_iommu: support the short-descriptor pagetable format Dmitry Baryshkov
2026-08-09 20:30   ` sashiko-bot
2026-08-09 20:15 ` [PATCH 05/12] iommu: qcom_iommu: handle the SMMU global register space Dmitry Baryshkov
2026-08-09 20:29   ` sashiko-bot
2026-08-09 20:15 ` [PATCH 06/12] iommu: qcom_iommu: support non-TZ-managed instances Dmitry Baryshkov
2026-08-09 20:39   ` sashiko-bot
2026-08-09 20:15 ` [PATCH 07/12] iommu: qcom_iommu: restore context bank state after power collapse Dmitry Baryshkov
2026-08-09 20:28   ` sashiko-bot
2026-08-09 20:15 ` [PATCH 08/12] iommu: qcom_iommu: halt the micro-MMU while programming context banks Dmitry Baryshkov
2026-08-09 20:33   ` sashiko-bot
2026-08-09 20:15 ` [PATCH 09/12] iommu: qcom_iommu: allow faulting transactions to terminate Dmitry Baryshkov
2026-08-09 20:28   ` sashiko-bot
2026-08-09 20:15 ` [PATCH 10/12] iommu: qcom_iommu: program BFP (prefetch) settings Dmitry Baryshkov
2026-08-09 20:28   ` sashiko-bot
2026-08-09 20:15 ` [PATCH 11/12] iommu: qcom_iommu: add the MSM8974 instances Dmitry Baryshkov
2026-08-09 20:28   ` sashiko-bot
2026-08-09 20:15 ` [PATCH 12/12] ARM: dts: qcom: msm8974: add the IOMMUs Dmitry Baryshkov
2026-08-10 10:16 ` [PATCH 00/12] iommu: qcom_iommu: implement support for instances on MSM8974 Luca Weiss

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260809202832.140031F00A3A@smtp.kernel.org \
    --to=sashiko-bot@kernel.org \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=dmitry.baryshkov@oss.qualcomm.com \
    --cc=robh@kernel.org \
    --cc=sashiko-reviews@lists.linux.dev \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox