From: Mayuresh Chitale <mayuresh.chitale@oss.qualcomm.com>
To: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <pjw@kernel.org>,
Greg KH <gregkh@linuxfoundation.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Ian Rogers <irogers@google.com>
Cc: Mayuresh Chitale <mayuresh.chitale@oss.qualcomm.com>,
Alexandre Ghiti <alex@ghiti.fr>,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Namhyung Kim <namhyung@kernel.org>,
Mark Rutland <mark.rutland@arm.com>, Jiri Olsa <jolsa@kernel.org>,
Adrian Hunter <adrian.hunter@intel.com>,
Mayuresh Chitale <mchitale@gmail.com>,
Anup Patel <anup@brainfault.org>,
Atish Patra <atish.patra@linux.dev>,
Andrew Jones <andrew.jones@oss.qualcomm.com>,
Sunil V L <sunilvl@oss.qualcomm.com>,
linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Anup Patel <anup.patel@oss.qualcomm.com>,
Zane Leung <liangzhen@linux.spacemit.com>
Subject: [PATCH v6 06/14] gtrace: Add RISC-V Trace encoder driver
Date: Thu, 1 Oct 2026 10:52:17 +0530 [thread overview]
Message-ID: <20261001052243.3042627-7-mayuresh.chitale@oss.qualcomm.com> (raw)
In-Reply-To: <20261001052243.3042627-1-mayuresh.chitale@oss.qualcomm.com>
Add initial implementation of RISC-V E-Trace encoder driver. The encoder
is defined in the RISC-V Trace Control Interface specification.
Co-developed-by: Anup Patel <anup.patel@oss.qualcomm.com>
Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Signed-off-by: Mayuresh Chitale <mayuresh.chitale@oss.qualcomm.com>
---
drivers/hwtracing/gtrace/Kconfig | 13 ++
drivers/hwtracing/gtrace/Makefile | 1 +
drivers/hwtracing/gtrace/rvtrace-encoder.c | 236 +++++++++++++++++++++
3 files changed, 250 insertions(+)
create mode 100644 drivers/hwtracing/gtrace/rvtrace-encoder.c
diff --git a/drivers/hwtracing/gtrace/Kconfig b/drivers/hwtracing/gtrace/Kconfig
index 04986f216549..e3a621b59913 100644
--- a/drivers/hwtracing/gtrace/Kconfig
+++ b/drivers/hwtracing/gtrace/Kconfig
@@ -28,3 +28,16 @@ config RVTRACE
To compile this driver as a module, choose M here: the module
will be called rvtrace.
+
+config RVTRACE_ENCODER
+ tristate "RISC-V Trace Encoder driver"
+ depends on RVTRACE
+ default y
+ help
+ This driver provides support for the RISC-V trace encoder component
+ which is defined by the RISC-V Trace Control Interface specification.
+ The encoder is bound to a CPU and generates the trace data for that
+ CPU.
+
+ To compile this driver as a module, choose M here: the module
+ will be called rvtrace-encoder.
diff --git a/drivers/hwtracing/gtrace/Makefile b/drivers/hwtracing/gtrace/Makefile
index 20f67a78b8ab..2660fcaa332b 100644
--- a/drivers/hwtracing/gtrace/Makefile
+++ b/drivers/hwtracing/gtrace/Makefile
@@ -5,3 +5,4 @@ gtrace-y := gtrace-core.o
gtrace-$(CONFIG_OF) += gtrace-of.o
obj-$(CONFIG_RVTRACE) += rvtrace-platform.o
+obj-$(CONFIG_RVTRACE_ENCODER) += rvtrace-encoder.o
diff --git a/drivers/hwtracing/gtrace/rvtrace-encoder.c b/drivers/hwtracing/gtrace/rvtrace-encoder.c
new file mode 100644
index 000000000000..1f06b1a2b412
--- /dev/null
+++ b/drivers/hwtracing/gtrace/rvtrace-encoder.c
@@ -0,0 +1,236 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2026 Qualcomm Technologies, Inc.
+ */
+
+#include <linux/cpumask.h>
+#include <linux/device.h>
+#include <linux/gtrace.h>
+#include <linux/log2.h>
+#include <linux/minmax.h>
+#include <linux/slab.h>
+#include <linux/types.h>
+#include "rvtrace.h"
+
+#define RVTRACE_COMPONENT_CTRL_ITRACE_SHIFT 2
+#define RVTRACE_COMPONENT_CTRL_INSTMODE_MASK 0x7
+#define RVTRACE_COMPONENT_CTRL_INSTMODE_SHIFT 4
+#define RVTRACE_COMPONENT_CTRL_INSTMODE_OPIT 0x6
+#define RVTRACE_COMPONENT_CTRL_INHIBITSRC_SHIFT 15
+#define RVTRACE_COMPONENT_CTRL_FORMAT_MASK 0x7
+#define RVTRACE_COMPONENT_CTRL_FORMAT_SHIFT 24
+#define RVTRACE_COMPONENT_CTRL_FORMAT_ETRACE 0x0
+#define RVTRACE_COMPONENT_CTRL_FORMAT_NTRACE 0x1
+
+#define RVTRACE_ENCODER_INSTFEAT_OFFSET 0x8
+#define RVTRACE_ENCODER_INSTFEAT_SRCID_MASK 0xfff
+#define RVTRACE_ENCODER_INSTFEAT_SRCID_SHIFT 16
+#define RVTRACE_ENCODER_INSTFEAT_SRCBITS_MASK 0xf
+#define RVTRACE_ENCODER_INSTFEAT_SRCBITS_SHIFT 28
+#define RVTRACE_ENCODER_INSTFEAT_SRCBITS_MAX 12
+
+struct rvtrace_encoder_priv {
+ u32 srcbits;
+};
+
+/*
+ * Set the srcid and clear trTeInhibitSrc bit so that the emitted trace messages carry
+ * the source id
+ */
+static void rvtrace_encoder_set_srcid(struct gtrace_platform_data *pdata, u32 srcbits)
+{
+ u32 val;
+
+ val = gtrace_read32(pdata, RVTRACE_ENCODER_INSTFEAT_OFFSET);
+ val &= ~(RVTRACE_ENCODER_INSTFEAT_SRCID_MASK << RVTRACE_ENCODER_INSTFEAT_SRCID_SHIFT);
+ val &= ~(RVTRACE_ENCODER_INSTFEAT_SRCBITS_MASK << RVTRACE_ENCODER_INSTFEAT_SRCBITS_SHIFT);
+ val |= pdata->bound_cpu << RVTRACE_ENCODER_INSTFEAT_SRCID_SHIFT;
+ val |= srcbits << RVTRACE_ENCODER_INSTFEAT_SRCBITS_SHIFT;
+ gtrace_write32(pdata, val, RVTRACE_ENCODER_INSTFEAT_OFFSET);
+
+ val = gtrace_read32(pdata, RVTRACE_COMPONENT_CTRL_OFFSET);
+ val &= ~BIT(RVTRACE_COMPONENT_CTRL_INHIBITSRC_SHIFT);
+ gtrace_write32(pdata, val, RVTRACE_COMPONENT_CTRL_OFFSET);
+}
+
+/* Set requested trace format and return 0 if hardware supports that format */
+static int rvtrace_encoder_set_format(struct gtrace_platform_data *pdata)
+{
+ u32 val, fmt;
+
+ switch (pdata->format) {
+ case GTRACE_FORMAT_ETRACE:
+ fmt = RVTRACE_COMPONENT_CTRL_FORMAT_ETRACE;
+ break;
+ case GTRACE_FORMAT_NTRACE:
+ fmt = RVTRACE_COMPONENT_CTRL_FORMAT_NTRACE;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ val = gtrace_read32(pdata, RVTRACE_COMPONENT_CTRL_OFFSET);
+ val &= ~(RVTRACE_COMPONENT_CTRL_FORMAT_MASK << RVTRACE_COMPONENT_CTRL_FORMAT_SHIFT);
+ val |= fmt << RVTRACE_COMPONENT_CTRL_FORMAT_SHIFT;
+ gtrace_write32(pdata, val, RVTRACE_COMPONENT_CTRL_OFFSET);
+
+ val = gtrace_read32(pdata, RVTRACE_COMPONENT_CTRL_OFFSET);
+ val = (val >> RVTRACE_COMPONENT_CTRL_FORMAT_SHIFT) & RVTRACE_COMPONENT_CTRL_FORMAT_MASK;
+ return val == fmt ? 0 : -EOPNOTSUPP;
+}
+
+static int rvtrace_encoder_probe(struct gtrace_component *comp)
+{
+ struct gtrace_platform_data *pdata = comp->pdata;
+ struct rvtrace_encoder_priv *priv;
+ u32 val, hw_srcbits, srcbits;
+ int ret;
+
+ if (pdata->bound_cpu < 0) {
+ dev_err(&comp->dev, "cpu property missing. Please fix firmware.\n");
+ return -EINVAL;
+ }
+
+ priv = devm_kzalloc(&comp->dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ ret = rvtrace_encoder_set_format(pdata);
+ if (ret) {
+ dev_err(&comp->dev, "failed to set format %d\n", pdata->format);
+ return ret;
+ }
+
+ /* Check if trTeInhibitSrc is hardwired to 1 */
+ val = gtrace_read32(pdata, RVTRACE_COMPONENT_CTRL_OFFSET);
+ val &= ~BIT(RVTRACE_COMPONENT_CTRL_INHIBITSRC_SHIFT);
+ gtrace_write32(pdata, val, RVTRACE_COMPONENT_CTRL_OFFSET);
+ val = gtrace_read32(pdata, RVTRACE_COMPONENT_CTRL_OFFSET);
+ if (!(val & BIT(RVTRACE_COMPONENT_CTRL_INHIBITSRC_SHIFT))) {
+ /* Probe how many bits can trTeSrcID span in the emitted Trace messages */
+ val = gtrace_read32(pdata, RVTRACE_ENCODER_INSTFEAT_OFFSET);
+ val |= (RVTRACE_ENCODER_INSTFEAT_SRCBITS_MASK <<
+ RVTRACE_ENCODER_INSTFEAT_SRCBITS_SHIFT);
+ gtrace_write32(pdata, val, RVTRACE_ENCODER_INSTFEAT_OFFSET);
+ val = gtrace_read32(pdata, RVTRACE_ENCODER_INSTFEAT_OFFSET);
+ hw_srcbits = (val >> RVTRACE_ENCODER_INSTFEAT_SRCBITS_SHIFT) &
+ RVTRACE_ENCODER_INSTFEAT_SRCBITS_MASK;
+ /* Determine if there are sufficient bits to hold max cpus */
+ hw_srcbits = min_t(u32, hw_srcbits, RVTRACE_ENCODER_INSTFEAT_SRCBITS_MAX);
+ srcbits = min_t(u32, hw_srcbits, order_base_2(nr_cpu_ids));
+ if (srcbits && pdata->bound_cpu < BIT(srcbits)) {
+ rvtrace_encoder_set_srcid(pdata, srcbits);
+ priv->srcbits = srcbits;
+ }
+ }
+ if (!priv->srcbits) {
+ dev_warn(&comp->dev, "cpu %d trace will not carry source id\n",
+ pdata->bound_cpu);
+ val = gtrace_read32(pdata, RVTRACE_COMPONENT_CTRL_OFFSET);
+ val |= BIT(RVTRACE_COMPONENT_CTRL_INHIBITSRC_SHIFT);
+ gtrace_write32(pdata, val, RVTRACE_COMPONENT_CTRL_OFFSET);
+ }
+ dev_set_drvdata(&comp->dev, priv);
+ return 0;
+}
+
+static int rvtrace_encoder_start(struct gtrace_component *comp)
+{
+ struct rvtrace_encoder_priv *priv = dev_get_drvdata(&comp->dev);
+ struct gtrace_platform_data *pdata = comp->pdata;
+ int ret;
+ u32 val;
+
+ if (priv->srcbits)
+ rvtrace_encoder_set_srcid(pdata, priv->srcbits);
+
+ ret = rvtrace_encoder_set_format(pdata);
+ if (ret) {
+ dev_err(&comp->dev, "failed to set format %d\n", pdata->format);
+ return ret;
+ }
+
+ ret = gtrace_enable_component(comp);
+ if (ret) {
+ dev_err(&comp->dev, "failed to enable encoder.\n");
+ return ret;
+ }
+
+ /* set mode */
+ val = gtrace_read32(pdata, RVTRACE_COMPONENT_CTRL_OFFSET);
+ val &= ~(RVTRACE_COMPONENT_CTRL_INSTMODE_MASK << RVTRACE_COMPONENT_CTRL_INSTMODE_SHIFT);
+ val |= (RVTRACE_COMPONENT_CTRL_INSTMODE_OPIT << RVTRACE_COMPONENT_CTRL_INSTMODE_SHIFT);
+ gtrace_write32(pdata, val, RVTRACE_COMPONENT_CTRL_OFFSET);
+
+ val = gtrace_read32(pdata, RVTRACE_COMPONENT_CTRL_OFFSET);
+ val |= BIT(RVTRACE_COMPONENT_CTRL_ITRACE_SHIFT);
+ gtrace_write32(pdata, val, RVTRACE_COMPONENT_CTRL_OFFSET);
+ ret = gtrace_poll_bit(pdata, RVTRACE_COMPONENT_CTRL_OFFSET,
+ RVTRACE_COMPONENT_CTRL_ITRACE_SHIFT, 1,
+ pdata->control_poll_timeout_usecs);
+ if (ret) {
+ dev_err(&comp->dev, "failed to enable tracing.\n");
+ val = gtrace_read32(pdata, RVTRACE_COMPONENT_CTRL_OFFSET);
+ val &= ~BIT(RVTRACE_COMPONENT_CTRL_ITRACE_SHIFT);
+ gtrace_write32(pdata, val, RVTRACE_COMPONENT_CTRL_OFFSET);
+ gtrace_disable_component(comp);
+ }
+
+ return ret;
+}
+
+static int rvtrace_encoder_stop(struct gtrace_component *comp)
+{
+ struct gtrace_platform_data *pdata = comp->pdata;
+ int ret, err;
+ u32 val;
+
+ val = gtrace_read32(pdata, RVTRACE_COMPONENT_CTRL_OFFSET);
+ val &= ~BIT(RVTRACE_COMPONENT_CTRL_ITRACE_SHIFT);
+ gtrace_write32(pdata, val, RVTRACE_COMPONENT_CTRL_OFFSET);
+ ret = gtrace_poll_bit(pdata, RVTRACE_COMPONENT_CTRL_OFFSET,
+ RVTRACE_COMPONENT_CTRL_ITRACE_SHIFT, 0,
+ pdata->control_poll_timeout_usecs);
+ if (ret)
+ dev_err(&comp->dev, "failed to stop tracing.\n");
+
+ err = gtrace_disable_component(comp);
+ if (err)
+ dev_err(&comp->dev, "failed to disable encoder.\n");
+
+ return ret ?: err;
+}
+
+static const struct gtrace_component_id rvtrace_encoder_ids[] = {
+ { .type = GTRACE_RVTRACE_ENCODER,
+ .version = rvtrace_component_mkversion(1, 0), },
+ {},
+};
+
+static struct gtrace_driver rvtrace_encoder_driver = {
+ .id_table = rvtrace_encoder_ids,
+ .probe = rvtrace_encoder_probe,
+ .start = rvtrace_encoder_start,
+ .stop = rvtrace_encoder_stop,
+ .driver = {
+ .name = "rvtrace-encoder",
+ },
+};
+
+static int __init rvtrace_encoder_init(void)
+{
+ return gtrace_register_driver(&rvtrace_encoder_driver);
+}
+
+static void __exit rvtrace_encoder_exit(void)
+{
+ gtrace_unregister_driver(&rvtrace_encoder_driver);
+}
+
+module_init(rvtrace_encoder_init);
+module_exit(rvtrace_encoder_exit);
+
+/* Module information */
+MODULE_AUTHOR("Mayuresh Chitale");
+MODULE_DESCRIPTION("RISC-V Trace Encoder Driver");
+MODULE_LICENSE("GPL");
--
2.43.0
next prev parent reply other threads:[~2026-10-01 5:24 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-01 5:22 [PATCH v6 00/14] Linux RISC-V trace framework and drivers Mayuresh Chitale
2026-10-01 5:22 ` [PATCH v6 01/14] dt-bindings: Add RISC-V trace component bindings Mayuresh Chitale
2026-10-01 5:33 ` sashiko-bot
2026-10-01 5:22 ` [PATCH v6 02/14] hwtracing: gtrace: Initial implementation of gtrace framework Mayuresh Chitale
2026-10-01 5:37 ` sashiko-bot
2026-10-01 5:22 ` [PATCH v6 03/14] gtrace: Add RISC-V platform driver for the " Mayuresh Chitale
2026-10-01 5:36 ` sashiko-bot
2026-10-01 5:22 ` [PATCH v6 04/14] gtrace: Add functions to create/destroy a trace component path Mayuresh Chitale
2026-10-01 5:36 ` sashiko-bot
2026-10-01 5:22 ` [PATCH v6 05/14] gtrace: Add functions to start/stop tracing on a " Mayuresh Chitale
2026-10-01 5:36 ` sashiko-bot
2026-10-01 5:22 ` Mayuresh Chitale [this message]
2026-10-01 5:34 ` [PATCH v6 06/14] gtrace: Add RISC-V Trace encoder driver sashiko-bot
2026-10-01 5:22 ` [PATCH v6 07/14] gtrace: Add function to copy into perf AUX buffer Mayuresh Chitale
2026-10-01 5:40 ` sashiko-bot
2026-10-01 5:22 ` [PATCH v6 08/14] perf: Add gtrace AUX buffer trace format type Mayuresh Chitale
2026-10-01 5:22 ` [PATCH v6 09/14] gtrace: Add RISC-V Trace ramsink driver Mayuresh Chitale
2026-10-01 5:42 ` sashiko-bot
2026-10-01 5:22 ` [PATCH v6 10/14] riscv: Enable DMA_RESTRICTED_POOL in defconfig Mayuresh Chitale
2026-10-01 5:22 ` [PATCH v6 11/14] gtrace: Add perf driver for tracing using perf tool Mayuresh Chitale
2026-10-01 5:44 ` sashiko-bot
2026-10-01 5:22 ` [PATCH v6 12/14] perf tools: Add RISC-V trace PMU record capabilities Mayuresh Chitale
2026-10-01 5:22 ` [PATCH v6 13/14] perf tools: Initial support for gtrace decoder Mayuresh Chitale
2026-10-01 5:35 ` sashiko-bot
2026-10-01 5:22 ` [PATCH v6 14/14] MAINTAINERS: Add entry for RISC-V trace framework Mayuresh Chitale
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