From: Shawn Guo <shengchao.guo@oss.qualcomm.com>
To: Bjorn Andersson <andersson@kernel.org>
Cc: Abel Vesa <abelvesa@kernel.org>, Stephen Boyd <sboyd@kernel.org>,
Brian Masney <bmasney+clk@redhat.com>,
Jerome Brunet <jbrunet+clk@baylibre.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Taniya Das <taniya.das@oss.qualcomm.com>,
Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com>,
Bryan O'Donoghue <bryan.odonoghue@linaro.org>,
Bartosz Golaszewski <brgl@kernel.org>,
linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Shawn Guo <shengchao.guo@oss.qualcomm.com>
Subject: [PATCH v2 1/4] dt-bindings: clock: qcom,sm8450-videocc: Fix clock inputs for Glymur
Date: Thu, 8 Oct 2026 16:10:33 +0800 [thread overview]
Message-ID: <20261008081036.3492003-2-shengchao.guo@oss.qualcomm.com> (raw)
In-Reply-To: <20261008081036.3492003-1-shengchao.guo@oss.qualcomm.com>
The schema describes exactly two clock inputs for every compatible it
covers, a board XO and a video AHB clock from GCC. That does not match
the video clock controller found on Glymur, Nord and SM8750.
Per the hardware documentation, the controller on these SoCs has three
clock inputs: the board XO, the always-on board XO that feeds its PLL
reference, and the 32 kHz chip sleep clock that sources its sleep clock
generator. It has no AHB clock input. The AHB clock the controller uses
for itself is generated inside the block from the XO input.
Because the schema stops at two items, the sleep clock input cannot be
described in device tree at all, and the second item is described as a
clock that is not routed into the controller.
Describe three inputs for the Glymur, Nord and SM8750 compatibles and
keep the existing two-input description for the remaining compatibles.
Assisted-by: LLM
Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
---
.../bindings/clock/qcom,sm8450-videocc.yaml | 26 ++++++++++++++++---
1 file changed, 23 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml
index e985a450451d..9bd746afbc11 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml
@@ -42,9 +42,8 @@ properties:
- qcom,x1p42100-videocc
clocks:
- items:
- - description: Board XO source
- - description: Video AHB clock from GCC
+ minItems: 2
+ maxItems: 3
power-domains:
description:
@@ -79,6 +78,27 @@ allOf:
then:
required:
- required-opps
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,glymur-videocc
+ - qcom,nord-videocc
+ - qcom,sm8750-videocc
+ then:
+ properties:
+ clocks:
+ items:
+ - description: Board XO source
+ - description: Board always-on XO source
+ - description: Sleep clock source
+ else:
+ properties:
+ clocks:
+ items:
+ - description: Board XO source
+ - description: Video AHB clock from GCC
unevaluatedProperties: false
--
2.43.0
next prev parent reply other threads:[~2026-10-08 8:10 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-08 8:10 [PATCH v2 0/4] qcom: videocc: Fix sleep clock on Glymur/SM8750/Nord Shawn Guo
2026-10-08 8:10 ` Shawn Guo [this message]
2026-10-08 19:45 ` [PATCH v2 1/4] dt-bindings: clock: qcom,sm8450-videocc: Fix clock inputs for Glymur Rob Herring (Arm)
2026-10-08 8:10 ` [PATCH v2 2/4] arm64: dts: qcom: glymur: Add videocc sleep clock Shawn Guo
2026-10-09 17:57 ` Abel Vesa
2026-10-08 8:10 ` [PATCH v2 3/4] arm64: dts: qcom: sm8750: Fix videocc clock inputs Shawn Guo
2026-10-09 19:07 ` Abel Vesa
2026-10-08 8:10 ` [PATCH v2 4/4] arm64: dts: qcom: nord: " Shawn Guo
2026-10-09 19:07 ` Abel Vesa
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