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From: Vishnu Reddy <busanna.reddy@oss.qualcomm.com>
To: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Cc: Vikash Garodia <vikash.garodia@oss.qualcomm.com>,
	Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>,
	Abhinav Kumar <abhinav.kumar@linux.dev>,
	Bryan O'Donoghue <bod@kernel.org>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Hans Verkuil <hverkuil@kernel.org>,
	Stefan Schmidt <stefan.schmidt@linaro.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Stanimir Varbanov <stanimir.varbanov@linaro.org>,
	Jorge Ramirez-Ortiz <jorge.ramirez@oss.qualcomm.com>,
	Del Regno <angelogioacchino.delregno@collabora.com>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	linux-kernel@vger.kernel.org, linux-media@vger.kernel.org,
	linux-arm-msm@vger.kernel.org, iommu@lists.linux.dev,
	Krzysztof Kozlowski <krzk@kernel.org>,
	devicetree@vger.kernel.org
Subject: Re: [PATCH v5 10/14] media: iris: Add power sequence for Glymur
Date: Thu, 14 May 2026 00:25:29 +0530	[thread overview]
Message-ID: <2b8e84ed-1f01-3936-0fd9-b5249ba5832c@oss.qualcomm.com> (raw)
In-Reply-To: <h2clkcgpr4uki3fq3kbdutsqc2h64hwf2ibtbrnjipilsnhk4u@w7645stdorq7>


On 5/13/2026 7:19 PM, Dmitry Baryshkov wrote:
> On Mon, May 11, 2026 at 09:42:01PM +0530, Vishnu Reddy wrote:
>> On 5/9/2026 2:24 AM, Dmitry Baryshkov wrote:
>>> On Sat, May 09, 2026 at 12:29:59AM +0530, Vishnu Reddy wrote:
>>>> Glymur has a secondary video codec core (vcodec1), equivalent to the
>>>> primary core (vcodec0), but with independent power domains, clocks,
>>>> and reset lines. Reuse the existing code wherever possible and add
>>>> power sequence for vcodec1.
>>>>
>>>> Reviewed-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com>
>>>> Signed-off-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com>
>>>> ---
>>>>  .../platform/qcom/iris/iris_platform_common.h      |   4 +
>>>>  drivers/media/platform/qcom/iris/iris_vpu3x.c      | 141 ++++++++++++++++++++-
>>>>  drivers/media/platform/qcom/iris/iris_vpu_common.h |   1 +
>>>>  .../platform/qcom/iris/iris_vpu_register_defines.h |  10 ++
>>>>  4 files changed, 154 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/drivers/media/platform/qcom/iris/iris_platform_common.h
>>>> index 7d59e6364e9d..8995136ad29e 100644
>>>> --- a/drivers/media/platform/qcom/iris/iris_platform_common.h
>>>> +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h
>>>> @@ -61,6 +61,9 @@ enum platform_clk_type {
>>>>  	IRIS_VPP0_HW_CLK,
>>>>  	IRIS_VPP1_HW_CLK,
>>>>  	IRIS_APV_HW_CLK,
>>>> +	IRIS_AXI_VCODEC1_CLK,
>>>> +	IRIS_VCODEC1_CLK,
>>>> +	IRIS_VCODEC1_FREERUN_CLK,
>>> I think I have asked the same question while reviewing some other code.
>>> When seeing such enums my expectation would be that the set of clocks is
>>> more or less generic, while the platform specifics should be
>>> encapsulated in platform-specific code. Instead these lists keep on
>>> growing to accomodate platform details.
>>>
>>> Can we stop that tradition? Adding a peculiarity of the platform should
>>> not require touching of the generic code.
>>>
>>>>  };
>>>>  
>>>>  struct platform_clk_data {
>>>> @@ -210,6 +213,7 @@ enum platform_pm_domain_type {
>>>>  	IRIS_VPP0_HW_POWER_DOMAIN,
>>>>  	IRIS_VPP1_HW_POWER_DOMAIN,
>>>>  	IRIS_APV_HW_POWER_DOMAIN,
>>>> +	IRIS_VCODEC1_POWER_DOMAIN,
>>>>  };
>>>>  
>>>>  struct platform_pd_data {
>>>> diff --git a/drivers/media/platform/qcom/iris/iris_vpu3x.c b/drivers/media/platform/qcom/iris/iris_vpu3x.c
>>>> index 13fbb21c2182..ff90c375e805 100644
>>>> --- a/drivers/media/platform/qcom/iris/iris_vpu3x.c
>>>> +++ b/drivers/media/platform/qcom/iris/iris_vpu3x.c
>>>> @@ -22,9 +22,19 @@ static bool iris_vpu3x_hw_power_collapsed(struct iris_core *core)
>>>>  	u32 value, pwr_status;
>>>>  
>>>>  	value = readl(core->reg_base + WRAPPER_CORE_POWER_STATUS);
>>>> -	pwr_status = value & BIT(1);
>>>> +	pwr_status = value & VCODEC0_POWER_STATUS;
>>>>  
>>>> -	return pwr_status ? false : true;
>>>> +	return !pwr_status;
>>>> +}
>>>> +
>>>> +static bool iris_vpu36_hw1_power_collapsed(struct iris_core *core)
>>>> +{
>>>> +	u32 value, pwr_status;
>>>> +
>>>> +	value = readl(core->reg_base + WRAPPER_CORE_POWER_STATUS);
>>>> +	pwr_status = value & VCODEC1_POWER_STATUS;
>>>> +
>>>> +	return !pwr_status;
>>> Add core as an argument to the function instead of c&p'ing it.
>> Ack, will pass the vcodecx_power_status bit to this function.
> u32 core, please.

core is already used as a struct iris_core * pointer in this function. I'll
use a different name like pwr_status_bit for the u32 argument instead.

>>>>  }
>>>>  
>>>>  static void iris_vpu3_power_off_hardware(struct iris_core *core)
>>>> @@ -254,6 +264,124 @@ static void iris_vpu35_power_off_hw(struct iris_core *core)
>>>>  	iris_disable_unprepare_clock(core, IRIS_AXI_VCODEC_CLK);
>>>>  }
>>>>  
>>>> +static int iris_vpu36_power_on_hw1(struct iris_core *core)
>>> Hmmm... And if 3.7 gets 4 cores, will we have 4 copies of the function?
>> As of now, none of the near upcoming targets introduce a significantly higher
>> number of cores. If that changes in the future, we can revisit and optimize it
>> then.
> Okay....
>

  reply	other threads:[~2026-05-13 18:55 UTC|newest]

Thread overview: 72+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-08 18:59 [PATCH v5 00/14] media: iris: Add support for glymur platform Vishnu Reddy
2026-05-08 18:59 ` [PATCH v5 01/14] media: iris: Add iris vpu bus support Vishnu Reddy
2026-05-08 19:16   ` Dmitry Baryshkov
2026-05-09 17:05     ` Vishnu Reddy
2026-05-08 23:20   ` sashiko-bot
2026-05-08 18:59 ` [PATCH v5 02/14] iommu: Add iris-vpu-bus to iommu_buses Vishnu Reddy
2026-05-08 19:16   ` Dmitry Baryshkov
2026-05-08 23:42   ` sashiko-bot
2026-05-13 13:09   ` Vikash Garodia
2026-05-08 18:59 ` [PATCH v5 03/14] media: iris: Fix VM count passed to firmware Vishnu Reddy
2026-05-08 19:20   ` Dmitry Baryshkov
2026-05-08 18:59 ` [PATCH v5 04/14] dt-bindings: media: qcom,venus: Remove clock, power-domain, and iommus from common schema Vishnu Reddy
2026-05-08 19:22   ` Dmitry Baryshkov
2026-05-09 17:04     ` Vishnu Reddy
2026-05-13 13:29       ` Dmitry Baryshkov
2026-05-13 18:54         ` Vishnu Reddy
2026-05-13 19:07           ` Dmitry Baryshkov
2026-05-14 14:34           ` Krzysztof Kozlowski
2026-05-08 18:59 ` [PATCH v5 05/14] dt-bindings: media: qcom,glymur-iris: Add glymur video codec Vishnu Reddy
2026-05-08 18:59 ` [PATCH v5 06/14] media: iris: Add context bank hooks for platform specific initialization Vishnu Reddy
2026-05-09  0:41   ` sashiko-bot
2026-05-08 18:59 ` [PATCH v5 07/14] media: iris: Enable Secure PAS support with IOMMU managed by Linux Vishnu Reddy
2026-05-08 19:05   ` Trilok Soni
2026-05-11  8:06     ` Mukesh Ojha
2026-05-08 20:20   ` Dmitry Baryshkov
2026-05-11  8:01     ` Mukesh Ojha
2026-05-13 13:42       ` Dmitry Baryshkov
2026-05-13 18:54         ` Vishnu Reddy
2026-05-13 19:09           ` Dmitry Baryshkov
2026-05-09  2:05   ` sashiko-bot
2026-05-08 18:59 ` [PATCH v5 08/14] media: iris: Rename clock and power domain macros to use vcodec prefix Vishnu Reddy
2026-05-08 20:22   ` Dmitry Baryshkov
2026-05-09 17:07     ` Vishnu Reddy
2026-05-13 13:47       ` Dmitry Baryshkov
2026-05-13 14:10         ` Vikash Garodia
2026-05-13 14:18           ` Dmitry Baryshkov
2026-05-14  9:15         ` Konrad Dybcio
2026-05-09  2:18   ` sashiko-bot
2026-05-08 18:59 ` [PATCH v5 09/14] media: iris: Use power domain type to look up pd_devs index Vishnu Reddy
2026-05-08 20:44   ` Dmitry Baryshkov
2026-05-09 17:02     ` Vishnu Reddy
2026-05-08 18:59 ` [PATCH v5 10/14] media: iris: Add power sequence for Glymur Vishnu Reddy
2026-05-08 20:54   ` Dmitry Baryshkov
2026-05-11 16:12     ` Vishnu Reddy
2026-05-13 13:49       ` Dmitry Baryshkov
2026-05-13 18:55         ` Vishnu Reddy [this message]
2026-05-09  2:56   ` sashiko-bot
2026-05-08 19:00 ` [PATCH v5 11/14] media: iris: Add support to select core for dual core platforms Vishnu Reddy
2026-05-08 21:00   ` Dmitry Baryshkov
2026-05-11 16:12     ` Vishnu Reddy
2026-05-13 13:51       ` Dmitry Baryshkov
2026-05-13 18:55         ` Vishnu Reddy
2026-05-13 19:10           ` Dmitry Baryshkov
2026-05-13 19:23             ` Vishnu Reddy
2026-05-13 20:51               ` Dmitry Baryshkov
2026-05-09  3:55   ` sashiko-bot
2026-05-08 19:00 ` [PATCH v5 12/14] media: iris: Add platform data for glymur Vishnu Reddy
2026-05-08 21:05   ` Dmitry Baryshkov
2026-05-11 16:15     ` Vishnu Reddy
2026-05-13 14:17       ` Dmitry Baryshkov
2026-05-13 14:30         ` Vikash Garodia
2026-05-13 16:03           ` Dmitry Baryshkov
2026-05-13 17:01             ` Vikash Garodia
2026-05-13 18:50               ` Dmitry Baryshkov
2026-05-09  4:23   ` sashiko-bot
2026-05-08 19:00 ` [PATCH v5 13/14] arm64: dts: qcom: glymur: Add iris video node Vishnu Reddy
2026-05-08 19:27   ` Dmitry Baryshkov
2026-05-09 16:56     ` Vishnu Reddy
2026-05-13 13:55       ` Dmitry Baryshkov
2026-05-13 18:56         ` Vishnu Reddy
2026-05-08 19:00 ` [PATCH v5 14/14] arm64: dts: qcom: glymur-crd: Enable iris video codec node Vishnu Reddy
2026-05-08 23:54   ` Dmitry Baryshkov

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