From: Jingyi Wang <quic_jingyw@quicinc.com>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, <quic_tengfan@quicinc.com>,
<linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
Krzysztof Kozlowski <krzk@kernel.org>
Subject: Re: [PATCH v3 2/4] arm64: defconfig: enable clock controller, interconnect and pinctrl for QCS8300
Date: Fri, 29 Nov 2024 10:20:40 +0800 [thread overview]
Message-ID: <7083653c-15c6-4971-b9ca-cd7fa02a9a75@quicinc.com> (raw)
In-Reply-To: <evzdrhzrr242ynfv6p4qhtjpgd4allzgw3osxalmtyfxzsjj2h@vingsirpf5su>
On 11/28/2024 9:12 PM, Dmitry Baryshkov wrote:
> On Thu, Nov 28, 2024 at 04:44:44PM +0800, Jingyi Wang wrote:
>> Enable clock controller, interconnect and pinctrl for Qualcomm
>> QCS8300 platform to boot to UART console.
>
> ... which is used on the ABC DEF board. The defconfig is being enabled
> for everybody, so at least let them know which board increases the size
> of the default kernel build.
>
will add that
>>
>> The serial engine depends on gcc, interconnect and pinctrl. Since
>> the serial console driver is only available as built-in, so these
>> configs needs be built-in for the UART device to probe and register
>> the console.
>>
>> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
>> Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com>
>> ---
>> arch/arm64/configs/defconfig | 3 +++
>> 1 file changed, 3 insertions(+)
>>
>> diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
>> index d13218d0c30f..3d9e48940c96 100644
>> --- a/arch/arm64/configs/defconfig
>> +++ b/arch/arm64/configs/defconfig
>> @@ -608,6 +608,7 @@ CONFIG_PINCTRL_MSM8996=y
>> CONFIG_PINCTRL_MSM8998=y
>> CONFIG_PINCTRL_QCM2290=y
>> CONFIG_PINCTRL_QCS404=y
>> +CONFIG_PINCTRL_QCS8300=y
>> CONFIG_PINCTRL_QDF2XXX=y
>> CONFIG_PINCTRL_QDU1000=y
>> CONFIG_PINCTRL_SA8775P=y
>> @@ -1327,6 +1328,7 @@ CONFIG_MSM_MMCC_8998=m
>> CONFIG_QCM_GCC_2290=y
>> CONFIG_QCM_DISPCC_2290=m
>> CONFIG_QCS_GCC_404=y
>> +CONFIG_QCS_GCC_8300=y
>> CONFIG_SC_CAMCC_7280=m
>> CONFIG_QDU_GCC_1000=y
>> CONFIG_SC_CAMCC_8280XP=m
>> @@ -1634,6 +1636,7 @@ CONFIG_INTERCONNECT_QCOM_MSM8996=y
>> CONFIG_INTERCONNECT_QCOM_OSM_L3=m
>> CONFIG_INTERCONNECT_QCOM_QCM2290=y
>> CONFIG_INTERCONNECT_QCOM_QCS404=m
>> +CONFIG_INTERCONNECT_QCOM_QCS8300=y
>> CONFIG_INTERCONNECT_QCOM_QDU1000=y
>> CONFIG_INTERCONNECT_QCOM_SA8775P=y
>> CONFIG_INTERCONNECT_QCOM_SC7180=y
>>
>> --
>> 2.25.1
>>
>
Thanks,
Jingyi
next prev parent reply other threads:[~2024-11-29 2:20 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-28 8:44 [PATCH v3 0/4] Add initial support for QCS8300 SoC and QCS8300 RIDE board Jingyi Wang
2024-11-28 8:44 ` [PATCH v3 1/4] dt-bindings: arm: qcom: document QCS8300 SoC and reference board Jingyi Wang
2024-11-28 8:44 ` [PATCH v3 2/4] arm64: defconfig: enable clock controller, interconnect and pinctrl for QCS8300 Jingyi Wang
2024-11-28 13:12 ` Dmitry Baryshkov
2024-11-29 2:20 ` Jingyi Wang [this message]
2024-11-28 8:44 ` [PATCH v3 3/4] arm64: dts: qcom: add QCS8300 platform Jingyi Wang
2024-11-28 20:14 ` Konrad Dybcio
2024-12-02 9:54 ` Xin Liu
2024-12-02 10:00 ` Jingyi Wang
2024-11-28 8:44 ` [PATCH v3 4/4] arm64: dts: qcom: add base QCS8300 RIDE board Jingyi Wang
2024-11-28 13:29 ` Dmitry Baryshkov
2024-11-29 3:13 ` Tingwei Zhang
2024-11-30 1:46 ` Dmitry Baryshkov
2024-11-28 16:49 ` Andrew Lunn
2024-11-28 17:40 ` Krzysztof Kozlowski
2024-11-29 2:18 ` Jingyi Wang
2024-11-29 2:18 ` Jingyi Wang
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