Devicetree
 help / color / mirror / Atom feed
From: Marc Zyngier <maz@kernel.org>
To: sashiko-reviews@lists.linux.dev
Cc: robh@kernel.org, devicetree@vger.kernel.org, krzk+dt@kernel.org,
	conor+dt@kernel.org
Subject: Re: [PATCH v2 13/17] arm64: dts: qcom: Add EL2 virtual timer interrupt
Date: Fri, 15 May 2026 09:24:28 +0100	[thread overview]
Message-ID: <87se7t9j2b.wl-maz@kernel.org> (raw)
In-Reply-To: <20260514230629.34892C2BCB3@smtp.kernel.org>

On Fri, 15 May 2026 00:06:26 +0100,
sashiko-bot@kernel.org wrote:
> 
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [Medium] The commit message claims to add the EL2 virtual timer interrupt, but for `sdx75.dtsi` and `milos.dtsi` it actually adds the EL2 physical timer interrupt (`GIC_PPI 10`).
> --
> 
> commit 3f4b80b2c0c05477bcee12a9ba5b2e0a5b15a672
> Author: Marc Zyngier <maz@kernel.org>
> 
> arm64: dts: qcom: Add EL2 virtual timer interrupt
> 
> This commit adds the missing EL2 virtual timer interrupt to the timer nodes
> across multiple Qualcomm SoC device trees.
> 
> > arm64: dts: qcom: Add EL2 virtual timer interrupt
> > 
> > The ARMv8.1+ based CPUs used in a number of Qualcomm SoCs are missing
> > the EL2 virtual timer interrupt. Add it.
> 
> Is this description entirely accurate?
> 
> The commit message explicitly states it adds the missing EL2 virtual timer
> interrupt, but it appears to also add the EL2 physical timer interrupt in
> a couple of files where the virtual timer was already present.
> 
> [ ... ]
> 
> > diff --git a/arch/arm64/boot/dts/qcom/milos.dtsi b/arch/arm64/boot/dts/qcom/milos.dtsi
> > index 4a64a98a434b6..b991124b8ce9f 100644
> > --- a/arch/arm64/boot/dts/qcom/milos.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/milos.dtsi
> > @@ -3235,6 +3235,7 @@ timer {
> >  		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0>,
> >  			     <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0>,
> >  			     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW 0>,
> > +			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW 0>,
> >  			     <GIC_PPI 12 IRQ_TYPE_LEVEL_LOW 0>;
> >  	};
> >  };
> 
> Does this inadvertently add the EL2 physical timer instead of the virtual
> timer?
> 
> The virtual timer (GIC_PPI 12) is already present here, and this addition
> is for GIC_PPI 10.
> 
> [ ... ]
> 
> > diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom/sdx75.dtsi
> > index d1b61530b562f..b6cdf71051026 100644
> > --- a/arch/arm64/boot/dts/qcom/sdx75.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sdx75.dtsi
> > @@ -1583,6 +1583,7 @@ timer {
> >  		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
> >  			     <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
> >  			     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
> > +			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>,
> >  			     <GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>;
> >  	};
> >  };
> 
> Similarly, could the commit message be updated to mention this fix, or
> should this physical timer addition be split into a separate patch?

These hunks were not supposed to be there, and were intended as a
separate fix (though I suspect these machines have never booted Linux
at EL2...).

I'll drop that from the next round.

	M.

-- 
Jazz isn't dead. It just smells funny.

  reply	other threads:[~2026-05-15  8:21 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-14 15:09 [PATCH v2 00/17] arm64: Use EL2 virtual timer when running VHE Marc Zyngier
2026-05-14 15:09 ` [PATCH v2 01/17] ACPI: GTDT: Account for GTDTv3 size when walking the platform timer descriptors Marc Zyngier
2026-05-14 19:54   ` sashiko-bot
2026-05-15  9:51   ` Sudeep Holla
2026-05-14 15:09 ` [PATCH v2 02/17] ACPI: GTDT: Parse information related to the EL2 virtual timer Marc Zyngier
2026-05-14 15:09 ` [PATCH v2 03/17] clocksource/drivers/arm_arch_timer: Default to EL2 virtual timer when running VHE Marc Zyngier
2026-05-14 21:23   ` sashiko-bot
2026-05-15  8:30     ` Marc Zyngier
2026-05-14 15:09 ` [PATCH v2 04/17] dt-bindings: timer: arm,arch_timer: Fix requirements for interrupt description Marc Zyngier
2026-05-14 21:37   ` sashiko-bot
2026-05-15  9:18     ` Marc Zyngier
2026-05-14 15:09 ` [PATCH v2 05/17] arm64: dts: allwinner: Add EL2 virtual timer interrupt Marc Zyngier
2026-05-14 15:09 ` [PATCH v2 06/17] arm64: dts: amlogic: " Marc Zyngier
2026-05-14 15:09 ` [PATCH v2 07/17] arm64: dts: bst: " Marc Zyngier
2026-05-14 15:09 ` [PATCH v2 08/17] arm64: dts: exynos: " Marc Zyngier
2026-05-14 15:09 ` [PATCH v2 09/17] arm64: dts: freescale: " Marc Zyngier
2026-05-14 15:09 ` [PATCH v2 10/17] arm64: dts: intel: " Marc Zyngier
2026-05-14 15:09 ` [PATCH v2 11/17] arm64: dts: mediatek: " Marc Zyngier
2026-05-14 15:09 ` [PATCH v2 12/17] arm64: dts: nvidia: " Marc Zyngier
2026-05-14 15:09 ` [PATCH v2 13/17] arm64: dts: qcom: " Marc Zyngier
2026-05-14 23:06   ` sashiko-bot
2026-05-15  8:24     ` Marc Zyngier [this message]
2026-05-14 15:09 ` [PATCH v2 14/17] arm64: dts: realtek: " Marc Zyngier
2026-05-14 23:18   ` sashiko-bot
2026-05-15  8:23     ` Marc Zyngier
2026-05-14 15:09 ` [PATCH v2 15/17] arm64: dts: rockchip: " Marc Zyngier
2026-05-14 15:09 ` [PATCH v2 16/17] arm64: dts: sprd: " Marc Zyngier
2026-05-14 15:09 ` [PATCH v2 17/17] arm64: dts: xilinx: " Marc Zyngier

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=87se7t9j2b.wl-maz@kernel.org \
    --to=maz@kernel.org \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=krzk+dt@kernel.org \
    --cc=robh@kernel.org \
    --cc=sashiko-reviews@lists.linux.dev \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox