[PATCH] ARM: dts: BCM5301X: drop extra AXI bus ranges that break PCIe

[PATCH] ARM: dts: BCM5301X: drop extra AXI bus ranges that break PCIe

[Rosen Penev]

These addresses overlap with DRAM on BCM5301X/BCM470X SoCs, causing the OF
address translation code to route PCIe MMIO accesses through the AXI bus
space instead of directly to memory, breaking PCIe. Remove the extra
ranges to restore the original single-entry mapping that only covers the
AXI peripheral register space.

Assisted-by: opencode:big-pickle
Fixes: 767012397976 ("ARM: dts: BCM5301X: Describe PCIe controllers fully")
Signed-off-by: Rosen Penev <rosenp@gmail.com>
---
 arch/arm/boot/dts/broadcom/bcm-ns.dtsi | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/broadcom/bcm-ns.dtsi b/arch/arm/boot/dts/broadcom/bcm-ns.dtsi
index bd52de0faa3e..27a97c8122de 100644
--- a/arch/arm/boot/dts/broadcom/bcm-ns.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm-ns.dtsi
@@ -95,10 +95,7 @@ L2: cache-controller@22000 {
 	axi@18000000 {
 		compatible = "brcm,bus-axi";
 		reg = <0x18000000 0x1000>;
-		ranges = <0x00000000 0x18000000 0x00100000>,
-			 <0x08000000 0x08000000 0x08000000>,
-			 <0x20000000 0x20000000 0x08000000>,
-			 <0x28000000 0x28000000 0x08000000>;
+		ranges = <0x00000000 0x18000000 0x00100000>;
 		#address-cells = <1>;
 		#size-cells = <1>;
 
-- 
2.54.0

Re: [PATCH] ARM: dts: BCM5301X: drop extra AXI bus ranges that break PCIe

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Removing the PCI memory ranges from the parent `axi@18000000` bus breaks outbound PCIe memory mapping because the child `pcie` nodes can no longer translate their addresses to CPU physical addresses.
--

commit 4f061464281d4964ce46dab60d36a09328f14862
Author: Rosen Penev <rosenp@gmail.com>

ARM: dts: BCM5301X: drop extra AXI bus ranges that break PCIe

This commit removes extra AXI bus ranges that overlap with DRAM on
BCM5301X/BCM470X SoCs. The intention is to restore the original
single-entry mapping and fix PCIe routing issues.

> diff --git a/arch/arm/boot/dts/broadcom/bcm-ns.dtsi b/arch/arm/boot/dts/broadcom/bcm-ns.dtsi
> index 392a257136696..a1062245e5a01 100644
> --- a/arch/arm/boot/dts/broadcom/bcm-ns.dtsi
> +++ b/arch/arm/boot/dts/broadcom/bcm-ns.dtsi
> @@ -95,10 +95,7 @@ L2: cache-controller@22000 {
>  	axi@18000000 {
>  		compatible = "brcm,bus-axi";
>  		reg = <0x18000000 0x1000>;
> -		ranges = <0x00000000 0x18000000 0x00100000>,
> -			 <0x08000000 0x08000000 0x08000000>,
> -			 <0x20000000 0x20000000 0x08000000>,
> -			 <0x28000000 0x28000000 0x08000000>;
> +		ranges = <0x00000000 0x18000000 0x00100000>;

[Severity: High]
Does removing these PCI memory ranges from the parent axi@18000000 bus break
outbound PCIe memory mapping?

During system boot, when the PCI core calls
devm_of_pci_get_host_bridge_resources() to parse the pcie child node's ranges
property, it translates the PCI memory addresses to CPU physical addresses using
of_translate_address().

Since the pcie nodes are children of the axi@18000000 bus, the translation
must pass through the parent's ranges property. Without the mappings for
0x08000000, 0x20000000, and 0x28000000, the translation fails.

This would cause the PCI core to drop these memory windows, resulting in
pci_assign_unassigned_root_bus_resources() failing to allocate memory BARs,
and endpoint drivers failing at pci_enable_device_mem().

>  		#address-cells = <1>;
>  		#size-cells = <1>;

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260628231156.1254012-1-rosenp@gmail.com?part=1

Re: [PATCH] ARM: dts: BCM5301X: drop extra AXI bus ranges that break PCIe

[Rosen Penev]

On Sun, Jun 28, 2026 at 4:27 PM <sashiko-bot@kernel.org> wrote:
>
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [High] Removing the PCI memory ranges from the parent `axi@18000000` bus breaks outbound PCIe memory mapping because the child `pcie` nodes can no longer translate their addresses to CPU physical addresses.
> --
>
> commit 4f061464281d4964ce46dab60d36a09328f14862
> Author: Rosen Penev <rosenp@gmail.com>
>
> ARM: dts: BCM5301X: drop extra AXI bus ranges that break PCIe
>
> This commit removes extra AXI bus ranges that overlap with DRAM on
> BCM5301X/BCM470X SoCs. The intention is to restore the original
> single-entry mapping and fix PCIe routing issues.
>
> > diff --git a/arch/arm/boot/dts/broadcom/bcm-ns.dtsi b/arch/arm/boot/dts/broadcom/bcm-ns.dtsi
> > index 392a257136696..a1062245e5a01 100644
> > --- a/arch/arm/boot/dts/broadcom/bcm-ns.dtsi
> > +++ b/arch/arm/boot/dts/broadcom/bcm-ns.dtsi
> > @@ -95,10 +95,7 @@ L2: cache-controller@22000 {
> >       axi@18000000 {
> >               compatible = "brcm,bus-axi";
> >               reg = <0x18000000 0x1000>;
> > -             ranges = <0x00000000 0x18000000 0x00100000>,
> > -                      <0x08000000 0x08000000 0x08000000>,
> > -                      <0x20000000 0x20000000 0x08000000>,
> > -                      <0x28000000 0x28000000 0x08000000>;
> > +             ranges = <0x00000000 0x18000000 0x00100000>;
>
> [Severity: High]
> Does removing these PCI memory ranges from the parent axi@18000000 bus break
> outbound PCIe memory mapping?
>
> During system boot, when the PCI core calls
> devm_of_pci_get_host_bridge_resources() to parse the pcie child node's ranges
> property, it translates the PCI memory addresses to CPU physical addresses using
> of_translate_address().
>
> Since the pcie nodes are children of the axi@18000000 bus, the translation
> must pass through the parent's ranges property. Without the mappings for
> 0x08000000, 0x20000000, and 0x28000000, the translation fails.
>
> This would cause the PCI core to drop these memory windows, resulting in
> pci_assign_unassigned_root_bus_resources() failing to allocate memory BARs,
> and endpoint drivers failing at pci_enable_device_mem().
Different AI says:

The review's analysis is wrong because it assumes PCI MMIO windows at
these addresses must translate successfully to be usable. Here's why
the commit actually fixes things:
The problem was that the translation succeeded.
On BCM5301X, 0x08000000, 0x20000000, and 0x28000000 are DRAM
addresses, not PCIe MMIO space. The old AXI bus ranges created 1:1
mappings for these addresses, so of_translate_address() returned them
as-is. The PCI core registered valid-looking resources pointing at
DRAM — MMIO accesses went to memory instead of the PCI bus, corrupting
data.
With need_ob_cfg = false (no brcm,pcie-ob in bcm-ns.dtsi),
iproc_pcie_map_ranges() is never called. The bootloader has already
configured the PCIe controller's outbound windows correctly. By
removing the extra AXI bus ranges, of_translate_address() fails, those
bogus resources are skipped (the OF_BAD_ADDR check at
drivers/pci/of.c:377), and the kernel stops registering DRAM addresses
as PCI MMIO windows. The hardware continues working with its
pre-configured outbound windows.
So the review's objection at https://lore.kernel.org/all/... is
incorrect — the translation was producing wrong resources, and the fix
is to stop producing them.
>
> >               #address-cells = <1>;
> >               #size-cells = <1>;
>
> --
> Sashiko AI review · https://sashiko.dev/#/patchset/20260628231156.1254012-1-rosenp@gmail.com?part=1

Re: [PATCH] ARM: dts: BCM5301X: drop extra AXI bus ranges that break PCIe

[Florian Fainelli]

From: Florian Fainelli <f.fainelli@gmail.com>

On Sun, 28 Jun 2026 16:11:56 -0700, Rosen Penev <rosenp@gmail.com> wrote:
> These addresses overlap with DRAM on BCM5301X/BCM470X SoCs, causing the OF
> address translation code to route PCIe MMIO accesses through the AXI bus
> space instead of directly to memory, breaking PCIe. Remove the extra
> ranges to restore the original single-entry mapping that only covers the
> AXI peripheral register space.
> 
> Assisted-by: opencode:big-pickle
> Fixes: 767012397976 ("ARM: dts: BCM5301X: Describe PCIe controllers fully")
> Signed-off-by: Rosen Penev <rosenp@gmail.com>
> ---

Applied to https://github.com/Broadcom/stblinux/commits/devicetree/fixes, thanks!
--
Florian

Re: [PATCH] ARM: dts: BCM5301X: drop extra AXI bus ranges that break PCIe

[Arnd Bergmann]

I saw this in the fixes pull request, and the descriptions
below don't make much sense to me. I'll hold off on the pull
request until someone can come up with a fix that they
can accurately describe.

On Sat, Jul 4, 2026, at 00:17, Rosen Penev wrote:
> On Sun, Jun 28, 2026 at 4:27 PM <sashiko-bot@kernel.org> wrote:
>>
>> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
>> - [High] Removing the PCI memory ranges from the parent `axi@18000000` bus breaks outbound PCIe memory mapping because the child `pcie` nodes can no longer translate their addresses to CPU physical addresses.

This makes sense to me, but doesn't explain what caused
the observed bug

>> commit 4f061464281d4964ce46dab60d36a09328f14862
>> Author: Rosen Penev <rosenp@gmail.com>
>>
>> ARM: dts: BCM5301X: drop extra AXI bus ranges that break PCIe
>>
>> This commit removes extra AXI bus ranges that overlap with DRAM on
>> BCM5301X/BCM470X SoCs. The intention is to restore the original
>> single-entry mapping and fix PCIe routing issues.

The DRAM ranges on this chip are at 0x00000000 and 0x88000000
and don't overlap with the axi bus ranges at
0x18000000/0x08000000/0x20000000/0x28000000, so the initial
analysis is wrong.

> With need_ob_cfg = false (no brcm,pcie-ob in bcm-ns.dtsi),
> iproc_pcie_map_ranges() is never called. The bootloader has already
> configured the PCIe controller's outbound windows correctly. By
> removing the extra AXI bus ranges, of_translate_address() fails, those
> bogus resources are skipped (the OF_BAD_ADDR check at
> drivers/pci/of.c:377), and the kernel stops registering DRAM addresses
> as PCI MMIO windows. The hardware continues working with its
> pre-configured outbound windows.

This sounds like the bootloader configured ranges don't
match the ones in the devicetree description, which would
leave three options:

- change the bootloader to match the dts
- change the dts to match the bootloader
- change the driver to reconfigure the windows according to DT

Can you check how the OB windows are actually configured
by the bootloader on your board?

      Arnd

Re: [PATCH] ARM: dts: BCM5301X: drop extra AXI bus ranges that break PCIe

[Rosen Penev]

On Wed, Jul 29, 2026 at 8:40 AM Arnd Bergmann <arnd@arndb.de> wrote:
>
> I saw this in the fixes pull request, and the descriptions
> below don't make much sense to me. I'll hold off on the pull
> request until someone can come up with a fix that they
> can accurately describe.
>
> On Sat, Jul 4, 2026, at 00:17, Rosen Penev wrote:
> > On Sun, Jun 28, 2026 at 4:27 PM <sashiko-bot@kernel.org> wrote:
> >>
> >> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> >> - [High] Removing the PCI memory ranges from the parent `axi@18000000` bus breaks outbound PCIe memory mapping because the child `pcie` nodes can no longer translate their addresses to CPU physical addresses.
>
> This makes sense to me, but doesn't explain what caused
> the observed bug
>
> >> commit 4f061464281d4964ce46dab60d36a09328f14862
> >> Author: Rosen Penev <rosenp@gmail.com>
> >>
> >> ARM: dts: BCM5301X: drop extra AXI bus ranges that break PCIe
This patch can be dropped.

https://lore.kernel.org/all/20260727140939.389-1-strst.gs@gmail.com/

is the proper solution to the problem.
> >>
> >> This commit removes extra AXI bus ranges that overlap with DRAM on
> >> BCM5301X/BCM470X SoCs. The intention is to restore the original
> >> single-entry mapping and fix PCIe routing issues.
>
> The DRAM ranges on this chip are at 0x00000000 and 0x88000000
> and don't overlap with the axi bus ranges at
> 0x18000000/0x08000000/0x20000000/0x28000000, so the initial
> analysis is wrong.
>
> > With need_ob_cfg = false (no brcm,pcie-ob in bcm-ns.dtsi),
> > iproc_pcie_map_ranges() is never called. The bootloader has already
> > configured the PCIe controller's outbound windows correctly. By
> > removing the extra AXI bus ranges, of_translate_address() fails, those
> > bogus resources are skipped (the OF_BAD_ADDR check at
> > drivers/pci/of.c:377), and the kernel stops registering DRAM addresses
> > as PCI MMIO windows. The hardware continues working with its
> > pre-configured outbound windows.
>
> This sounds like the bootloader configured ranges don't
> match the ones in the devicetree description, which would
> leave three options:
>
> - change the bootloader to match the dts
> - change the dts to match the bootloader
> - change the driver to reconfigure the windows according to DT
>
> Can you check how the OB windows are actually configured
> by the bootloader on your board?
>
>       Arnd

Re: [PATCH] ARM: dts: BCM5301X: drop extra AXI bus ranges that break PCIe

[Arnd Bergmann]

On Wed, Jul 29, 2026, at 20:13, Rosen Penev wrote:
> On Wed, Jul 29, 2026 at 8:40 AM Arnd Bergmann <arnd@arndb.de> wrote:

>>
>> >> commit 4f061464281d4964ce46dab60d36a09328f14862
>> >> Author: Rosen Penev <rosenp@gmail.com>
>> >>
>> >> ARM: dts: BCM5301X: drop extra AXI bus ranges that break PCIe
> This patch can be dropped.
>
> https://lore.kernel.org/all/20260727140939.389-1-strst.gs@gmail.com/
>
> is the proper solution to the problem.

Right, that looks a lot better, at least as a hotfix. Could you
respin that one to print a warning in the loop for every bridge
window that is not bdev->addr_s[0]? That way we can also fix
up the DT to have the correct data, which at the minimum helps
avoid nonsense but may also be needed to avoid future problems.

      Arnd

Re: [PATCH] ARM: dts: BCM5301X: drop extra AXI bus ranges that break PCIe

[Rosen Penev]

On Wed, Jul 29, 2026 at 12:31 PM Arnd Bergmann <arnd@arndb.de> wrote:
>
> On Wed, Jul 29, 2026, at 20:13, Rosen Penev wrote:
> > On Wed, Jul 29, 2026 at 8:40 AM Arnd Bergmann <arnd@arndb.de> wrote:
>
> >>
> >> >> commit 4f061464281d4964ce46dab60d36a09328f14862
> >> >> Author: Rosen Penev <rosenp@gmail.com>
> >> >>
> >> >> ARM: dts: BCM5301X: drop extra AXI bus ranges that break PCIe
> > This patch can be dropped.
> >
> > https://lore.kernel.org/all/20260727140939.389-1-strst.gs@gmail.com/
> >
> > is the proper solution to the problem.
>
> Right, that looks a lot better, at least as a hotfix. Could you
> respin that one to print a warning in the loop for every bridge
> window that is not bdev->addr_s[0]? That way we can also fix
> up the DT to have the correct data, which at the minimum helps
> avoid nonsense but may also be needed to avoid future problems.
Not my patch.

That patch effectively ignores values in dts. Needed because of bcm drivers.
>
>       Arnd

Re: [PATCH] ARM: dts: BCM5301X: drop extra AXI bus ranges that break PCIe

[Arnd Bergmann]

On Wed, Jul 29, 2026, at 22:26, Rosen Penev wrote:
> On Wed, Jul 29, 2026 at 12:31 PM Arnd Bergmann <arnd@arndb.de> wrote:
>> On Wed, Jul 29, 2026, at 20:13, Rosen Penev wrote:
>> > On Wed, Jul 29, 2026 at 8:40 AM Arnd Bergmann <arnd@arndb.de> wrote:
>> >> >> commit 4f061464281d4964ce46dab60d36a09328f14862
>> >> >> Author: Rosen Penev <rosenp@gmail.com>
>> >> >>
>> >> >> ARM: dts: BCM5301X: drop extra AXI bus ranges that break PCIe
>> > This patch can be dropped.
>> >
>> > https://lore.kernel.org/all/20260727140939.389-1-strst.gs@gmail.com/
>> >
>> > is the proper solution to the problem.
>>
>> Right, that looks a lot better, at least as a hotfix. Could you
>> respin that one to print a warning in the loop for every bridge
>> window that is not bdev->addr_s[0]? That way we can also fix
>> up the DT to have the correct data, which at the minimum helps
>> avoid nonsense but may also be needed to avoid future problems.
> Not my patch.

Ah, my mistake

> That patch effectively ignores values in dts. Needed because of bcm drivers.

Sure, but my point is that it fixes a regression introduced by
767012397976 ("ARM: dts: BCM5301X: Describe PCIe controllers fully"),
which tried to address a warning about missing ranges in dts.

As far as I can tell, the patch worked correctly on the
platforms that had the right windows set (presumably bcm47094/ac56u)
but failed when the information was wrong.

Having addressed the build time warning of course is an improvement,
but I would argue that actually having incorrect information is
worse here, even if the information is ignored in the end.

       Arnd

Re: [PATCH] ARM: dts: BCM5301X: drop extra AXI bus ranges that break PCIe

[Rosen Penev]

On Wed, Jul 29, 2026 at 1:43 PM Arnd Bergmann <arnd@arndb.de> wrote:
>
> On Wed, Jul 29, 2026, at 22:26, Rosen Penev wrote:
> > On Wed, Jul 29, 2026 at 12:31 PM Arnd Bergmann <arnd@arndb.de> wrote:
> >> On Wed, Jul 29, 2026, at 20:13, Rosen Penev wrote:
> >> > On Wed, Jul 29, 2026 at 8:40 AM Arnd Bergmann <arnd@arndb.de> wrote:
> >> >> >> commit 4f061464281d4964ce46dab60d36a09328f14862
> >> >> >> Author: Rosen Penev <rosenp@gmail.com>
> >> >> >>
> >> >> >> ARM: dts: BCM5301X: drop extra AXI bus ranges that break PCIe
> >> > This patch can be dropped.
> >> >
> >> > https://lore.kernel.org/all/20260727140939.389-1-strst.gs@gmail.com/
> >> >
> >> > is the proper solution to the problem.
> >>
> >> Right, that looks a lot better, at least as a hotfix. Could you
> >> respin that one to print a warning in the loop for every bridge
> >> window that is not bdev->addr_s[0]? That way we can also fix
> >> up the DT to have the correct data, which at the minimum helps
> >> avoid nonsense but may also be needed to avoid future problems.
> > Not my patch.
>
> Ah, my mistake
>
> > That patch effectively ignores values in dts. Needed because of bcm drivers.
>
> Sure, but my point is that it fixes a regression introduced by
> 767012397976 ("ARM: dts: BCM5301X: Describe PCIe controllers fully"),
> which tried to address a warning about missing ranges in dts.
>
> As far as I can tell, the patch worked correctly on the
> platforms that had the right windows set (presumably bcm47094/ac56u)
> but failed when the information was wrong.
Not quite. Full information here: https://github.com/openwrt/openwrt/pull/24415

TL;DR: fails on both platforms for different reasons.

I have no idea how 767012397976 was tested. Maybe without a broadcom wifi card.
>
> Having addressed the build time warning of course is an improvement,
> but I would argue that actually having incorrect information is
> worse here, even if the information is ignored in the end.
>
>        Arnd

Re: [PATCH] ARM: dts: BCM5301X: drop extra AXI bus ranges that break PCIe

[Arnd Bergmann]

On Wed, Jul 29, 2026, at 22:55, Rosen Penev wrote:
> On Wed, Jul 29, 2026 at 1:43 PM Arnd Bergmann <arnd@arndb.de> wrote:
>> On Wed, Jul 29, 2026, at 22:26, Rosen Penev wrote:
>> > On Wed, Jul 29, 2026 at 12:31 PM Arnd Bergmann <arnd@arndb.de> wrote:
>>
>> Sure, but my point is that it fixes a regression introduced by
>> 767012397976 ("ARM: dts: BCM5301X: Describe PCIe controllers fully"),
>> which tried to address a warning about missing ranges in dts.
>>
>> As far as I can tell, the patch worked correctly on the
>> platforms that had the right windows set (presumably bcm47094/ac56u)
>> but failed when the information was wrong.
> Not quite. Full information here: https://github.com/openwrt/openwrt/pull/24415
>
> TL;DR: fails on both platforms for different reasons.

Right, but the pci host bridge driver patch does address the case
where the dts file describes the correct window, by just using the
the window from ROM as before, but it now silently ignores incorrect
DT data, which is probably worse than failing the boot, since that
makes it harder to debug when it goes wrong the next time.

I can see multiple options for addressing this:

- add a warning for any incorrect dtb and fix up the dts source
  data by board

- add a warning for any incorrect dtb and fix up the windows
  in the boot loader on the live dtb that gets passed to the
  kernel.
  
- assume the dts is correct and reprogram the outbound windows
  (assuming there is a register level interface for that), ignoring
  the ROM data

- revert the 767012397976 ("ARM: dts: BCM5301X: Describe PCIe
  controllers fully") patch and add an exception to the pci
  host bridge binding so that this controller does not need
  to describe the windows

     Arnd

Re: [PATCH] ARM: dts: BCM5301X: drop extra AXI bus ranges that break PCIe

[Rafał Miłecki]

W dniu 29.06.2026 o 01:11, Rosen Penev pisze:
> These addresses overlap with DRAM on BCM5301X/BCM470X SoCs, causing the OF
> address translation code to route PCIe MMIO accesses through the AXI bus
> space instead of directly to memory, breaking PCIe. Remove the extra
> ranges to restore the original single-entry mapping that only covers the
> AXI peripheral register space.

This seems to make PCIe state worse for me. For testing / debugging
purposes I used patch as below in this e-mail.

1. Without this change and with CONFIG_PCIE_IPROC_BCMA:
[    6.077054] pcie_iproc_bcma bcma0:7: mem resource: [bus 00-ff]
[    6.082908] pcie_iproc_bcma bcma0:7: mem resource: [mem 0x08000000-0x0fffffff]
[    6.440537] pcie_iproc_bcma bcma0:8: mem resource: [bus 00-ff]
[    6.446410] pcie_iproc_bcma bcma0:8: mem resource: [mem 0x20000000-0x27ffffff]
[    6.810388] pcie_iproc_bcma bcma0:9: mem resource: [bus 00-ff]
[    6.816261] pcie_iproc_bcma bcma0:9: mem resource: [mem 0x28000000-0x2fffffff]
(PCIe & BCM4366 work perfectly)

2. Without this change and with CONFIG_PCIE_IPROC_PLATFORM:
[    5.947182] iproc-pcie 18012000.pcie: mem resource: [bus 00-ff]
[    5.953123] iproc-pcie 18012000.pcie: mem resource: [mem 0x08000000-0x0fffffff]
[    6.311082] iproc-pcie 18013000.pcie: mem resource: [bus 00-ff]
[    6.317045] iproc-pcie 18013000.pcie: mem resource: [mem 0x20000000-0x27ffffff]
[    6.680915] iproc-pcie 18014000.pcie: mem resource: [bus 00-ff]
[    6.686880] iproc-pcie 18014000.pcie: mem resource: [mem 0x28000000-0x2fffffff]
(PCIe seems OK, BCM4366 seems to timeout with brcmfmac but probing happens)

3. With this change and CONFIG_PCIE_IPROC_PLATFORM:
[    5.976228] iproc-pcie 18012000.pcie: mem resource: [bus 00-ff]
[    6.339603] iproc-pcie 18013000.pcie: mem resource: [bus 00-ff]
[    6.709426] iproc-pcie 18014000.pcie: mem resource: [bus 00-ff]
(PCIe setup fails, brcmfmac fails in probe early)

Did you actualy test this PATCH? What device did you use? Do PCIe
device(s) work for you with this change?


*** *** ***


Full logs below:

1. Without this change and with CONFIG_PCIE_IPROC_BCMA:
[    6.061340] pcie_iproc_bcma bcma0:7: host bridge /axi@18000000/pcie@12000 ranges:
[    6.068910] pcie_iproc_bcma bcma0:7:      MEM 0x0008000000..0x000fffffff -> 0x0008000000
[    6.077054] pcie_iproc_bcma bcma0:7: mem resource: [bus 00-ff]
[    6.082908] pcie_iproc_bcma bcma0:7: mem resource: [mem 0x08000000-0x0fffffff]
[    6.203892] pcie_iproc_bcma bcma0:7: link: UP
[    6.208476] pcie_iproc_bcma bcma0:7: PCI host bridge to bus 0000:00
[    6.214794] pci_bus 0000:00: root bus resource [bus 00-ff]
[    6.220302] pci_bus 0000:00: root bus resource [mem 0x08000000-0x0fffffff]
[    6.227219] pci_bus 0000:00: 2-byte config write to 0000:00:00.0 offset 0xc8 may corrupt adjacent RW1C bits
[    6.237032] pci 0000:00:00.0: [14e4:d612] type 01 class 0x060400 PCIe Root Port
[    6.244383] pci 0000:00:00.0: PCI bridge to [bus 00]
[    6.249366] pci 0000:00:00.0:   bridge window [mem 0x00000000-0x000fffff]
[    6.256182] pci 0000:00:00.0:   bridge window [mem 0x00000000-0x000fffff 64bit pref]
[    6.263984] pci 0000:00:00.0: PME# supported from D0 D3hot D3cold
[    6.270824] PCI: bus0: Fast back to back transfers disabled
[    6.276453] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    6.284641] pci 0000:01:00.0: [14e4:4365] type 00 class 0x028000 PCIe Endpoint
[    6.291894] pci_bus 0000:01: 2-byte config write to 0000:01:00.0 offset 0x4 may corrupt adjacent RW1C bits
[    6.301602] pci 0000:01:00.0: BAR 0 [mem 0x00000000-0x00007fff 64bit]
[    6.308081] pci 0000:01:00.0: BAR 2 [mem 0x00000000-0x007fffff 64bit]
[    6.314552] pci 0000:01:00.0: BAR 4 [mem 0x00000000-0x000fffff 64bit pref]
[    6.321549] pci 0000:01:00.0: supports D1 D2
[    6.326066] PCI: bus1: Fast back to back transfers disabled
[    6.331664] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01
[    6.338339] pci 0000:00:00.0: bridge window [mem 0x08000000-0x08bfffff]: assigned
[    6.345858] pci 0000:00:00.0: bridge window [mem 0x08c00000-0x08cfffff 64bit pref]: assigned
[    6.354325] pci 0000:01:00.0: BAR 2 [mem 0x08000000-0x087fffff 64bit]: assigned
[    6.361664] pci 0000:01:00.0: BAR 4 [mem 0x08c00000-0x08cfffff 64bit pref]: assigned
[    6.369443] pci 0000:01:00.0: BAR 0 [mem 0x08800000-0x08807fff 64bit]: assigned
[    6.376785] pci 0000:00:00.0: PCI bridge to [bus 01]
[    6.381761] pci 0000:00:00.0:   bridge window [mem 0x08000000-0x08bfffff]
[    6.388576] pci 0000:00:00.0:   bridge window [mem 0x08c00000-0x08cfffff 64bit pref]
[    6.396346] pci_bus 0000:00: resource 4 [mem 0x08000000-0x0fffffff]
[    6.402632] pci_bus 0000:01: resource 1 [mem 0x08000000-0x08bfffff]
[    6.408921] pci_bus 0000:01: resource 2 [mem 0x08c00000-0x08cfffff 64bit pref]
[    6.416490] pci 0000:00:00.0: 4.000 Gb/s available PCIe bandwidth (5.0 GT/s PCIe x1 link)
[    6.424849] pcie_iproc_bcma bcma0:8: host bridge /axi@18000000/pcie@13000 ranges:
[    6.432384] pcie_iproc_bcma bcma0:8:      MEM 0x0020000000..0x0027ffffff -> 0x0020000000
[    6.440537] pcie_iproc_bcma bcma0:8: mem resource: [bus 00-ff]
[    6.446410] pcie_iproc_bcma bcma0:8: mem resource: [mem 0x20000000-0x27ffffff]
[    6.573857] pcie_iproc_bcma bcma0:8: link: UP
[    6.578343] pcie_iproc_bcma bcma0:8: PCI host bridge to bus 0001:00
[    6.584658] pci_bus 0001:00: root bus resource [bus 00-ff]
[    6.590169] pci_bus 0001:00: root bus resource [mem 0x20000000-0x27ffffff]
[    6.597084] pci_bus 0001:00: 2-byte config write to 0001:00:00.0 offset 0xc8 may corrupt adjacent RW1C bits
[    6.606896] pci 0001:00:00.0: [14e4:d612] type 01 class 0x060400 PCIe Root Port
[    6.614242] pci 0001:00:00.0: PCI bridge to [bus 00]
[    6.619226] pci 0001:00:00.0:   bridge window [mem 0x00000000-0x000fffff]
[    6.626038] pci 0001:00:00.0:   bridge window [mem 0x00000000-0x000fffff 64bit pref]
[    6.633833] pci 0001:00:00.0: PME# supported from D0 D3hot D3cold
[    6.640691] PCI: bus0: Fast back to back transfers disabled
[    6.646307] pci 0001:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    6.654490] pci 0001:01:00.0: [14e4:4365] type 00 class 0x028000 PCIe Endpoint
[    6.661744] pci_bus 0001:01: 2-byte config write to 0001:01:00.0 offset 0x4 may corrupt adjacent RW1C bits
[    6.671454] pci 0001:01:00.0: BAR 0 [mem 0x00000000-0x00007fff 64bit]
[    6.677930] pci 0001:01:00.0: BAR 2 [mem 0x00000000-0x007fffff 64bit]
[    6.684405] pci 0001:01:00.0: BAR 4 [mem 0x00000000-0x000fffff 64bit pref]
[    6.691400] pci 0001:01:00.0: supports D1 D2
[    6.695899] PCI: bus1: Fast back to back transfers disabled
[    6.701496] pci_bus 0001:01: busn_res: [bus 01-ff] end is updated to 01
[    6.708163] pci 0001:00:00.0: bridge window [mem 0x20000000-0x20bfffff]: assigned
[    6.715681] pci 0001:00:00.0: bridge window [mem 0x20c00000-0x20cfffff 64bit pref]: assigned
[    6.724149] pci 0001:01:00.0: BAR 2 [mem 0x20000000-0x207fffff 64bit]: assigned
[    6.731488] pci 0001:01:00.0: BAR 4 [mem 0x20c00000-0x20cfffff 64bit pref]: assigned
[    6.739267] pci 0001:01:00.0: BAR 0 [mem 0x20800000-0x20807fff 64bit]: assigned
[    6.746611] pci 0001:00:00.0: PCI bridge to [bus 01]
[    6.751585] pci 0001:00:00.0:   bridge window [mem 0x20000000-0x20bfffff]
[    6.758411] pci 0001:00:00.0:   bridge window [mem 0x20c00000-0x20cfffff 64bit pref]
[    6.766179] pci_bus 0001:00: resource 4 [mem 0x20000000-0x27ffffff]
[    6.772465] pci_bus 0001:01: resource 1 [mem 0x20000000-0x20bfffff]
[    6.778755] pci_bus 0001:01: resource 2 [mem 0x20c00000-0x20cfffff 64bit pref]
[    6.786333] pci 0001:00:00.0: 4.000 Gb/s available PCIe bandwidth (5.0 GT/s PCIe x1 link)
[    6.794701] pcie_iproc_bcma bcma0:9: host bridge /axi@18000000/pcie@14000 ranges:
[    6.802233] pcie_iproc_bcma bcma0:9:      MEM 0x0028000000..0x002fffffff -> 0x0028000000
[    6.810388] pcie_iproc_bcma bcma0:9: mem resource: [bus 00-ff]
[    6.816261] pcie_iproc_bcma bcma0:9: mem resource: [mem 0x28000000-0x2fffffff]
[    6.933856] pcie_iproc_bcma bcma0:9: PHY or data link is INACTIVE!
[    6.940061] pcie_iproc_bcma bcma0:9: no PCIe EP device detected
(...)
[   17.154435] pci 0000:00:00.0: enabling device (0140 -> 0142)
[   17.163433] brcmfmac 0000:01:00.0: enabling device (0140 -> 0142)
[   17.284228] brcmfmac: brcmf_fw_alloc_request: using brcm/brcmfmac4366c-pcie for chip BCM4366/4
[   17.293218] pci 0001:00:00.0: enabling device (0140 -> 0142)
[   17.298957] brcmfmac 0001:01:00.0: enabling device (0140 -> 0142)
[   17.305669] brcmfmac 0000:01:00.0: Direct firmware load for brcm/brcmfmac4366c-pcie.luxul,xwr-3150-v1.bin failed with error -2
[   17.434303] brcmfmac: brcmf_fw_alloc_request: using brcm/brcmfmac4366c-pcie for chip BCM4366/4
[   17.443792] brcmfmac 0001:01:00.0: Direct firmware load for brcm/brcmfmac4366c-pcie.luxul,xwr-3150-v1.bin failed with error -2
[   17.460111] kmodloader: done loading kernel modules from /etc/modules.d/*
[   17.594565] brcmfmac 0000:01:00.0: Direct firmware load for brcm/brcmfmac4366c-pcie.txt failed with error -2
[   17.605523] brcmfmac 0000:01:00.0: Direct firmware load for brcm/brcmfmac4366c-pcie.clm_blob failed with error -2
[   17.616026] brcmfmac 0001:01:00.0: Direct firmware load for brcm/brcmfmac4366c-pcie.txcap_blob failed with error -2
[   17.882440] brcmfmac: brcmf_c_process_clm_blob: no clm_blob available (err=-2), device may have limited channels available
[   17.893611] brcmfmac: brcmf_c_process_txcap_blob: no txcap_blob available (err=-2)
[   17.901575] brcmfmac: brcmf_c_preinit_dcmds: Firmware: BCM4366/4 wl0: Nov  5 2018 03:19:56 version 10.28.2 (r769115) FWID 01-d2cbb8fd
[   17.914286] brcmfmac: brcmf_c_process_clm_blob: no clm_blob available (err=-2), device may have limited channels available
[   17.925461] brcmfmac: brcmf_c_process_txcap_blob: no txcap_blob available (err=-2)
[   17.934431] brcmfmac: brcmf_c_preinit_dcmds: Firmware: BCM4366/4 wl0: Nov  5 2018 03:19:56 version 10.28.2 (r769115) FWID 01-d2cbb8fd

2. Without this change and with CONFIG_PCIE_IPROC_PLATFORM:
[    5.931202] iproc-pcie 18012000.pcie: host bridge /axi@18000000/pcie@12000 ranges:
[    5.938882] iproc-pcie 18012000.pcie:      MEM 0x0008000000..0x000fffffff -> 0x0008000000
[    5.947182] iproc-pcie 18012000.pcie: mem resource: [bus 00-ff]
[    5.953123] iproc-pcie 18012000.pcie: mem resource: [mem 0x08000000-0x0fffffff]
[    6.073685] iproc-pcie 18012000.pcie: link: UP
[    6.078362] iproc-pcie 18012000.pcie: PCI host bridge to bus 0000:00
[    6.084766] pci_bus 0000:00: root bus resource [bus 00-ff]
[    6.090285] pci_bus 0000:00: root bus resource [mem 0x08000000-0x0fffffff]
[    6.097210] pci_bus 0000:00: 2-byte config write to 0000:00:00.0 offset 0xc8 may corrupt adjacent RW1C bits
[    6.107025] pci 0000:00:00.0: [14e4:d612] type 01 class 0x060400 PCIe Root Port
[    6.114383] pci 0000:00:00.0: PCI bridge to [bus 00]
[    6.119364] pci 0000:00:00.0:   bridge window [mem 0x00000000-0x000fffff]
[    6.126178] pci 0000:00:00.0:   bridge window [mem 0x00000000-0x000fffff 64bit pref]
[    6.133987] pci 0000:00:00.0: PME# supported from D0 D3hot D3cold
[    6.140807] PCI: bus0: Fast back to back transfers disabled
[    6.146419] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    6.154612] pci 0000:01:00.0: [14e4:4365] type 00 class 0x028000 PCIe Endpoint
[    6.161865] pci_bus 0000:01: 2-byte config write to 0000:01:00.0 offset 0x4 may corrupt adjacent RW1C bits
[    6.171581] pci 0000:01:00.0: BAR 0 [mem 0x00000000-0x00007fff 64bit]
[    6.178065] pci 0000:01:00.0: BAR 2 [mem 0x00000000-0x007fffff 64bit]
[    6.184548] pci 0000:01:00.0: BAR 4 [mem 0x00000000-0x000fffff 64bit pref]
[    6.191575] pci 0000:01:00.0: supports D1 D2
[    6.196108] PCI: bus1: Fast back to back transfers disabled
[    6.201703] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01
[    6.208381] pci 0000:00:00.0: bridge window [mem 0x08000000-0x08bfffff]: assigned
[    6.215901] pci 0000:00:00.0: bridge window [mem 0x08c00000-0x08cfffff 64bit pref]: assigned
[    6.224377] pci 0000:01:00.0: BAR 2 [mem 0x08000000-0x087fffff 64bit]: assigned
[    6.231718] pci 0000:01:00.0: BAR 4 [mem 0x08c00000-0x08cfffff 64bit pref]: assigned
[    6.239506] pci 0000:01:00.0: BAR 0 [mem 0x08800000-0x08807fff 64bit]: assigned
[    6.246849] pci 0000:00:00.0: PCI bridge to [bus 01]
[    6.251829] pci 0000:00:00.0:   bridge window [mem 0x08000000-0x08bfffff]
[    6.258644] pci 0000:00:00.0:   bridge window [mem 0x08c00000-0x08cfffff 64bit pref]
[    6.266414] pci_bus 0000:00: resource 4 [mem 0x08000000-0x0fffffff]
[    6.272698] pci_bus 0000:01: resource 1 [mem 0x08000000-0x08bfffff]
[    6.278990] pci_bus 0000:01: resource 2 [mem 0x08c00000-0x08cfffff 64bit pref]
[    6.286613] pci 0000:00:00.0: 4.000 Gb/s available PCIe bandwidth (5.0 GT/s PCIe x1 link)
[    6.295180] iproc-pcie 18013000.pcie: host bridge /axi@18000000/pcie@13000 ranges:
[    6.302795] iproc-pcie 18013000.pcie:      MEM 0x0020000000..0x0027ffffff -> 0x0020000000
[    6.311082] iproc-pcie 18013000.pcie: mem resource: [bus 00-ff]
[    6.317045] iproc-pcie 18013000.pcie: mem resource: [mem 0x20000000-0x27ffffff]
[    6.443688] iproc-pcie 18013000.pcie: link: UP
[    6.448267] iproc-pcie 18013000.pcie: PCI host bridge to bus 0001:00
[    6.454667] pci_bus 0001:00: root bus resource [bus 00-ff]
[    6.460175] pci_bus 0001:00: root bus resource [mem 0x20000000-0x27ffffff]
[    6.467091] pci_bus 0001:00: 2-byte config write to 0001:00:00.0 offset 0xc8 may corrupt adjacent RW1C bits
[    6.476903] pci 0001:00:00.0: [14e4:d612] type 01 class 0x060400 PCIe Root Port
[    6.484251] pci 0001:00:00.0: PCI bridge to [bus 00]
[    6.489233] pci 0001:00:00.0:   bridge window [mem 0x00000000-0x000fffff]
[    6.496043] pci 0001:00:00.0:   bridge window [mem 0x00000000-0x000fffff 64bit pref]
[    6.503852] pci 0001:00:00.0: PME# supported from D0 D3hot D3cold
[    6.510689] PCI: bus0: Fast back to back transfers disabled
[    6.516305] pci 0001:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    6.524494] pci 0001:01:00.0: [14e4:4365] type 00 class 0x028000 PCIe Endpoint
[    6.531751] pci_bus 0001:01: 2-byte config write to 0001:01:00.0 offset 0x4 may corrupt adjacent RW1C bits
[    6.541466] pci 0001:01:00.0: BAR 0 [mem 0x00000000-0x00007fff 64bit]
[    6.547949] pci 0001:01:00.0: BAR 2 [mem 0x00000000-0x007fffff 64bit]
[    6.554425] pci 0001:01:00.0: BAR 4 [mem 0x00000000-0x000fffff 64bit pref]
[    6.561453] pci 0001:01:00.0: supports D1 D2
[    6.565994] PCI: bus1: Fast back to back transfers disabled
[    6.571589] pci_bus 0001:01: busn_res: [bus 01-ff] end is updated to 01
[    6.578263] pci 0001:00:00.0: bridge window [mem 0x20000000-0x20bfffff]: assigned
[    6.585784] pci 0001:00:00.0: bridge window [mem 0x20c00000-0x20cfffff 64bit pref]: assigned
[    6.594251] pci 0001:01:00.0: BAR 2 [mem 0x20000000-0x207fffff 64bit]: assigned
[    6.601593] pci 0001:01:00.0: BAR 4 [mem 0x20c00000-0x20cfffff 64bit pref]: assigned
[    6.609373] pci 0001:01:00.0: BAR 0 [mem 0x20800000-0x20807fff 64bit]: assigned
[    6.616716] pci 0001:00:00.0: PCI bridge to [bus 01]
[    6.621696] pci 0001:00:00.0:   bridge window [mem 0x20000000-0x20bfffff]
[    6.628513] pci 0001:00:00.0:   bridge window [mem 0x20c00000-0x20cfffff 64bit pref]
[    6.636281] pci_bus 0001:00: resource 4 [mem 0x20000000-0x27ffffff]
[    6.642567] pci_bus 0001:01: resource 1 [mem 0x20000000-0x20bfffff]
[    6.648855] pci_bus 0001:01: resource 2 [mem 0x20c00000-0x20cfffff 64bit pref]
[    6.656445] pci 0001:00:00.0: 4.000 Gb/s available PCIe bandwidth (5.0 GT/s PCIe x1 link)
[    6.665008] iproc-pcie 18014000.pcie: host bridge /axi@18000000/pcie@14000 ranges:
[    6.672629] iproc-pcie 18014000.pcie:      MEM 0x0028000000..0x002fffffff -> 0x0028000000
[    6.680915] iproc-pcie 18014000.pcie: mem resource: [bus 00-ff]
[    6.686880] iproc-pcie 18014000.pcie: mem resource: [mem 0x28000000-0x2fffffff]
[    6.813683] iproc-pcie 18014000.pcie: PHY or data link is INACTIVE!
[    6.819982] iproc-pcie 18014000.pcie: no PCIe EP device detected
[    6.826014] iproc-pcie 18014000.pcie: PCIe controller setup failed
(...)
[   17.185931] pci 0000:00:00.0: enabling device (0140 -> 0142)
[   17.191622] brcmfmac 0000:01:00.0: enabling device (0140 -> 0142)
[   17.334049] brcmfmac: brcmf_fw_alloc_request: using brcm/brcmfmac4366c-pcie for chip BCM4366/4
[   17.342898] pci 0001:00:00.0: enabling device (0140 -> 0142)
[   17.348616] brcmfmac 0001:01:00.0: enabling device (0140 -> 0142)
[   17.355507] brcmfmac 0000:01:00.0: Direct firmware load for brcm/brcmfmac4366c-pcie.luxul,xwr-3150-v1.bin failed with error -2
[   17.484169] brcmfmac: brcmf_fw_alloc_request: using brcm/brcmfmac4366c-pcie for chip BCM4366/4
[   17.493422] brcmfmac 0001:01:00.0: Direct firmware load for brcm/brcmfmac4366c-pcie.luxul,xwr-3150-v1.bin failed with error -2
[   17.508727] kmodloader: done loading kernel modules from /etc/modules.d/*
[   17.624073] brcmfmac 0000:01:00.0: Direct firmware load for brcm/brcmfmac4366c-pcie.txt failed with error -2
[   17.634965] brcmfmac 0001:01:00.0: Direct firmware load for brcm/brcmfmac4366c-pcie.clm_blob failed with error -2
[   17.645412] brcmfmac 0001:01:00.0: Direct firmware load for brcm/brcmfmac4366c-pcie.txcap_blob failed with error -2
[   19.956940] ieee80211 phy0: brcmf_msgbuf_query_dcmd: Timeout on response for query command
[   19.965302] ieee80211 phy0: brcmf_c_preinit_dcmds: Retrieving cur_etheraddr failed, -5
[   19.973263] ieee80211 phy0: brcmf_bus_started: failed: -5
[   19.976167] ieee80211 phy1: brcmf_msgbuf_query_dcmd: Timeout on response for query command
[   19.978802] ieee80211 phy0: brcmf_attach: dongle is not responding: err=-5
[   19.987015] ieee80211 phy1: brcmf_c_preinit_dcmds: Retrieving cur_etheraddr failed, -5
[   20.001904] ieee80211 phy1: brcmf_bus_started: failed: -5
[   20.007461] ieee80211 phy1: brcmf_attach: dongle is not responding: err=-5
[   20.026165] brcmfmac 0000:01:00.0: brcmf_pcie_setup: Dongle setup failed
[   20.032966] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 000000.000 ****** RAMSIZE is 0x240000, RAMSIZE_ADJ is 0x240000 *******
[   20.035716] brcmfmac 0001:01:00.0: brcmf_pcie_setup: Dongle setup failed
[   20.046023] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 000000.000 initvars_cis_pci: Not CIS format
[   20.052724] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 000000.000 ****** RAMSIZE is 0x240000, RAMSIZE_ADJ is 0x240000 *******
[   20.063236] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 000000.000 srom rev:0
[   20.076179] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 000000.000 initvars_cis_pci: Not CIS format
[   20.076207] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 000000.000 srom rev:0
[   20.084861] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 000000.000 initvars_srom_pci, SROM CRC Error
[   20.095424] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 000000.000 initvars_srom_pci, SROM CRC Error
[   20.104079] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 000000.000 initvars_srom_pci, Using external nvram
[   20.114699] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 000000.000 initvars_srom_pci, Using external nvram
[   20.125346] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 000000.000 Setting clocks to 800/400/200
[   20.136503] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 000000.000 Setting clocks to 800/400/200
[   20.147686] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 000000.000 si_set_bb_vcofreq_frac: only work on 4360, 4350
[   20.157972] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 000000.000 si_set_bb_vcofreq_frac: only work on 4360, 4350
[   20.168236] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 000000.000 Enabling D-cache
[   20.180109] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 000000.000 Enabling D-cache
[   20.191955] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.568 gic_dist_init max_irq 64
[   20.201108] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.568 gic_dist_init max_irq 64
[   20.210287] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.570 c_init: Watchdog reset bit set, clearing
[   20.220139] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.569 c_init: Watchdog reset bit set, clearing
[   20.229963] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.570
[   20.241195] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.569
[   20.252494] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: RTE (PCIE-MSG_BUF) 10.28.2 (r769115) on BCM4366 r4 @ 40.0/200.0/800.0MHz
[   20.260254] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: RTE (PCIE-MSG_BUF) 10.28.2 (r769115) on BCM4366 r4 @ 40.0/200.0/800.0MHz
[   20.268014] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.570 nvram_init: called again without calling nvram_exit()
[   20.281096] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.569 nvram_init: called again without calling nvram_exit()
[   20.294148] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.570 initvars_cis_pci: Not CIS format
[   20.306520] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.569 initvars_cis_pci: Not CIS format
[   20.318881] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.602 srom rev:0
[   20.329431] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.601 srom rev:0
[   20.340000] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.602 initvars_srom_pci, SROM CRC Error
[   20.348630] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.601 initvars_srom_pci, SROM CRC Error
[   20.357274] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.602 initvars_srom_pci, Using external nvram
[   20.367905] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.601 initvars_srom_pci, Using external nvram
[   20.378547] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.602 allocating a max of 511 rxcplid buffers
[   20.389704] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.601 allocating a max of 511 rxcplid buffers
[   20.400860] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.602 pciemsgbuf0: Broadcom PCIE MSGBUF driver
[   20.412021] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.601 pciemsgbuf0: Broadcom PCIE MSGBUF driver
[   20.423190] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.602 nvram_init: called again without calling nvram_exit()
[   20.434433] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.601 nvram_init: called again without calling nvram_exit()
[   20.445664] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.602 initvars_cis_pci: Not CIS format
[   20.458038] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.601 initvars_cis_pci: Not CIS format
[   20.470400] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.634 srom rev:0
[   20.480947] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.633 srom rev:0
[   20.491516] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.634 initvars_srom_pci, SROM CRC Error
[   20.500149] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.633 initvars_srom_pci, SROM CRC Error
[   20.508790] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.634 initvars_srom_pci, Using external nvram
[   20.519425] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.633 initvars_srom_pci, Using external nvram
[   20.530068] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.634 wlc_ucode_download: wl0: Loading non-MU ucode
[   20.541224] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.633 wlc_ucode_download: wl0: Loading non-MU ucode
[   20.552389] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.635 reclaim section 0: Returned 216 bytes to the heap
[   20.564060] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.634 reclaim section 0: Returned 216 bytes to the heap
[   20.575732] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.635 initvars_cis_pci: Not CIS format
[   20.587754] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.634 initvars_cis_pci: Not CIS format
[   20.599775] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.667 srom rev:0
[   20.610322] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.666 srom rev:0
[   20.620887] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.667 initvars_srom_pci, SROM CRC Error
[   20.629520] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.666 initvars_srom_pci, SROM CRC Error
[   20.638158] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.667 initvars_srom_pci, Using external nvram
[   20.648792] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.666 initvars_srom_pci, Using external nvram
[   20.659433] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.668 wlc_bmac_attach, deviceid 0x43c4 nbands 1
[   20.670580] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.667 wlc_bmac_attach, deviceid 0x43c5 nbands 1
[   20.681743] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.668 wlc_bmac_attach: mutxmax is configured to auto
[   20.693077] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.667 wlc_bmac_attach: mutxmax is configured to auto
[   20.704410] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.668 wlc_bmac_attach: mutxmax is 8 after adjustment
[   20.716176] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.667 wlc_bmac_attach: mutxmax is 8 after adjustment
[   20.727953] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.668 ipxotp_init: mapping otpbase at 0x18007000 to 0x18007000
[   20.739718] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.667 ipxotp_init: mapping otpbase at 0x18007000 to 0x18007000
[   20.751489] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.674 ipxotp_init: mapping otpbase at 0x18007000 to 0x18007000
[   20.764126] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.675 ipxotp_init: mapping otpbase at 0x18007000 to 0x18007000
[   20.776820] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.674 wl0: wlc_bmac_attach: chiprev 4 corerev 65 cccap 0x58400009 maccap 0xf0018705 band 2.4G, phy_type 11 phy_rev 33
[   20.789452] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.675 wl0: wlc_bmac_attach: chiprev 4 corerev 65 cccap 0x58400009 maccap 0xf0018705 band 5G, phy_type 11 phy_rev 33
[   20.802050] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.675 ipxotp_init: mapping otpbase at 0x18007000 to 0x18007000
[   20.819476] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.677 ipxotp_init: mapping otpbase at 0x18007000 to 0x18007000
[   20.836719] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.676 wl0: wlc_stf_txcore_shmem_write: No clock
[   20.849351] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.677 wl0: wlc_stf_txcore_shmem_write: No clock
[   20.873328] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.676 wl0: wlc_ampdu_tx_set: AGG Mode = MAC+AQM txmaxpkts 512
[   20.884659] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.677 wl0: wlc_ampdu_tx_set: AGG Mode = MAC+AQM txmaxpkts 512
[   20.897191] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.677 wlc_mutx_attach: mutxmax is 8
[   20.909739] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.678 wlc_mutx_attach: mutxmax is 8
[   20.920058] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.678 wl0: Broadcom BCM4366 802.11 Wireless Controller 10.28.2 (r769115)
[   20.930348] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.680 wl0: Broadcom BCM4366 802.11 Wireless Controller 10.28.2 (r769115)
[   20.943833] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.678 SPLITRX_MODE_2 enabled : tcmsegsize 160
[   20.957342] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.680 SPLITRX_MODE_2 enabled : tcmsegsize 160
[   20.968590] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.678 TCAM: 512 used: 273 exceed:0
[   20.979832] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.680 TCAM: 512 used: 273 exceed:0
[   20.990053] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.678 reclaim section 1: Returned 179856 bytes to the heap
[   21.000252] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.680 reclaim section 1: Returned 179856 bytes to the heap
[   21.012522] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.679 ThreadX v5.6 initialized
[   21.024810] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE: 026738.680 ThreadX v5.6 initialized
[   21.034668] brcmfmac 0000:01:00.0: brcmf_pcie_bus_console_read: CONSOLE:
[   21.044518] brcmfmac 0001:01:00.0: brcmf_pcie_bus_console_read: CONSOLE:

3. With this change and CONFIG_PCIE_IPROC_PLATFORM:
[    5.952372] iproc-pcie 18012000.pcie: host bridge /axi@18000000/pcie@12000 ranges:
[    5.960046] iproc-pcie 18012000.pcie:      MEM 0xffffffffffffffff..0x0007fffffe -> 0x0008000000
[    5.968830] iproc-pcie 18012000.pcie: non-prefetchable memory resource required
[    5.976228] iproc-pcie 18012000.pcie: mem resource: [bus 00-ff]
[    6.083649] iproc-pcie 18012000.pcie: link: UP
[    6.088328] iproc-pcie 18012000.pcie: PCI host bridge to bus 0000:00
[    6.094736] pci_bus 0000:00: root bus resource [bus 00-ff]
[    6.100253] pci_bus 0000:00: 2-byte config write to 0000:00:00.0 offset 0xc8 may corrupt adjacent RW1C bits
[    6.110080] pci 0000:00:00.0: [14e4:d612] type 01 class 0x060400 PCIe Root Port
[    6.117455] pci 0000:00:00.0: PCI bridge to [bus 00]
[    6.122437] pci 0000:00:00.0:   bridge window [mem 0x00000000-0x000fffff]
[    6.129255] pci 0000:00:00.0:   bridge window [mem 0x00000000-0x000fffff 64bit pref]
[    6.137065] pci 0000:00:00.0: PME# supported from D0 D3hot D3cold
[    6.143959] PCI: bus0: Fast back to back transfers disabled
[    6.149559] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    6.157762] pci 0000:01:00.0: [14e4:4365] type 00 class 0x028000 PCIe Endpoint
[    6.165043] pci_bus 0000:01: 2-byte config write to 0000:01:00.0 offset 0x4 may corrupt adjacent RW1C bits
[    6.174759] pci 0000:01:00.0: BAR 0 [mem 0x00000000-0x00007fff 64bit]
[    6.181232] pci 0000:01:00.0: BAR 2 [mem 0x00000000-0x007fffff 64bit]
[    6.187707] pci 0000:01:00.0: BAR 4 [mem 0x00000000-0x000fffff 64bit pref]
[    6.194752] pci 0000:01:00.0: supports D1 D2
[    6.199283] PCI: bus1: Fast back to back transfers disabled
[    6.204918] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01
[    6.211571] pci 0000:00:00.0: bridge window [mem size 0x00c00000]: can't assign; no space
[    6.219783] pci 0000:00:00.0: bridge window [mem size 0x00c00000]: failed to assign
[    6.227474] pci 0000:00:00.0: bridge window [mem size 0x00100000 64bit pref]: can't assign; no space
[    6.236637] pci 0000:00:00.0: bridge window [mem size 0x00100000 64bit pref]: failed to assign
[    6.245284] pci 0000:01:00.0: BAR 2 [mem size 0x00800000 64bit]: can't assign; no space
[    6.253306] pci 0000:01:00.0: BAR 2 [mem size 0x00800000 64bit]: failed to assign
[    6.260817] pci 0000:01:00.0: BAR 4 [mem size 0x00100000 64bit pref]: can't assign; no space
[    6.269287] pci 0000:01:00.0: BAR 4 [mem size 0x00100000 64bit pref]: failed to assign
[    6.277244] pci 0000:01:00.0: BAR 0 [mem size 0x00008000 64bit]: can't assign; no space
[    6.285276] pci 0000:01:00.0: BAR 0 [mem size 0x00008000 64bit]: failed to assign
[    6.292783] pci 0000:00:00.0: PCI bridge to [bus 01]
[    6.297774] pci_bus 0000:00: Some PCI device resources are unassigned, try booting with pci=realloc
[    6.307231] pci 0000:00:00.0: 4.000 Gb/s available PCIe bandwidth (5.0 GT/s PCIe x1 link)
[    6.315808] iproc-pcie 18013000.pcie: host bridge /axi@18000000/pcie@13000 ranges:
[    6.323424] iproc-pcie 18013000.pcie:      MEM 0xffffffffffffffff..0x0007fffffe -> 0x0020000000
[    6.332206] iproc-pcie 18013000.pcie: non-prefetchable memory resource required
[    6.339603] iproc-pcie 18013000.pcie: mem resource: [bus 00-ff]
[    6.453649] iproc-pcie 18013000.pcie: link: UP
[    6.458235] iproc-pcie 18013000.pcie: PCI host bridge to bus 0001:00
[    6.464631] pci_bus 0001:00: root bus resource [bus 00-ff]
[    6.470158] pci_bus 0001:00: 2-byte config write to 0001:00:00.0 offset 0xc8 may corrupt adjacent RW1C bits
[    6.479983] pci 0001:00:00.0: [14e4:d612] type 01 class 0x060400 PCIe Root Port
[    6.487348] pci 0001:00:00.0: PCI bridge to [bus 00]
[    6.492331] pci 0001:00:00.0:   bridge window [mem 0x00000000-0x000fffff]
[    6.499146] pci 0001:00:00.0:   bridge window [mem 0x00000000-0x000fffff 64bit pref]
[    6.506946] pci 0001:00:00.0: PME# supported from D0 D3hot D3cold
[    6.513829] PCI: bus0: Fast back to back transfers disabled
[    6.519436] pci 0001:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    6.527649] pci 0001:01:00.0: [14e4:4365] type 00 class 0x028000 PCIe Endpoint
[    6.534932] pci_bus 0001:01: 2-byte config write to 0001:01:00.0 offset 0x4 may corrupt adjacent RW1C bits
[    6.544656] pci 0001:01:00.0: BAR 0 [mem 0x00000000-0x00007fff 64bit]
[    6.551135] pci 0001:01:00.0: BAR 2 [mem 0x00000000-0x007fffff 64bit]
[    6.557610] pci 0001:01:00.0: BAR 4 [mem 0x00000000-0x000fffff 64bit pref]
[    6.564646] pci 0001:01:00.0: supports D1 D2
[    6.569167] PCI: bus1: Fast back to back transfers disabled
[    6.574789] pci_bus 0001:01: busn_res: [bus 01-ff] end is updated to 01
[    6.581448] pci 0001:00:00.0: bridge window [mem size 0x00c00000]: can't assign; no space
[    6.589659] pci 0001:00:00.0: bridge window [mem size 0x00c00000]: failed to assign
[    6.597339] pci 0001:00:00.0: bridge window [mem size 0x00100000 64bit pref]: can't assign; no space
[    6.606504] pci 0001:00:00.0: bridge window [mem size 0x00100000 64bit pref]: failed to assign
[    6.615151] pci 0001:01:00.0: BAR 2 [mem size 0x00800000 64bit]: can't assign; no space
[    6.623174] pci 0001:01:00.0: BAR 2 [mem size 0x00800000 64bit]: failed to assign
[    6.630684] pci 0001:01:00.0: BAR 4 [mem size 0x00100000 64bit pref]: can't assign; no space
[    6.639155] pci 0001:01:00.0: BAR 4 [mem size 0x00100000 64bit pref]: failed to assign
[    6.647101] pci 0001:01:00.0: BAR 0 [mem size 0x00008000 64bit]: can't assign; no space
[    6.655133] pci 0001:01:00.0: BAR 0 [mem size 0x00008000 64bit]: failed to assign
[    6.662640] pci 0001:00:00.0: PCI bridge to [bus 01]
[    6.667631] pci_bus 0001:00: Some PCI device resources are unassigned, try booting with pci=realloc
[    6.677080] pci 0001:00:00.0: 4.000 Gb/s available PCIe bandwidth (5.0 GT/s PCIe x1 link)
[    6.685636] iproc-pcie 18014000.pcie: host bridge /axi@18000000/pcie@14000 ranges:
[    6.693257] iproc-pcie 18014000.pcie:      MEM 0xffffffffffffffff..0x0007fffffe -> 0x0028000000
[    6.702037] iproc-pcie 18014000.pcie: non-prefetchable memory resource required
[    6.709426] iproc-pcie 18014000.pcie: mem resource: [bus 00-ff]
[    6.823645] iproc-pcie 18014000.pcie: PHY or data link is INACTIVE!
[    6.829939] iproc-pcie 18014000.pcie: no PCIe EP device detected
[    6.835975] iproc-pcie 18014000.pcie: PCIe controller setup failed
(...)
[   17.032372] brcmfmac: brcmf_pcie_get_resource: BAR1 Not enabled, device size=0, addr=0x00000000000000
[   17.041676] brcmfmac: brcmf_pcie_probe: failed 14e4:4365
[   17.047041] brcmfmac 0000:01:00.0: probe with driver brcmfmac failed with error -22
[   17.054824] brcmfmac: brcmf_pcie_get_resource: BAR1 Not enabled, device size=0, addr=0x00000000000000
[   17.064097] brcmfmac: brcmf_pcie_probe: failed 14e4:4365
[   17.069433] brcmfmac 0001:01:00.0: probe with driver brcmfmac failed with error -22


*** *** ***


diff --git a/drivers/pci/controller/pcie-iproc.c b/drivers/pci/controller/pcie-iproc.c
index 5aa677f81..5a67e4b0c 100644
--- a/drivers/pci/controller/pcie-iproc.c
+++ b/drivers/pci/controller/pcie-iproc.c
@@ -1463,6 +1463,14 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res)

  	dev = pcie->dev;

+	{
+		struct resource_entry *window;
+
+		resource_list_for_each_entry(window, res) {
+			dev_info(dev, "mem resource: %pR\n", window->res);
+		}
+	}
+
  	ret = iproc_pcie_rev_init(pcie);
  	if (ret) {
  		dev_err(dev, "unable to initialize controller parameters\n");

> Assisted-by: opencode:big-pickle
> Fixes: 767012397976 ("ARM: dts: BCM5301X: Describe PCIe controllers fully")
> Signed-off-by: Rosen Penev <rosenp@gmail.com>
> ---
>   arch/arm/boot/dts/broadcom/bcm-ns.dtsi | 5 +----
>   1 file changed, 1 insertion(+), 4 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/broadcom/bcm-ns.dtsi b/arch/arm/boot/dts/broadcom/bcm-ns.dtsi
> index bd52de0faa3e..27a97c8122de 100644
> --- a/arch/arm/boot/dts/broadcom/bcm-ns.dtsi
> +++ b/arch/arm/boot/dts/broadcom/bcm-ns.dtsi
> @@ -95,10 +95,7 @@ L2: cache-controller@22000 {
>   	axi@18000000 {
>   		compatible = "brcm,bus-axi";
>   		reg = <0x18000000 0x1000>;
> -		ranges = <0x00000000 0x18000000 0x00100000>,
> -			 <0x08000000 0x08000000 0x08000000>,
> -			 <0x20000000 0x20000000 0x08000000>,
> -			 <0x28000000 0x28000000 0x08000000>;
> +		ranges = <0x00000000 0x18000000 0x00100000>;
>   		#address-cells = <1>;
>   		#size-cells = <1>;
>