[PATCH 0/9] drm/panel: novatek-nt36672a: Extend with 5 new panels

[PATCH 0/9] drm/panel: novatek-nt36672a: Extend with 5 new panels

[Alexey Minnekhanov]

These series make the driver for novatek-nt36672-based panels more
easily extensible and add support for 5 new panels to it, used in
4 different smartphones, all based on NT36672A:

 * Shenchao panel used in Xiaomi Redmi Note 7 (xiaomi-lavender), the
  exact model string is unknown
 * Tianma TL063FVMCA01-00 for Xiaomi Redmi Note 7 (xiaomi-lavender)
 * Tianma TL063FVMC43-02 for Xiaomi Redmi Note 6 Pro (xiaomi-tulip)
 * Tianma TL060FVXS16-00 for Xiaomi Mi A2 smartphone (xiaomi-jasmine)
 * TXD TXDI600YANPA-43V3 Asus Zenfone Max Pro M1 (asus-x00td).

Combining two init sequences into one was previously briefly
discussed in [1].

[1] https://lore.kernel.org/all/20260523035734.6602-1-chintanlike@gmail.com/

Signed-off-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
---
Alexey Minnekhanov (9):
      dt-bindings: vendor-prefixes: Add Shenzhen TXD Technology Co., Ltd.
      dt-bindings: vendor-prefixes: Add Shenzhen Zhuohong Electronic
      dt-bindings: display: novatek,nt36672a: Add 5 new panels
      drm/panel: novatek-nt36672a: Set driver name to novatek for consistency
      drm/panel: novatek-nt36672a: Combine two init callbacks into one
      drm/panel: novatek-nt36672a: Add 3 panels used in Xiaomi phones
      drm/panel: novatek-nt36672a: Add Tianma panel for Xiaomi Mi A2
      drm/panel: novatek-nt36672a: Add panel for Asus Zenfone Max Pro M1
      MAINTAINERS: Add Alexey Minnekhanov as maintainer for NT36672A panel

 .../bindings/display/panel/novatek,nt36672a.yaml   |   5 +
 .../devicetree/bindings/vendor-prefixes.yaml       |   4 +
 MAINTAINERS                                        |   1 +
 drivers/gpu/drm/panel/panel-novatek-nt36672a.c     | 549 +++++++++++++++++++--
 4 files changed, 531 insertions(+), 28 deletions(-)
---
base-commit: 68142f986ff04b2b70b31db00f719bf690f64a9a
change-id: 20260912-nt36672a-panels-e34a72677bb5

Best regards,
--  
Alexey Minnekhanov <alexeymin@minlexx.ru>

[PATCH 1/9] dt-bindings: vendor-prefixes: Add Shenzhen TXD Technology Co., Ltd.

[Alexey Minnekhanov]

Add prefix for Shenzhen TXD Technology Co., Ltd., manufacturer of
medium sized LCD and camera modules for mobile phones, tablets and
automotive.

[1] https://en.txdkj.com/

Signed-off-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
---
 Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index ba20029693734..86c502d8d1d5f 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -1771,6 +1771,8 @@ patternProperties:
     description: Turing Machines, Inc.
   "^tuxedo,.*":
     description: TUXEDO Computers GmbH
+  "^txd,.*":
+    description: Shenzhen TXD Technology Co., Ltd.
   "^tyan,.*":
     description: Tyan Computer Corporation
   "^tyhx,.*":

-- 
2.55.0

[PATCH 2/9] dt-bindings: vendor-prefixes: Add Shenzhen Zhuohong Electronic

[Alexey Minnekhanov]

Shenzhen Zhuohong Electronic Technology Co., Ltd. is a manufacturer
of LCD/IPS displays based in Shenzhen, Mainland China.

Signed-off-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
---
 Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index 86c502d8d1d5f..5bfad23fd6255 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -1507,6 +1507,8 @@ patternProperties:
     description: SGX Sensortech
   "^sharp,.*":
     description: Sharp Corporation
+  "^shenchao,.*":
+    description: Shenzhen Zhuohong Electronic Technology Co., Ltd.
   "^shift,.*":
     description: SHIFT GmbH
   "^shimafuji,.*":

-- 
2.55.0

[PATCH 3/9] dt-bindings: display: novatek,nt36672a: Add 5 new panels

[Alexey Minnekhanov]

Document 5 new panels used in 4 different smartphones produced by
Xiaomi and ASUS:

 * Shenchao panel used in Xiaomi Redmi Note 7 (xiaomi-lavender), the
  exact model string is unknown
 * Tianma TL063FVMCA01-00 for Xiaomi Redmi Note 7 (xiaomi-lavender)
 * Tianma TL063FVMC43-02 for Xiaomi Redmi Note 6 Pro (xiaomi-tulip)
 * Tianma TL060FVXS16-00 for Xiaomi Mi A2 smartphone (xiaomi-jasmine)
 * TXD TXDI600YANPA-43V3 Asus Zenfone Max Pro M1 (asus-x00td)

Signed-off-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
---
 .../devicetree/bindings/display/panel/novatek,nt36672a.yaml          | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml b/Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml
index 5d16d85117254..3671fd788a818 100644
--- a/Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml
+++ b/Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml
@@ -22,7 +22,12 @@ properties:
   compatible:
     items:
       - enum:
+          - shenchao,fhdplus-video
           - tianma,fhd-video
+          - tianma,tl060fvxs16-00
+          - tianma,tl063fvmca01-00
+          - tianma,tl063fvmc43-02
+          - txd,txdi600yanpa-43v3
       - const: novatek,nt36672a
     description: This indicates the panel manufacturer of the panel that is
       in turn using the NT36672A panel driver. This compatible string

-- 
2.55.0

[PATCH 4/9] drm/panel: novatek-nt36672a: Set driver name to novatek for consistency

[Alexey Minnekhanov]

Since this driver should represent not only devices manufactured by
Tianma Micro-electronics, but also from other companies, it makes more
sense to name it according to what driver file name already is: novatek.

This does not change neither module file name nor Kconfig symbol, only
driver identification in dmesg. This makes it possible to e.g. grep
dmesg for "novatek" and get messages from both nt36672a-based panel and
Novatek touchscreen.

Signed-off-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
---
 drivers/gpu/drm/panel/panel-novatek-nt36672a.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
index 464d9ce47d87d..73bec4f47ec60 100644
--- a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
+++ b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
@@ -479,16 +479,16 @@ static void nt36672a_panel_remove(struct mipi_dsi_device *dsi)
 	drm_panel_remove(&pinfo->base);
 }
 
-static const struct of_device_id tianma_fhd_video_of_match[] = {
+static const struct of_device_id panel_nt36672a_match[] = {
 	{ .compatible = "tianma,fhd-video", .data = &tianma_fhd_video_panel_desc },
 	{ },
 };
-MODULE_DEVICE_TABLE(of, tianma_fhd_video_of_match);
+MODULE_DEVICE_TABLE(of, panel_nt36672a_match);
 
 static struct mipi_dsi_driver nt36672a_panel_driver = {
 	.driver = {
-		.name = "panel-tianma-nt36672a",
-		.of_match_table = tianma_fhd_video_of_match,
+		.name = "panel-novatek-nt36672a",
+		.of_match_table = panel_nt36672a_match,
 	},
 	.probe = nt36672a_panel_probe,
 	.remove = nt36672a_panel_remove,

-- 
2.55.0

[PATCH 5/9] drm/panel: novatek-nt36672a: Combine two init callbacks into one

[Alexey Minnekhanov]

The split between .send_init_cmds_1 and _cmds_2 is completely artificial
and unnecessary. Two command sets are split in between by the sequence:
 - exit_sleep_mode
 - delay
 - set_display_on

But not every panel driver follows this "split" in their init sequence.
Some may have different delay timer, or put exit_sleep_mode/display_on
commands into other places in the sequence.

In order to make this driver more extensible, combine two init functions
into one by puting exit_sleep_mode/delay/display_on in the middle,
followed by commands from cmds_2.

No functional change - full init sequence with all the delays for the
tianma_fhd_video panel is kept the same in the end.

Signed-off-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
---
 drivers/gpu/drm/panel/panel-novatek-nt36672a.c | 37 +++++++++-----------------
 1 file changed, 13 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
index 73bec4f47ec60..237a6a8699aef 100644
--- a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
+++ b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
@@ -51,8 +51,7 @@ struct nt36672a_panel_desc {
 	enum mipi_dsi_pixel_format format;
 	unsigned int lanes;
 
-	void (*send_init_cmds_1)(struct mipi_dsi_multi_context *dsi_ctx);
-	void (*send_init_cmds_2)(struct mipi_dsi_multi_context *dsi_ctx);
+	void (*send_init_cmds)(struct mipi_dsi_multi_context *dsi_ctx);
 	void (*send_deinit_cmds)(struct mipi_dsi_multi_context *dsi_ctx);
 };
 
@@ -140,22 +139,9 @@ static int nt36672a_panel_prepare(struct drm_panel *panel)
 
 	dsi_ctx.accum_err = nt36672a_panel_power_on(pinfo);
 
-	/* send first part of init cmds */
-	if (pinfo->desc->send_init_cmds_1)
-		pinfo->desc->send_init_cmds_1(&dsi_ctx);
-
-	mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
-
-	/* 0x46 = 70 ms delay */
-	mipi_dsi_msleep(&dsi_ctx, 70);
-
-	mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);
-
-	/* Send rest of the init cmds */
-	if (pinfo->desc->send_init_cmds_2)
-		pinfo->desc->send_init_cmds_2(&dsi_ctx);
-
-	mipi_dsi_msleep(&dsi_ctx, 120);
+	/* send init cmds */
+	if (pinfo->desc->send_init_cmds)
+		pinfo->desc->send_init_cmds(&dsi_ctx);
 
 	if (dsi_ctx.accum_err < 0)
 		gpiod_set_value(pinfo->reset_gpio, 0);
@@ -192,7 +178,7 @@ static const struct drm_panel_funcs panel_funcs = {
 	.get_modes = nt36672a_panel_get_modes,
 };
 
-static void tianma_fhd_video_send_init_cmds_1(struct mipi_dsi_multi_context *dsi_ctx)
+static void tianma_fhd_video_send_init_cmds(struct mipi_dsi_multi_context *dsi_ctx)
 {
 	u8 reg;
 
@@ -352,15 +338,19 @@ static void tianma_fhd_video_send_init_cmds_1(struct mipi_dsi_multi_context *dsi
 	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x51, 0xff);
 	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x53, 0x24);
 	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x55, 0x00);
-}
 
-static void tianma_fhd_video_send_init_cmds_2(struct mipi_dsi_multi_context *dsi_ctx)
-{
+	mipi_dsi_dcs_exit_sleep_mode_multi(dsi_ctx);
+	/* 0x46 = 70 ms delay */
+	mipi_dsi_msleep(dsi_ctx, 70);
+	mipi_dsi_dcs_set_display_on_multi(dsi_ctx);
+
 	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x24);
 	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
 	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xc3, 0x01);
 	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xc4, 0x54);
 	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x10);
+
+	mipi_dsi_msleep(dsi_ctx, 120);
 }
 
 static void tianma_fhd_video_send_deinit_cmds(struct mipi_dsi_multi_context *dsi_ctx)
@@ -399,8 +389,7 @@ static const struct nt36672a_panel_desc tianma_fhd_video_panel_desc = {
 			| MIPI_DSI_MODE_VIDEO_BURST,
 	.format = MIPI_DSI_FMT_RGB888,
 	.lanes = 4,
-	.send_init_cmds_1 = tianma_fhd_video_send_init_cmds_1,
-	.send_init_cmds_2 = tianma_fhd_video_send_init_cmds_2,
+	.send_init_cmds = tianma_fhd_video_send_init_cmds,
 	.send_deinit_cmds = tianma_fhd_video_send_deinit_cmds,
 };
 

-- 
2.55.0

[PATCH 6/9] drm/panel: novatek-nt36672a: Add 3 panels used in Xiaomi phones

[Alexey Minnekhanov]

Add support for 3 panels used in 2 Xiaomi smartphones, all based on
Qualcomm SDM636/660 SoC:

* Shenchao panel used in Xiaomi Redmi Note 7 (xiaomi-lavender), the
  exact model string is unknown
* Tianma TL063FVMCA01-00 for Xiaomi Redmi Note 7 (xiaomi-lavender)
* Tianma TL063FVMC43-02  for Xiaomi Redmi Note 6 Pro (xiaomi-tulip)

They all are DSI video mode panels using Novatek NT36672A controller,
so they can share almost exactly the same init/off sequences with
minimal differences between variants. This allows to avoid a lot of
code duplication.

Co-developed-by: Richard Acayan <mailingradian@gmail.com>
Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Signed-off-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
---
 drivers/gpu/drm/panel/panel-novatek-nt36672a.c | 166 +++++++++++++++++++++++++
 1 file changed, 166 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
index 237a6a8699aef..e6971ba6ef464 100644
--- a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
+++ b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
@@ -361,6 +361,90 @@ static void tianma_fhd_video_send_deinit_cmds(struct mipi_dsi_multi_context *dsi
 	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x10);
 }
 
+static void lavender_tulip_init_cmds(struct mipi_dsi_multi_context *dsi_ctx)
+{
+	/*
+	 * This function supports 3 similar panels with minimal differences
+	 * in their init sequences. We assume base to be lavender-tianma
+	 * panel, and 2 variations (lavender-shenchao and tulip) are handled as
+	 * differences to base.
+	 */
+	const struct device_node *node = dev_of_node(&dsi_ctx->dsi->dev);
+	bool is_shenchao = of_device_is_compatible(node, "shenchao,fhdplus-video");
+	bool is_tulip = of_device_is_compatible(node, "tianma,tl063fvmc43-02");
+
+	dsi_ctx->dsi->mode_flags |= MIPI_DSI_MODE_LPM;
+
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x25);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x18, 0x96);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x05, 0x04);
+
+	if (is_shenchao)
+		mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x27);
+	else
+		mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x20);
+
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
+
+	if (is_shenchao)
+		mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xd9, 0x10);
+	else
+		mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x78, 0x01);
+
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x24);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x82, 0x13);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x84, 0x31);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x88, 0x13);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x8a, 0x31);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x8e, 0xe4);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x8f, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x90, 0x80);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x26);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xa9, 0x12);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xaa, 0x10);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xae, 0x8a);
+
+	if (is_shenchao)
+		mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1c, 0xfa);
+
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x10);
+
+	if (is_shenchao)
+		mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb0, 0x01);
+
+	mipi_dsi_dcs_exit_sleep_mode_multi(dsi_ctx);
+	mipi_dsi_msleep(dsi_ctx, 80);
+
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb0, 0x01);
+	mipi_dsi_dcs_set_tear_on_multi(dsi_ctx, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
+
+	if (is_tulip) {
+		mipi_dsi_dcs_set_display_brightness_multi(dsi_ctx, 0x00ff);
+	} else {
+		/* lavender tianma + shenchao specific part */
+		mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x68, 0x03, 0x04);
+		mipi_dsi_dcs_set_display_brightness_multi(dsi_ctx, 0x00b8);
+	}
+
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x2c);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MIPI_DCS_WRITE_POWER_SAVE, 0x00);
+
+	mipi_dsi_dcs_set_display_on_multi(dsi_ctx);
+}
+
+static void lavender_tulip_deinit_cmds(struct mipi_dsi_multi_context *dsi_ctx)
+{
+	dsi_ctx->dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
+
+	mipi_dsi_dcs_set_display_off_multi(dsi_ctx);
+	mipi_dsi_msleep(dsi_ctx, 20);
+	mipi_dsi_dcs_enter_sleep_mode_multi(dsi_ctx);
+	mipi_dsi_msleep(dsi_ctx, 120);
+}
+
 static const struct drm_display_mode tianma_fhd_video_panel_default_mode = {
 	.clock		= 161331,
 
@@ -393,6 +477,85 @@ static const struct nt36672a_panel_desc tianma_fhd_video_panel_desc = {
 	.send_deinit_cmds = tianma_fhd_video_send_deinit_cmds,
 };
 
+/* common for both lavender-tianma and lavender-shenchao panels */
+static const struct drm_display_mode lavender_panel_default_mode = {
+	.clock		= (1080 + 90 + 2 + 120) * (2340 + 10 + 3 + 8) * 60 / 1000,
+
+	.hdisplay	= 1080,
+	.hsync_start	= 1080 + 90,
+	.hsync_end	= 1080 + 90 + 2,
+	.htotal		= 1080 + 90 + 2 + 120,
+
+	.vdisplay	= 2340,
+	.vsync_start	= 2340 + 10,
+	.vsync_end	= 2340 + 10 + 3,
+	.vtotal		= 2340 + 10 + 3 + 8,
+
+	.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
+};
+
+static const struct nt36672a_panel_desc shenchao_lavender_panel_desc = {
+	.display_mode = &lavender_panel_default_mode,
+
+	.width_mm = 67,
+	.height_mm = 145,
+
+	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
+			MIPI_DSI_CLOCK_NON_CONTINUOUS,
+	.format = MIPI_DSI_FMT_RGB888,
+	.lanes = 4,
+	.send_init_cmds = lavender_tulip_init_cmds,
+	.send_deinit_cmds = lavender_tulip_deinit_cmds,
+};
+
+static const struct nt36672a_panel_desc tianma_lavender_panel_desc = {
+	.display_mode = &lavender_panel_default_mode,
+
+	.width_mm = 67,
+	.height_mm = 145,
+
+	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
+			MIPI_DSI_CLOCK_NON_CONTINUOUS,
+	.format = MIPI_DSI_FMT_RGB888,
+	.lanes = 4,
+	.send_init_cmds = lavender_tulip_init_cmds,
+	.send_deinit_cmds = lavender_tulip_deinit_cmds,
+};
+
+static const struct drm_display_mode tianmaplus_e7t_tulip_mode = {
+	.clock		= (1080 + 100 + 28 + 120) * (2280 + 10 + 3 + 8) * 60 / 1000,
+
+	.hdisplay	= 1080,
+	.hsync_start	= 1080 + 100,
+	.hsync_end	= 1080 + 100 + 28,
+	.htotal		= 1080 + 100 + 28 + 120,
+
+	.vdisplay	= 2280,
+	.vsync_start	= 2280 + 10,
+	.vsync_end	= 2280 + 10 + 3,
+	.vtotal		= 2280 + 10 + 3 + 8,
+
+	.width_mm = 68,
+	.height_mm = 143,
+
+	.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
+};
+
+static const struct nt36672a_panel_desc tianmaplus_e7t_tulip_panel_desc = {
+	.display_mode = &tianmaplus_e7t_tulip_mode,
+
+	.width_mm = 68,
+	.height_mm = 143,
+
+	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
+			MIPI_DSI_CLOCK_NON_CONTINUOUS,
+	.format = MIPI_DSI_FMT_RGB888,
+	.lanes = 4,
+	/* tulip panel uses almost the same init/deinit sequences as lavender */
+	.send_init_cmds = lavender_tulip_init_cmds,
+	.send_deinit_cmds = lavender_tulip_deinit_cmds,
+};
+
 static int nt36672a_panel_add(struct nt36672a_panel *pinfo)
 {
 	struct device *dev = &pinfo->link->dev;
@@ -469,7 +632,10 @@ static void nt36672a_panel_remove(struct mipi_dsi_device *dsi)
 }
 
 static const struct of_device_id panel_nt36672a_match[] = {
+	{ .compatible = "shenchao,fhdplus-video", .data = &shenchao_lavender_panel_desc },
 	{ .compatible = "tianma,fhd-video", .data = &tianma_fhd_video_panel_desc },
+	{ .compatible = "tianma,tl063fvmca01-00", .data = &tianma_lavender_panel_desc },
+	{ .compatible = "tianma,tl063fvmc43-02", .data = &tianmaplus_e7t_tulip_panel_desc },
 	{ },
 };
 MODULE_DEVICE_TABLE(of, panel_nt36672a_match);

-- 
2.55.0

[PATCH 7/9] drm/panel: novatek-nt36672a: Add Tianma panel for Xiaomi Mi A2

[Alexey Minnekhanov]

Add support for Tianma TL060FVXS16-00 video mode panel based on
Novatek NT36672A, used in Xiaomi Mi A2 smartphone (xiaomi-jasmine).
It shares some code with already supported panel in this driver
for xiaomi-lavender, so we can reuse the same panel deinit function.

Signed-off-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
---
 drivers/gpu/drm/panel/panel-novatek-nt36672a.c | 57 ++++++++++++++++++++++++++
 1 file changed, 57 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
index e6971ba6ef464..1bfa808365874 100644
--- a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
+++ b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
@@ -445,6 +445,29 @@ static void lavender_tulip_deinit_cmds(struct mipi_dsi_multi_context *dsi_ctx)
 	mipi_dsi_msleep(dsi_ctx, 120);
 }
 
+static void tianma_jasmine_init_cmds(struct mipi_dsi_multi_context *dsi_ctx)
+{
+	dsi_ctx->dsi->mode_flags |= MIPI_DSI_MODE_LPM;
+
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MIPI_DCS_SET_PARTIAL_ROWS, 0x10);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MIPI_DCS_SET_PARTIAL_COLUMNS, 0x50);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x32, 0x2f);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x10);
+
+	mipi_dsi_dcs_exit_sleep_mode_multi(dsi_ctx);
+	mipi_dsi_msleep(dsi_ctx, 70);
+
+	mipi_dsi_dcs_set_display_brightness_multi(dsi_ctx, 0x00ff);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x68, 0x03, 0x04);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x2c);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MIPI_DCS_WRITE_POWER_SAVE, 0x00);
+
+	mipi_dsi_dcs_set_display_on_multi(dsi_ctx);
+	usleep_range(5000, 6000);
+}
+
 static const struct drm_display_mode tianma_fhd_video_panel_default_mode = {
 	.clock		= 161331,
 
@@ -556,6 +579,39 @@ static const struct nt36672a_panel_desc tianmaplus_e7t_tulip_panel_desc = {
 	.send_deinit_cmds = lavender_tulip_deinit_cmds,
 };
 
+static const struct drm_display_mode tianma_jasmine_panel_default_mode = {
+	.clock		= (1080 + 96 + 4 + 56) * (2160 + 4 + 2 + 33) * 60 / 1000,
+
+	.hdisplay	= 1080,
+	.hsync_start	= 1080 + 96,
+	.hsync_end	= 1080 + 96 + 4,
+	.htotal		= 1080 + 96 + 4 + 56,
+
+	.vdisplay	= 2160,
+	.vsync_start	= 2160 + 4,
+	.vsync_end	= 2160 + 4 + 2,
+	.vtotal		= 2160 + 4 + 2 + 33,
+
+	.width_mm = 68,
+	.height_mm = 136,
+	.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
+};
+
+static const struct nt36672a_panel_desc tianma_jasmine_panel_desc = {
+	.display_mode = &tianma_jasmine_panel_default_mode,
+
+	.width_mm = 68,
+	.height_mm = 136,
+
+	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
+			MIPI_DSI_CLOCK_NON_CONTINUOUS,
+	.format = MIPI_DSI_FMT_RGB888,
+	.lanes = 4,
+	.send_init_cmds = tianma_jasmine_init_cmds,
+	/* jasmine panel uses the same deinit sequence as lavender/tulip */
+	.send_deinit_cmds = lavender_tulip_deinit_cmds,
+};
+
 static int nt36672a_panel_add(struct nt36672a_panel *pinfo)
 {
 	struct device *dev = &pinfo->link->dev;
@@ -634,6 +690,7 @@ static void nt36672a_panel_remove(struct mipi_dsi_device *dsi)
 static const struct of_device_id panel_nt36672a_match[] = {
 	{ .compatible = "shenchao,fhdplus-video", .data = &shenchao_lavender_panel_desc },
 	{ .compatible = "tianma,fhd-video", .data = &tianma_fhd_video_panel_desc },
+	{ .compatible = "tianma,tl060fvxs16-00", .data = &tianma_jasmine_panel_desc },
 	{ .compatible = "tianma,tl063fvmca01-00", .data = &tianma_lavender_panel_desc },
 	{ .compatible = "tianma,tl063fvmc43-02", .data = &tianmaplus_e7t_tulip_panel_desc },
 	{ },

-- 
2.55.0

[PATCH 8/9] drm/panel: novatek-nt36672a: Add panel for Asus Zenfone Max Pro M1

[Alexey Minnekhanov]

Add support for TXD TXDI600YANPA-43V3 video mode panel based on
Novatek NT36672A, used in Asus Zenfone Max Pro M1 smartphone
(asus-x00td).

Co-developed-by: iAboothahir <aboothahirpkd@gmail.com>
Signed-off-by: iAboothahir <aboothahirpkd@gmail.com>
Signed-off-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
---
 drivers/gpu/drm/panel/panel-novatek-nt36672a.c | 281 +++++++++++++++++++++++++
 1 file changed, 281 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
index 1bfa808365874..954ab24c9d00a 100644
--- a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
+++ b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
@@ -468,6 +468,252 @@ static void tianma_jasmine_init_cmds(struct mipi_dsi_multi_context *dsi_ctx)
 	usleep_range(5000, 6000);
 }
 
+static void txd_x00td_init_cmds(struct mipi_dsi_multi_context *dsi_ctx)
+{
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x06, 0x9e);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x07, 0x94);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0e, 0x35);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0f, 0x24);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x6d, 0x66);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x69, 0x99);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x95, 0xf5);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x96, 0xf5);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x23);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x12, 0x6c);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x15, 0xe6);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x16, 0x0c);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x24);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x00, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x01, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x02, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x03, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x04, 0x0b);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x05, 0x0c);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x06, 0xa9);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x07, 0x06);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x08, 0x04);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x09, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0a, 0x0f);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0b, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0c, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0d, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0e, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0f, 0x17);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x10, 0x15);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x11, 0x13);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x12, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x13, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x14, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x15, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x16, 0x0b);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x17, 0x0c);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x18, 0xa9);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x19, 0x05);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1a, 0x03);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1b, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1c, 0x0f);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1d, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1e, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1f, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x20, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x21, 0x17);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x22, 0x15);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x23, 0x13);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x2f, 0x04);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x30, 0x08);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x31, 0x04);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x32, 0x08);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x33, 0x02);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x34, 0x02);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x35, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x37, 0x02);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x38, 0x72);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x39, 0x72);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x3b, 0x40);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x3f, 0x72);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x60, 0x10);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x61, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x68, 0x83);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x78, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x79, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x7a, 0x08);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x7b, 0x9c);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x7d, 0x06);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x7e, 0x02);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x80, 0x45);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x81, 0x06);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x8e, 0xf0);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x90, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x92, 0x76);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x93, 0x0a);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x94, 0x0a);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x99, 0x33);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x9b, 0xff);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb3, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb4, 0x04);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb5, 0x04);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xdc, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xdd, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xde, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xdf, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xe0, 0x75);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xe9, 0x08);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xed, 0x40);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb0,
+				     0x00, 0x00, 0x00, 0x15, 0x00, 0x37, 0x00,
+				     0x54, 0x00, 0x6d, 0x00, 0x84, 0x00, 0x98,
+				     0x00, 0xac);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb1,
+				     0x00, 0xbd, 0x00, 0xf9, 0x01, 0x25, 0x01,
+				     0x6b, 0x01, 0x9c, 0x01, 0xec, 0x02, 0x22,
+				     0x02, 0x25);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb2,
+				     0x02, 0x5e, 0x02, 0x9e, 0x02, 0xc9, 0x02,
+				     0xfd, 0x03, 0x21, 0x03, 0x4d, 0x03, 0x5a,
+				     0x03, 0x68);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb3,
+				     0x03, 0x78, 0x03, 0x8b, 0x03, 0xa1, 0x03,
+				     0xbd, 0x03, 0xd6, 0x03, 0xda);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb4,
+				     0x00, 0x00, 0x00, 0x15, 0x00, 0x37, 0x00,
+				     0x54, 0x00, 0x6d, 0x00, 0x84, 0x00, 0x98,
+				     0x00, 0xac);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb5,
+				     0x00, 0xbd, 0x00, 0xf9, 0x01, 0x25, 0x01,
+				     0x6b, 0x01, 0x9c, 0x01, 0xec, 0x02, 0x22,
+				     0x02, 0x25);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb6,
+				     0x02, 0x5e, 0x02, 0x9e, 0x02, 0xc9, 0x02,
+				     0xfd, 0x03, 0x21, 0x03, 0x4d, 0x03, 0x5a,
+				     0x03, 0x68);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb7,
+				     0x03, 0x78, 0x03, 0x8b, 0x03, 0xa1, 0x03,
+				     0xbd, 0x03, 0xd6, 0x03, 0xda);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb8,
+				     0x00, 0x00, 0x00, 0x15, 0x00, 0x37, 0x00,
+				     0x54, 0x00, 0x6d, 0x00, 0x84, 0x00, 0x98,
+				     0x00, 0xac);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb9,
+				     0x00, 0xbd, 0x00, 0xf9, 0x01, 0x25, 0x01,
+				     0x6b, 0x01, 0x9c, 0x01, 0xec, 0x02, 0x22,
+				     0x02, 0x25);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xba,
+				     0x02, 0x5e, 0x02, 0x9e, 0x02, 0xc9, 0x02,
+				     0xfd, 0x03, 0x21, 0x03, 0x4d, 0x03, 0x5a,
+				     0x03, 0x68);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xbb,
+				     0x03, 0x78, 0x03, 0x8b, 0x03, 0xa1, 0x03,
+				     0xbd, 0x03, 0xd6, 0x03, 0xda);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x21);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb0,
+				     0x00, 0x00, 0x00, 0x15, 0x00, 0x37, 0x00,
+				     0x54, 0x00, 0x6d, 0x00, 0x84, 0x00, 0x98,
+				     0x00, 0xac);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb1,
+				     0x00, 0xbd, 0x00, 0xf9, 0x01, 0x25, 0x01,
+				     0x6b, 0x01, 0x9c, 0x01, 0xec, 0x02, 0x22,
+				     0x02, 0x25);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb2,
+				     0x02, 0x5e, 0x02, 0x9e, 0x02, 0xc9, 0x02,
+				     0xfd, 0x03, 0x21, 0x03, 0x4d, 0x03, 0x5a,
+				     0x03, 0x68);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb3,
+				     0x03, 0x78, 0x03, 0x8b, 0x03, 0xa1, 0x03,
+				     0xbd, 0x03, 0xd6, 0x03, 0xda);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb4,
+				     0x00, 0x00, 0x00, 0x15, 0x00, 0x37, 0x00,
+				     0x54, 0x00, 0x6d, 0x00, 0x84, 0x00, 0x98,
+				     0x00, 0xac);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb5,
+				     0x00, 0xbd, 0x00, 0xf9, 0x01, 0x25, 0x01,
+				     0x6b, 0x01, 0x9c, 0x01, 0xec, 0x02, 0x22,
+				     0x02, 0x25);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb6,
+				     0x02, 0x5e, 0x02, 0x9e, 0x02, 0xc9, 0x02,
+				     0xfd, 0x03, 0x21, 0x03, 0x4d, 0x03, 0x5a,
+				     0x03, 0x68);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb7,
+				     0x03, 0x78, 0x03, 0x8b, 0x03, 0xa1, 0x03,
+				     0xbd, 0x03, 0xd6, 0x03, 0xda);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb8,
+				     0x00, 0x00, 0x00, 0x15, 0x00, 0x37, 0x00,
+				     0x54, 0x00, 0x6d, 0x00, 0x84, 0x00, 0x98,
+				     0x00, 0xac);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb9,
+				     0x00, 0xbd, 0x00, 0xf9, 0x01, 0x25, 0x01,
+				     0x6b, 0x01, 0x9c, 0x01, 0xec, 0x02, 0x22,
+				     0x02, 0x25);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xba,
+				     0x02, 0x5e, 0x02, 0x9e, 0x02, 0xc9, 0x02,
+				     0xfd, 0x03, 0x21, 0x03, 0x4d, 0x03, 0x5a,
+				     0x03, 0x68);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xbb,
+				     0x03, 0x78, 0x03, 0x8b, 0x03, 0xa1, 0x03,
+				     0xbd, 0x03, 0xd6, 0x03, 0xda);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x25);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x05, 0x0c);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0a, 0x81);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0b, 0xd7);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0c, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x17, 0x82);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x21, 0x1c);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x22, 0x1c);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x24, 0x76);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x25, 0x76);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x5c, 0x25);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x5d, 0x80);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x5e, 0x80);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x5f, 0x22);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x65, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x69, 0x60);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x6b, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x71, 0x2d);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x80, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x8d, 0x04);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xd7, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xd8, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xd9, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xda, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xdb, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xdc, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x26);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x06, 0xc8);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x12, 0x5a);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x19, 0x0a);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1a, 0x97);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1d, 0x0a);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1e, 0x1e);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x99, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x27);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x13, 0x0e);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x16, 0xb0);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x17, 0xd0);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x10);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_exit_sleep_mode_multi(dsi_ctx);
+	mipi_dsi_msleep(dsi_ctx, 70);
+	mipi_dsi_dcs_set_display_on_multi(dsi_ctx);
+	mipi_dsi_usleep_range(dsi_ctx, 10000, 11000);
+}
+
+static void txd_x00td_off(struct mipi_dsi_multi_context *dsi_ctx)
+{
+	mipi_dsi_dcs_set_display_off_multi(dsi_ctx);
+	mipi_dsi_msleep(dsi_ctx, 50);
+	mipi_dsi_dcs_enter_sleep_mode_multi(dsi_ctx);
+	mipi_dsi_msleep(dsi_ctx, 120);
+}
+
 static const struct drm_display_mode tianma_fhd_video_panel_default_mode = {
 	.clock		= 161331,
 
@@ -612,6 +858,40 @@ static const struct nt36672a_panel_desc tianma_jasmine_panel_desc = {
 	.send_deinit_cmds = lavender_tulip_deinit_cmds,
 };
 
+static const struct drm_display_mode txd_x00td_mode = {
+	.clock		= (1080 + 122 + 8 + 76) * (2160 + 20 + 4 + 28) * 60 / 1000,
+
+	.hdisplay	= 1080,
+	.hsync_start	= 1080 + 122,
+	.hsync_end	= 1080 + 122 + 8,
+	.htotal		= 1080 + 122 + 8 + 76,
+
+	.vdisplay	= 2160,
+	.vsync_start	= 2160 + 20,
+	.vsync_end	= 2160 + 20 + 4,
+	.vtotal		= 2160 + 20 + 4 + 28,
+
+	.width_mm	= 68,
+	.height_mm	= 136,
+
+	.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
+};
+
+static const struct nt36672a_panel_desc txd_x00td_panel_desc = {
+	.display_mode = &txd_x00td_mode,
+
+	.width_mm = 68,
+	.height_mm = 136,
+
+	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
+			  MIPI_DSI_MODE_VIDEO_HSE | MIPI_DSI_MODE_NO_EOT_PACKET |
+			  MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_LPM,
+	.format = MIPI_DSI_FMT_RGB888,
+	.lanes = 4,
+	.send_init_cmds = txd_x00td_init_cmds,
+	.send_deinit_cmds = txd_x00td_off,
+};
+
 static int nt36672a_panel_add(struct nt36672a_panel *pinfo)
 {
 	struct device *dev = &pinfo->link->dev;
@@ -693,6 +973,7 @@ static const struct of_device_id panel_nt36672a_match[] = {
 	{ .compatible = "tianma,tl060fvxs16-00", .data = &tianma_jasmine_panel_desc },
 	{ .compatible = "tianma,tl063fvmca01-00", .data = &tianma_lavender_panel_desc },
 	{ .compatible = "tianma,tl063fvmc43-02", .data = &tianmaplus_e7t_tulip_panel_desc },
+	{ .compatible = "txd,txdi600yanpa-43v3", .data = &txd_x00td_panel_desc },
 	{ },
 };
 MODULE_DEVICE_TABLE(of, panel_nt36672a_match);

-- 
2.55.0

[PATCH 9/9] MAINTAINERS: Add Alexey Minnekhanov as maintainer for NT36672A panel

[Alexey Minnekhanov]

List myself as maintainer of Novatek NT36672A panels driver
to keep a close eye on it.

Signed-off-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
---
 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 207a6e2db70c8..8a91d04447405 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8400,6 +8400,7 @@ F:	drivers/gpu/drm/panel/panel-novatek-nt36532.c
 
 DRM DRIVER FOR NOVATEK NT36672A PANELS
 M:	Sumit Semwal <sumit.semwal@linaro.org>
+M:	Alexey Minnekhanov <alexeymin@minlexx.ru>
 S:	Maintained
 T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git
 F:	Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml

-- 
2.55.0

Re: [PATCH 7/9] drm/panel: novatek-nt36672a: Add Tianma panel for Xiaomi Mi A2

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Direct use of `usleep_range` instead of `mipi_dsi_usleep_range` bypasses multi-context error tracking.
--

commit 883b76cff93d823c9430acc0b7cfca0a77f61ed2
Author: Alexey Minnekhanov <alexeymin@minlexx.ru>

drm/panel: novatek-nt36672a: Add Tianma panel for Xiaomi Mi A2

Add support for Tianma TL060FVXS16-00 video mode panel based on
Novatek NT36672A, used in Xiaomi Mi A2 smartphone (xiaomi-jasmine).
It shares some code with already supported panel in this driver
for xiaomi-lavender, so we can reuse the same panel deinit function.

> diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
> index e6971ba6ef464..1bfa808365874 100644
> --- a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
> +++ b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
> @@ -445,6 +445,29 @@ static void lavender_tulip_deinit_cmds(struct mipi_dsi_multi_context *dsi_ctx)
>  	mipi_dsi_msleep(dsi_ctx, 120);
>  }
>  
> +static void tianma_jasmine_init_cmds(struct mipi_dsi_multi_context *dsi_ctx)
> +{
[ ... ]
> +	mipi_dsi_dcs_set_display_on_multi(dsi_ctx);
> +	usleep_range(5000, 6000);

[Severity: Low]
Is it intentional to use usleep_range() here instead of mipi_dsi_usleep_range()?

Using usleep_range() directly bypasses the multi-context error tracking in
tianma_jasmine_init_cmds(). This causes the unconditional 5-6ms sleep to
execute even if previous DSI commands have failed and set dsi_ctx->accum_err.

> +}

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260913-nt36672a-panels-v1-0-ce097402c6ea@minlexx.ru?part=7

Re: [PATCH 2/9] dt-bindings: vendor-prefixes: Add Shenzhen Zhuohong Electronic

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Vendor prefix mismatch: 'shenchao' mapped to 'Shenzhen Zhuohong Electronic Technology Co., Ltd.'
--

commit 73f96d396aaa9d9d8dc1a660e32b98910c8690b8
Author: Alexey Minnekhanov <alexeymin@minlexx.ru>

dt-bindings: vendor-prefixes: Add Shenzhen Zhuohong Electronic

This commit adds a new vendor prefix to the device tree bindings. It aims
to register Shenzhen Zhuohong Electronic Technology Co., Ltd., a
manufacturer of LCD/IPS displays.

> diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
> --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
> +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
> @@ -1507,6 +1507,8 @@ patternProperties:
>      description: SGX Sensortech
>    "^sharp,.*":
>      description: Sharp Corporation
> +  "^shenchao,.*":
> +    description: Shenzhen Zhuohong Electronic Technology Co., Ltd.

[Severity: Low]
Is this vendor prefix mapped to the correct company description?

The patch introduces the 'shenchao' prefix, but maps it to Shenzhen Zhuohong
Electronic Technology Co., Ltd. Since 'shenchao' typically refers to a
Shenchao panel (as seen in a subsequent commit introducing the
'shenchao,fhdplus-video' panel), mapping it to Zhuohong, a different panel
manufacturer, could cause confusion for device tree authors.

Should this prefix be named something like '^zhuohong,.*' instead to match
the manufacturer, or should the description be updated to reflect the actual
Shenchao company name?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260913-nt36672a-panels-v1-0-ce097402c6ea@minlexx.ru?part=2

Re: [PATCH 3/9] dt-bindings: display: novatek,nt36672a: Add 5 new panels

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Low] Incomplete Documentation Update
- [Low] Alphabetical ordering violation in compatible strings
--

commit fe459608210d248fe11d7e07e8ba300ec1c7b36a
Author: Alexey Minnekhanov <alexeymin@minlexx.ru>

dt-bindings: display: novatek,nt36672a: Add 5 new panels

This commit documents 5 new display panels that use the Novatek NT36672A
driver. These panels are used in various smartphones produced by Xiaomi
and ASUS.

> diff --git a/Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml b/Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml
> index 5d16d85117254..3671fd788a818 100644
> --- a/Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml
> +++ b/Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml
> @@ -22,7 +22,12 @@ properties:
>    compatible:
>      items:
>        - enum:

[Severity: Low]
Could the main description block be updated to reflect these additions?
The top-level description property for novatek,nt36672a.yaml currently says
"Right now, support is added only for a Tianma FHD+ LCD display panel with
a resolution of 1080x2246." Since this commit adds 5 new panels to the
compatible items enum below, the description is now outdated.

> +          - shenchao,fhdplus-video
>            - tianma,fhd-video
> +          - tianma,tl060fvxs16-00
> +          - tianma,tl063fvmca01-00
> +          - tianma,tl063fvmc43-02

[Severity: Low]
Is it possible to sort these compatible strings alphabetically? In ASCII,
the character 4 comes before a, so it seems like "tianma,tl063fvmc43-02"
should precede "tianma,tl063fvmca01-00" in this enum list.

> +          - txd,txdi600yanpa-43v3
>        - const: novatek,nt36672a
>      description: This indicates the panel manufacturer of the panel that is
>        in turn using the NT36672A panel driver. This compatible string

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260913-nt36672a-panels-v1-0-ce097402c6ea@minlexx.ru?part=3

Re: [PATCH 6/9] drm/panel: novatek-nt36672a: Add 3 panels used in Xiaomi phones

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Duplicate execution of DCS display off and enter sleep mode commands, causing redundant panel instructions and excess delay.
--

commit 84de747d38c5834c233f3124ad401f35b9b4af2b
Author: Alexey Minnekhanov <alexeymin@minlexx.ru>

drm/panel: novatek-nt36672a: Add 3 panels used in Xiaomi phones

This commit adds support for three new DSI video mode panels based on the
Novatek NT36672A controller, used in Xiaomi Redmi Note 6 Pro and Note 7.
It introduces shared initialization and de-initialization sequences for
these variants to minimize code duplication.

> diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
> --- a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
> +++ b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
[ ... ]
> @@ -361,6 +361,90 @@ static void tianma_fhd_video_send_deinit_cmds(struct mipi_dsi_multi_context *dsi
[ ... ]
> +static void lavender_tulip_deinit_cmds(struct mipi_dsi_multi_context *dsi_ctx)
> +{
> +	dsi_ctx->dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
> +
> +	mipi_dsi_dcs_set_display_off_multi(dsi_ctx);
> +	mipi_dsi_msleep(dsi_ctx, 20);
> +	mipi_dsi_dcs_enter_sleep_mode_multi(dsi_ctx);
> +	mipi_dsi_msleep(dsi_ctx, 120);
> +}

[Severity: Medium]
Could this result in redundant panel instructions and an excess delay?

When the panel is disabled, lavender_tulip_deinit_cmds() is called as the
panel-specific deinit sequence by nt36672a_panel_unprepare(). However,
nt36672a_panel_unprepare() already unconditionally executes these exact same
display off and sleep commands, along with their corresponding delays,
immediately after the panel-specific sequence completes.

This appears to result in turning off the screen twice, incurring an
unnecessary 140ms sleep and redundant DCS commands being sent to the panel
during every power down operation.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260913-nt36672a-panels-v1-0-ce097402c6ea@minlexx.ru?part=6

Re: [PATCH 8/9] drm/panel: novatek-nt36672a: Add panel for Asus Zenfone Max Pro M1

[David Heidelberg]

On 13/09/2026 07:36, Alexey Minnekhanov wrote:
> Add support for TXD TXDI600YANPA-43V3 video mode panel based on
> Novatek NT36672A, used in Asus Zenfone Max Pro M1 smartphone
> (asus-x00td).
> 
> Co-developed-by: iAboothahir<aboothahirpkd@gmail.com>
> Signed-off-by: iAboothahir<aboothahirpkd@gmail.com>
> Signed-off-by: Alexey Minnekhanov<alexeymin@minlexx.ru>
> ---
>   drivers/gpu/drm/panel/panel-novatek-nt36672a.c | 281 +++++++++++++++++++++++++
>   1 file changed, 281 insertions(+)
> 
> diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
> index 1bfa808365874..954ab24c9d00a 100644
> --- a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
> +++ b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
> @@ -468,6 +468,252 @@ static void tianma_jasmine_init_cmds(struct mipi_dsi_multi_context *dsi_ctx)
>   	usleep_range(5000, 6000);
>   }
>   
> +static void txd_x00td_init_cmds(struct mipi_dsi_multi_context *dsi_ctx)
> +{
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x20);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);

Just for a start,

0xff -> CMD2_P0, datasheet page 6

0xfb -> Set non-reload MTP commad, page 12

This driver has amazing datasheet, so the driver could look like a real driver 
instead of dump of the register sequence :)

David

Re: [PATCH 4/9] drm/panel: novatek-nt36672a: Set driver name to novatek for consistency

[David Heidelberg]

On 13/09/2026 07:36, Alexey Minnekhanov wrote:
> Since this driver should represent not only devices manufactured by
> Tianma Micro-electronics, but also from other companies, it makes more
> sense to name it according to what driver file name already is: novatek.
> 
> This does not change neither module file name nor Kconfig symbol, only
> driver identification in dmesg. This makes it possible to e.g. grep
> dmesg for "novatek" and get messages from both nt36672a-based panel and
> Novatek touchscreen.
> 
> Signed-off-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
> ---
>   drivers/gpu/drm/panel/panel-novatek-nt36672a.c | 8 ++++----
>   1 file changed, 4 insertions(+), 4 deletions(-)
> 
Reviewed-by: David Heidelberg <david@ixit.cz>