Re: [PATCH v3 10/15] drm/tidss: Add support for DPIENABLE bit

[Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>]

Hi,

On 08/07/2026 09:35, Devarsh Thakkar wrote:
> Hi,
> 
> On 29/05/26 14:15, Tomi Valkeinen wrote:
>> Many (or even all?) K3 SoCs have DSS VP_CONTROL.DPIENABLE bit described
>> in their documentation. This bit controls whether the DPI block is
>> enabled, and is set to 1 by default (i.e. DPI is enabled at HW reset).
>>
>> However, in almost all SoCs the setting does not actually do anything,
>> and at the moment the bit is not managed by the driver.
>>
>> The exception is AM62L, which does have DPIENABLE connected, and
>> disabling the DPI block when it is not in use provides power savings.
>>
>> Let's add a new feature flag for this, 'has_vp_control_dpienable', and
>> implement the support.  Disable DPIENABLE for all videoports at resume
>> time, so that it is 0 by default. Specifically enable and disable it in
>> dispc_vp_enable() and dispc_vp_disable() for DPI output.
>>
> 
> I think in commit msg you probably mean to capture dispc_vp_prepare/ 
> dispc_vp_unprepare instead of dispc_vp_enable() and dispc_vp_disable() 
> for enabling/disabling DPIENABLE bits. With that correction in commit msg,

Indeed. A left-over from an earlier version. Thanks!

  Tomi