From: "Maulik Shah (mkshah)" <maulik.shah@oss.qualcomm.com>
To: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Thomas Gleixner <tglx@kernel.org>,
Linus Walleij <linusw@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, linux-gpio@vger.kernel.org,
Sneh Mankad <sneh.mankad@oss.qualcomm.com>
Subject: Re: [PATCH v3 4/8] irqchip/qcom-pdc: Differentiate between direct SPI and GPIO as SPI
Date: Thu, 25 Jun 2026 14:50:26 +0530 [thread overview]
Message-ID: <cff027cd-9ada-4a55-af43-2ad8cc27af89@oss.qualcomm.com> (raw)
In-Reply-To: <2978f55b-0b5c-4720-98ba-e14ef46b1169@oss.qualcomm.com>
On 6/18/2026 1:32 PM, Konrad Dybcio wrote:
> On 6/16/26 11:25 AM, Maulik Shah wrote:
>> Before commit 4dc70713dc24 ("irqchip/qcom-pdc: Kill non-wakeup irqdomain")
>> there are separate domains for direct SPIs and GPIO used as SPIs. Separate
>> domains can be useful in case irqchip want to differentiate both of them.
>> Since commit unified both the domains there is no way to differentiate.
>>
>> In preparation to add the second level interrupt controller support where
>> GPIO interrupts get latched at PDC (but not direct SPIs) there is a need to
>> differentiate between SPIs and GPIOs as SPIs. Reverting above commit do not
>> seem a good option either which leads to waste of resources.
>>
>> PDC HW have the IRQ_PARAM register telling number of direct SPIs and number
>> of GPIOs as SPIs. Further PDC allocates direct SPIs at the beginning and
>> all GPIOs as SPIs are allocated at the end. This information can be used in
>> driver to differentiate them.
>>
>> Add the support to read this register and keep this information in
>> struct pdc_desc. Later change utilizes same.
>>
>> Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
>> ---
>
> [...]
>
>> + irq_param = pdc_reg_read(pdc->regs->irq_param_reg, 0);
>> + pdc->num_spis = FIELD_GET(GENMASK(7, 0), irq_param);
>> + pdc->num_gpios = FIELD_GET(GENMASK(15, 8), irq_param);
>
> num_gpios is not used in this series, please either drop it or
> use it to limit the index in the following patches
>
> Konrad
I will remove unused num_gpios from v4.
Thanks,
Maulik
next prev parent reply other threads:[~2026-06-25 9:20 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-16 9:25 [PATCH v3 0/8] x1e80100: Enable PDC wake GPIOs and deepest idle state Maulik Shah
2026-06-16 9:25 ` [PATCH v3 1/8] irqchip/qcom-pdc: restructure version support Maulik Shah
2026-06-17 13:12 ` Konrad Dybcio
2026-06-25 9:19 ` Maulik Shah (mkshah)
2026-06-16 9:25 ` [PATCH v3 2/8] irqchip/qcom-pdc: Move all statics to struct pdc_desc Maulik Shah
2026-06-17 13:26 ` Konrad Dybcio
2026-06-25 9:19 ` Maulik Shah (mkshah)
2026-06-16 9:25 ` [PATCH v3 3/8] irqchip/qcom-pdc: Remove pdc_enable_intr() wrapper Maulik Shah
2026-06-16 9:36 ` sashiko-bot
2026-06-16 9:25 ` [PATCH v3 4/8] irqchip/qcom-pdc: Differentiate between direct SPI and GPIO as SPI Maulik Shah
2026-06-18 8:02 ` Konrad Dybcio
2026-06-25 9:20 ` Maulik Shah (mkshah) [this message]
2026-06-16 9:25 ` [PATCH v3 5/8] irqchip/qcom-pdc: Configure PDC to pass through mode Maulik Shah
2026-06-16 9:43 ` sashiko-bot
2026-06-18 8:18 ` Konrad Dybcio
2026-06-25 9:24 ` Maulik Shah (mkshah)
2026-06-18 8:19 ` Konrad Dybcio
2026-06-25 9:25 ` Maulik Shah (mkshah)
2026-06-16 9:25 ` [PATCH v3 6/8] pinctrl: qcom: Acknowledge IRQs for PDC interrupt controller Maulik Shah
2026-06-16 9:45 ` sashiko-bot
2026-06-16 9:25 ` [PATCH v3 7/8] Revert "pinctrl: qcom: x1e80100: Bypass PDC wakeup parent for now" Maulik Shah
2026-06-16 9:25 ` [PATCH v3 8/8] arm64: dts: qcom: x1e80100: Add deepest idle state Maulik Shah
2026-06-18 8:25 ` Konrad Dybcio
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