* [PATCH 1/4] DW DMAC: rename is_private property as ordered by DT policy
From: Eugeniy Paltsev @ 2016-11-16 13:56 UTC (permalink / raw)
To: devicetree
Cc: robh+dt, mark.rutland, linux-kernel, andriy.shevchenko, vireshk,
dan.j.williams, vinod.koul, dmaengine, linux-snps-arc,
Eugeniy Paltsev
In-Reply-To: <1479304615-11360-1-git-send-email-Eugeniy.Paltsev@synopsys.com>
Rename is_private to is-private as ordered by DT policy.
The change leaves the support for the old format.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
---
drivers/dma/dw/platform.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/dma/dw/platform.c b/drivers/dma/dw/platform.c
index 5bda0eb..4103f1d 100644
--- a/drivers/dma/dw/platform.c
+++ b/drivers/dma/dw/platform.c
@@ -128,6 +128,8 @@ dw_dma_parse_dt(struct platform_device *pdev)
if (of_property_read_bool(np, "is_private"))
pdata->is_private = true;
+ else if (of_property_read_bool(np, "is-private"))
+ pdata->is_private = true;
if (!of_property_read_u32(np, "chan_allocation_order", &tmp))
pdata->chan_allocation_order = (unsigned char)tmp;
--
2.5.5
^ permalink raw reply related
* [PATCH 0/4] DW DMAC: update device tree
From: Eugeniy Paltsev @ 2016-11-16 13:56 UTC (permalink / raw)
To: devicetree-u79uwXL29TY76Z2rM5mHXA
Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
andriy.shevchenko-VuQAYsv1563Yd54FQh9/CA,
vireshk-DgEjT+Ai2ygdnm+yROfE0A,
dan.j.williams-ral2JQCrhuEAvxtiuMwx3w,
vinod.koul-ral2JQCrhuEAvxtiuMwx3w,
dmaengine-u79uwXL29TY76Z2rM5mHXA,
linux-snps-arc-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Eugeniy Paltsev
It wasn't possible to enable some features like
memory-to-memory transfers or multi block transfers via DT.
It is fixed by these patches.
* Rename is_private to is-private as ordered by DT policy.
(just for cleanup) The change leaves the support for the
old format.
* Add is-memcpu property, so it is possible to
enable memory-to-memory transfers support via DT.
* Add hw-llp property, so it is possible to enable
hardware multi block transfers support via DT.
* Update DW DMAC device tree documentation.
Eugeniy Paltsev (4):
DW DMAC: rename is_private property as ordered by DT policy
DW DMAC: add is-memcpu property to device tree
DW DMAC: add hw-llp property to device tree
Update device tree Synopsys DW DMAC documentation
Documentation/devicetree/bindings/dma/snps-dma.txt | 10 ++++++++--
drivers/dma/dw/core.c | 2 +-
drivers/dma/dw/platform.c | 10 ++++++++++
include/linux/platform_data/dma-dw.h | 4 ++--
4 files changed, 21 insertions(+), 5 deletions(-)
--
2.5.5
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^ permalink raw reply
* Re: [RESEND PATCH v4] pwm: add pwm driver for HiSilicon BVT SOCs
From: Rob Herring @ 2016-11-16 13:48 UTC (permalink / raw)
To: Jian Yuan
Cc: thierry.reding, mark.rutland, linux-pwm, devicetree, linux-kernel,
xuejiancheng, kevin.lixu, jalen.hsu
In-Reply-To: <1479213692-223477-1-git-send-email-yuanjian12@hisilicon.com>
On Tue, Nov 15, 2016 at 08:41:32PM +0800, Jian Yuan wrote:
> From: yuanjian <yuanjian12@hisilicon.com>
>
> Add PWM driver for the PWM controller found on HiSilicon BVT SOCs, like Hi3519V100, Hi3516CV300, etc.
Wrap your lines at ~72 chars.
> The PWM controller is primarily in charge of controlling P-Iris lens.
>
> Reviewed-by: Jiancheng Xue <xuejiancheng@hisilicon.com>
> Signed-off-by: Jian Yuan <yuanjian12@hisilicon.com>
> ---
> Change Log:
> v4:
> Add #pwm-cells in the bindings document.
> v3:
> fixed issues pointed by thierry.
> Add PWM compatible string for Hi3519V100.
> Implement .apply() function which support atomic, instead of .enable()/.disable()/.config().
> v2:
> The number of PWMs is change to be probeable based on the compatible string.
>
> .../devicetree/bindings/pwm/pwm-hibvt.txt | 23 ++
> drivers/pwm/Kconfig | 9 +
> drivers/pwm/Makefile | 1 +
> drivers/pwm/pwm-hibvt.c | 270 +++++++++++++++++++++
> 4 files changed, 303 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pwm/pwm-hibvt.txt
> create mode 100644 drivers/pwm/pwm-hibvt.c
>
> diff --git a/Documentation/devicetree/bindings/pwm/pwm-hibvt.txt b/Documentation/devicetree/bindings/pwm/pwm-hibvt.txt
> new file mode 100644
> index 0000000..609284f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pwm/pwm-hibvt.txt
> @@ -0,0 +1,23 @@
> +Hisilicon PWM controller
> +
> +Required properties:
> +-compatible: should contain one SoC specific compatible string and one generic compatible
ditto
> +string "hisilicon, hibvt-pwm". The SoC specific strings supported including:
> + "hisilicon,hi3516cv300-pwm"
> + "hisilicon,hi3519v100-pwm"
> +- reg: physical base address and length of the controller's registers.
> +- clocks: phandle and clock specifier of the PWM reference clock.
> +- resets: phandle and reset specifier for the PWM controller reset.
> +- #pwm-cells: Should be 2. See pwm.txt in this directory for a description of
> + the cells format.
> +
> +Example:
> + pwm: pwm@12130000 {
> +
> + compatible = "hisilicon,hi3516cv300-pwm", "hisilicon,hibvt-pwm";
> + compatible = "hisilicon,hi3519v100-pwm", "hisilicon,hibvt-pwm";
??
> + reg = <0x12130000 0x10000>;
> + clocks = <&crg_ctrl HI3516CV300_PWM_CLK>;
> + resets = <&crg_ctrl 0x38 0>;
> + #pwm-cells = <2>;
> + };
^ permalink raw reply
* Re: [PATCHv2 09/10] mmc: dw_mmc: The "clock-freq-min-max" property was deprecated
From: Rob Herring @ 2016-11-16 13:45 UTC (permalink / raw)
To: Jaehoon Chung; +Cc: linux-mmc, devicetree, ulf.hansson, heiko, shawn.lin
In-Reply-To: <20161115101232.3854-10-jh80.chung@samsung.com>
On Tue, Nov 15, 2016 at 07:12:31PM +0900, Jaehoon Chung wrote:
> The "clock-freq-min-max" property was deprecated.
> There is "max-frequency" property in drivers/mmc/core/host.c
> "max-frequency" can be replaced with "clock-freq-min-max".
> Minimum clock value might be set to 100K by default.
> Then MMC core should try to find the correct value from 400K to 100K.
> So it just needs to set Maximum clock value.
>
> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
> ---
> Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt | 3 ++-
> drivers/mmc/host/dw_mmc.c | 2 ++
> 2 files changed, 4 insertions(+), 1 deletion(-)
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* Re: [PATCH v7 3/3] clocksource: Add clockevent support to NPS400 driver
From: Rob Herring @ 2016-11-16 13:44 UTC (permalink / raw)
To: Noam Camus
Cc: mark.rutland-5wv7dgnIgG8, daniel.lezcano-QSEj5FYQhm4dnm+yROfE0A,
tglx-hfZtesqFncYOwBW4kG4KsQ, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <1479199859-980-4-git-send-email-noamca-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>
On Tue, Nov 15, 2016 at 10:50:59AM +0200, Noam Camus wrote:
> From: Noam Camus <noamca-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>
>
> Till now we used clockevent from generic ARC driver.
> This was enough as long as we worked with simple multicore SoC.
> When we are working with multithread SoC each HW thread can be
> scheduled to receive timer interrupt using timer mask register.
> This patch will provide a way to control clock events per HW thread.
>
> The design idea is that for each core there is dedicated register
> (TSI) serving all 16 HW threads.
> The register is a bitmask with one bit for each HW thread.
> When HW thread wants that next expiration of timer interrupt will
> hit it then the proper bit should be set in this dedicated register.
> When timer expires all HW threads within this core which their bit
> is set at the TSI register will be interrupted.
>
> Driver can be used from device tree by:
> compatible = "ezchip,nps400-timer0" <-- for clocksource
> compatible = "ezchip,nps400-timer1" <-- for clockevent
>
> Note that name convention for timer0/timer1 was taken from legacy
> ARC design. This design is our base before adding HW threads.
> For backward compatibility we keep "ezchip,nps400-timer" for clocksource
>
> Signed-off-by: Noam Camus <noamca-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>
> ---
> .../bindings/timer/ezchip,nps400-timer.txt | 15 --
> .../bindings/timer/ezchip,nps400-timer0.txt | 17 ++
> .../bindings/timer/ezchip,nps400-timer1.txt | 15 ++
Please add acks when reposting.
Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> drivers/clocksource/timer-nps.c | 170 ++++++++++++++++++++
> 4 files changed, 202 insertions(+), 15 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/timer/ezchip,nps400-timer.txt
> create mode 100644 Documentation/devicetree/bindings/timer/ezchip,nps400-timer0.txt
> create mode 100644 Documentation/devicetree/bindings/timer/ezchip,nps400-timer1.txt
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^ permalink raw reply
* Re: [PATCH] [media] ir-hix5hd2: make hisilicon,power-syscon property deprecated
From: Rob Herring @ 2016-11-16 13:37 UTC (permalink / raw)
To: Jiancheng Xue
Cc: mark.rutland-5wv7dgnIgG8, mchehab-DgEjT+Ai2ygdnm+yROfE0A,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-media-u79uwXL29TY76Z2rM5mHXA,
yanhaifeng-C8/M+/jPZTeaMJb+Lgu22Q,
hermit.wangheming-C8/M+/jPZTeaMJb+Lgu22Q,
elder-QSEj5FYQhm4dnm+yROfE0A, bin.chen-QSEj5FYQhm4dnm+yROfE0A,
Ruqiang Ju
In-Reply-To: <1479195092-20090-1-git-send-email-xuejiancheng-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
On Tue, Nov 15, 2016 at 03:31:32PM +0800, Jiancheng Xue wrote:
> From: Ruqiang Ju <juruqiang-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
>
> The clock of IR can be provided by the clock provider and controlled
> by common clock framework APIs.
>
> Signed-off-by: Ruqiang Ju <juruqiang-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
> Signed-off-by: Jiancheng Xue <xuejiancheng-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
> ---
> .../devicetree/bindings/media/hix5hd2-ir.txt | 6 +++---
Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> drivers/media/rc/ir-hix5hd2.c | 25 ++++++++++++++--------
> 2 files changed, 19 insertions(+), 12 deletions(-)
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^ permalink raw reply
* Re: [PATCH] clk: qcom: smd-rpm: Add msm8974 clocks
From: Rob Herring @ 2016-11-16 13:36 UTC (permalink / raw)
To: Bjorn Andersson
Cc: Michael Turquette, Stephen Boyd, linux-clk-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
linux-soc-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <1479192844-1281-1-git-send-email-bjorn.andersson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
On Mon, Nov 14, 2016 at 10:54:04PM -0800, Bjorn Andersson wrote:
> This adds all RPM based clocks for msm8974 except cxo and gfx3d_clk_src.
>
> Signed-off-by: Bjorn Andersson <bjorn.andersson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> ---
> .../devicetree/bindings/clock/qcom,rpmcc.txt | 1 +
> drivers/clk/qcom/clk-smd-rpm.c | 71 ++++++++++++++++++++++
> include/dt-bindings/clock/qcom,rpmcc.h | 40 +++++++++++-
> 3 files changed, 110 insertions(+), 2 deletions(-)
Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
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^ permalink raw reply
* Re: [PATCH 1/2] can: holt_hi311x: document device tree bindings
From: Rob Herring @ 2016-11-16 13:34 UTC (permalink / raw)
To: Akshay Bhat
Cc: wg, mkl, mark.rutland, linux-can, netdev, devicetree,
linux-kernel, Akshay Bhat
In-Reply-To: <1479146144-29143-1-git-send-email-akshay.bhat@timesys.com>
On Mon, Nov 14, 2016 at 12:55:43PM -0500, Akshay Bhat wrote:
> Document the HOLT HI-311x CAN device tree bindings.
>
> Signed-off-by: Akshay Bhat <nodeax@gmail.com>
> ---
> .../devicetree/bindings/net/can/holt_hi311x.txt | 24 ++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/net/can/holt_hi311x.txt
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* Re: [PATCH v2 2/3] drm/bridge: Add ti-tfp410 DVI transmitter driver
From: Rob Herring @ 2016-11-16 13:33 UTC (permalink / raw)
To: Jyri Sarha
Cc: devicetree, bcousson, khilman, dri-devel, bgolaszewski,
tomi.valkeinen, laurent.pinchart
In-Reply-To: <b4589c6a3275c0c7c8e3c379faedba3ce1423c5a.1479142062.git.jsarha@ti.com>
On Mon, Nov 14, 2016 at 06:54:17PM +0200, Jyri Sarha wrote:
> Add very basic ti-ftp410 DVI transmitter driver. The only feature
> separating this from a completely dummy bridge is the EDID read
> support trough DDC I2C. Even that functionality should be in a
> separate generic connector driver. However, because of missing DRM
> infrastructure support the connector is implemented within the bridge
> driver. Some tfp410 HW specific features may be added later if needed,
> because there is a set of registers behind i2c if it is connected.
>
> This implementations is tested against my new tilcdc bridge support
> and it works with BeagleBone DVI-D Cape Rev A3. A DT binding document
> is also added.
>
> Signed-off-by: Jyri Sarha <jsarha@ti.com>
> ---
> .../bindings/display/bridge/ti,tfp410.txt | 41 ++++
> drivers/gpu/drm/bridge/Kconfig | 7 +
> drivers/gpu/drm/bridge/Makefile | 1 +
> drivers/gpu/drm/bridge/ti-tfp410.c | 223 +++++++++++++++++++++
> 4 files changed, 272 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/bridge/ti,tfp410.txt
> create mode 100644 drivers/gpu/drm/bridge/ti-tfp410.c
>
> diff --git a/Documentation/devicetree/bindings/display/bridge/ti,tfp410.txt b/Documentation/devicetree/bindings/display/bridge/ti,tfp410.txt
> new file mode 100644
> index 0000000..7446b2b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/bridge/ti,tfp410.txt
> @@ -0,0 +1,41 @@
> +TFP410 DVI bridge bindings
> +
> +Required properties:
> + - compatible: "ti,tfp410"
> +
> +Optional properties
> + - reg: I2C address. If and only if present the driver node
> + should be placed into the i2c controller node where the
> + tfp410 i2c is connected to (the current implementation does
> + not yet support this).
So this chip can work without programming I guess?
reg should only be not present if I2C is not connected in the design. It
can't be a function of what the driver supports. In otherwords, you
can't be moving this node around based on when you add I2C control.
Rob
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply
* Re: [PATCHv0 1/1] fbdev: add Intel FPGA FRAME BUFFER driver
From: kbuild test robot @ 2016-11-16 13:33 UTC (permalink / raw)
Cc: kbuild-all, Tomi Valkeinen, devicetree, linux-kernel, linux-fbdev,
Ong Hean Loong
In-Reply-To: <1479287278-5192-1-git-send-email-hean.loong.ong@intel.com>
[-- Attachment #1: Type: text/plain, Size: 1202 bytes --]
Hi Ong,
[auto build test WARNING on linus/master]
[also build test WARNING on v4.9-rc5 next-20161116]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Ong-Hean-Loong/fbdev-add-Intel-FPGA-FRAME-BUFFER-driver/20161116-173833
config: s390-allmodconfig (attached as .config)
compiler: s390x-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705
reproduce:
wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=s390
All warnings (new ones prefixed by >>):
warning: (DRM_KMS_FB_HELPER && FB_INTEL_FPGA_VIP) selects FRAMEBUFFER_CONSOLE which has unmet direct dependencies (HAS_IOMEM && VT && FB && !UML)
warning: (DRM_KMS_FB_HELPER && FB_INTEL_FPGA_VIP) selects FRAMEBUFFER_CONSOLE_DETECT_PRIMARY which has unmet direct dependencies (HAS_IOMEM && VT && FRAMEBUFFER_CONSOLE)
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 43320 bytes --]
^ permalink raw reply
* Re: [PATCH v5 4/5] USB: ohci: da8xx: Add devicetree bindings
From: Rob Herring @ 2016-11-16 13:26 UTC (permalink / raw)
To: Axel Haslam
Cc: gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r,
stern-nwvwT67g6+6dFdvTe/nMLpVzexx5G7lz,
khilman-DgEjT+Ai2ygdnm+yROfE0A, kishon-l0cyMroinI0,
linux-usb-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, mark.rutland-5wv7dgnIgG8,
devicetree-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20161114144103.12120-5-ahaslam-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
On Mon, Nov 14, 2016 at 03:41:02PM +0100, Axel Haslam wrote:
> This patch documents the device tree bindings required for
> the ohci controller found in TI da8xx family of SoC's
>
> Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
> Cc: mark.rutland-5wv7dgnIgG8@public.gmane.org
> Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> Signed-off-by: Axel Haslam <ahaslam-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
> ---
> .../devicetree/bindings/usb/ohci-da8xx.txt | 23 ++++++++++++++++++++++
> 1 file changed, 23 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/usb/ohci-da8xx.txt
Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
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^ permalink raw reply
* Re: [PATCH net 1/3] net: phy: realtek: add eee advertisement disable options
From: Andrew Lunn @ 2016-11-16 13:23 UTC (permalink / raw)
To: Jerome Brunet
Cc: Florian Fainelli, netdev-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA, Carlo Caione, Kevin Hilman,
Giuseppe Cavallaro, Alexandre TORGUE, Martin Blumenstingl,
Andre Roth, Neil Armstrong,
linux-amlogic-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <1479290189.17538.25.camel-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
> There two kind of PHYs supporting eee, the one advertising eee by
> default (like realtek) and the one not advertising it (like micrel).
I don't know too much about EEE. So maybe a dumb question. Does the
MAC need to be involved? Or is it just the PHY?
If the MAC needs to be involved, the PHY should not be advertising EEE
unless the MAC asks for it by calling phy_init_eee(). If this is true,
maybe we need to change the realtek driver, and others in that class.
Andrew
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^ permalink raw reply
* Re: [PATCH v4 1/2] Add OV5647 device tree documentation
From: Rob Herring @ 2016-11-16 13:21 UTC (permalink / raw)
To: Ramiro Oliveira
Cc: mchehab-DgEjT+Ai2ygdnm+yROfE0A,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-media-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA, davem-fT/PcQaiUtIeIZ0/mPfg9Q,
gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r,
geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ,
akpm-de/tnXTf+JLsfHDXvbKv3WD2FQJk+8+b,
linux-0h96xk9xTtrk1uMJSBkQmQ, hverkuil-qWit8jRvyhVmR6Xm/wNWPw,
dheitmueller-eb9eJ82Ua7k9XoPSrs7Ehg,
slongerbeam-Re5JQEeQqe8AvxtiuMwx3w, lars-Qo5EllUWu/uELgA04lAiVw,
robert.jarzmik-GANU6spQydw, pavel-+ZI9xUNit7I,
pali.rohar-Re5JQEeQqe8AvxtiuMwx3w,
sakari.ailus-VuQAYsv1563Yd54FQh9/CA, mark.rutland-5wv7dgnIgG8,
CARLOS.PALMINHA-HKixBCOQz3hWk0Htik3J/w
In-Reply-To: <4b22cb1d055cdcae5cff1dd86672b6dc6a8726ce.1479129004.git.roliveir-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>
On Mon, Nov 14, 2016 at 01:46:32PM +0000, Ramiro Oliveira wrote:
> Add device tree documentation.
>
> Signed-off-by: Ramiro Oliveira <roliveir-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>
> ---
> .../devicetree/bindings/media/i2c/ov5647.txt | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/media/i2c/ov5647.txt
Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
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^ permalink raw reply
* [PATCH v2] ARM: dts: sun5i: Add touchscreen node to reference-design-tablet.dtsi
From: Hans de Goede @ 2016-11-16 13:15 UTC (permalink / raw)
To: Maxime Ripard, Chen-Yu Tsai
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree,
Hans de Goede
Just like on sun8i all sun5i tablets use the same interrupt and power
gpios for their touchscreens. I've checked all known a13 fex files and
only the UTOO P66 uses a different gpio for the interrupt.
Add a touchscreen node to sun5i-reference-design-tablet.dtsi, which
fills in the necessary gpios to avoid duplication in the tablet dts files,
just like we do in sun8i-reference-design-tablet.dtsi.
This will make future patches adding touchscreen nodes to a13 tablets
simpler.
Signed-off-by: Hans de Goede <hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
---
Changes in v2:
-Use generic pin mux properties "pins", "function", "drive-strength" and
"bias-disable"
---
arch/arm/boot/dts/sun5i-a13-utoo-p66.dts | 38 ++++++++--------------
.../boot/dts/sun5i-reference-design-tablet.dtsi | 25 ++++++++++++++
2 files changed, 39 insertions(+), 24 deletions(-)
diff --git a/arch/arm/boot/dts/sun5i-a13-utoo-p66.dts b/arch/arm/boot/dts/sun5i-a13-utoo-p66.dts
index a8b0bcc..3d7ff10 100644
--- a/arch/arm/boot/dts/sun5i-a13-utoo-p66.dts
+++ b/arch/arm/boot/dts/sun5i-a13-utoo-p66.dts
@@ -83,22 +83,6 @@
allwinner,pins = "PG3";
};
-&i2c1 {
- icn8318: touchscreen@40 {
- compatible = "chipone,icn8318";
- reg = <0x40>;
- interrupt-parent = <&pio>;
- interrupts = <6 9 IRQ_TYPE_EDGE_FALLING>; /* EINT9 (PG9) */
- pinctrl-names = "default";
- pinctrl-0 = <&ts_wake_pin_p66>;
- wake-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */
- touchscreen-size-x = <800>;
- touchscreen-size-y = <480>;
- touchscreen-inverted-x;
- touchscreen-swapped-x-y;
- };
-};
-
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins_a>;
@@ -121,20 +105,26 @@
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
};
-
- ts_wake_pin_p66: ts_wake_pin@0 {
- allwinner,pins = "PB3";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
};
®_usb0_vbus {
gpio = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */
};
+&touchscreen {
+ compatible = "chipone,icn8318";
+ reg = <0x40>;
+ /* The P66 uses a different EINT then the reference design */
+ interrupts = <6 9 IRQ_TYPE_EDGE_FALLING>; /* EINT9 (PG9) */
+ /* The icn8318 binding expects wake-gpios instead of power-gpios */
+ wake-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */
+ touchscreen-size-x = <800>;
+ touchscreen-size-y = <480>;
+ touchscreen-inverted-x;
+ touchscreen-swapped-x-y;
+ status = "okay";
+};
+
&uart1 {
/* The P66 uses the uart pins as gpios */
status = "disabled";
diff --git a/arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi b/arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi
index 20cc940..82f87cd 100644
--- a/arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi
+++ b/arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi
@@ -41,6 +41,7 @@
*/
#include "sunxi-reference-design-tablet.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pwm/pwm.h>
/ {
@@ -84,6 +85,23 @@
};
&i2c1 {
+ /*
+ * The gsl1680 is rated at 400KHz and it will not work reliable at
+ * 100KHz, this has been confirmed on multiple different q8 tablets.
+ * All other devices on this bus are also rated for 400KHz.
+ */
+ clock-frequency = <400000>;
+
+ touchscreen: touchscreen {
+ interrupt-parent = <&pio>;
+ interrupts = <6 11 IRQ_TYPE_EDGE_FALLING>; /* EINT11 (PG11) */
+ pinctrl-names = "default";
+ pinctrl-0 = <&ts_power_pin>;
+ power-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */
+ /* Tablet dts must provide reg and compatible */
+ status = "disabled";
+ };
+
pcf8563: rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
@@ -125,6 +143,13 @@
allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
};
+ ts_power_pin: ts_power_pin {
+ pins = "PB3";
+ function = "gpio_out";
+ drive-strength = <10>;
+ bias-disable;
+ };
+
usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
allwinner,pins = "PG1";
allwinner,function = "gpio_in";
--
2.9.3
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^ permalink raw reply related
* Re: [PATCHv0 1/1] fbdev: add Intel FPGA FRAME BUFFER driver
From: kbuild test robot @ 2016-11-16 12:45 UTC (permalink / raw)
Cc: kbuild-all-JC7UmRfGjtg, Tomi Valkeinen,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-fbdev-u79uwXL29TY76Z2rM5mHXA, Ong Hean Loong
In-Reply-To: <1479287278-5192-1-git-send-email-hean.loong.ong-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
[-- Attachment #1: Type: text/plain, Size: 5143 bytes --]
Hi Ong,
[auto build test ERROR on linus/master]
[also build test ERROR on v4.9-rc5 next-20161116]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Ong-Hean-Loong/fbdev-add-Intel-FPGA-FRAME-BUFFER-driver/20161116-173833
config: blackfin-allmodconfig (attached as .config)
compiler: bfin-uclinux-gcc (GCC) 6.2.0
reproduce:
wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=blackfin
All errors (new ones prefixed by >>):
mm/compaction.c: In function 'isolate_migratepages_block':
>> mm/compaction.c:821:9: error: implicit declaration of function 'isolate_movable_page' [-Werror=implicit-function-declaration]
if (isolate_movable_page(page, isolate_mode))
^~~~~~~~~~~~~~~~~~~~
cc1: some warnings being treated as errors
--
In file included from mm/cma.c:28:0:
>> include/linux/memblock.h:425:15: error: unknown type name 'phys_addr_t'
static inline phys_addr_t memblock_alloc(phys_addr_t size, phys_addr_t align)
^~~~~~~~~~~
include/linux/memblock.h:425:42: error: unknown type name 'phys_addr_t'
static inline phys_addr_t memblock_alloc(phys_addr_t size, phys_addr_t align)
^~~~~~~~~~~
include/linux/memblock.h:425:60: error: unknown type name 'phys_addr_t'
static inline phys_addr_t memblock_alloc(phys_addr_t size, phys_addr_t align)
^~~~~~~~~~~
mm/cma.c: In function 'cma_init_reserved_mem':
>> mm/cma.c:182:16: error: implicit declaration of function 'memblock_is_region_reserved' [-Werror=implicit-function-declaration]
if (!size || !memblock_is_region_reserved(base, size))
^~~~~~~~~~~~~~~~~~~~~~~~~~~
mm/cma.c: In function 'cma_declare_contiguous':
>> mm/cma.c:234:29: error: implicit declaration of function 'memblock_end_of_DRAM' [-Werror=implicit-function-declaration]
phys_addr_t memblock_end = memblock_end_of_DRAM();
^~~~~~~~~~~~~~~~~~~~
>> mm/cma.c:305:7: error: implicit declaration of function 'memblock_reserve' [-Werror=implicit-function-declaration]
memblock_reserve(base, size) < 0) {
^~~~~~~~~~~~~~~~
>> mm/cma.c:319:11: error: implicit declaration of function 'memblock_alloc_range' [-Werror=implicit-function-declaration]
addr = memblock_alloc_range(size, alignment,
^~~~~~~~~~~~~~~~~~~~
>> mm/cma.c:321:11: error: 'MEMBLOCK_NONE' undeclared (first use in this function)
MEMBLOCK_NONE);
^~~~~~~~~~~~~
mm/cma.c:321:11: note: each undeclared identifier is reported only once for each function it appears in
cc1: some warnings being treated as errors
vim +/isolate_movable_page +821 mm/compaction.c
bda807d4 Minchan Kim 2016-07-26 805 * It's possible to migrate LRU and non-lru movable pages.
bda807d4 Minchan Kim 2016-07-26 806 * Skip any other type of page
bda807d4 Minchan Kim 2016-07-26 807 */
bda807d4 Minchan Kim 2016-07-26 808 if (!PageLRU(page)) {
bda807d4 Minchan Kim 2016-07-26 809 /*
bda807d4 Minchan Kim 2016-07-26 810 * __PageMovable can return false positive so we need
bda807d4 Minchan Kim 2016-07-26 811 * to verify it under page_lock.
bda807d4 Minchan Kim 2016-07-26 812 */
bda807d4 Minchan Kim 2016-07-26 813 if (unlikely(__PageMovable(page)) &&
bda807d4 Minchan Kim 2016-07-26 814 !PageIsolated(page)) {
bda807d4 Minchan Kim 2016-07-26 815 if (locked) {
a52633d8 Mel Gorman 2016-07-28 816 spin_unlock_irqrestore(zone_lru_lock(zone),
bda807d4 Minchan Kim 2016-07-26 817 flags);
bda807d4 Minchan Kim 2016-07-26 818 locked = false;
bda807d4 Minchan Kim 2016-07-26 819 }
bda807d4 Minchan Kim 2016-07-26 820
bda807d4 Minchan Kim 2016-07-26 @821 if (isolate_movable_page(page, isolate_mode))
bda807d4 Minchan Kim 2016-07-26 822 goto isolate_success;
bda807d4 Minchan Kim 2016-07-26 823 }
bda807d4 Minchan Kim 2016-07-26 824
fdd048e1 Vlastimil Babka 2016-05-19 825 goto isolate_fail;
bda807d4 Minchan Kim 2016-07-26 826 }
29c0dde8 Vlastimil Babka 2015-09-08 827
119d6d59 David Rientjes 2014-04-03 828 /*
119d6d59 David Rientjes 2014-04-03 829 * Migration will fail if an anonymous page is pinned in memory,
:::::: The code at line 821 was first introduced by commit
:::::: bda807d4445414e8e77da704f116bb0880fe0c76 mm: migrate: support non-lru movable page migration
:::::: TO: Minchan Kim <minchan-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
:::::: CC: Linus Torvalds <torvalds-de/tnXTf+JLsfHDXvbKv3WD2FQJk+8+b@public.gmane.org>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 42055 bytes --]
^ permalink raw reply
* Re: [PATCH V2 2/3] dt-bindings: mxsfb: Add new bindings for the MXSFB driver
From: Marek Vasut @ 2016-11-16 12:16 UTC (permalink / raw)
To: Rob Herring
Cc: dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, Lucas Stach,
Fabio Estevam, Shawn Guo, Daniel Vetter,
devicetree-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20161116002407.i4hnexjqzrxmn52g@rob-hp-laptop>
On 11/16/2016 01:24 AM, Rob Herring wrote:
> On Mon, Nov 14, 2016 at 11:10:35AM +0100, Marek Vasut wrote:
>> Add new DT bindings for new MXSFB driver that is using the
>> OF graph to parse the video output structure instead of
>> hard-coding the display properties into the MXSFB node.
>> The old MXSFB fbdev driver bindings are preserved in the
>> same file in the "Old bindings" section.
>>
>> Signed-off-by: Marek Vasut <marex-ynQEQJNshbs@public.gmane.org>
>> Cc: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
>> Cc: Lucas Stach <l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
>> Cc: Fabio Estevam <fabio.estevam-3arQi8VN3Tc@public.gmane.org>
>> Cc: Shawn Guo <shawnguo-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
>> Cc: Daniel Vetter <daniel.vetter-/w4YWyX8dFk@public.gmane.org>
>> Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
>> --
>> V2: - Merge the new bindings into mxsfb.txt file instead of keeping
>> them in separate mxsfb-drm.txt file.
>> - Add dedicated compatible for i.MX6SX
>> - Drop all references to DRM/KMS
>> - Repair the required bits in clock node
>> ---
>> .../devicetree/bindings/display/mxsfb.txt | 37 ++++++++++++++++++++++
>> 1 file changed, 37 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/display/mxsfb.txt b/Documentation/devicetree/bindings/display/mxsfb.txt
>> index a4431f2..6e92593 100644
>> --- a/Documentation/devicetree/bindings/display/mxsfb.txt
>> +++ b/Documentation/devicetree/bindings/display/mxsfb.txt
>> @@ -1,5 +1,42 @@
>> * Freescale MXS LCD Interface (LCDIF)
>>
>> +New bindings:
>> +=============
>> +Required properties:
>> +- compatible: Should be "fsl,imx23-lcdif" for i.MX23.
>> + Should be "fsl,imx28-lcdif" for i.MX28.
>> + Should be "fsl,imx6sx-lcdif" for i.MX6SX.
>> +- reg: Address and length of the register set for lcdif
>
> s/lcdif/LCDIF/
>
>> +- interrupts: Should contain lcdif interrupts
>
> How many?
>
>> +- clocks: A list of phandle + clock-specifier pairs, one for each
>> + entry in 'clock-names'.
>> +- clock-names: A list of clock names. For MXSFB it should contain:
>> + - "pix" for the MXSFB block clock
>
> MXSFB is not a h/w block. LCDIF is the name.
>
>> + - (MX6SX-only) "axi", "disp_axi" for the bus interface clock
>> +
>> +Required sub-nodes:
>> + - port: The connection to an encoder chip.
>> +
>> +Example:
>> +
>> + lcdif1: lcdif@02220000 {
>
> display-controller@...
>
> Drop the leading 0 too.
Fixed all
>> + compatible = "fsl,imx6sx-lcdif", "fsl,imx28-lcdif";
>
> I'm not sure compatibility with mx28 is appropriate since you have the
> extra clocks. I guess if they don't need to be managed then it's okay.
The other two clock are optional
>> + reg = <0x02220000 0x4000>;
>> + interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&clks IMX6SX_CLK_LCDIF1_PIX>,
>> + <&clks IMX6SX_CLK_LCDIF_APB>,
>> + <&clks IMX6SX_CLK_DISPLAY_AXI>;
>> + clock-names = "pix", "axi", "disp_axi";
>> +
>> + port {
>> + parallel_out: endpoint {
>> + remote-endpoint = <&panel_in_parallel>;
>> + };
>> + };
>> + };
>> +
>> +Old bindings:
>
> s/Old/Deprecated/
Fixed
--
Best regards,
Marek Vasut
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^ permalink raw reply
* Re: [PATCH 1/2] regulator: max77620: add support to configure MPOK
From: Mark Brown @ 2016-11-16 12:16 UTC (permalink / raw)
To: Venkat Reddy Talla
Cc: lee.jones-QSEj5FYQhm4dnm+yROfE0A,
lgirdwood-Re5JQEeQqe8AvxtiuMwx3w, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
mark.rutland-5wv7dgnIgG8, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
ldewangan-DDmLM1+adcrQT0dZR+AlfA, svelpula-DDmLM1+adcrQT0dZR+AlfA
In-Reply-To: <1479297161-7705-1-git-send-email-vreddytalla-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
[-- Attachment #1: Type: text/plain, Size: 585 bytes --]
On Wed, Nov 16, 2016 at 05:22:40PM +0530, Venkat Reddy Talla wrote:
> Adding support to configure regulator POK mapping bit
> to control nRST_IO and GPIO1 POK function.
This leaves me none the wiser as to what this is supposed to do...
> + if (chip->chip_id == MAX20024) {
Please use switch statements so we can add new cases without rewriting
everything.
> + ret = of_property_read_u32(np, "maxim,power-ok-control", &pval);
> + rpdata->power_ok = (!ret) ? pval : -1;
> +
Please write normal logic statements, people need to be able to read the
code and understand what it does.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 455 bytes --]
^ permalink raw reply
* Re: [PATCH v2 10/10] ARM: dts: rockchip: add rockchip RK1108 Evaluation board
From: Heiko Stuebner @ 2016-11-16 11:59 UTC (permalink / raw)
To: Andy Yan
Cc: linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
mark.rutland-5wv7dgnIgG8,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA, linux-I+IVW8TIWO2tmTQ+vhA3Yw,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <1479125863-24646-1-git-send-email-andy.yan-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Am Montag, 14. November 2016, 20:17:43 CET schrieb Andy Yan:
> RK1108 EVB is designed by Rockchip for CVR field.
> This patch add basic support for it, which can boot with
> initramfs into shell.
>
> Signed-off-by: Andy Yan <andy.yan-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
>
> ---
>
> Changes in v2:
> - move the board in the rockchip.txt to the block of Rockchip boards
>
> Documentation/devicetree/bindings/arm/rockchip.txt | 5 +-
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/rk1108-evb.dts | 69
> ++++++++++++++++++++++ 3 files changed, 74 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/boot/dts/rk1108-evb.dts
>
> diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt
> b/Documentation/devicetree/bindings/arm/rockchip.txt index 10b92b5..e658b62
> 100644
> --- a/Documentation/devicetree/bindings/arm/rockchip.txt
> +++ b/Documentation/devicetree/bindings/arm/rockchip.txt
> @@ -1,6 +1,5 @@
> Rockchip platforms device tree bindings
> ---------------------------------------
> -
> - Kylin RK3036 board:
> Required root node properties:
> - compatible = "rockchip,kylin-rk3036", "rockchip,rk3036";
dropped this unrelated change
> @@ -111,6 +110,10 @@ Rockchip platforms device tree bindings
> Required root node properties:
> - compatible = "rockchip,px5-evb", "rockchip,px5", "rockchip,rk3368";
>
> +- Rockchip RK1108 Evaluation board
> + Required root node properties:
> + - compatible = "rockchip,rk1108-evb", "rockchip,rk1108";
> +
> - Rockchip RK3368 evb:
> Required root node properties:
> - compatible = "rockchip,rk3368-evb-act8846", "rockchip,rk3368";
binding moved to a separate patch and applied to my dts64 to prevent conflicts
with px5 addition.
And the actual board dts of course applied to my dts32 branch.
Thanks
Heiko
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^ permalink raw reply
* [PATCH v2] input: touchscreen: silead: Add regulator support
From: Hans de Goede @ 2016-11-16 11:55 UTC (permalink / raw)
To: Dmitry Torokhov, Rob Herring
Cc: linux-input, linux-arm-kernel, devicetree, Hans de Goede
On some tablets the touchscreen controller is powered by separate
regulators, add support for this.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Rob Herring <robh@kernel.org>
---
Changes in v2:
-Use devm_regulator_bulk_get() and friends
-Use devm_add_action_or_reset() to disable the regulator
---
.../bindings/input/touchscreen/silead_gsl1680.txt | 2 ++
drivers/input/touchscreen/silead.c | 29 ++++++++++++++++++++++
2 files changed, 31 insertions(+)
diff --git a/Documentation/devicetree/bindings/input/touchscreen/silead_gsl1680.txt b/Documentation/devicetree/bindings/input/touchscreen/silead_gsl1680.txt
index e844c3f..b726823 100644
--- a/Documentation/devicetree/bindings/input/touchscreen/silead_gsl1680.txt
+++ b/Documentation/devicetree/bindings/input/touchscreen/silead_gsl1680.txt
@@ -22,6 +22,8 @@ Optional properties:
- touchscreen-inverted-y : See touchscreen.txt
- touchscreen-swapped-x-y : See touchscreen.txt
- silead,max-fingers : maximum number of fingers the touchscreen can detect
+- vddio-supply : regulator phandle for controller VDDIO
+- avdd-supply : regulator phandle for controller AVDD
Example:
diff --git a/drivers/input/touchscreen/silead.c b/drivers/input/touchscreen/silead.c
index f502c84..404830a 100644
--- a/drivers/input/touchscreen/silead.c
+++ b/drivers/input/touchscreen/silead.c
@@ -29,6 +29,7 @@
#include <linux/input/touchscreen.h>
#include <linux/pm.h>
#include <linux/irq.h>
+#include <linux/regulator/consumer.h>
#include <asm/unaligned.h>
@@ -73,6 +74,7 @@ struct silead_ts_data {
struct i2c_client *client;
struct gpio_desc *gpio_power;
struct input_dev *input;
+ struct regulator_bulk_data regulators[2];
char fw_name[64];
struct touchscreen_properties prop;
u32 max_fingers;
@@ -433,6 +435,13 @@ static int silead_ts_set_default_fw_name(struct silead_ts_data *data,
}
#endif
+static void silead_disable_regulator(void *arg)
+{
+ struct silead_ts_data *data = arg;
+
+ regulator_bulk_disable(ARRAY_SIZE(data->regulators), data->regulators);
+}
+
static int silead_ts_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
@@ -465,6 +474,26 @@ static int silead_ts_probe(struct i2c_client *client,
if (client->irq <= 0)
return -ENODEV;
+ data->regulators[0].supply = "vddio";
+ data->regulators[1].supply = "avdd";
+ error = devm_regulator_bulk_get(dev, ARRAY_SIZE(data->regulators),
+ data->regulators);
+ if (error)
+ return error;
+
+ /*
+ * Enable regulators at probe and disable them at remove, we need
+ * to keep the chip powered otherwise it forgets its firmware.
+ */
+ error = regulator_bulk_enable(ARRAY_SIZE(data->regulators),
+ data->regulators);
+ if (error)
+ return error;
+
+ error = devm_add_action_or_reset(dev, silead_disable_regulator, data);
+ if (error)
+ return error;
+
/* Power GPIO pin */
data->gpio_power = devm_gpiod_get_optional(dev, "power", GPIOD_OUT_LOW);
if (IS_ERR(data->gpio_power)) {
--
2.9.3
^ permalink raw reply related
* Re: [PATCH v2 08/10] ARM: dts: add basic support for Rockchip RK1108 SOC
From: Heiko Stuebner @ 2016-11-16 11:53 UTC (permalink / raw)
To: Andy Yan
Cc: mark.rutland-5wv7dgnIgG8, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-I+IVW8TIWO2tmTQ+vhA3Yw, linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A
In-Reply-To: <2204596.BeWafPDT3k@phil>
Am Dienstag, 15. November 2016, 12:45:16 CET schrieb Heiko Stuebner:
> Am Montag, 14. November 2016, 20:14:48 CET schrieb Andy Yan:
> > RK1108 is embedded with an ARM Cortex-A7 single core and a DSP core.
> > It is designed for varies application scenario such as car DVR, sports
> > DV, secure camera and UAV camera.
> >
> > This patch add basic support for it with DMAC / UART / CRU / pinctrl / MMC
> > enabled.
> >
> > Signed-off-by: Andy Yan <andy.yan-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> > Tested-by: Jacob Chen <jacob2.chen-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> >
> > ---
> >
> > Changes in v2:
> > - fix timer and gic dt description
> > - ordering devices by register address
> >
> > arch/arm/boot/dts/rk1108.dtsi | 428
> >
> > ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 428
> > insertions(+)
> >
> > create mode 100644 arch/arm/boot/dts/rk1108.dtsi
> >
> > diff --git a/arch/arm/boot/dts/rk1108.dtsi b/arch/arm/boot/dts/rk1108.dtsi
> > new file mode 100644
> > index 0000000..636c294
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/rk1108.dtsi
> > @@ -0,0 +1,428 @@
> > +/*
> > + * This file is dual-licensed: you can use it either under the terms
> > + * of the GPL or the X11 license, at your option. Note that this dual
> > + * licensing only applies to this file, and not this project as a
> > + * whole.
> > + *
> > + * a) This file is free software; you can redistribute it and/or
> > + * modify it under the terms of the GNU General Public License as
> > + * published by the Free Software Foundation; either version 2 of the
> > + * License, or (at your option) any later version.
> > + *
> > + * This file is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + *
> > + * Or, alternatively,
> > + *
> > + * b) Permission is hereby granted, free of charge, to any person
> > + * obtaining a copy of this software and associated documentation
> > + * files (the "Software"), to deal in the Software without
> > + * restriction, including without limitation the rights to use,
> > + * copy, modify, merge, publish, distribute, sublicense, and/or
> > + * sell copies of the Software, and to permit persons to whom the
> > + * Software is furnished to do so, subject to the following
> > + * conditions:
> > + *
> > + * The above copyright notice and this permission notice shall be
> > + * included in all copies or substantial portions of the Software.
> > + *
> > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> > + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> > + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> > + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> > + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> > + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> > + * OTHER DEALINGS IN THE SOFTWARE.
> > + */
> > +
> > +#include <dt-bindings/gpio/gpio.h>
> > +#include <dt-bindings/interrupt-controller/irq.h>
> > +#include <dt-bindings/interrupt-controller/arm-gic.h>
> > +#include <dt-bindings/clock/rk1108-cru.h>
> > +#include <dt-bindings/pinctrl/rockchip.h>
> > +/ {
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > +
> > + compatible = "rockchip,rk1108";
> > +
> > + interrupt-parent = <&gic>;
> > +
> > + aliases {
> > + serial0 = &uart0;
> > + serial1 = &uart1;
> > + serial2 = &uart2;
> > + };
> > +
> > + cpus {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + cpu0: cpu@f00 {
> > + device_type = "cpu";
> > + compatible = "arm,cortex-a7";
> > + reg = <0xf00>;
> > + };
> > + };
> > +
> > + arm-pmu {
> > + compatible = "arm,cortex-a7-pmu";
> > + interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
> > + };
> > +
> > +
>
> unnecessary empty line (only 1 please)
>
> otherwise looks fine now, just needs to wait for fixed clock ids now.
after Shawn fixed the clocks, applied now to my dts32 branch with that line
removed.
Thanks
Heiko
^ permalink raw reply
* [PATCH 2/2] dt-bindings: max77620: add documentation for MPOK property
From: Venkat Reddy Talla @ 2016-11-16 11:52 UTC (permalink / raw)
To: lee.jones-QSEj5FYQhm4dnm+yROfE0A,
lgirdwood-Re5JQEeQqe8AvxtiuMwx3w, broonie-DgEjT+Ai2ygdnm+yROfE0A,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: ldewangan-DDmLM1+adcrQT0dZR+AlfA, svelpula-DDmLM1+adcrQT0dZR+AlfA,
vreddytalla-DDmLM1+adcrQT0dZR+AlfA
In-Reply-To: <1479297161-7705-1-git-send-email-vreddytalla-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Adding documentation for maxim,power-ok-control dts property
Signed-off-by: Venkat Reddy Talla <vreddytalla-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
Documentation/devicetree/bindings/mfd/max77620.txt | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/Documentation/devicetree/bindings/mfd/max77620.txt b/Documentation/devicetree/bindings/mfd/max77620.txt
index 2ad44f7..9c16d51 100644
--- a/Documentation/devicetree/bindings/mfd/max77620.txt
+++ b/Documentation/devicetree/bindings/mfd/max77620.txt
@@ -106,6 +106,18 @@ Here supported time periods by device in microseconds are as follows:
MAX77620 supports 40, 80, 160, 320, 640, 1280, 2560 and 5120 microseconds.
MAX20024 supports 20, 40, 80, 160, 320, 640, 1280 and 2540 microseconds.
+-maxim,power-ok-control: configure map power ok bit
+ 1: Enables POK(Power OK) to control nRST_IO and GPIO1
+ POK function.
+ 0: Disables POK control.
+ if property missing, do not configure MPOK bit.
+ If POK mapping is enabled for GPIO1/nRST_IO then,
+ GPIO1/nRST_IO pins are HIGH only if all rails
+ that have POK control enabled are HIGH.
+ If any of the rails goes down(which are enabled for POK
+ control) then, GPIO1/nRST_IO goes LOW.
+ this property is valid for max20024 only.
+
For DT binding details of different sub modules like GPIO, pincontrol,
regulator, power, please refer respective device-tree binding document
under their respective sub-system directories.
--
2.1.4
--
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^ permalink raw reply related
* [PATCH 1/2] regulator: max77620: add support to configure MPOK
From: Venkat Reddy Talla @ 2016-11-16 11:52 UTC (permalink / raw)
To: lee.jones-QSEj5FYQhm4dnm+yROfE0A,
lgirdwood-Re5JQEeQqe8AvxtiuMwx3w, broonie-DgEjT+Ai2ygdnm+yROfE0A,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: ldewangan-DDmLM1+adcrQT0dZR+AlfA, svelpula-DDmLM1+adcrQT0dZR+AlfA,
vreddytalla-DDmLM1+adcrQT0dZR+AlfA
Adding support to configure regulator POK mapping bit
to control nRST_IO and GPIO1 POK function.
Signed-off-by: Venkat Reddy Talla <vreddytalla-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
drivers/regulator/max77620-regulator.c | 39 ++++++++++++++++++++++++++++++++++
include/linux/mfd/max77620.h | 2 ++
2 files changed, 41 insertions(+)
diff --git a/drivers/regulator/max77620-regulator.c b/drivers/regulator/max77620-regulator.c
index a1b49a6..973bed1 100644
--- a/drivers/regulator/max77620-regulator.c
+++ b/drivers/regulator/max77620-regulator.c
@@ -81,6 +81,7 @@ struct max77620_regulator_pdata {
int suspend_fps_pd_slot;
int suspend_fps_pu_slot;
int current_mode;
+ int power_ok;
int ramp_rate_setting;
};
@@ -351,11 +352,44 @@ static int max77620_set_slew_rate(struct max77620_regulator *pmic, int id,
return 0;
}
+static int max77620_config_power_ok(struct max77620_regulator *pmic, int id)
+{
+ struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id];
+ struct max77620_regulator_info *rinfo = pmic->rinfo[id];
+ struct max77620_chip *chip = dev_get_drvdata(pmic->dev->parent);
+ u8 val, mask;
+ int ret;
+
+ if (chip->chip_id == MAX20024) {
+ if (rpdata->power_ok >= 0) {
+ if (rinfo->type == MAX77620_REGULATOR_TYPE_SD)
+ mask = MAX20024_SD_CFG1_MPOK_MASK;
+ else
+ mask = MAX20024_LDO_CFG2_MPOK_MASK;
+
+ val = rpdata->power_ok ? mask : 0;
+
+ ret = regmap_update_bits(pmic->rmap, rinfo->cfg_addr,
+ mask, val);
+ if (ret < 0) {
+ dev_err(pmic->dev,
+ "Reg 0x%02x update failed %d\n",
+ rinfo->cfg_addr, ret);
+ return ret;
+ }
+ }
+ }
+
+ return 0;
+}
+
static int max77620_init_pmic(struct max77620_regulator *pmic, int id)
{
struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id];
int ret;
+ max77620_config_power_ok(pmic, id);
+
/* Update power mode */
ret = max77620_regulator_get_power_mode(pmic, id);
if (ret < 0)
@@ -595,6 +629,9 @@ static int max77620_of_parse_cb(struct device_node *np,
np, "maxim,suspend-fps-power-down-slot", &pval);
rpdata->suspend_fps_pd_slot = (!ret) ? pval : -1;
+ ret = of_property_read_u32(np, "maxim,power-ok-control", &pval);
+ rpdata->power_ok = (!ret) ? pval : -1;
+
ret = of_property_read_u32(np, "maxim,ramp-rate-setting", &pval);
rpdata->ramp_rate_setting = (!ret) ? pval : 0;
@@ -807,6 +844,8 @@ static int max77620_regulator_resume(struct device *dev)
for (id = 0; id < MAX77620_NUM_REGS; id++) {
reg_pdata = &pmic->reg_pdata[id];
+ max77620_config_power_ok(pmic, id);
+
max77620_regulator_set_fps_slots(pmic, id, false);
if (reg_pdata->active_fps_src < 0)
continue;
diff --git a/include/linux/mfd/max77620.h b/include/linux/mfd/max77620.h
index 3ca0af07..ad2a9a8 100644
--- a/include/linux/mfd/max77620.h
+++ b/include/linux/mfd/max77620.h
@@ -180,6 +180,7 @@
#define MAX77620_SD_CFG1_FPWM_SD_MASK BIT(2)
#define MAX77620_SD_CFG1_FPWM_SD_SKIP 0
#define MAX77620_SD_CFG1_FPWM_SD_FPWM BIT(2)
+#define MAX20024_SD_CFG1_MPOK_MASK BIT(1)
#define MAX77620_SD_CFG1_FSRADE_SD_MASK BIT(0)
#define MAX77620_SD_CFG1_FSRADE_SD_DISABLE 0
#define MAX77620_SD_CFG1_FSRADE_SD_ENABLE BIT(0)
@@ -187,6 +188,7 @@
/* LDO_CNFG2 */
#define MAX77620_LDO_POWER_MODE_MASK 0xC0
#define MAX77620_LDO_POWER_MODE_SHIFT 6
+#define MAX20024_LDO_CFG2_MPOK_MASK BIT(2)
#define MAX77620_LDO_CFG2_ADE_MASK BIT(1)
#define MAX77620_LDO_CFG2_ADE_DISABLE 0
#define MAX77620_LDO_CFG2_ADE_ENABLE BIT(1)
--
2.1.4
--
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^ permalink raw reply related
* Re: [PATCH v3 1/3] dt-bindings: add documentation for rk1108 cru
From: Heiko Stuebner @ 2016-11-16 11:38 UTC (permalink / raw)
To: Shawn Lin
Cc: Stephen Boyd, Rob Herring, devicetree-u79uwXL29TY76Z2rM5mHXA,
Andy Yan, Michael Turquette, linux-clk-u79uwXL29TY76Z2rM5mHXA,
linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <1479286163-34789-1-git-send-email-shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Am Mittwoch, 16. November 2016, 16:49:21 CET schrieb Shawn Lin:
> This adds the dt-binding documentation for the clock and reset unit
> found on Rockchip rk1108 SoCs.
>
> Signed-off-by: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
applied all 3
Thanks
Heiko
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^ permalink raw reply
* RE: [upstream-release] [PATCH 1/2] drivers: usb: phy: Add qoriq usb 3.0 phy driver support
From: Sriram Dash @ 2016-11-16 11:33 UTC (permalink / raw)
To: Scott Wood, linux-kernel@vger.kernel.org,
linux-usb@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Cc: mark.rutland@arm.com, felipe.balbi@linux.intel.com,
mathias.nyman@intel.com, catalin.marinas@arm.com,
will.deacon@arm.com, kishon@ti.com, robh+dt@kernel.org,
stern@rowland.harvard.edu, Suresh Gupta,
gregkh@linuxfoundation.org, pku.leo@gmail.com
In-Reply-To: <HE1PR0401MB1931C92287A8E92BC6B52B1991BE0@HE1PR0401MB1931.eurprd04.prod.outlook.com>
>From: Scott Wood
>On 11/15/2016 06:39 AM, Sriram Dash wrote:
>>> From: Scott Wood
>>> On 11/13/2016 11:27 PM, Sriram Dash wrote:
>>>> diff --git
>>>> a/Documentation/devicetree/bindings/phy/phy-qoriq-usb3.txt
>>>> b/Documentation/devicetree/bindings/phy/phy-qoriq-usb3.txt
>>>> new file mode 100644
>>>> index 0000000..d934c80
>>>> --- /dev/null
>>>> +++ b/Documentation/devicetree/bindings/phy/phy-qoriq-usb3.txt
>>>> @@ -0,0 +1,36 @@
>>>> +Driver for Freescale USB 3.0 PHY
>>>> +
>>>> +Required properties:
>>>> +
>>>> +- compatible : fsl,qoriq-usb3-phy
>>>
>>
>> Hi Scott,
>>
>>> This is a very vague compatible. Are there versioning registers
>>> within this register block?
>>>
>>
>> There are versioning registers for the phy (1.0 and 1.1). But the
>> current erratum
>> A008751 does not require the mentioning of the version numbers. Was
>> planning to take care of the versioning when there is code diversity
>> on the basis of the version number.
>
>That is not how device tree bindings work. The describe the hardware, not the
>driver.
>
>That said, is the block version sufficient to tell whether a given chip has this
>erratum? If so, you don't need a special property for the erratum. If not, what is
>different about the PHY that is not described by the versioning?
>
>In any case, it would be nice to mention the version register and its offset in the
>binding, just so that it becomes part of the definition of this compatible string, and
>if we come out with some QorIQ chip with a
>USB3 PHY that is totally different and doesn't have that version register, it'll be
>clear that it needs a different compatible.
>
Okay. Will include version number in the next rev for Documentation and dt.
>>>> +static inline u32 qoriq_usb3_phy_readl(void __iomem *addr, u32
>>>> +offset) {
>>>> + return __raw_readl(addr + offset); }
>>>> +
>>>> +static inline void qoriq_usb3_phy_writel(void __iomem *addr, u32 offset,
>>>> + u32 data)
>>>> +{
>>>> + __raw_writel(data, addr + offset); }
>>>
>>> Why raw? Besides missing barriers, this will cause the accesses to
>>> be native-endian which is not correct.
>>>
>>
>> The only reason for __raw_writel is to make the code faster.
>
>Does that really matter here?
>
>> However, shall I use writel(with both barriers and byte swap) instead
>
>Yes, if the registers are little-endian on all chips.
>
The endianness is not same for all Socs. But for most Socs, it is big-endian.
Is "iowrite32be" better instead?
>> and then make appropriate changes in the value 32'h27672B2A?
>
>Not sure what you mean here.
>
>> In my knowledge, there are more than 5 errata in pipeline,
>
>Then please get all of these errata described in the device tree ASAP (unless their
>presence can be reliably inferred from the block version, as discussed above).
>
Yes. We will push the errata asap.
>> However, in future, if any other erratum comes up, and it has to be
>> applied at any point other than during init, then the variable has to
>> be added in qoriq_usb3_phy struct and the property has to be read separately.
>
>Or if the erratum is detected by some means other than a device tree property...
>
Yes. For any other case also, it will be handled differently.
>-Scott
^ permalink raw reply
* [PATCH v5 2/2] ARM: dts: da850-lcdk: Enable the usb otg device node
From: Alexandre Bailon @ 2016-11-16 11:07 UTC (permalink / raw)
To: khilman, robh+dt, b-liu
Cc: linux-kernel, linux-usb, devicetree, linux-arm-kernel, nsekhar,
Alexandre Bailon
In-Reply-To: <1479294456-7942-1-git-send-email-abailon@baylibre.com>
This enables the usb otg controller for the lcdk board.
Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
---
arch/arm/boot/dts/da850-lcdk.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/da850-lcdk.dts b/arch/arm/boot/dts/da850-lcdk.dts
index 7b8ab21..03f9bfd 100644
--- a/arch/arm/boot/dts/da850-lcdk.dts
+++ b/arch/arm/boot/dts/da850-lcdk.dts
@@ -158,6 +158,14 @@
rx-num-evt = <32>;
};
+&usb_phy {
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+};
+
&aemif {
pinctrl-names = "default";
pinctrl-0 = <&nand_pins>;
--
2.7.3
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