* Re: [PATCH v2 10/11] arm64: dts: r8a77965-salvator-x: Enable DU external clocks and HDMI
From: Kuninori Morimoto @ 2018-05-29 1:44 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Kieran Bingham, Linux-Renesas, Laurent Pinchart, DRI Development,
Simon Horman, Magnus Damm, Rob Herring, Mark Rutland,
Catalin Marinas, Will Deacon,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:ARM64 PORT (AARCH64 ARCHITECTURE), open list
In-Reply-To: <CAMuHMdW6HeWMwRDcn6PLnwzgxvYz-h=jx=1qvYEK9okwqY0itg@mail.gmail.com>
Hi Geert
> > +&hdmi0_con {
> > + remote-endpoint = <&rcar_dw_hdmi0_out>;
> > +};
>
> I think the hdmi0 and hdmi0_con parts can be moved to salvator-common.dtsi.
> Can we do that now (with stubs?), or does this have to wait until r8a77965 has
> received HDMI sound support?
HDMI sound doesn't use hdmi0_con.
You can do it now, thanks
Best regards
---
Kuninori Morimoto
^ permalink raw reply
* [PATCH] dt-bindings: fsi-master-gpio: Document "no-gpio-delays" property
From: Benjamin Herrenschmidt @ 2018-05-29 1:43 UTC (permalink / raw)
To: linux-kernel, devicetree
Cc: Greg Kroah-Hartman, Jeremy Kerr, Joel Stanley, Christopher Bostic
In-Reply-To: <20180529013044.23815-6-benh@kernel.crashing.org>
Support for this is being added to the driver but the original
patch forgot to add this documentation.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
Documentation/devicetree/bindings/fsi/fsi-master-gpio.txt | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/fsi/fsi-master-gpio.txt b/Documentation/devicetree/bindings/fsi/fsi-master-gpio.txt
index a767259dedad..1e442450747f 100644
--- a/Documentation/devicetree/bindings/fsi/fsi-master-gpio.txt
+++ b/Documentation/devicetree/bindings/fsi/fsi-master-gpio.txt
@@ -11,6 +11,10 @@ Optional properties:
- trans-gpios = <gpio-descriptor>; : GPIO for voltage translator enable
- mux-gpios = <gpio-descriptor>; : GPIO for pin multiplexing with other
functions (eg, external FSI masters)
+ - no-gpio-delays; : Don't add extra delays between GPIO
+ accesses. This is useful when the HW
+ GPIO block is running at a low enough
+ frequency.
Examples:
^ permalink raw reply related
* Re: [PATCH 1/3] ASoC: simple-card: set cpu dai clk in hw_params
From: Kuninori Morimoto @ 2018-05-29 1:38 UTC (permalink / raw)
To: Daniel Mack; +Cc: devicetree, alsa-devel, broonie, lgirdwood
In-Reply-To: <20180528193503.18905-2-daniel@zonque.org>
Hi Daniel
> The simple-card driver currently accepts a clock node in the cpu dai
> sub-node and only uses it as an alternative to the
> 'system-clock-frequency' property to get the current frequency.
>
> This patch adds another use of the passed clock node. If mclk-fs is
> specified, the clock will be set to the calculated rate (stream rate *
> mclk_fs) in hw_params. This allows platforms to pass a tuneable clock
> as phandle that will automatically be set to the right rates.
>
> Signed-off-by: Daniel Mack <daniel@zonque.org>
> ---
(snip)
> if (mclk_fs) {
> mclk = params_rate(params) * mclk_fs;
> +
> + if (dai_props->cpu_dai.clk)
> + clk_set_rate(dai_props->cpu_dai.clk, mclk);
> +
> ret = snd_soc_dai_set_sysclk(codec_dai, 0, mclk,
> SND_SOC_CLOCK_IN);
> if (ret && ret != -ENOTSUPP)
Having codec is nice balance ?
Best regards
---
Kuninori Morimoto
^ permalink raw reply
* Re: [PATCH 2/3] ASoC: simple-card: make sysclk index configurable
From: Kuninori Morimoto @ 2018-05-29 1:35 UTC (permalink / raw)
To: Daniel Mack; +Cc: devicetree, alsa-devel, broonie, lgirdwood
In-Reply-To: <20180528193503.18905-3-daniel@zonque.org>
Hi Daniel
> The simple-card driver currently hard-codes the clk_id parameter in
> snd_soc_dai_set_sysclk() to 0. Make this configrable for both CPU and
> codec dai sub-nodes.
>
> This still has the limitation that only one clk_id can be configured, but it
> should help some more platforms to use simple-card in favor to a more
> specific machine driver.
>
> Signed-off-by: Daniel Mack <daniel@zonque.org>
> ---
> Documentation/devicetree/bindings/sound/simple-card.txt | 3 +++
> include/sound/simple_card_utils.h | 1 +
> sound/soc/generic/simple-card-utils.c | 3 +++
> sound/soc/generic/simple-card.c | 10 ++++++----
> 4 files changed, 13 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/sound/simple-card.txt b/Documentation/devicetree/bindings/sound/simple-card.txt
> index a4c72d09cd45..c8d268285a9e 100644
> --- a/Documentation/devicetree/bindings/sound/simple-card.txt
> +++ b/Documentation/devicetree/bindings/sound/simple-card.txt
> @@ -94,6 +94,9 @@ Optional CPU/CODEC subnodes properties:
> - system-clock-direction-out : specifies clock direction as 'out' on
> initialization. It is useful for some aCPUs with
> fixed clocks.
> +- system-clock-index : index of the system clock to use when
> + the mclk frequency is on the CPU/CODEC
> + DAI. Defaults to 0.
I'm not a DT guy, but I think DT doesn't want to have index directly ?
I don't know detail, but I guess DT want to have like
system-mclock = <&xxxx 3>
Best regards
---
Kuninori Morimoto
^ permalink raw reply
* Re: [PATCH 3/3] ASoC: simple-card: add support for clock divider setup
From: Kuninori Morimoto @ 2018-05-29 1:31 UTC (permalink / raw)
To: Daniel Mack; +Cc: devicetree, alsa-devel, broonie, lgirdwood
In-Reply-To: <20180528193503.18905-4-daniel@zonque.org>
Hi
> Add support to call into snd_soc_dai_set_clkdiv() for both CPU and codec
> DAIs from simple-card's hw_params().
>
> This allows platforms to set hardware-specific values without providing an
> own machine driver.
>
> Signed-off-by: Daniel Mack <daniel@zonque.org>
> ---
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Best regards
---
Kuninori Morimoto
^ permalink raw reply
* Re: [patch v22 4/4] Documentation: jtag: Add ABI documentation
From: Randy Dunlap @ 2018-05-28 20:32 UTC (permalink / raw)
To: Oleksandr Shamray, gregkh, arnd
Cc: linux-kernel, linux-arm-kernel, devicetree, openbmc, joel, jiri,
tklauser, linux-serial, system-sw-low-level, robh+dt,
openocd-devel-owner, linux-api, davem, mchehab
In-Reply-To: <1527508827-30724-5-git-send-email-oleksandrs@mellanox.com>
On 05/28/2018 05:00 AM, Oleksandr Shamray wrote:
> Added document that describe the ABI for JTAG class drivrer
>
> Signed-off-by: Oleksandr Shamray <oleksandrs@mellanox.com>
> Acked-by: Arnd Bergmann <arnd@arndb.de>
> ---
> ---
> Documentation/ABI/testing/jtag-dev | 27 +++++++++
> Documentation/jtag/overview | 28 +++++++++
> Documentation/jtag/transactions | 109 ++++++++++++++++++++++++++++++++++++
> MAINTAINERS | 1 +
> 4 files changed, 165 insertions(+), 0 deletions(-)
> create mode 100644 Documentation/ABI/testing/jtag-dev
> create mode 100644 Documentation/jtag/overview
> create mode 100644 Documentation/jtag/transactions
>
> diff --git a/Documentation/jtag/overview b/Documentation/jtag/overview
> new file mode 100644
> index 0000000..42b487a
> --- /dev/null
> +++ b/Documentation/jtag/overview
> @@ -0,0 +1,28 @@
> +Linux kernel JTAG support
> +=========================
> +
> +The JTAG is an industry standard for verifying hardware.
JTAG is an
> +JTAG provides access to many logic signals of a complex integrated circuit,
> +including the device pins.
> +
> +A JTAG interface is a special interface added to a chip.
> +Depending on the version of JTAG, two, four, or five pins are added.
> +
> +The connector pins are:
> + TDI (Test Data In)
> + TDO (Test Data Out)
> + TCK (Test Clock)
> + TMS (Test Mode Select)
> + TRST (Test Reset) optional
> +
> +JTAG interface is designed to have two parts - basic core driver and
> +hardware specific driver. The basic driver introduces a general interface
> +which is not dependent of specific hardware. It provides communication
> +between user space and hardware specific driver.
> +Each JTAG device is represented as a char device from (jtag0, jtag1, ...).
> +Access to a JTAG device is performed through IOCTL calls.
> +
> +Call flow example:
> +User: open -> /dev/jatgX
> +User: ioctl -> /dev/jtagX -> JTAG core driver -> JTAG hardware specific driver
> +User: close -> /dev/jatgX
> diff --git a/Documentation/jtag/transactions b/Documentation/jtag/transactions
> new file mode 100644
> index 0000000..2abf833
> --- /dev/null
> +++ b/Documentation/jtag/transactions
> @@ -0,0 +1,109 @@
> +The JTAG API
> +=============
> +
> +JTAG master devices can be accessed through a character misc-device.
> +Each JTAG master interface can be accessed by using /dev/jtagN.
> +
> +JTAG system calls set:
> +- SIR (Scan Instruction Register, IEEE 1149.1 Instruction Register scan);
> +- SDR (Scan Data Register, IEEE 1149.1 Data Register scan);
> +- RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified
> +number of clocks.
> +
> +open(), close()
> +-------
> +open() opens JTAG device. Only one open operation per JTAG device
> +can be performed. Two or more open for one device will return error.
> +
> +Open/Close device:
> +- jtag_fd = open("/dev/jtag0", O_RDWR);
> +- close(jtag_fd);
> +
> +ioctl()
> +-------
> +All access operations to JTAG devices performed through ioctl interface.
to JTAG devices are performed through
> +The IOCTL interface supports these requests:
> + JTAG_IOCRUNTEST - Force JTAG state machine to RUN_TEST/IDLE state
> + JTAG_SIOCFREQ - Set JTAG TCK frequency
> + JTAG_GIOCFREQ - Get JTAG TCK frequency
> + JTAG_IOCXFER - send JTAG data Xfer
> + JTAG_GIOCSTATUS - get current JTAG TAP status
> + JTAG_SIOCMODE - set JTAG mode flags.
> +
> +JTAG_SIOCFREQ, JTAG_GIOCFREQ
> +------
> +Set/Get JTAG clock speed:
> +
> + unsigned int jtag_fd;
> + ioctl(jtag_fd, JTAG_SIOCFREQ, &frq);
> + ioctl(jtag_fd, JTAG_GIOCFREQ, &frq);
> +
> +JTAG_IOCRUNTEST
> +------
> +Force JTAG state machine to RUN_TEST/IDLE state
> +
> +struct jtag_run_test_idle {
> + __u8 reset;
> + __u8 endstate;
> + __u8 tck;
> +};
> +
> +reset: 0 - run IDLE/PAUSE from current state
> + 1 - go through TEST_LOGIC/RESET state before IDLE/PAUSE
before IDLE/PAUSE
> +endstate: completion flag
> +tck: clock counter
> +
> +Example:
> + struct jtag_run_test_idle runtest;
> +
> + runtest.endstate = JTAG_STATE_IDLE;
> + runtest.reset = 0;
> + runtest.tck = data_p->tck;
> + usleep(25 * 1000);
> + ioctl(jtag_fd, JTAG_IOCRUNTEST, &runtest);
> +
> +JTAG_IOCXFER
> +------
> +Send SDR/SIR transaction
> +
> +struct jtag_xfer {
> + __u8 type;
> + __u8 direction;
> + __u8 endstate;
> + __u8 padding;
> + __u32 length;
> + __u64 tdio;
> +};
> +
> +type: transfer type - JTAG_SIR_XFER/JTAG_SDR_XFER
> +direction: xfer direction - JTAG_SIR_XFER/JTAG_SDR_XFER,
drop ending comma ^
> +length: xfer data len in bits
s/len/length/
> +tdio : xfer data array
> +endstate: xfer end state after transaction finish
> + can be: JTAG_STATE_IDLE/JTAG_STATE_PAUSEIR/JTAG_STATE_PAUSEDR
> +
> +Example:
> + struct jtag_xfer xfer;
> + static char buf[64];
> + static unsigned int buf_len = 0;
> + [...]
> + xfer.type = JTAG_SDR_XFER;
> + xfer.tdio = (__u64)buf;
> + xfer.length = buf_len;
> + xfer.endstate = JTAG_STATE_IDLE;
> +
> + if (is_read)
> + xfer.direction = JTAG_READ_XFER;
> + else
> + xfer.direction = JTAG_WRITE_XFER;
> +
> + ioctl(jtag_fd, JTAG_IOCXFER, &xfer);
> +
> +JTAG_SIOCMODE
> +------
> +If hardware driver can support different running modes you can change it.
> +
> +Example:
> + unsigned int mode;
> + mode = JTAG_XFER_HW_MODE;
> + ioctl(jtag_fd, JTAG_SIOCMODE, &mode);
--
~Randy
^ permalink raw reply
* Re: [PATCH v3 0/2] Add R8A77980/Condor I2C support
From: Sergei Shtylyov @ 2018-05-28 20:16 UTC (permalink / raw)
To: Simon Horman, Rob Herring, Catalin Marinas, Will Deacon,
linux-renesas-soc, devicetree
Cc: Mark Rutland, Magnus Damm, linux-arm-kernel@lists.infradead.org
In-Reply-To: <e9c94553-be9d-0eec-a1ee-1713bb97fbab@cogentembedded.com>
Sorry, "v3" shouldn't be there in the subject...
^ permalink raw reply
* [PATCH 2/2] arm64: dts: renesas: condor: add I2C0 support
From: Sergei Shtylyov @ 2018-05-28 20:14 UTC (permalink / raw)
To: Simon Horman, Rob Herring, Catalin Marinas, Will Deacon,
linux-renesas-soc, devicetree
Cc: Mark Rutland, Magnus Damm, linux-arm-kernel@lists.infradead.org
In-Reply-To: <e9c94553-be9d-0eec-a1ee-1713bb97fbab@cogentembedded.com>
Define the Condor board dependent part of the I2C0 device node.
The I2C0 bus is populated by 2 ON Semiconductor PCA9654 I/O expanders
and Analog Devices ADV7511W HDMI transmitter (but we're only describing
the former chips now).
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
arch/arm64/boot/dts/renesas/r8a77980-condor.dts | 27 ++++++++++++++++++++++++
1 file changed, 27 insertions(+)
Index: renesas/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
===================================================================
--- renesas.orig/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
+++ renesas/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
@@ -80,6 +80,28 @@
clock-frequency = <32768>;
};
+&i2c0 {
+ pinctrl-0 = <&i2c0_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+ clock-frequency = <400000>;
+
+ io_expander0: gpio@20 {
+ compatible = "onnn,pca9654";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ io_expander1: gpio@21 {
+ compatible = "onnn,pca9654";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+};
+
&mmc0 {
pinctrl-0 = <&mmc_pins>;
pinctrl-1 = <&mmc_pins_uhs>;
@@ -104,6 +126,11 @@
function = "canfd0";
};
+ i2c0_pins: i2c0 {
+ groups = "i2c0";
+ function = "i2c0";
+ };
+
mmc_pins: mmc {
groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
function = "mmc";
^ permalink raw reply
* [PATCH 1/2] arm64: dts: renesas: r8a77980: add I2C support
From: Sergei Shtylyov @ 2018-05-28 20:13 UTC (permalink / raw)
To: Simon Horman, Rob Herring, Catalin Marinas, Will Deacon,
linux-renesas-soc, devicetree
Cc: Mark Rutland, Magnus Damm, linux-arm-kernel@lists.infradead.org
In-Reply-To: <e9c94553-be9d-0eec-a1ee-1713bb97fbab@cogentembedded.com>
Define the generic R8A77980 parts of the I2C[0-5] device node.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
arch/arm64/boot/dts/renesas/r8a77980.dtsi | 111 ++++++++++++++++++++++++++++++
1 file changed, 111 insertions(+)
Index: renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi
===================================================================
--- renesas.orig/arch/arm64/boot/dts/renesas/r8a77980.dtsi
+++ renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi
@@ -16,6 +16,15 @@
#address-cells = <2>;
#size-cells = <2>;
+ aliases {
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
+ i2c4 = &i2c4;
+ i2c5 = &i2c5;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -135,6 +144,108 @@
#power-domain-cells = <1>;
};
+ i2c0: i2c@e6500000 {
+ compatible = "renesas,i2c-r8a77980",
+ "renesas,rcar-gen3-i2c";
+ reg = <0 0xe6500000 0 0x40>;
+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 931>;
+ power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+ resets = <&cpg 931>;
+ dmas = <&dmac1 0x91>, <&dmac1 0x90>,
+ <&dmac2 0x91>, <&dmac2 0x90>;
+ dma-names = "tx", "rx", "tx", "rx";
+ i2c-scl-internal-delay-ns = <6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@e6508000 {
+ compatible = "renesas,i2c-r8a77980",
+ "renesas,rcar-gen3-i2c";
+ reg = <0 0xe6508000 0 0x40>;
+ interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 930>;
+ power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+ resets = <&cpg 930>;
+ dmas = <&dmac1 0x93>, <&dmac1 0x92>,
+ <&dmac2 0x93>, <&dmac2 0x92>;
+ dma-names = "tx", "rx", "tx", "rx";
+ i2c-scl-internal-delay-ns = <6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@e6510000 {
+ compatible = "renesas,i2c-r8a77980",
+ "renesas,rcar-gen3-i2c";
+ reg = <0 0xe6510000 0 0x40>;
+ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 929>;
+ power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+ resets = <&cpg 929>;
+ dmas = <&dmac1 0x95>, <&dmac1 0x94>,
+ <&dmac2 0x95>, <&dmac2 0x94>;
+ dma-names = "tx", "rx", "tx", "rx";
+ i2c-scl-internal-delay-ns = <6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c3: i2c@e66d0000 {
+ compatible = "renesas,i2c-r8a77980",
+ "renesas,rcar-gen3-i2c";
+ reg = <0 0xe66d0000 0 0x40>;
+ interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 928>;
+ power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+ resets = <&cpg 928>;
+ dmas = <&dmac1 0x97>, <&dmac1 0x96>,
+ <&dmac2 0x97>, <&dmac2 0x96>;
+ dma-names = "tx", "rx", "tx", "rx";
+ i2c-scl-internal-delay-ns = <6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c4: i2c@e66d8000 {
+ compatible = "renesas,i2c-r8a77980",
+ "renesas,rcar-gen3-i2c";
+ reg = <0 0xe66d8000 0 0x40>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 927>;
+ power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+ resets = <&cpg 927>;
+ dmas = <&dmac1 0x99>, <&dmac1 0x98>,
+ <&dmac2 0x99>, <&dmac2 0x98>;
+ dma-names = "tx", "rx", "tx", "rx";
+ i2c-scl-internal-delay-ns = <6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c5: i2c@e66e0000 {
+ compatible = "renesas,i2c-r8a77980",
+ "renesas,rcar-gen3-i2c";
+ reg = <0 0xe66e0000 0 0x40>;
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 919>;
+ power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+ resets = <&cpg 919>;
+ dmas = <&dmac1 0x9b>, <&dmac1 0x9a>,
+ <&dmac2 0x9b>, <&dmac2 0x9a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ i2c-scl-internal-delay-ns = <6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
hscif0: serial@e6540000 {
compatible = "renesas,hscif-r8a77980",
"renesas,rcar-gen3-hscif",
^ permalink raw reply
* [PATCH v3 0/2] Add R8A77980/Condor I2C support
From: Sergei Shtylyov @ 2018-05-28 20:10 UTC (permalink / raw)
To: Simon Horman, Rob Herring, Catalin Marinas, Will Deacon,
linux-renesas-soc, devicetree
Cc: Mark Rutland, Magnus Damm, linux-arm-kernel@lists.infradead.org
Hello!
Here's the set of 2 patches against Simon Horman's 'renesas.git' repo's
'renesas-devel-20180528-v4.17-rc7' tag. We're adding the R8A77980 I2C nodes
and then describing 2 PCA9654 I/O expanders connected to the I2C0 bus on
the Condor board.
[1/2] arm64: dts: renesas: r8a77980: add I2C support
[2/2] arm64: dts: renesas: condor: add I2C0 support
WBR, Sergei
^ permalink raw reply
* [PATCH] i2c: rcar: document R8A77980 bindings
From: Sergei Shtylyov @ 2018-05-28 19:39 UTC (permalink / raw)
To: Rob Herring, linux-i2c, devicetree; +Cc: Mark Rutland, linux-renesas-soc
R-Car V3H (R8A77980) SoC also has the R-Car gen3 compatible I2C controller,
so document the SoC specific bindings.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
The patch is against Wolfram Sang's 'linux.git' repo's 'i2c/for-next' branch
but I wouldn't mind if it was applied to the 'i2c/for-current' branch. :-)
Documentation/devicetree/bindings/i2c/i2c-rcar.txt | 1 +
1 file changed, 1 insertion(+)
Index: linux/Documentation/devicetree/bindings/i2c/i2c-rcar.txt
===================================================================
--- linux.orig/Documentation/devicetree/bindings/i2c/i2c-rcar.txt
+++ linux/Documentation/devicetree/bindings/i2c/i2c-rcar.txt
@@ -15,6 +15,7 @@ Required properties:
"renesas,i2c-r8a7796" if the device is a part of a R8A7796 SoC.
"renesas,i2c-r8a77965" if the device is a part of a R8A77965 SoC.
"renesas,i2c-r8a77970" if the device is a part of a R8A77970 SoC.
+ "renesas,i2c-r8a77980" if the device is a part of a R8A77980 SoC.
"renesas,i2c-r8a77995" if the device is a part of a R8A77995 SoC.
"renesas,rcar-gen1-i2c" for a generic R-Car Gen1 compatible device.
"renesas,rcar-gen2-i2c" for a generic R-Car Gen2 or RZ/G1 compatible
^ permalink raw reply
* [PATCH 3/3] ASoC: simple-card: add support for clock divider setup
From: Daniel Mack @ 2018-05-28 19:35 UTC (permalink / raw)
To: lgirdwood, broonie, kuninori.morimoto.gx
Cc: devicetree, alsa-devel, Daniel Mack
In-Reply-To: <20180528193503.18905-1-daniel@zonque.org>
Add support to call into snd_soc_dai_set_clkdiv() for both CPU and codec
DAIs from simple-card's hw_params().
This allows platforms to set hardware-specific values without providing an
own machine driver.
Signed-off-by: Daniel Mack <daniel@zonque.org>
---
.../devicetree/bindings/sound/simple-card.txt | 5 +++
include/sound/simple_card_utils.h | 18 +++++++++
sound/soc/generic/simple-card-utils.c | 47 ++++++++++++++++++++++
sound/soc/generic/simple-card.c | 35 ++++++++++++++++
4 files changed, 105 insertions(+)
diff --git a/Documentation/devicetree/bindings/sound/simple-card.txt b/Documentation/devicetree/bindings/sound/simple-card.txt
index c8d268285a9e..d3d83256ab5d 100644
--- a/Documentation/devicetree/bindings/sound/simple-card.txt
+++ b/Documentation/devicetree/bindings/sound/simple-card.txt
@@ -97,6 +97,10 @@ Optional CPU/CODEC subnodes properties:
- system-clock-index : index of the system clock to use when
the mclk frequency is on the CPU/CODEC
DAI. Defaults to 0.
+- clock-dividers : Array of index/value pairs for CPU/CODEC
+ specific clock dividers to configure at
+ stream start time. Optional. No divider
+ is configured if not specified.
Example 1 - single DAI link:
@@ -152,6 +156,7 @@ sound {
format = "i2s";
cpu {
sound-dai = <&audio1 0>;
+ clock-dividers = <0 4>;
};
codec {
sound-dai = <&tda998x 0>;
diff --git a/include/sound/simple_card_utils.h b/include/sound/simple_card_utils.h
index ebdf52c9884f..ed3180f975af 100644
--- a/include/sound/simple_card_utils.h
+++ b/include/sound/simple_card_utils.h
@@ -12,6 +12,11 @@
#include <sound/soc.h>
+struct asoc_simple_clkdiv {
+ int div_id;
+ int div;
+};
+
struct asoc_simple_dai {
const char *name;
unsigned int sysclk;
@@ -22,6 +27,8 @@ struct asoc_simple_dai {
unsigned int rx_slot_mask;
struct clk *clk;
int sysclk_id;
+ struct asoc_simple_clkdiv *clkdiv;
+ int num_clkdiv;
};
struct asoc_simple_card_data {
@@ -55,6 +62,17 @@ int asoc_simple_card_parse_clk(struct device *dev,
int asoc_simple_card_clk_enable(struct asoc_simple_dai *dai);
void asoc_simple_card_clk_disable(struct asoc_simple_dai *dai);
+#define asoc_simple_card_parse_clkdiv_cpu(dev, node, dai_link, simple_dai) \
+ asoc_simple_card_parse_clkdiv(dev, node, simple_dai, \
+ dai_link->cpu_dai_name)
+#define asoc_simple_card_parse_clkdiv_codec(dev, node, dai_link, simple_dai) \
+ asoc_simple_card_parse_clkdiv(dev, node, simple_dai, \
+ dai_link->codec_dai_name)
+int asoc_simple_card_parse_clkdiv(struct device *dev,
+ struct device_node *node,
+ struct asoc_simple_dai *simple_dai,
+ const char *name);
+
#define asoc_simple_card_parse_cpu(node, dai_link, \
list_name, cells_name, is_single_link) \
asoc_simple_card_parse_dai(node, &dai_link->cpu_of_node, \
diff --git a/sound/soc/generic/simple-card-utils.c b/sound/soc/generic/simple-card-utils.c
index 493c9b1f057e..ad7912871240 100644
--- a/sound/soc/generic/simple-card-utils.c
+++ b/sound/soc/generic/simple-card-utils.c
@@ -209,6 +209,53 @@ int asoc_simple_card_parse_clk(struct device *dev,
}
EXPORT_SYMBOL_GPL(asoc_simple_card_parse_clk);
+int asoc_simple_card_parse_clkdiv(struct device *dev,
+ struct device_node *node,
+ struct asoc_simple_dai *simple_dai,
+ const char *name)
+{
+ const char *pname = "clock-dividers";
+ int i, ret, count;
+ u32 val;
+
+ count = of_property_count_u32_elems(node, pname);
+ if (count <= 0)
+ return 0;
+
+ if (count & 1) {
+ dev_err(dev, "Invalid number of values for %s property", pname);
+ return -EINVAL;
+ }
+
+ simple_dai->num_clkdiv = count / 2;
+ simple_dai->clkdiv = devm_kcalloc(dev, simple_dai->num_clkdiv,
+ sizeof(struct asoc_simple_clkdiv),
+ GFP_KERNEL);
+ if (!simple_dai->clkdiv)
+ return -ENOMEM;
+
+ for (i = 0; i < simple_dai->num_clkdiv; i++) {
+ ret = of_property_read_u32_index(node, pname, i * 2, &val);
+ if (ret < 0)
+ return ret;
+
+ simple_dai->clkdiv[i].div_id = val;
+
+ ret = of_property_read_u32_index(node, pname, i * 2 + 1, &val);
+ if (ret < 0)
+ return ret;
+
+ simple_dai->clkdiv[i].div = val;
+
+ dev_dbg(dev, "%s : clkdiv #%d = %d\n", name,
+ simple_dai->clkdiv[i].div_id,
+ simple_dai->clkdiv[i].div);
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(asoc_simple_card_parse_clkdiv);
+
int asoc_simple_card_parse_dai(struct device_node *node,
struct device_node **dai_of_node,
const char **dai_name,
diff --git a/sound/soc/generic/simple-card.c b/sound/soc/generic/simple-card.c
index 5b4afa624395..56d1d774feac 100644
--- a/sound/soc/generic/simple-card.c
+++ b/sound/soc/generic/simple-card.c
@@ -135,6 +135,23 @@ static void asoc_simple_card_shutdown(struct snd_pcm_substream *substream)
asoc_simple_card_clk_disable(&dai_props->codec_dai);
}
+static int asoc_simple_card_set_clkdiv(struct snd_soc_dai *dai,
+ unsigned int mclk,
+ const struct asoc_simple_dai *simple_dai)
+{
+ int ret, i;
+
+ for (i = 0; i < simple_dai->num_clkdiv; i++) {
+ ret = snd_soc_dai_set_clkdiv(dai,
+ simple_dai->clkdiv[i].div_id,
+ simple_dai->clkdiv[i].div);
+ if (ret < 0)
+ return ret;
+ }
+
+ return 0;
+}
+
static int asoc_simple_card_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params)
{
@@ -164,11 +181,21 @@ static int asoc_simple_card_hw_params(struct snd_pcm_substream *substream,
if (ret && ret != -ENOTSUPP)
goto err;
+ ret = asoc_simple_card_set_clkdiv(codec_dai, mclk,
+ &dai_props->codec_dai);
+ if (ret && ret != -ENOTSUPP)
+ goto err;
+
ret = snd_soc_dai_set_sysclk(cpu_dai,
dai_props->cpu_dai.sysclk_id,
mclk, SND_SOC_CLOCK_OUT);
if (ret && ret != -ENOTSUPP)
goto err;
+
+ ret = asoc_simple_card_set_clkdiv(cpu_dai, mclk,
+ &dai_props->cpu_dai);
+ if (ret && ret != -ENOTSUPP)
+ goto err;
}
return 0;
err:
@@ -287,6 +314,14 @@ static int asoc_simple_card_dai_link_of(struct device_node *node,
if (ret < 0)
goto dai_link_of_err;
+ ret = asoc_simple_card_parse_clkdiv_cpu(dev, cpu, dai_link, cpu_dai);
+ if (ret < 0)
+ goto dai_link_of_err;
+
+ ret = asoc_simple_card_parse_clkdiv_codec(dev, codec, dai_link, codec_dai);
+ if (ret < 0)
+ goto dai_link_of_err;
+
ret = asoc_simple_card_canonicalize_dailink(dai_link);
if (ret < 0)
goto dai_link_of_err;
--
2.14.3
^ permalink raw reply related
* [PATCH 2/3] ASoC: simple-card: make sysclk index configurable
From: Daniel Mack @ 2018-05-28 19:35 UTC (permalink / raw)
To: lgirdwood, broonie, kuninori.morimoto.gx
Cc: devicetree, alsa-devel, Daniel Mack
In-Reply-To: <20180528193503.18905-1-daniel@zonque.org>
The simple-card driver currently hard-codes the clk_id parameter in
snd_soc_dai_set_sysclk() to 0. Make this configrable for both CPU and
codec dai sub-nodes.
This still has the limitation that only one clk_id can be configured, but it
should help some more platforms to use simple-card in favor to a more
specific machine driver.
Signed-off-by: Daniel Mack <daniel@zonque.org>
---
Documentation/devicetree/bindings/sound/simple-card.txt | 3 +++
include/sound/simple_card_utils.h | 1 +
sound/soc/generic/simple-card-utils.c | 3 +++
sound/soc/generic/simple-card.c | 10 ++++++----
4 files changed, 13 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/sound/simple-card.txt b/Documentation/devicetree/bindings/sound/simple-card.txt
index a4c72d09cd45..c8d268285a9e 100644
--- a/Documentation/devicetree/bindings/sound/simple-card.txt
+++ b/Documentation/devicetree/bindings/sound/simple-card.txt
@@ -94,6 +94,9 @@ Optional CPU/CODEC subnodes properties:
- system-clock-direction-out : specifies clock direction as 'out' on
initialization. It is useful for some aCPUs with
fixed clocks.
+- system-clock-index : index of the system clock to use when
+ the mclk frequency is on the CPU/CODEC
+ DAI. Defaults to 0.
Example 1 - single DAI link:
diff --git a/include/sound/simple_card_utils.h b/include/sound/simple_card_utils.h
index 7e25afce6566..ebdf52c9884f 100644
--- a/include/sound/simple_card_utils.h
+++ b/include/sound/simple_card_utils.h
@@ -21,6 +21,7 @@ struct asoc_simple_dai {
unsigned int tx_slot_mask;
unsigned int rx_slot_mask;
struct clk *clk;
+ int sysclk_id;
};
struct asoc_simple_card_data {
diff --git a/sound/soc/generic/simple-card-utils.c b/sound/soc/generic/simple-card-utils.c
index 3751a07de6aa..493c9b1f057e 100644
--- a/sound/soc/generic/simple-card-utils.c
+++ b/sound/soc/generic/simple-card-utils.c
@@ -199,6 +199,9 @@ int asoc_simple_card_parse_clk(struct device *dev,
if (of_property_read_bool(node, "system-clock-direction-out"))
simple_dai->clk_direction = SND_SOC_CLOCK_OUT;
+ if (!of_property_read_u32(node, "system-clock-index", &val))
+ simple_dai->sysclk_id = val;
+
dev_dbg(dev, "%s : sysclk = %d, direction %d\n", name,
simple_dai->sysclk, simple_dai->clk_direction);
diff --git a/sound/soc/generic/simple-card.c b/sound/soc/generic/simple-card.c
index ca529a6cab06..5b4afa624395 100644
--- a/sound/soc/generic/simple-card.c
+++ b/sound/soc/generic/simple-card.c
@@ -158,13 +158,15 @@ static int asoc_simple_card_hw_params(struct snd_pcm_substream *substream,
if (dai_props->cpu_dai.clk)
clk_set_rate(dai_props->cpu_dai.clk, mclk);
- ret = snd_soc_dai_set_sysclk(codec_dai, 0, mclk,
- SND_SOC_CLOCK_IN);
+ ret = snd_soc_dai_set_sysclk(codec_dai,
+ dai_props->codec_dai.sysclk_id,
+ mclk, SND_SOC_CLOCK_IN);
if (ret && ret != -ENOTSUPP)
goto err;
- ret = snd_soc_dai_set_sysclk(cpu_dai, 0, mclk,
- SND_SOC_CLOCK_OUT);
+ ret = snd_soc_dai_set_sysclk(cpu_dai,
+ dai_props->cpu_dai.sysclk_id,
+ mclk, SND_SOC_CLOCK_OUT);
if (ret && ret != -ENOTSUPP)
goto err;
}
--
2.14.3
^ permalink raw reply related
* [PATCH 1/3] ASoC: simple-card: set cpu dai clk in hw_params
From: Daniel Mack @ 2018-05-28 19:35 UTC (permalink / raw)
To: lgirdwood, broonie, kuninori.morimoto.gx
Cc: devicetree, alsa-devel, Daniel Mack
In-Reply-To: <20180528193503.18905-1-daniel@zonque.org>
The simple-card driver currently accepts a clock node in the cpu dai
sub-node and only uses it as an alternative to the
'system-clock-frequency' property to get the current frequency.
This patch adds another use of the passed clock node. If mclk-fs is
specified, the clock will be set to the calculated rate (stream rate *
mclk_fs) in hw_params. This allows platforms to pass a tuneable clock
as phandle that will automatically be set to the right rates.
Signed-off-by: Daniel Mack <daniel@zonque.org>
---
Documentation/devicetree/bindings/sound/simple-card.txt | 5 +++++
sound/soc/generic/simple-card.c | 4 ++++
2 files changed, 9 insertions(+)
diff --git a/Documentation/devicetree/bindings/sound/simple-card.txt b/Documentation/devicetree/bindings/sound/simple-card.txt
index 17c13e74667d..a4c72d09cd45 100644
--- a/Documentation/devicetree/bindings/sound/simple-card.txt
+++ b/Documentation/devicetree/bindings/sound/simple-card.txt
@@ -86,6 +86,11 @@ Optional CPU/CODEC subnodes properties:
in dai startup() and disabled with
clk_disable_unprepare() in dai
shutdown().
+ If a clock is specified and a
+ multiplication factor is given with
+ mclk-fs, the clock will be set to the
+ calculated mclk frequency when the
+ stream starts.
- system-clock-direction-out : specifies clock direction as 'out' on
initialization. It is useful for some aCPUs with
fixed clocks.
diff --git a/sound/soc/generic/simple-card.c b/sound/soc/generic/simple-card.c
index 6959a74a6f49..ca529a6cab06 100644
--- a/sound/soc/generic/simple-card.c
+++ b/sound/soc/generic/simple-card.c
@@ -154,6 +154,10 @@ static int asoc_simple_card_hw_params(struct snd_pcm_substream *substream,
if (mclk_fs) {
mclk = params_rate(params) * mclk_fs;
+
+ if (dai_props->cpu_dai.clk)
+ clk_set_rate(dai_props->cpu_dai.clk, mclk);
+
ret = snd_soc_dai_set_sysclk(codec_dai, 0, mclk,
SND_SOC_CLOCK_IN);
if (ret && ret != -ENOTSUPP)
--
2.14.3
^ permalink raw reply related
* [PATCH 0/3] ASoC: make simple-card a bit more versatile
From: Daniel Mack @ 2018-05-28 19:35 UTC (permalink / raw)
To: lgirdwood, broonie, kuninori.morimoto.gx
Cc: devicetree, alsa-devel, Daniel Mack
In the process of porting some boards to DT, I noticed the simple-card
driver is already capable of handling most cases just fine. The missing
bits I've spotted are:
* The clock that is passed in is only read, never set, which is not
sufficient for boards that support several sampling rates with
different base frequencies
* The sysclk id that is passed to snd_soc_dai_set_sysclk() is
hard-coded
* There's currently no support for calling into snd_soc_dai_set_clkdiv()
The following three patches fix all those and make simple-card a good
match for the board I'm working with.
Thanks,
Daniel
Daniel Mack (3):
ASoC: simple-card: set cpu dai clk in hw_params
ASoC: simple-card: make sysclk index configurable
ASoC: simple-card: add support for clock divider setup
.../devicetree/bindings/sound/simple-card.txt | 13 ++++++
include/sound/simple_card_utils.h | 19 ++++++++
sound/soc/generic/simple-card-utils.c | 50 ++++++++++++++++++++++
sound/soc/generic/simple-card.c | 49 +++++++++++++++++++--
4 files changed, 127 insertions(+), 4 deletions(-)
--
2.14.3
^ permalink raw reply
* [PATCH v2] Documentation: dt-bindings: Explicitly mark Samsung Exynos SoC bindings as unstable
From: Krzysztof Kozlowski @ 2018-05-28 19:13 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Kukjin Kim, Krzysztof Kozlowski,
Pankaj Dubey, Bartlomiej Zolnierkiewicz, Marek Szyprowski,
devicetree, linux-arm-kernel, linux-samsung-soc, linux-kernel
Cc: Chanwoo Choi, Seung-Woo Kim, Inki Dae, Sylwester Nawrocki,
Alim Akhtar, Arnd Bergmann, Olof Johansson
From: Marek Szyprowski <m.szyprowski@samsung.com>
Samsung Exynos SoCs and boards related bindings evolved since the initial
introduction, but initially the bindings were minimal and a bit incomplete
(they never described all the hardware modules available in the SoCs).
Since then some significant (not fully compatible) changes have been
already committed a few times (like gpio replaced by pinctrl, display ddc,
mfc reserved memory, some core clocks added to various hardware modules,
added more required nodes).
On the other side there are no boards which have device tree embedded in
the bootloader. Device tree blob is always compiled from the kernel tree
and updated together with the kernel image.
Thus to avoid further adding a bunch of workarounds for old/missing
bindings, make development of new platforms easier and allow to make
cleanup of the existing code and device tree files, lets mark some
Samsung Exynos SoC platform bindings as unstable. This means that
bindings can may change at any time and users should use the dtb file
compiled from the same kernel source tree as the kernel image.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
Changes since v1:
1. Rebase
2. Add specific compatibles to mark unstable.
v1 is here:
https://patchwork.kernel.org/patch/9477963/
Previous tags (not applying due to change in contents):
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com>
---
.../devicetree/bindings/arm/samsung/exynos.txt | 26 ++++++++++++++++++++++
1 file changed, 26 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/samsung/exynos.txt
diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos.txt b/Documentation/devicetree/bindings/arm/samsung/exynos.txt
new file mode 100644
index 000000000000..7410cb79e4b2
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/samsung/exynos.txt
@@ -0,0 +1,26 @@
+Samsung Exynos SoC Family Device Tree Bindings
+---------------------------------------------------------------
+
+Work in progress statement:
+
+Following Device Tree files and bindings applying to Samsung Exynos SoCs and
+boards are considered "unstable":
+
+ - samsung,exynos5433* (all compatibles related to Exynos5433)
+ - samsung,exynos7* (all compatibles related to Exynos7)
+ - samsung,tm2-audio
+ - samsung,mfc-v10
+ - samsung,exynos*-mipi-dsi
+ - samsung,exynos5-dp
+ - samsung,exynos*-hdmi
+ - samsung,exynos*-hdmiddc
+ - samsung,exynos*-hdmiphy
+ - samsung,exynos*-mixer
+ - samsung,exynos*-fimd
+
+Any Samsung Exynos device tree binding mentioned may change at any time. Be
+sure to use a device tree binary and a kernel image generated from the same
+source tree.
+
+Please refer to Documentation/devicetree/bindings/ABI.txt for a definition of a
+stable binding/ABI.
--
2.14.1
^ permalink raw reply related
* Re: [PATCH 2/4 RFCv2] net: dsa: Add bindings for Realtek SMI DSAs
From: Andrew Lunn @ 2018-05-28 18:54 UTC (permalink / raw)
To: Linus Walleij
Cc: Vivien Didelot, Florian Fainelli, netdev, openwrt-devel,
LEDE Development List, Antti Seppälä, Roman Yeryomin,
Colin Leitner, Gabor Juhos, devicetree
In-Reply-To: <20180528174752.6806-3-linus.walleij@linaro.org>
> +Examples:
> +
> +switch {
> + compatible = "realtek,rtl8366rb";
> + /* 22 = MDIO (has input reads), 21 = MDC (clock, output only) */
> + mdc-gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>;
> + mdio-gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
> + reset-gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
> +
> + switch_intc: interrupt-controller {
> + /* GPIO 15 provides the interrupt */
> + interrupt-parent = <&gpio0>;
> + interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
> + interrupt-controller;
> + #address-cells = <0>;
> + #interrupt-cells = <1>;
> + };
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0>;
> + port@0 {
> + reg = <0>;
> + label = "lan0";
> + phy-handle = <&phy0>;
> + };
> + port@1 {
> + reg = <1>;
> + label = "lan1";
> + phy-handle = <&phy1>;
> + };
> + port@2 {
> + reg = <2>;
> + label = "lan2";
> + phy-handle = <&phy2>;
> + };
> + port@3 {
> + reg = <3>;
> + label = "lan3";
> + phy-handle = <&phy3>;
> + };
> + port@4 {
> + reg = <4>;
> + label = "wan";
> + phy-handle = <&phy4>;
> + };
> + port@5 {
> + reg = <5>;
> + label = "cpu";
> + ethernet = <&gmac0>;
> + phy-mode = "rgmii";
> + fixed-link {
> + speed = <1000>;
> + full-duplex;
> + };
> + };
> + };
> +
> + mdio {
> + compatible = "realtek,smi-mdio", "dsa-mdio";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + phy0: phy@0 {
> + reg = <0>;
> + interrupt-parent = <&switch_intc>;
> + interrupts = <0>;
> + };
Hi Linus
This all looks correct, and as i suggested a while ago.
But since then, i discovered something, which allows this to be
simplified.
The mdio bus structure has an irq array. If you put the interrupt
numbers into this array, when the phy is connected, it will use that
interrupt. You then don't need a lot of this in your device tree.
Take a look at:
commit 6f88284f3bd77a0e51de22d4956f07557bcc0dbf
Author: Andrew Lunn <andrew@lunn.ch>
Date: Sat Mar 17 20:32:05 2018 +0100
net: dsa: mv88e6xxx: Add MDIO interrupts for internal PHYs
When registering an MDIO bus, it is possible to pass an array of
interrupts, one per address on the bus. phylib will then associate the
interrupt to the PHY device, if no other interrupt is provided.
Some of the global2 interrupts are PHY interrupts. Place them into the
MDIO bus structure.
Andrew
^ permalink raw reply
* [PATCH] dt-bindings: arm: Remove obsolete insignal-boards.txt
From: Krzysztof Kozlowski @ 2018-05-28 18:53 UTC (permalink / raw)
To: Kukjin Kim, Krzysztof Kozlowski, Rob Herring, Mark Rutland,
linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel
The compatibles mentioned in insignal-boards.txt are already documented
under devicetree/bindings/arm/samsung/samsung-boards.txt. Also the
contents of insignal-boards.txt is not accurate, e.g. does not mention
Arndale boards.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
Documentation/devicetree/bindings/arm/insignal-boards.txt | 8 --------
1 file changed, 8 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/insignal-boards.txt
diff --git a/Documentation/devicetree/bindings/arm/insignal-boards.txt b/Documentation/devicetree/bindings/arm/insignal-boards.txt
deleted file mode 100644
index 524c3dc5d808..000000000000
--- a/Documentation/devicetree/bindings/arm/insignal-boards.txt
+++ /dev/null
@@ -1,8 +0,0 @@
-* Insignal's Exynos4210 based Origen evaluation board
-
-Origen low-cost evaluation board is based on Samsung's Exynos4210 SoC.
-
-Required root node properties:
- - compatible = should be one or more of the following.
- (a) "samsung,smdkv310" - for Samsung's SMDKV310 eval board.
- (b) "samsung,exynos4210" - for boards based on Exynos4210 SoC.
--
2.14.1
^ permalink raw reply related
* [PATCH v4 6/6] arm64: defconfig: add CONFIG_ARM_SP805_WATCHDOG
From: Ray Jui @ 2018-05-28 18:01 UTC (permalink / raw)
To: Wim Van Sebroeck, Guenter Roeck, Rob Herring, Mark Rutland,
Frank Rowand, Catalin Marinas, Will Deacon, Robin Murphy
Cc: linux-watchdog, devicetree, linux-arm-kernel, linux-kernel,
bcm-kernel-feedback-list, Ray Jui
In-Reply-To: <1527530497-10392-1-git-send-email-ray.jui@broadcom.com>
Enable the SP805 watchdog timer
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index ecf6137..3fe5eb5 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -351,6 +351,7 @@ CONFIG_ROCKCHIP_THERMAL=m
CONFIG_TEGRA_BPMP_THERMAL=m
CONFIG_UNIPHIER_THERMAL=y
CONFIG_WATCHDOG=y
+CONFIG_ARM_SP805_WATCHDOG=y
CONFIG_S3C2410_WATCHDOG=y
CONFIG_MESON_GXBB_WATCHDOG=m
CONFIG_MESON_WATCHDOG=m
--
2.1.4
^ permalink raw reply related
* [PATCH v4 5/6] arm64: dt: set initial SR watchdog timeout to 60 seconds
From: Ray Jui @ 2018-05-28 18:01 UTC (permalink / raw)
To: Wim Van Sebroeck, Guenter Roeck, Rob Herring, Mark Rutland,
Frank Rowand, Catalin Marinas, Will Deacon, Robin Murphy
Cc: linux-watchdog, devicetree, linux-arm-kernel, linux-kernel,
bcm-kernel-feedback-list, Ray Jui
In-Reply-To: <1527530497-10392-1-git-send-email-ray.jui@broadcom.com>
Set initial Stingray watchdog timeout to 60 seconds
By the time when the userspace watchdog daemon is ready and taking
control over, the watchdog timeout will then be reset to what's
configured in the daemon
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
---
arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
index 99aaff0..1e1cf49 100644
--- a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
+++ b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
@@ -420,6 +420,7 @@
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&hsls_25m_div2_clk>, <&hsls_div4_clk>;
clock-names = "wdogclk", "apb_pclk";
+ timeout-sec = <60>;
};
gpio_hsls: gpio@d0000 {
--
2.1.4
^ permalink raw reply related
* [PATCH v4 4/6] watchdog: sp805: set WDOG_HW_RUNNING when appropriate
From: Ray Jui @ 2018-05-28 18:01 UTC (permalink / raw)
To: Wim Van Sebroeck, Guenter Roeck, Rob Herring, Mark Rutland,
Frank Rowand, Catalin Marinas, Will Deacon, Robin Murphy
Cc: linux-watchdog, devicetree, linux-arm-kernel, linux-kernel,
bcm-kernel-feedback-list, Ray Jui
In-Reply-To: <1527530497-10392-1-git-send-email-ray.jui@broadcom.com>
If the watchdog hardware is already enabled during the boot process,
when the Linux watchdog driver loads, it should reset the watchdog and
tell the watchdog framework. As a result, ping can be generated from
the watchdog framework, until the userspace watchdog daemon takes over
control
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
---
drivers/watchdog/sp805_wdt.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/drivers/watchdog/sp805_wdt.c b/drivers/watchdog/sp805_wdt.c
index 1484609..d662a6f 100644
--- a/drivers/watchdog/sp805_wdt.c
+++ b/drivers/watchdog/sp805_wdt.c
@@ -42,6 +42,7 @@
/* control register masks */
#define INT_ENABLE (1 << 0)
#define RESET_ENABLE (1 << 1)
+ #define ENABLE_MASK (INT_ENABLE | RESET_ENABLE)
#define WDTINTCLR 0x00C
#define WDTRIS 0x010
#define WDTMIS 0x014
@@ -74,6 +75,15 @@ module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout,
"Set to 1 to keep watchdog running after device release");
+/* returns true if wdt is running; otherwise returns false */
+static bool wdt_is_running(struct watchdog_device *wdd)
+{
+ struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
+ u32 wdtcontrol = readl_relaxed(wdt->base + WDTCONTROL);
+
+ return (wdtcontrol & ENABLE_MASK) == ENABLE_MASK;
+}
+
/* This routine finds load value that will reset system in required timout */
static int wdt_setload(struct watchdog_device *wdd, unsigned int timeout)
{
@@ -239,6 +249,15 @@ sp805_wdt_probe(struct amba_device *adev, const struct amba_id *id)
watchdog_init_timeout(&wdt->wdd, 0, &adev->dev);
wdt_setload(&wdt->wdd, wdt->wdd.timeout);
+ /*
+ * If HW is already running, enable/reset the wdt and set the running
+ * bit to tell the wdt subsystem
+ */
+ if (wdt_is_running(&wdt->wdd)) {
+ wdt_enable(&wdt->wdd);
+ set_bit(WDOG_HW_RUNNING, &wdt->wdd.status);
+ }
+
ret = watchdog_register_device(&wdt->wdd);
if (ret) {
dev_err(&adev->dev, "watchdog_register_device() failed: %d\n",
--
2.1.4
^ permalink raw reply related
* [PATCH v4 3/6] watchdog: sp805: add 'timeout-sec' DT property support
From: Ray Jui @ 2018-05-28 18:01 UTC (permalink / raw)
To: Wim Van Sebroeck, Guenter Roeck, Rob Herring, Mark Rutland,
Frank Rowand, Catalin Marinas, Will Deacon, Robin Murphy
Cc: linux-watchdog, devicetree, linux-arm-kernel, linux-kernel,
bcm-kernel-feedback-list, Ray Jui
In-Reply-To: <1527530497-10392-1-git-send-email-ray.jui@broadcom.com>
Add support for optional devicetree property 'timeout-sec'.
'timeout-sec' is used in the driver if specified in devicetree.
Otherwise, fall back to driver default, i.e., 60 seconds
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
---
drivers/watchdog/sp805_wdt.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/watchdog/sp805_wdt.c b/drivers/watchdog/sp805_wdt.c
index 03805bc..1484609 100644
--- a/drivers/watchdog/sp805_wdt.c
+++ b/drivers/watchdog/sp805_wdt.c
@@ -230,7 +230,14 @@ sp805_wdt_probe(struct amba_device *adev, const struct amba_id *id)
spin_lock_init(&wdt->lock);
watchdog_set_nowayout(&wdt->wdd, nowayout);
watchdog_set_drvdata(&wdt->wdd, wdt);
- wdt_setload(&wdt->wdd, DEFAULT_TIMEOUT);
+
+ /*
+ * If 'timeout-sec' devicetree property is specified, use that.
+ * Otherwise, use DEFAULT_TIMEOUT
+ */
+ wdt->wdd.timeout = DEFAULT_TIMEOUT;
+ watchdog_init_timeout(&wdt->wdd, 0, &adev->dev);
+ wdt_setload(&wdt->wdd, wdt->wdd.timeout);
ret = watchdog_register_device(&wdt->wdd);
if (ret) {
--
2.1.4
^ permalink raw reply related
* [PATCH v4 2/6] Documentation: DT: Add optional 'timeout-sec' property for sp805
From: Ray Jui @ 2018-05-28 18:01 UTC (permalink / raw)
To: Wim Van Sebroeck, Guenter Roeck, Rob Herring, Mark Rutland,
Frank Rowand, Catalin Marinas, Will Deacon, Robin Murphy
Cc: devicetree, linux-watchdog, linux-kernel, Ray Jui,
bcm-kernel-feedback-list, linux-arm-kernel
In-Reply-To: <1527530497-10392-1-git-send-email-ray.jui@broadcom.com>
Update the SP805 binding document to add optional 'timeout-sec'
devicetree property
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
---
Documentation/devicetree/bindings/watchdog/arm,sp805.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/watchdog/arm,sp805.txt b/Documentation/devicetree/bindings/watchdog/arm,sp805.txt
index 0fa3629..bee6f1f 100644
--- a/Documentation/devicetree/bindings/watchdog/arm,sp805.txt
+++ b/Documentation/devicetree/bindings/watchdog/arm,sp805.txt
@@ -19,6 +19,8 @@ Required properties:
Optional properties:
- interrupts: Should specify WDT interrupt number
+- timeout-sec: Should specify default WDT timeout in seconds. If unset, the
+ default timeout is determined by the driver
Example:
watchdog@66090000 {
--
2.1.4
^ permalink raw reply related
* [PATCH v4 1/6] Documentation: DT: Consolidate SP805 binding docs
From: Ray Jui @ 2018-05-28 18:01 UTC (permalink / raw)
To: Wim Van Sebroeck, Guenter Roeck, Rob Herring, Mark Rutland,
Frank Rowand, Catalin Marinas, Will Deacon, Robin Murphy
Cc: linux-watchdog, devicetree, linux-arm-kernel, linux-kernel,
bcm-kernel-feedback-list, Ray Jui
In-Reply-To: <1527530497-10392-1-git-send-email-ray.jui@broadcom.com>
Consolidate two SP805 binding documents "arm,sp805.txt" and
"sp805-wdt.txt" into "arm,sp805.txt" that matches the naming of the
desired compatible string to be used
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
---
.../devicetree/bindings/watchdog/arm,sp805.txt | 27 ++++++++++++++-----
.../devicetree/bindings/watchdog/sp805-wdt.txt | 31 ----------------------
2 files changed, 20 insertions(+), 38 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/watchdog/sp805-wdt.txt
diff --git a/Documentation/devicetree/bindings/watchdog/arm,sp805.txt b/Documentation/devicetree/bindings/watchdog/arm,sp805.txt
index ca99d64..0fa3629 100644
--- a/Documentation/devicetree/bindings/watchdog/arm,sp805.txt
+++ b/Documentation/devicetree/bindings/watchdog/arm,sp805.txt
@@ -1,17 +1,30 @@
ARM AMBA Primecell SP805 Watchdog
+SP805 WDT is a ARM Primecell Peripheral and has a standard-id register that
+can be used to identify the peripheral type, vendor, and revision.
+This value can be used for driver matching.
+
+As SP805 WDT is a primecell IP, it follows the base bindings specified in
+'arm/primecell.txt'
+
Required properties:
-- compatible: Should be "arm,sp805" & "arm,primecell"
-- reg: Should contain location and length for watchdog timer register.
-- interrupts: Should contain the list of watchdog timer interrupts.
-- clocks: clocks driving the watchdog timer hardware. This list should be 2
- clocks. With 2 clocks, the order is wdogclk clock, apb_pclk.
+- compatible: Should be "arm,sp805" & "arm,primecell"
+- reg: Should contain location and length for watchdog timer register
+- clocks: Clocks driving the watchdog timer hardware. This list should be
+ 2 clocks. With 2 clocks, the order is wdog_clk, apb_pclk
+ wdog_clk can be equal to or be a sub-multiple of the apb_pclk
+ frequency
+- clock-names: Shall be "wdog_clk" for first clock and "apb_pclk" for the
+ second one
+
+Optional properties:
+- interrupts: Should specify WDT interrupt number
Example:
watchdog@66090000 {
compatible = "arm,sp805", "arm,primecell";
reg = <0x66090000 0x1000>;
interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb_pclk>,<&apb_pclk>;
- clock-names = "wdogclk", "apb_pclk";
+ clocks = <&wdt_clk>, <&apb_pclk>;
+ clock-names = "wdog_clk", "apb_pclk";
};
diff --git a/Documentation/devicetree/bindings/watchdog/sp805-wdt.txt b/Documentation/devicetree/bindings/watchdog/sp805-wdt.txt
deleted file mode 100644
index edc4f0e..0000000
--- a/Documentation/devicetree/bindings/watchdog/sp805-wdt.txt
+++ /dev/null
@@ -1,31 +0,0 @@
-* ARM SP805 Watchdog Timer (WDT) Controller
-
-SP805 WDT is a ARM Primecell Peripheral and has a standard-id register that
-can be used to identify the peripheral type, vendor, and revision.
-This value can be used for driver matching.
-
-As SP805 WDT is a primecell IP, it follows the base bindings specified in
-'arm/primecell.txt'
-
-Required properties:
-- compatible : Should be "arm,sp805-wdt", "arm,primecell"
-- reg : Base address and size of the watchdog timer registers.
-- clocks : From common clock binding.
- First clock is PCLK and the second is WDOGCLK.
- WDOGCLK can be equal to or be a sub-multiple of the PCLK frequency.
-- clock-names : From common clock binding.
- Shall be "apb_pclk" for first clock and "wdog_clk" for the
- second one.
-
-Optional properties:
-- interrupts : Should specify WDT interrupt number.
-
-Examples:
-
- cluster1_core0_watchdog: wdt@c000000 {
- compatible = "arm,sp805-wdt", "arm,primecell";
- reg = <0x0 0xc000000 0x0 0x1000>;
- clocks = <&clockgen 4 3>, <&clockgen 4 3>;
- clock-names = "apb_pclk", "wdog_clk";
- };
-
--
2.1.4
^ permalink raw reply related
* [PATCH v4 0/6] Enhance support for the SP805 WDT
From: Ray Jui @ 2018-05-28 18:01 UTC (permalink / raw)
To: Wim Van Sebroeck, Guenter Roeck, Rob Herring, Mark Rutland,
Frank Rowand, Catalin Marinas, Will Deacon, Robin Murphy
Cc: linux-watchdog, devicetree, linux-arm-kernel, linux-kernel,
bcm-kernel-feedback-list, Ray Jui
This patch series enhances the support for the SP805 watchdog timer.
First of all, 'timeout-sec' devicetree property is added. In addition,
support is also added to allow the driver to reset the watchdog if it
has been detected that watchdot has been started in the bootloader. In
this case, the driver will initiate the ping service from the kernel
watchdog subsystem, before a user mode daemon takes over. This series
also enables SP805 in the default ARM64 defconfig
This patch series is based off v4.17-rc5 and is available on GIHUB:
repo: https://github.com/Broadcom/arm64-linux.git
branch: sp805-wdt-v4
Changes since v3:
- Improve description of 'timeout-sec' in the binding document, per
recommendation from Guenter Roeck
Changes since v2:
- Fix indent and format to make them consistent within arm,sp805.txt
Changes since v1:
- Consolidate two duplicated SP805 binding documents into one
- Slight change of the wdt_is_running implementation per discussion
Ray Jui (6):
Documentation: DT: Consolidate SP805 binding docs
Documentation: DT: Add optional 'timeout-sec' property for sp805
watchdog: sp805: add 'timeout-sec' DT property support
watchdog: sp805: set WDOG_HW_RUNNING when appropriate
arm64: dt: set initial SR watchdog timeout to 60 seconds
arm64: defconfig: add CONFIG_ARM_SP805_WATCHDOG
.../devicetree/bindings/watchdog/arm,sp805.txt | 29 +++++++++++++++-----
.../devicetree/bindings/watchdog/sp805-wdt.txt | 31 ----------------------
.../arm64/boot/dts/broadcom/stingray/stingray.dtsi | 1 +
arch/arm64/configs/defconfig | 1 +
drivers/watchdog/sp805_wdt.c | 28 ++++++++++++++++++-
5 files changed, 51 insertions(+), 39 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/watchdog/sp805-wdt.txt
--
2.1.4
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