* Re: [PATCH] ASoC: fsi: Add missing properties to DT bindings
From: Rob Herring @ 2020-05-28 21:09 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Kuninori Morimoto, Mark Brown, alsa-devel, Rob Herring,
Liam Girdwood, linux-renesas-soc, devicetree
In-Reply-To: <20200519075858.27869-1-geert+renesas@glider.be>
On Tue, 19 May 2020 09:58:58 +0200, Geert Uytterhoeven wrote:
> make dtbs_check:
>
> arch/arm/boot/dts/r8a7740-armadillo800eva.dt.yaml: sound@fe1f0000: '#sound-dai-cells', 'clocks', 'power-domains' do not match any of the regexes: 'pinctrl-[0-9]+'
>
> Fix this by documenting the missing properties.
> Update the example to match reality.
> While at it, improve the document title, and comment the various
> compatible values with the corresponding SoC names.
>
> Fixes: 7f464532b05dadc8 ("dt-bindings: Add missing 'additionalProperties: false'")
> Fixes: 2f52475bac7e1572 ("ASoC: fsi: switch to yaml base Documentation")
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> For a clean "make dtbs_check", this depends on "ARM: dts: sh73a0: Add
> missing clocks to sound node"
> (http://lore.kernel.org/r/20200519075525.24742-1-geert+renesas@glider.be).
> ---
> .../bindings/sound/renesas,fsi.yaml | 29 +++++++++++++++----
> 1 file changed, 23 insertions(+), 6 deletions(-)
>
Applied, thanks!
^ permalink raw reply
* Re: [PATCH v6 08/16] soc: mediatek: cmdq: add write_s function
From: Matthias Brugger @ 2020-05-28 21:08 UTC (permalink / raw)
To: Dennis YC Hsieh, Rob Herring, Mark Rutland, Jassi Brar,
Philipp Zabel, David Airlie, Daniel Vetter
Cc: linux-kernel, linux-mediatek, devicetree, wsd_upstream, dri-devel,
Bibby Hsieh, CK Hu, Houlong Wei, linux-arm-kernel, HS Liao
In-Reply-To: <1590685491-17107-9-git-send-email-dennis-yc.hsieh@mediatek.com>
On 28/05/2020 19:04, Dennis YC Hsieh wrote:
> add write_s function in cmdq helper functions which
> writes value contains in internal register to address
> with large dma access support.
>
> Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
> ---
> drivers/soc/mediatek/mtk-cmdq-helper.c | 21 ++++++++++++++++++++-
> include/linux/mailbox/mtk-cmdq-mailbox.h | 1 +
> include/linux/soc/mediatek/mtk-cmdq.h | 20 ++++++++++++++++++++
> 3 files changed, 41 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
> index 33153d17c9d9..ee24c0ec0a24 100644
> --- a/drivers/soc/mediatek/mtk-cmdq-helper.c
> +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
> @@ -18,6 +18,10 @@ struct cmdq_instruction {
> union {
> u32 value;
> u32 mask;
> + struct {
> + u16 arg_c;
> + u16 src_reg;
> + };
> };
> union {
> u16 offset;
> @@ -29,7 +33,7 @@ struct cmdq_instruction {
> struct {
> u8 sop:5;
> u8 arg_c_t:1;
> - u8 arg_b_t:1;
> + u8 src_t:1;
This should be part of 7/16.
> u8 dst_t:1;
> };
> };
> @@ -222,6 +226,21 @@ int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys,
> }
> EXPORT_SYMBOL(cmdq_pkt_write_mask);
>
> +int cmdq_pkt_write_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx,
> + u16 addr_low, u16 src_reg_idx)
> +{
> + struct cmdq_instruction inst = { {0} };
If you want an empty struct on the stack, I think {}; should be enough, right?
Regards,
Matthias
> +
> + inst.op = CMDQ_CODE_WRITE_S;
> + inst.src_t = CMDQ_REG_TYPE;
> + inst.sop = high_addr_reg_idx;
> + inst.offset = addr_low;
> + inst.src_reg = src_reg_idx;
> +
> + return cmdq_pkt_append_command(pkt, inst);
> +}
> +EXPORT_SYMBOL(cmdq_pkt_write_s);
> +
> int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event)
> {
> struct cmdq_instruction inst = { {0} };
> diff --git a/include/linux/mailbox/mtk-cmdq-mailbox.h b/include/linux/mailbox/mtk-cmdq-mailbox.h
> index 121c3bb6d3de..ee67dd3b86f5 100644
> --- a/include/linux/mailbox/mtk-cmdq-mailbox.h
> +++ b/include/linux/mailbox/mtk-cmdq-mailbox.h
> @@ -59,6 +59,7 @@ enum cmdq_code {
> CMDQ_CODE_JUMP = 0x10,
> CMDQ_CODE_WFE = 0x20,
> CMDQ_CODE_EOC = 0x40,
> + CMDQ_CODE_WRITE_S = 0x90,
> CMDQ_CODE_LOGIC = 0xa0,
> };
>
> diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h
> index 83340211e1d3..d623f1aa7814 100644
> --- a/include/linux/soc/mediatek/mtk-cmdq.h
> +++ b/include/linux/soc/mediatek/mtk-cmdq.h
> @@ -12,6 +12,8 @@
> #include <linux/timer.h>
>
> #define CMDQ_NO_TIMEOUT 0xffffffffu
> +#define CMDQ_ADDR_HIGH(addr) ((u32)(((addr) >> 16) & GENMASK(31, 0)))
> +#define CMDQ_ADDR_LOW(addr) ((u16)(addr) | BIT(1))
>
> struct cmdq_pkt;
>
> @@ -102,6 +104,24 @@ int cmdq_pkt_write(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value);
> int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys,
> u16 offset, u32 value, u32 mask);
>
> +/**
> + * cmdq_pkt_write_s() - append write_s command to the CMDQ packet
> + * @pkt: the CMDQ packet
> + * @high_addr_reg_idx: internal register ID which contains high address of pa
> + * @addr_low: low address of pa
> + * @src_reg_idx: the CMDQ internal register ID which cache source value
> + * @mask: the specified target address mask, use U32_MAX if no need
> + *
> + * Return: 0 for success; else the error code is returned
> + *
> + * Support write value to physical address without subsys. Use CMDQ_ADDR_HIGH()
> + * to get high address and call cmdq_pkt_assign() to assign value into internal
> + * reg. Also use CMDQ_ADDR_LOW() to get low address for addr_low parameter when
> + * call to this function.
> + */
> +int cmdq_pkt_write_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx,
> + u16 addr_low, u16 src_reg_idx);
> +
> /**
> * cmdq_pkt_wfe() - append wait for event command to the CMDQ packet
> * @pkt: the CMDQ packet
>
^ permalink raw reply
* Re: [PATCH] dt-bindings: rtc: rtc-sh: Add missing power-domains property
From: Rob Herring @ 2020-05-28 21:06 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: devicetree, linux-renesas-soc, Alessandro Zummo,
Alexandre Belloni, linux-rtc, Rob Herring, Simon Horman
In-Reply-To: <20200519074953.24328-1-geert+renesas@glider.be>
On Tue, 19 May 2020 09:49:53 +0200, Geert Uytterhoeven wrote:
> make dtbs_check:
>
> arch/arm/boot/dts/r7s72100-rskrza1.dt.yaml: rtc@fcff1000: 'power-domains' does not match any of the regexes: 'pinctrl-[0-9]+'
>
> Fix this by documenting the missing power-domains property.
> Update the example to match reality.
>
> Fixes: 7f464532b05dadc8 ("dt-bindings: Add missing 'additionalProperties: false'")
> Fixes: 7ae8b2f5dfb357f0 ("dt-bindings: rtc: rtc-sh: convert bindings to json-schema")
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> Documentation/devicetree/bindings/rtc/renesas,sh-rtc.yaml | 5 +++++
> 1 file changed, 5 insertions(+)
>
Applied, thanks!
^ permalink raw reply
* Re: [PATCH] dt-bindings: media: Add missing clock domain description
From: Rob Herring @ 2020-05-28 21:05 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: linux-renesas-soc, Rob Herring, devicetree, linux-media,
Mauro Carvalho Chehab, Jacopo Mondi
In-Reply-To: <20200519074229.22308-1-geert+renesas@glider.be>
On Tue, 19 May 2020 09:42:29 +0200, Geert Uytterhoeven wrote:
> make dtbs_check:
>
> arch/arm/boot/dts/r7s72100-genmai.dt.yaml: camera@e8210000: 'clocks', 'power-domains' do not match any of the regexes: 'pinctrl-[0-9]+'
>
> Fix this by documenting the missing properties.
> Update the example to match reality.
>
> Fixes: 7f464532b05dadc8 ("dt-bindings: Add missing 'additionalProperties: false'")
> Fixes: 58361eaa11d561f3 ("dt-bindings: media: renesas,ceu: Convert to yaml")
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> .../devicetree/bindings/media/renesas,ceu.yaml | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
Applied, thanks!
^ permalink raw reply
* Re: [PATCH] dt-bindings: media: Add missing clock domain description
From: Rob Herring @ 2020-05-28 21:05 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Jacopo Mondi, Mauro Carvalho Chehab, linux-media,
linux-renesas-soc, devicetree
In-Reply-To: <20200519074229.22308-1-geert+renesas@glider.be>
On Tue, May 19, 2020 at 09:42:29AM +0200, Geert Uytterhoeven wrote:
> make dtbs_check:
>
> arch/arm/boot/dts/r7s72100-genmai.dt.yaml: camera@e8210000: 'clocks', 'power-domains' do not match any of the regexes: 'pinctrl-[0-9]+'
>
> Fix this by documenting the missing properties.
> Update the example to match reality.
>
> Fixes: 7f464532b05dadc8 ("dt-bindings: Add missing 'additionalProperties: false'")
The above is not a error in this commit. It just exposed an error in
the binding. So I don't think Fixes is appropriate. I'll drop when
applying.
> Fixes: 58361eaa11d561f3 ("dt-bindings: media: renesas,ceu: Convert to yaml")
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> .../devicetree/bindings/media/renesas,ceu.yaml | 11 +++++++++++
> 1 file changed, 11 insertions(+)
^ permalink raw reply
* Re: [PATCH V2 3/3] dt-bindings: timer: Convert i.MX SYSCTR to json-schema
From: Rob Herring @ 2020-05-28 21:00 UTC (permalink / raw)
To: Anson Huang
Cc: aisheng.dong, devicetree, Linux-imx, daniel.lezcano, ping.bai,
linux-kernel, s.hauer, robh+dt, tglx, linux-arm-kernel, festevam,
shawnguo, kernel
In-Reply-To: <1589860547-3207-4-git-send-email-Anson.Huang@nxp.com>
On Tue, 19 May 2020 11:55:47 +0800, Anson Huang wrote:
> Convert the i.MX SYSCTR binding to DT schema format using json-schema.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
> ---
> No changes.
> ---
> .../devicetree/bindings/timer/nxp,sysctr-timer.txt | 25 ----------
> .../bindings/timer/nxp,sysctr-timer.yaml | 54 ++++++++++++++++++++++
> 2 files changed, 54 insertions(+), 25 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/timer/nxp,sysctr-timer.txt
> create mode 100644 Documentation/devicetree/bindings/timer/nxp,sysctr-timer.yaml
>
Applied, thanks!
^ permalink raw reply
* Re: [PATCH V2 2/3] dt-bindings: timer: Convert i.MX TPM to json-schema
From: Rob Herring @ 2020-05-28 20:59 UTC (permalink / raw)
To: Anson Huang
Cc: daniel.lezcano, s.hauer, linux-kernel, shawnguo, ping.bai,
devicetree, kernel, festevam, robh+dt, Linux-imx, aisheng.dong,
tglx, linux-arm-kernel
In-Reply-To: <1589860547-3207-3-git-send-email-Anson.Huang@nxp.com>
On Tue, 19 May 2020 11:55:46 +0800, Anson Huang wrote:
> Convert the i.MX TPM binding to DT schema format using json-schema.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
> ---
> Changes since V1:
> - remove unnecessary maxItems for clocks/clock-names.
> ---
> .../devicetree/bindings/timer/nxp,tpm-timer.txt | 28 ----------
> .../devicetree/bindings/timer/nxp,tpm-timer.yaml | 61 ++++++++++++++++++++++
> 2 files changed, 61 insertions(+), 28 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/timer/nxp,tpm-timer.txt
> create mode 100644 Documentation/devicetree/bindings/timer/nxp,tpm-timer.yaml
>
Applied, thanks!
^ permalink raw reply
* Re: [PATCH V2 1/3] dt-bindings: timer: Convert i.MX GPT to json-schema
From: Rob Herring @ 2020-05-28 20:58 UTC (permalink / raw)
To: Anson Huang
Cc: daniel.lezcano, tglx, shawnguo, s.hauer, kernel, festevam,
ping.bai, aisheng.dong, linux-kernel, devicetree,
linux-arm-kernel, Linux-imx
In-Reply-To: <1589860547-3207-2-git-send-email-Anson.Huang@nxp.com>
On Tue, May 19, 2020 at 11:55:45AM +0800, Anson Huang wrote:
> Convert the i.MX GPT binding to DT schema format using json-schema.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> ---
> Changes since V1:
> - remove unnecessary compatible item descriptions;
> - remove unnecessary maxItems for clocks/clock-names;
> ---
> .../devicetree/bindings/timer/fsl,imxgpt.txt | 45 ------------
> .../devicetree/bindings/timer/fsl,imxgpt.yaml | 80 ++++++++++++++++++++++
> 2 files changed, 80 insertions(+), 45 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/timer/fsl,imxgpt.txt
> create mode 100644 Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml
>
> diff --git a/Documentation/devicetree/bindings/timer/fsl,imxgpt.txt b/Documentation/devicetree/bindings/timer/fsl,imxgpt.txt
> deleted file mode 100644
> index 5d8fd5b..0000000
> --- a/Documentation/devicetree/bindings/timer/fsl,imxgpt.txt
> +++ /dev/null
> @@ -1,45 +0,0 @@
> -Freescale i.MX General Purpose Timer (GPT)
> -
> -Required properties:
> -
> -- compatible : should be one of following:
> - for i.MX1:
> - - "fsl,imx1-gpt";
> - for i.MX21:
> - - "fsl,imx21-gpt";
> - for i.MX27:
> - - "fsl,imx27-gpt", "fsl,imx21-gpt";
> - for i.MX31:
> - - "fsl,imx31-gpt";
> - for i.MX25:
> - - "fsl,imx25-gpt", "fsl,imx31-gpt";
> - for i.MX50:
> - - "fsl,imx50-gpt", "fsl,imx31-gpt";
> - for i.MX51:
> - - "fsl,imx51-gpt", "fsl,imx31-gpt";
> - for i.MX53:
> - - "fsl,imx53-gpt", "fsl,imx31-gpt";
> - for i.MX6Q:
> - - "fsl,imx6q-gpt", "fsl,imx31-gpt";
> - for i.MX6DL:
> - - "fsl,imx6dl-gpt";
> - for i.MX6SL:
> - - "fsl,imx6sl-gpt", "fsl,imx6dl-gpt";
> - for i.MX6SX:
> - - "fsl,imx6sx-gpt", "fsl,imx6dl-gpt";
> -- reg : specifies base physical address and size of the registers.
> -- interrupts : should be the gpt interrupt.
> -- clocks : the clocks provided by the SoC to drive the timer, must contain
> - an entry for each entry in clock-names.
> -- clock-names : must include "ipg" entry first, then "per" entry.
> -
> -Example:
> -
> -gpt1: timer@10003000 {
> - compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";
> - reg = <0x10003000 0x1000>;
> - interrupts = <26>;
> - clocks = <&clks IMX27_CLK_GPT1_IPG_GATE>,
> - <&clks IMX27_CLK_PER1_GATE>;
> - clock-names = "ipg", "per";
> -};
> diff --git a/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml b/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml
> new file mode 100644
> index 0000000..5479290
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml
> @@ -0,0 +1,80 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/timer/fsl,imxgpt.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale i.MX General Purpose Timer (GPT)
> +
> +maintainers:
> + - Sascha Hauer <s.hauer@pengutronix.de>
> +
> +properties:
> + compatible:
> + oneOf:
> + - const: "fsl,imx1-gpt"
> + - const: "fsl,imx21-gpt"
> + - items:
> + - const: "fsl,imx27-gpt"
> + - const: "fsl,imx21-gpt"
> + - const: "fsl,imx31-gpt"
> + - items:
> + - const: "fsl,imx25-gpt"
> + - const: "fsl,imx31-gpt"
> + - items:
> + - const: "fsl,imx50-gpt"
> + - const: "fsl,imx31-gpt"
> + - items:
> + - const: "fsl,imx51-gpt"
> + - const: "fsl,imx31-gpt"
> + - items:
> + - const: "fsl,imx53-gpt"
> + - const: "fsl,imx31-gpt"
> + - items:
> + - const: "fsl,imx6q-gpt"
> + - const: "fsl,imx31-gpt"
> + - const: "fsl,imx6dl-gpt"
> + - items:
> + - const: "fsl,imx6sl-gpt"
> + - const: "fsl,imx6dl-gpt"
> + - items:
> + - const: "fsl,imx6sx-gpt"
> + - const: "fsl,imx6dl-gpt"
Don't need quotes.
Group all the ones with the same fallback to a single 'items' list
using enum for the first entry.
Rob
^ permalink raw reply
* Re: [PATCH 1/3] dt-bindings: vendor-prefixes: Add MikroTik
From: Rob Herring @ 2020-05-28 20:55 UTC (permalink / raw)
To: Jonathan McDowell; +Cc: devicetree, linux-kernel, linux-arm-msm
In-Reply-To: <aae96cddb2d1426482cae7f6fc4d1dc0aecfde5d.1589824955.git.noodles@earth.li>
On Mon, 18 May 2020 19:09:30 +0100, Jonathan McDowell wrote:
> MikroTik (SIA Mikrotīkls) is a Latvian company who develop routers and
> wireless ISP systems.
>
> Signed-off-by: Jonathan McDowell <noodles@earth.li>
> ---
> Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
Applied, thanks!
^ permalink raw reply
* Re: [PATCH V2] dt-bindings: clock: Convert i.MX7D clock to json-schema
From: Rob Herring @ 2020-05-28 20:54 UTC (permalink / raw)
To: Anson Huang
Cc: linux-arm-kernel, kernel, linux-kernel, robh+dt, festevam,
Frank.Li, mturquette, shawnguo, linux-clk, devicetree, s.hauer,
sboyd, Linux-imx
In-Reply-To: <1589813554-20929-1-git-send-email-Anson.Huang@nxp.com>
On Mon, 18 May 2020 22:52:34 +0800, Anson Huang wrote:
> Convert the i.MX7D clock binding to DT schema format using json-schema.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> ---
> Changes since V1:
> - Update maintainer's e-mail address.
> ---
> .../devicetree/bindings/clock/imx7d-clock.txt | 13 -----
> .../devicetree/bindings/clock/imx7d-clock.yaml | 64 ++++++++++++++++++++++
> 2 files changed, 64 insertions(+), 13 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/clock/imx7d-clock.txt
> create mode 100644 Documentation/devicetree/bindings/clock/imx7d-clock.yaml
>
Applied, thanks!
^ permalink raw reply
* Re: [PATCH v3 1/2] dt-bindings: serial: Add binding for rs485 bus termination GPIO
From: Rob Herring @ 2020-05-28 20:50 UTC (permalink / raw)
To: Lukas Wunner
Cc: devicetree, Jan Kiszka, Matwey V. Kornilov, Greg Kroah-Hartman,
Andy Shevchenko, Christoph Muellner, Jiri Slaby, linux-serial,
Heiko Stuebner, Giulio Benetti, Rob Herring
In-Reply-To: <4f4411895dc52c846f766e7f7207ec412c4811b6.1589811297.git.lukas@wunner.de>
On Mon, 18 May 2020 16:45:01 +0200, Lukas Wunner wrote:
> Commit e8759ad17d41 ("serial: uapi: Add support for bus termination")
> introduced the ability to enable rs485 bus termination from user space.
> So far the feature is only used by a single driver, 8250_exar.c, using a
> hardcoded GPIO pin specific to Siemens IOT2040 products.
>
> Provide for a more generic solution by allowing specification of an
> rs485 bus termination GPIO pin in the device tree. An upcoming commit
> implements support for this pin for any 8250 driver. The binding is
> used in device trees of the "Revolution Pi" PLCs offered by KUNBUS.
>
> [Heiko Stuebner converted the binding to YAML, hence his Signed-off-by.]
>
> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
> Signed-off-by: Lukas Wunner <lukas@wunner.de>
> Cc: Jan Kiszka <jan.kiszka@siemens.com>
> ---
> Documentation/devicetree/bindings/serial/rs485.yaml | 4 ++++
> 1 file changed, 4 insertions(+)
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* Re: [PATCH v4 5/8] dt-bindings: display: panel: Add ilitek ili9341 panel bindings
From: Rob Herring @ 2020-05-28 20:49 UTC (permalink / raw)
To: dillon.minfei
Cc: devicetree, airlied, p.zabel, thierry.reding, daniel, dri-devel,
linux-kernel, linux-spi, sam, mcoquelin.stm32, linux-clk,
linux-arm-kernel, robh+dt, linux-stm32, alexandre.torgue,
mturquette, sboyd, broonie
In-Reply-To: <1589800165-3271-6-git-send-email-dillon.minfei@gmail.com>
On Mon, 18 May 2020 19:09:22 +0800, dillon.minfei@gmail.com wrote:
> From: dillon min <dillon.minfei@gmail.com>
>
> Add documentation for "ilitek,ili9341" panel.
>
> Signed-off-by: dillon min <dillon.minfei@gmail.com>
> ---
> .../bindings/display/panel/ilitek,ili9341.yaml | 69 ++++++++++++++++++++++
> 1 file changed, 69 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* [PATCH 1/2] ARM: dts: orange-pi-zero-plus2: enable USB OTG port
From: Diego Rondini @ 2020-05-28 20:47 UTC (permalink / raw)
To: Maxime Ripard
Cc: Rob Herring, Chen-Yu Tsai, devicetree, linux-arm-kernel,
linux-kernel, linux-sunxi, Diego Rondini
Enable support for USB OTG port on Orange Pi Zero Plus 2 (both H3 and H5
variants). As, according to the board schematics, the USB OTG port cannot
provide power to external devices, we set dr_mode to peripheral.
Signed-off-by: Diego Rondini <diego.rondini@kynetics.com>
---
.../boot/dts/sun8i-h3-orangepi-zero-plus2.dts | 23 +++++++++++++++++++
.../sun50i-h5-orangepi-zero-plus2.dts | 23 +++++++++++++++++++
2 files changed, 46 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-zero-plus2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-zero-plus2.dts
index b8f46e2802fd3..4376767699a47 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-zero-plus2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-zero-plus2.dts
@@ -137,3 +137,26 @@ &uart0 {
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};
+
+&usbphy {
+ status = "okay";
+};
+
+&usb_otg {
+ /*
+ * According to schematics CN1 MicroUSB port can be used to take
+ * external 5V to power up the board VBUS. On the contrary CN1 MicroUSB
+ * port cannot provide power externally even if the board is powered
+ * via GPIO pins. It thus makes sense to force peripheral mode.
+ */
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts
index c95a68541309c..d8192a7483e9e 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts
@@ -103,3 +103,26 @@ &uart1 {
pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
status = "okay";
};
+
+&usbphy {
+ status = "okay";
+};
+
+&usb_otg {
+ /*
+ * According to schematics CN1 MicroUSB port can be used to take
+ * external 5V to power up the board VBUS. On the contrary CN1 MicroUSB
+ * port cannot provide power externally even if the board is powered
+ * via GPIO pins. It thus makes sense to force peripheral mode.
+ */
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
--
2.25.4
^ permalink raw reply related
* [PATCH 2/2] ARM: dts: orange-pi-zero-plus2: add leds configuration
From: Diego Rondini @ 2020-05-28 20:47 UTC (permalink / raw)
To: Maxime Ripard
Cc: Rob Herring, Chen-Yu Tsai, devicetree, linux-arm-kernel,
linux-kernel, linux-sunxi, Diego Rondini
In-Reply-To: <20200528204712.552964-1-diego.rondini@kynetics.com>
Add pwr and status leds configuration and turn on pwr led by default for Orange
Pi Zero Plus 2 (both H3 and H5 variants).
Signed-off-by: Diego Rondini <diego.rondini@kynetics.com>
---
.../boot/dts/sun8i-h3-orangepi-zero-plus2.dts | 16 ++++++++++++++++
.../allwinner/sun50i-h5-orangepi-zero-plus2.dts | 16 ++++++++++++++++
2 files changed, 32 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-zero-plus2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-zero-plus2.dts
index 4376767699a47..4cd0ac706bd2c 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-zero-plus2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-zero-plus2.dts
@@ -82,6 +82,22 @@ wifi_pwrseq: wifi_pwrseq {
reset-gpios = <&pio 0 9 GPIO_ACTIVE_LOW>; /* PA9 */
post-power-on-delay-ms = <200>;
};
+
+ leds {
+ compatible = "gpio-leds";
+
+ pwr_led {
+ label = "orangepi:green:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ status_led {
+ label = "orangepi:red:status";
+ gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>;
+ };
+
+ };
};
&de {
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts
index d8192a7483e9e..517d53e1b0ff1 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts
@@ -42,6 +42,22 @@ wifi_pwrseq: wifi_pwrseq {
reset-gpios = <&pio 0 9 GPIO_ACTIVE_LOW>; /* PA9 */
post-power-on-delay-ms = <200>;
};
+
+ leds {
+ compatible = "gpio-leds";
+
+ pwr_led {
+ label = "orangepi:green:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ status_led {
+ label = "orangepi:red:status";
+ gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>;
+ };
+
+ };
};
&de {
--
2.25.4
^ permalink raw reply related
* Re: [PATCH v3 09/10] dmaengine: dw: Introduce max burst length hw config
From: Andy Shevchenko @ 2020-05-28 20:38 UTC (permalink / raw)
To: Serge Semin
Cc: Andy Shevchenko, Serge Semin, Vinod Koul, Viresh Kumar,
Dan Williams, Alexey Malahov, Thomas Bogendoerfer, Arnd Bergmann,
Rob Herring, linux-mips, devicetree, dmaengine,
Linux Kernel Mailing List
In-Reply-To: <20200528154022.3reghhjcd4dnsr3g@mobilestation>
On Thu, May 28, 2020 at 6:43 PM Serge Semin
<Sergey.Semin@baikalelectronics.ru> wrote:
> On Thu, May 28, 2020 at 05:52:24PM +0300, Andy Shevchenko wrote:
> > On Wed, May 27, 2020 at 01:50:20AM +0300, Serge Semin wrote:
...
> > Perhaps,
> >
> > /* DesignWare DMA supports burst value from 0 */
> > caps->min_burst = 0;
>
> Regarding min_burst being zero. I don't fully understand what it means.
> It means no burst or burst with minimum length or what?
> In fact DW DMA burst length starts from 1. Remember the burst-length run-time
> parameter we were arguing about? Anyway the driver makes sure that both
> 0 and 1 requested burst length are setup as burst length of 1 in the
> CTLx.SRC_MSIZE, CTLx.DST_MSIZE fields.
Yeah, I also thought about it after I sent a message. 1 sounds better.
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* Re: [PATCH V3] dt-bindings: interrupt-controller: Convert imx irqsteer to json-schema
From: Rob Herring @ 2020-05-28 20:35 UTC (permalink / raw)
To: Anson Huang
Cc: tglx, linux-kernel, maz, jason, robh+dt, devicetree, Linux-imx,
l.stach
In-Reply-To: <1589790957-7904-1-git-send-email-Anson.Huang@nxp.com>
On Mon, 18 May 2020 16:35:57 +0800, Anson Huang wrote:
> Convert the i.MX IRQSTEER binding to DT schema format using json-schema.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
> ---
> Changes since V2:
> - Improve the interrupt items description.
> ---
> .../bindings/interrupt-controller/fsl,irqsteer.txt | 35 ---------
> .../interrupt-controller/fsl,irqsteer.yaml | 89 ++++++++++++++++++++++
> 2 files changed, 89 insertions(+), 35 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.txt
> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml
>
Applied, thanks!
^ permalink raw reply
* Re: [PATCH v3 05/10] dmaengine: Introduce DMA-device device_caps callback
From: Andy Shevchenko @ 2020-05-28 20:34 UTC (permalink / raw)
To: Serge Semin
Cc: Andy Shevchenko, Serge Semin, Vinod Koul, Viresh Kumar,
Dan Williams, Alexey Malahov, Thomas Bogendoerfer, Arnd Bergmann,
Rob Herring, linux-mips, devicetree, dmaengine,
Linux Kernel Mailing List
In-Reply-To: <20200528151902.vemr7aolvtean2f3@mobilestation>
On Thu, May 28, 2020 at 6:23 PM Serge Semin
<Sergey.Semin@baikalelectronics.ru> wrote:
> On Thu, May 28, 2020 at 05:42:57PM +0300, Andy Shevchenko wrote:
> > On Wed, May 27, 2020 at 01:50:16AM +0300, Serge Semin wrote:
...
> > > + if (device->device_caps)
> > > + device->device_caps(chan, caps);
> > > +
> > > return 0;
> >
> > I dunno why this returns int, but either we get rid of this returned value
> > (perhaps in the future, b/c it's not directly related to this series), or
> > something like
> >
> > if (device->device_caps)
> > return device->device_caps(chan, caps);
>
> It returns int because dma_get_slave_caps() check parameters and some other
> stuff.
>
> Regarding device_caps() callback having a return value. IMO it's redundant.
> The only thing what the callback should do is to update the caps and device
> is supposed to know it' capabilities, otherwise who else should know? So I
> don't see why device_caps would be needed.
It might be useful in some (weird?) cases, when you would like to
override a parameter which device provides to relax it (my common
sense tells me that device on global level should not be restrictive,
rather permissive), which might be considered as an error (we would
like to set return capability out of the boundaries of global ones
which provided on device level).
But okay, up to you and Vinod.
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* Re: [PATCH v3 08/10] dmaengine: dw: Add dummy device_caps callback
From: Serge Semin @ 2020-05-28 20:34 UTC (permalink / raw)
To: Andy Shevchenko
Cc: Serge Semin, Andy Shevchenko, Vinod Koul, Viresh Kumar,
Dan Williams, Alexey Malahov, Thomas Bogendoerfer, Arnd Bergmann,
Rob Herring, linux-mips, devicetree, dmaengine,
Linux Kernel Mailing List
In-Reply-To: <CAHp75VdrOJF6R9YDpeV7x+9=DZJULM0hsfdr0o_Jmgf69CRKvQ@mail.gmail.com>
On Thu, May 28, 2020 at 11:29:16PM +0300, Andy Shevchenko wrote:
> On Thu, May 28, 2020 at 6:30 PM Serge Semin
> <Sergey.Semin@baikalelectronics.ru> wrote:
> >
> > On Thu, May 28, 2020 at 05:53:03PM +0300, Andy Shevchenko wrote:
> > > On Wed, May 27, 2020 at 01:50:19AM +0300, Serge Semin wrote:
> > > > Since some DW DMA controllers (like one installed on Baikal-T1 SoC) may
> > > > have non-uniform DMA capabilities per device channels, let's add
> > > > the DW DMA specific device_caps callback to expose that specifics up to
> > > > the DMA consumer. It's a dummy function for now. We'll fill it in with
> > > > capabilities overrides in the next commits.
> > >
> > > I think per se it is not worth to have it separated. Squash into the next one.
> >
> > bikeshadding?
>
> Actually no.
>
> > There is no any difference whether I add a dummy callback, then
> > fill it in in a following up patch, or have the callback added together
> > with some content. Let's see what Vinod thinks of it. Until then I'll stick with
> > the current solution.
>
> The rule of thumb that we don't add dead code or code which is useless
> per se. Go ahead and provide it with some usefulness.
Actually yes. I've seen examples, which preparation patches first added
prototypes with empty functionality, that in follow-up patches have been
filled with a required code. I've seen Greg accepted such approach. So it's
absolutely normal and acceptable.
-Sergey
>
> --
> With Best Regards,
> Andy Shevchenko
^ permalink raw reply
* Re: [PATCH v2] dt-bindings: clock: renesas: cpg: Convert to json-schema
From: Rob Herring @ 2020-05-28 20:34 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Michael Turquette, linux-renesas-soc, Stephen Boyd, devicetree,
linux-clk, Rob Herring
In-Reply-To: <20200518081644.23683-1-geert+renesas@glider.be>
On Mon, 18 May 2020 10:16:44 +0200, Geert Uytterhoeven wrote:
> Convert the Renesas Clock Pulse Generator (CPG) Device Tree
> binding documentation to json-schema, combining support for:
> - R-Mobile APE6 (R8A73A4) and A1 (R8A7740),
> - R-Car M1 (R8A7778) and H1 (R8A7779),
> - RZ/A1 (R7S72100),
> - SH-Mobile AG5 (SH73A0).
>
> Keep the example for R-Mobile A1, which shows most properties.
> Drop the consumer examples, as they do not belong here.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> v2:
> - Remove unneeded 'allOf' container around '$ref',
>
> To be queued in clk-renesas-for-v5.8.
>
> For a clean dtbs_check, this depends on commit e47cb97f153193d4 ("ARM:
> dts: r8a7740: Add missing extal2 to CPG node") in v5.7-rc6.
>
> As these bindings are very similar, I merged them into a single
> document. SoC-specific differences are mostly limited to the "clocks"
> and "clock-output-names" properties, and "#power-domain-cells" for clock
> domain providers.
>
> JFYI, the diffstat for the individual conversions would look like:
> .../clock/renesas,r8a73a4-cpg-clocks.txt | 33 --------
> .../clock/renesas,r8a73a4-cpg-clocks.yaml | 70 ++++++++++++++++
> .../clock/renesas,r8a7740-cpg-clocks.txt | 41 ----------
> .../clock/renesas,r8a7740-cpg-clocks.yaml | 81 +++++++++++++++++++
> .../clock/renesas,r8a7778-cpg-clocks.txt | 47 -----------
> .../clock/renesas,r8a7778-cpg-clocks.yaml | 64 +++++++++++++++
> .../clock/renesas,r8a7779-cpg-clocks.txt | 49 -----------
> .../clock/renesas,r8a7779-cpg-clocks.yaml | 65 +++++++++++++++
> .../bindings/clock/renesas,rz-cpg-clocks.txt | 53 ------------
> .../bindings/clock/renesas,rz-cpg-clocks.yaml | 66 +++++++++++++++
> .../clock/renesas,sh73a0-cpg-clocks.txt | 35 --------
> .../clock/renesas,sh73a0-cpg-clocks.yaml | 69 ++++++++++++++++
> 12 files changed, 415 insertions(+), 258 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/clock/renesas,r8a73a4-cpg-clocks.txt
> create mode 100644 Documentation/devicetree/bindings/clock/renesas,r8a73a4-cpg-clocks.yaml
> delete mode 100644 Documentation/devicetree/bindings/clock/renesas,r8a7740-cpg-clocks.txt
> create mode 100644 Documentation/devicetree/bindings/clock/renesas,r8a7740-cpg-clocks.yaml
> delete mode 100644 Documentation/devicetree/bindings/clock/renesas,r8a7778-cpg-clocks.txt
> create mode 100644 Documentation/devicetree/bindings/clock/renesas,r8a7778-cpg-clocks.yaml
> delete mode 100644 Documentation/devicetree/bindings/clock/renesas,r8a7779-cpg-clocks.txt
> create mode 100644 Documentation/devicetree/bindings/clock/renesas,r8a7779-cpg-clocks.yaml
> delete mode 100644 Documentation/devicetree/bindings/clock/renesas,rz-cpg-clocks.txt
> create mode 100644 Documentation/devicetree/bindings/clock/renesas,rz-cpg-clocks.yaml
> delete mode 100644 Documentation/devicetree/bindings/clock/renesas,sh73a0-cpg-clocks.txt
> create mode 100644 Documentation/devicetree/bindings/clock/renesas,sh73a0-cpg-clocks.yaml
> ---
> .../bindings/clock/renesas,cpg-clocks.yaml | 241 ++++++++++++++++++
> .../clock/renesas,r8a73a4-cpg-clocks.txt | 33 ---
> .../clock/renesas,r8a7740-cpg-clocks.txt | 41 ---
> .../clock/renesas,r8a7778-cpg-clocks.txt | 47 ----
> .../clock/renesas,r8a7779-cpg-clocks.txt | 49 ----
> .../bindings/clock/renesas,rz-cpg-clocks.txt | 53 ----
> .../clock/renesas,sh73a0-cpg-clocks.txt | 35 ---
> 7 files changed, 241 insertions(+), 258 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/clock/renesas,cpg-clocks.yaml
> delete mode 100644 Documentation/devicetree/bindings/clock/renesas,r8a73a4-cpg-clocks.txt
> delete mode 100644 Documentation/devicetree/bindings/clock/renesas,r8a7740-cpg-clocks.txt
> delete mode 100644 Documentation/devicetree/bindings/clock/renesas,r8a7778-cpg-clocks.txt
> delete mode 100644 Documentation/devicetree/bindings/clock/renesas,r8a7779-cpg-clocks.txt
> delete mode 100644 Documentation/devicetree/bindings/clock/renesas,rz-cpg-clocks.txt
> delete mode 100644 Documentation/devicetree/bindings/clock/renesas,sh73a0-cpg-clocks.txt
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* Re: [PATCH] dt-bindings: regulator: Convert anatop regulator to json-schema
From: Rob Herring @ 2020-05-28 20:31 UTC (permalink / raw)
To: Anson Huang
Cc: lgirdwood, broonie, paul.liu, linux-kernel, devicetree, Linux-imx
In-Reply-To: <1589788505-18024-1-git-send-email-Anson.Huang@nxp.com>
On Mon, May 18, 2020 at 03:55:05PM +0800, Anson Huang wrote:
> Convert the anatop regulator binding to DT schema format using json-schema.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> ---
> .../bindings/regulator/anatop-regulator.txt | 40 ---------
> .../bindings/regulator/anatop-regulator.yaml | 94 ++++++++++++++++++++++
> 2 files changed, 94 insertions(+), 40 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/regulator/anatop-regulator.txt
> create mode 100644 Documentation/devicetree/bindings/regulator/anatop-regulator.yaml
>
> diff --git a/Documentation/devicetree/bindings/regulator/anatop-regulator.txt b/Documentation/devicetree/bindings/regulator/anatop-regulator.txt
> deleted file mode 100644
> index a3106c7..0000000
> --- a/Documentation/devicetree/bindings/regulator/anatop-regulator.txt
> +++ /dev/null
> @@ -1,40 +0,0 @@
> -Anatop Voltage regulators
> -
> -Required properties:
> -- compatible: Must be "fsl,anatop-regulator"
> -- regulator-name: A string used as a descriptive name for regulator outputs
> -- anatop-reg-offset: Anatop MFD register offset
> -- anatop-vol-bit-shift: Bit shift for the register
> -- anatop-vol-bit-width: Number of bits used in the register
> -- anatop-min-bit-val: Minimum value of this register
> -- anatop-min-voltage: Minimum voltage of this regulator
> -- anatop-max-voltage: Maximum voltage of this regulator
> -
> -Optional properties:
> -- anatop-delay-reg-offset: Anatop MFD step time register offset
> -- anatop-delay-bit-shift: Bit shift for the step time register
> -- anatop-delay-bit-width: Number of bits used in the step time register
> -- vin-supply: The supply for this regulator
> -- anatop-enable-bit: Regulator enable bit offset
> -
> -Any property defined as part of the core regulator
> -binding, defined in regulator.txt, can also be used.
> -
> -Example:
> -
> - regulator-vddpu {
> - compatible = "fsl,anatop-regulator";
> - regulator-name = "vddpu";
> - regulator-min-microvolt = <725000>;
> - regulator-max-microvolt = <1300000>;
> - regulator-always-on;
> - anatop-reg-offset = <0x140>;
> - anatop-vol-bit-shift = <9>;
> - anatop-vol-bit-width = <5>;
> - anatop-delay-reg-offset = <0x170>;
> - anatop-delay-bit-shift = <24>;
> - anatop-delay-bit-width = <2>;
> - anatop-min-bit-val = <1>;
> - anatop-min-voltage = <725000>;
> - anatop-max-voltage = <1300000>;
> - };
> diff --git a/Documentation/devicetree/bindings/regulator/anatop-regulator.yaml b/Documentation/devicetree/bindings/regulator/anatop-regulator.yaml
> new file mode 100644
> index 0000000..a8c9dd0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/regulator/anatop-regulator.yaml
> @@ -0,0 +1,94 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/regulator/anatop-regulator.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale Anatop Voltage Regulators
> +
> +maintainers:
> + - Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
> +
> +allOf:
> + - $ref: "regulator.yaml#"
> +
> +properties:
> + compatible:
> + const: fsl,anatop-regulator
> +
> + regulator-name:
> + $ref: '/schemas/types.yaml#/definitions/string'
> + description: string used as a descriptive name for regulator outputs
Standard property, right? It already has a definition.
> +
> + anatop-reg-offset:
> + $ref: '/schemas/types.yaml#/definitions/uint32'
> + description: u32 value representing the anatop MFD register offset.
> +
> + anatop-vol-bit-shift:
> + $ref: '/schemas/types.yaml#/definitions/uint32'
> + description: u32 value representing the bit shift for the register.
> +
> + anatop-vol-bit-width:
> + $ref: '/schemas/types.yaml#/definitions/uint32'
> + description: u32 value representing the number of bits used in the register.
> +
> + anatop-min-bit-val:
> + $ref: '/schemas/types.yaml#/definitions/uint32'
> + description: u32 value representing the minimum value of this register.
> +
> + anatop-min-voltage:
> + $ref: '/schemas/types.yaml#/definitions/uint32'
> + description: u32 value representing the minimum voltage of this regulator.
> +
> + anatop-max-voltage:
> + $ref: '/schemas/types.yaml#/definitions/uint32'
> + description: u32 value representing the maximum voltage of this regulator.
> +
> + anatop-delay-reg-offset:
> + $ref: '/schemas/types.yaml#/definitions/uint32'
> + description: u32 value representing the anatop MFD step time register offset.
> +
> + anatop-delay-bit-shift:
> + $ref: '/schemas/types.yaml#/definitions/uint32'
> + description: u32 value representing the bit shift for the step time register.
> +
> + anatop-delay-bit-width:
> + $ref: '/schemas/types.yaml#/definitions/uint32'
> + description: u32 value representing the number of bits used in the step time register.
> +
> + anatop-enable-bit:
> + $ref: '/schemas/types.yaml#/definitions/uint32'
> + description: u32 value representing regulator enable bit offset.
> +
> + vin-supply:
> + $ref: '/schemas/types.yaml#/definitions/phandle'
> + description: input supply phandle.
> +
> +required:
> + - compatible
> + - regulator-name
> + - anatop-reg-offset
> + - anatop-vol-bit-shift
> + - anatop-vol-bit-width
> + - anatop-min-bit-val
> + - anatop-min-voltage
> + - anatop-max-voltage
Add here:
unevaluatedProperties: false
> +
> +examples:
> + - |
> + regulator-vddpu {
> + compatible = "fsl,anatop-regulator";
> + regulator-name = "vddpu";
> + regulator-min-microvolt = <725000>;
> + regulator-max-microvolt = <1300000>;
> + regulator-always-on;
> + anatop-reg-offset = <0x140>;
> + anatop-vol-bit-shift = <9>;
> + anatop-vol-bit-width = <5>;
> + anatop-delay-reg-offset = <0x170>;
> + anatop-delay-bit-shift = <24>;
> + anatop-delay-bit-width = <2>;
> + anatop-min-bit-val = <1>;
> + anatop-min-voltage = <725000>;
> + anatop-max-voltage = <1300000>;
> + };
> --
> 2.7.4
>
^ permalink raw reply
* Re: [PATCH v3 10/10] dmaengine: dw: Initialize max_sg_nents with nollp flag
From: Andy Shevchenko @ 2020-05-28 20:31 UTC (permalink / raw)
To: Serge Semin
Cc: Andy Shevchenko, Serge Semin, Vinod Koul, Viresh Kumar,
Dan Williams, Alexey Malahov, Thomas Bogendoerfer, Arnd Bergmann,
Rob Herring, linux-mips, devicetree, dmaengine,
Linux Kernel Mailing List
In-Reply-To: <20200528155017.ayetroojyvxl74kb@mobilestation>
On Thu, May 28, 2020 at 6:52 PM Serge Semin
<Sergey.Semin@baikalelectronics.ru> wrote:
> On Thu, May 28, 2020 at 05:56:30PM +0300, Andy Shevchenko wrote:
> > On Wed, May 27, 2020 at 01:50:21AM +0300, Serge Semin wrote:
...
> > In principal I agree, one nit below.
> > If you are okay with it, feel free to add my Rb tag.
> > > + /*
> > > + * It might be crucial for some devices to have the hardware
> > > + * accelerated multi-block transfers supported, aka LLPs in DW DMAC
> > > + * notation. So if LLPs are supported then max_sg_nents is set to
> > > + * zero which means unlimited number of SG entries can be handled in a
> > > + * single DMA transaction, otherwise it's just one SG entry.
> > > + */
> >
> > > + caps->max_sg_nents = dwc->nollp;
> >
>
> > To be on the safer side I would explicitly do it like
> >
> > if (dwc->nollp)
> > /* your nice comment */
> > = 1;
> > else
> > /* Unlimited */
> > = 0;
> >
> > type or content of nollp theoretically can be changed and this will affect maximum segments.
>
> Agree. Though I don't like formatting you suggested. If I add my nice comment
> between if-statement and assignment the the former will be look detached from
> the if-statement, which seems a bit ugly. So I'd leave the comment above the
> whole if-else statement, especially seeing I've already mentioned there about
> the unlimited number of SG entries there.
>
> /*
> * It might be crucial for some devices to have the hardware
> * accelerated multi-block transfers supported, aka LLPs in DW DMAC
> * notation. So if LLPs are supported then max_sg_nents is set to
> * zero which means unlimited number of SG entries can be handled in a
> * single DMA transaction, otherwise it's just one SG entry.
> */
> if (dwc->nollp)
> caps->max_sg_nents = 1;
> else
> caps->max_sg_nents = 0;
Fine with me, thanks!
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* Re: [PATCH v3 08/10] dmaengine: dw: Add dummy device_caps callback
From: Andy Shevchenko @ 2020-05-28 20:29 UTC (permalink / raw)
To: Serge Semin
Cc: Andy Shevchenko, Serge Semin, Vinod Koul, Viresh Kumar,
Dan Williams, Alexey Malahov, Thomas Bogendoerfer, Arnd Bergmann,
Rob Herring, linux-mips, devicetree, dmaengine,
Linux Kernel Mailing List
In-Reply-To: <20200528152740.ggld7wkmaqiq4g6o@mobilestation>
On Thu, May 28, 2020 at 6:30 PM Serge Semin
<Sergey.Semin@baikalelectronics.ru> wrote:
>
> On Thu, May 28, 2020 at 05:53:03PM +0300, Andy Shevchenko wrote:
> > On Wed, May 27, 2020 at 01:50:19AM +0300, Serge Semin wrote:
> > > Since some DW DMA controllers (like one installed on Baikal-T1 SoC) may
> > > have non-uniform DMA capabilities per device channels, let's add
> > > the DW DMA specific device_caps callback to expose that specifics up to
> > > the DMA consumer. It's a dummy function for now. We'll fill it in with
> > > capabilities overrides in the next commits.
> >
> > I think per se it is not worth to have it separated. Squash into the next one.
>
> bikeshadding?
Actually no.
> There is no any difference whether I add a dummy callback, then
> fill it in in a following up patch, or have the callback added together
> with some content. Let's see what Vinod thinks of it. Until then I'll stick with
> the current solution.
The rule of thumb that we don't add dead code or code which is useless
per se. Go ahead and provide it with some usefulness.
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* Re: [PATCH 1/3] dt-bindings: arm: qcom: Add sm6125 SoC and xiaomi,willow
From: Rob Herring @ 2020-05-28 20:28 UTC (permalink / raw)
To: Eli Riggs
Cc: Rob Herring, devicetree, Andy Gross, linux-arm-msm,
Bjorn Andersson, ~postmarketos/upstreaming, linux-kernel
In-Reply-To: <20200517115410.3374-1-eli@rje.li>
On Sun, 17 May 2020 04:54:06 -0700, Eli Riggs wrote:
> Add compatibles for SM6125 aka SDM665 aka Snapdragon 665, as well
> as xiaomi,willow aka Xiaomi Redmi Note 8T, the international
> edition of the Note 8.
>
> Signed-off-by: Eli Riggs <eli@rje.li>
> ---
> Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++
> 1 file changed, 6 insertions(+)
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* Re: [PATCH v2 2/2] dt-bindings: thermal: tsens: Add zeroc interrupt support in yaml
From: Rob Herring @ 2020-05-28 20:26 UTC (permalink / raw)
To: Manaf Meethalavalappu Pallikunhi
Cc: linux-pm, Rob Herring, Daniel Lezcano, Andy Gross, linux-kernel,
devicetree, Bjorn Andersson, Zhang Rui, Amit Kucheria,
linux-arm-msm
In-Reply-To: <20200517104627.29501-3-manafm@codeaurora.org>
On Sun, 17 May 2020 16:16:27 +0530, Manaf Meethalavalappu Pallikunhi wrote:
> Add zeroc interrupt support for tsens in yaml.
>
> Signed-off-by: Manaf Meethalavalappu Pallikunhi <manafm@codeaurora.org>
> ---
> .../bindings/thermal/qcom-tsens.yaml | 21 +++++++++++++++++++
> 1 file changed, 21 insertions(+)
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* Re: [PATCH v2 2/4] dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7180
From: Rob Herring @ 2020-05-28 20:25 UTC (permalink / raw)
To: Taniya Das
Cc: Stephen Boyd, Michael Turquette , David Brown,
Rajendra Nayak, linux-arm-msm, linux-soc, linux-clk, linux-kernel,
Andy Gross, devicetree
In-Reply-To: <1589707344-8871-3-git-send-email-tdas@codeaurora.org>
On Sun, May 17, 2020 at 02:52:22PM +0530, Taniya Das wrote:
> The LPASS(Low Power Audio Subsystem) clock provider have a bunch of generic
> properties that are needed in a device tree. Also add clock ids for GCC
> LPASS and LPASS Core clock IDs for LPASS client to request for the clocks.
>
> Signed-off-by: Taniya Das <tdas@codeaurora.org>
> ---
> .../bindings/clock/qcom,sc7180-lpasscorecc.yaml | 101 +++++++++++++++++++++
> include/dt-bindings/clock/qcom,gcc-sc7180.h | 1 +
> .../dt-bindings/clock/qcom,lpasscorecc-sc7180.h | 29 ++++++
> 3 files changed, 131 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/qcom,sc7180-lpasscorecc.yaml
> create mode 100644 include/dt-bindings/clock/qcom,lpasscorecc-sc7180.h
>
> diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7180-lpasscorecc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7180-lpasscorecc.yaml
> new file mode 100644
> index 0000000..c025a0ae
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/qcom,sc7180-lpasscorecc.yaml
> @@ -0,0 +1,101 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/qcom,sc7180-lpasscorecc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm LPASS Core Clock Controller Binding for SC7180
> +
> +maintainers:
> + - Taniya Das <tdas@codeaurora.org>
> +
> +description: |
> + Qualcomm LPASS core clock control module which supports the clocks and
> + power domains on SC7180.
> +
> + See also:
> + - dt-bindings/clock/qcom,lpasscorecc-sc7180.h
> +
> +properties:
> + compatible:
> + enum:
> + - qcom,sc7180-lpasshm
> + - qcom,sc7180-lpasscorecc
> +
> + clocks:
> + items:
> + - description: gcc_lpass_sway clock from GCC
> +
> + clock-names:
> + items:
> + - const: gcc_lpass_sway
> +
> + power-domains:
> + items:
> + - description: LPASS CORE HM GSDCR
For single entry, 'maxItems: 1' is enough.
> +
> + '#clock-cells':
> + const: 1
> +
> + '#power-domain-cells':
> + const: 1
> +
> + reg:
> + minItems: 1
> + maxItems: 2
> + items:
> + - description: lpass audio cc register
> + - description: lpass core cc register
audio then core
> +
> + reg-names:
> + items:
> + - const: lpass_core_cc
> + - const: lpass_audio_cc
core then audio?
2 reg-names required, but 1 reg allowed?
> +
> +if:
> + properties:
> + compatible:
> + contains:
> + const: qcom,sc7180-lpasshm
> +then:
> + properties:
> + reg:
> + items:
> + - description: lpass hm core register
reg-names allowed in this case?
Ideally, this would have just 'maxItems: 1' to just disallow the 2nd
entry above.
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - clock-names
> + - '#clock-cells'
> + - '#power-domain-cells'
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/qcom,gcc-sc7180.h>
> + #include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h>
> + clock-controller@63000000 {
> + compatible = "qcom,sc7180-lpasshm";
> + reg = <0 0x63000000 0 0x28>;
> + clocks = <&gcc GCC_LPASS_CFG_NOC_SWAY_CLK>;
> + clock-names = "gcc_lpass_sway";
> + #clock-cells = <1>;
> + #power-domain-cells = <1>;
> + };
> +
> + - |
> + clock-controller@62d00000 {
> + compatible = "qcom,sc7180-lpasscorecc";
> + reg = <0 0x62d00000 0 0x50000>,
> + <0 0x62780000 0 0x30000>;
> + reg-names = "lpass_core_cc", "lpass_audio_cc";
> + clocks = <&gcc GCC_LPASS_CFG_NOC_SWAY_CLK>;
> + clock-names = "gcc_lpass_sway";
> + power-domains = <&lpass_hm LPASS_CORE_HM_GDSCR>;
> + #clock-cells = <1>;
> + #power-domain-cells = <1>;
> + };
> +...
> diff --git a/include/dt-bindings/clock/qcom,gcc-sc7180.h b/include/dt-bindings/clock/qcom,gcc-sc7180.h
> index 1258fd0..439476c 100644
> --- a/include/dt-bindings/clock/qcom,gcc-sc7180.h
> +++ b/include/dt-bindings/clock/qcom,gcc-sc7180.h
> @@ -137,6 +137,7 @@
> #define GCC_MSS_NAV_AXI_CLK 127
> #define GCC_MSS_Q6_MEMNOC_AXI_CLK 128
> #define GCC_MSS_SNOC_AXI_CLK 129
> +#define GCC_LPASS_CFG_NOC_SWAY_CLK 130
>
> /* GCC resets */
> #define GCC_QUSB2PHY_PRIM_BCR 0
> diff --git a/include/dt-bindings/clock/qcom,lpasscorecc-sc7180.h b/include/dt-bindings/clock/qcom,lpasscorecc-sc7180.h
> new file mode 100644
> index 0000000..a55d01d
> --- /dev/null
> +++ b/include/dt-bindings/clock/qcom,lpasscorecc-sc7180.h
> @@ -0,0 +1,29 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Copyright (c) 2020, The Linux Foundation. All rights reserved.
> + */
> +
> +#ifndef _DT_BINDINGS_CLK_QCOM_LPASS_CORE_CC_SC7180_H
> +#define _DT_BINDINGS_CLK_QCOM_LPASS_CORE_CC_SC7180_H
> +
> +/* LPASS_CORE_CC clocks */
> +#define LPASS_LPAAUDIO_DIG_PLL 0
> +#define LPASS_LPAAUDIO_DIG_PLL_OUT_ODD 1
> +#define CORE_CLK_SRC 2
> +#define EXT_MCLK0_CLK_SRC 3
> +#define LPAIF_PRI_CLK_SRC 4
> +#define LPAIF_SEC_CLK_SRC 5
> +#define LPASS_AUDIO_CORE_CORE_CLK 6
> +#define LPASS_AUDIO_CORE_EXT_MCLK0_CLK 7
> +#define LPASS_AUDIO_CORE_LPAIF_PRI_IBIT_CLK 8
> +#define LPASS_AUDIO_CORE_LPAIF_SEC_IBIT_CLK 9
> +#define LPASS_AUDIO_CORE_SYSNOC_MPORT_CORE_CLK 10
> +
> +/* LPASS Core power domains */
> +#define LPASS_CORE_HM_GDSCR 0
> +
> +/* LPASS Audio power domains */
> +#define LPASS_AUDIO_HM_GDSCR 0
> +#define LPASS_PDC_HM_GDSCR 1
> +
> +#endif
> --
> Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member
> of the Code Aurora Forum, hosted by the Linux Foundation.
>
^ permalink raw reply
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