* [PATCH 2/2] ARM: boot: dts: microchip: at91-sama7g54_curiosity: Replace regulator-suspend-voltage with the valid property
From: Andrei Simion @ 2024-04-02 9:12 UTC (permalink / raw)
To: robh, krzysztof.kozlowski+dt, conor+dt, nicolas.ferre,
alexandre.belloni, claudiu.beznea, mihai.sain
Cc: linux-arm-kernel, linux-kernel, devicetree, Andrei Simion
In-Reply-To: <20240402091228.110362-1-andrei.simion@microchip.com>
Replace regulator-suspend-voltage with regulator-suspend-microvolt.
Fixes: ebd6591f8ddb ("ARM: dts: microchip: sama7g54_curiosity: Add initial device tree of the board")
Signed-off-by: Andrei Simion <andrei.simion@microchip.com>
---
arch/arm/boot/dts/microchip/at91-sama7g54_curiosity.dts | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/microchip/at91-sama7g54_curiosity.dts b/arch/arm/boot/dts/microchip/at91-sama7g54_curiosity.dts
index 4f609e9e510e..009d2c832421 100644
--- a/arch/arm/boot/dts/microchip/at91-sama7g54_curiosity.dts
+++ b/arch/arm/boot/dts/microchip/at91-sama7g54_curiosity.dts
@@ -242,7 +242,7 @@ vddcore: VDD_CORE {
regulator-state-standby {
regulator-on-in-suspend;
- regulator-suspend-voltage = <1150000>;
+ regulator-suspend-microvolt = <1150000>;
regulator-mode = <4>;
};
@@ -263,7 +263,7 @@ vddcpu: VDD_OTHER {
regulator-state-standby {
regulator-on-in-suspend;
- regulator-suspend-voltage = <1050000>;
+ regulator-suspend-microvolt = <1050000>;
regulator-mode = <4>;
};
@@ -280,7 +280,7 @@ vldo1: LDO1 {
regulator-always-on;
regulator-state-standby {
- regulator-suspend-voltage = <1800000>;
+ regulator-suspend-microvolt = <1800000>;
regulator-on-in-suspend;
};
@@ -296,7 +296,7 @@ vldo2: LDO2 {
regulator-always-on;
regulator-state-standby {
- regulator-suspend-voltage = <3300000>;
+ regulator-suspend-microvolt = <3300000>;
regulator-on-in-suspend;
};
--
2.34.1
^ permalink raw reply related
* [PATCH 1/2] ARM: boot: dts: microchip: at91-sama7g5ek: Replace regulator-suspend-voltage with the valid property
From: Andrei Simion @ 2024-04-02 9:12 UTC (permalink / raw)
To: robh, krzysztof.kozlowski+dt, conor+dt, nicolas.ferre,
alexandre.belloni, claudiu.beznea, mihai.sain
Cc: linux-arm-kernel, linux-kernel, devicetree, Andrei Simion
In-Reply-To: <20240402091228.110362-1-andrei.simion@microchip.com>
Replace regulator-suspend-voltage with regulator-suspend-microvolt.
Fixes: 85b1304b9daa ("ARM: dts: at91: sama7g5ek: set regulator voltages for standby state")
Signed-off-by: Andrei Simion <andrei.simion@microchip.com>
---
arch/arm/boot/dts/microchip/at91-sama7g5ek.dts | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts b/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts
index 217e9b96c61e..20b2497657ae 100644
--- a/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts
+++ b/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts
@@ -293,7 +293,7 @@ vddcore: VDD_CORE {
regulator-state-standby {
regulator-on-in-suspend;
- regulator-suspend-voltage = <1150000>;
+ regulator-suspend-microvolt = <1150000>;
regulator-mode = <4>;
};
@@ -314,7 +314,7 @@ vddcpu: VDD_OTHER {
regulator-state-standby {
regulator-on-in-suspend;
- regulator-suspend-voltage = <1050000>;
+ regulator-suspend-microvolt = <1050000>;
regulator-mode = <4>;
};
@@ -331,7 +331,7 @@ vldo1: LDO1 {
regulator-always-on;
regulator-state-standby {
- regulator-suspend-voltage = <1800000>;
+ regulator-suspend-microvolt = <1800000>;
regulator-on-in-suspend;
};
@@ -346,7 +346,7 @@ vldo2: LDO2 {
regulator-max-microvolt = <3700000>;
regulator-state-standby {
- regulator-suspend-voltage = <1800000>;
+ regulator-suspend-microvolt = <1800000>;
regulator-on-in-suspend;
};
--
2.34.1
^ permalink raw reply related
* [PATCH 0/2] Fix the regulator-state-standby definition
From: Andrei Simion @ 2024-04-02 9:12 UTC (permalink / raw)
To: robh, krzysztof.kozlowski+dt, conor+dt, nicolas.ferre,
alexandre.belloni, claudiu.beznea, mihai.sain
Cc: linux-arm-kernel, linux-kernel, devicetree, Andrei Simion
make dtbs_check DT_SCHEMA_FILES=microchip,mcp16502.yaml
at91-sama7g5ek.dtb: mcp16502@5b: regulators:VDD_(CORE|OTHER)|LDO[1-2]:
regulator-state-standby 'regulator-suspend-voltage' does not match any of
the regexes 'pinctrl-[0-9]+' from schema
$id: http://devicetree.org/schemas/regulator/microchip,mcp16502.yaml#
at91-sama7g54_curiosity.dtb: pmic@5b: regulators:VDD_(CORE|OTHER)|LDO[1-2]:
regulator-state-standby 'regulator-suspend-voltage' does not match any of
the regexes 'pinctrl-[0-9]+' from schema
$id: http://devicetree.org/schemas/regulator/microchip,mcp16502.yaml#
This patch series proposes to correct the typo that was entered by mistake
into devicetree definition regulator-state-standby by replacing
regulator-suspend-voltage with regulator-suspend-microvolt.
Andrei Simion (2):
ARM: boot: dts: microchip: at91-sama7g5ek: Replace
regulator-suspend-voltage with the valid property
ARM: boot: dts: microchip: at91-sama7g54_curiosity: Replace
regulator-suspend-voltage with the valid property
arch/arm/boot/dts/microchip/at91-sama7g54_curiosity.dts | 8 ++++----
arch/arm/boot/dts/microchip/at91-sama7g5ek.dts | 8 ++++----
2 files changed, 8 insertions(+), 8 deletions(-)
--
2.34.1
^ permalink raw reply
* Re: [PATCH v10 09/11] arm64: dts: imx93-11x11-evk: enable usb and typec nodes
From: Shawn Guo @ 2024-04-02 9:07 UTC (permalink / raw)
To: Xu Yang
Cc: gregkh, robh+dt, krzysztof.kozlowski+dt, shawnguo, conor+dt,
s.hauer, kernel, festevam, linux-imx, peter.chen, jun.li,
linux-usb, devicetree, linux-arm-kernel, imx, linux-kernel
In-Reply-To: <20240321081439.541799-9-xu.yang_2@nxp.com>
On Thu, Mar 21, 2024 at 04:14:37PM +0800, Xu Yang wrote:
> There are 2 Type-C ports and 2 USB controllers on i.MX93. Enable them.
>
> Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
>
> ---
> Changes in v2:
> - remove status property in ptn5110 nodes
> - fix dt-schema warnings
> Changes in v3:
> - no changes
> Changes in v4:
> - no changes
> Changes in v5:
> - no changes
> Changes in v6:
> - no changes
> Changes in v7:
> - no changes
> Changes in v8:
> - no changes
> Changes in v9:
> - use compatible "nxp,ptn5110", "tcpci"
> Changes in v10:
> - no changes
> ---
> .../boot/dts/freescale/imx93-11x11-evk.dts | 118 ++++++++++++++++++
> 1 file changed, 118 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
> index 9921ea13ab48..ecc01d872e95 100644
> --- a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
> @@ -5,6 +5,7 @@
>
> /dts-v1/;
>
> +#include <dt-bindings/usb/pd.h>
> #include "imx93.dtsi"
>
> / {
> @@ -104,6 +105,80 @@ &mu2 {
> status = "okay";
> };
>
> +&lpi2c3 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clock-frequency = <400000>;
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&pinctrl_lpi2c3>;
> + pinctrl-1 = <&pinctrl_lpi2c3>;
Do you really need "sleep" pinctrl state?
> + status = "okay";
> +
> + ptn5110: tcpc@50 {
> + compatible = "nxp,ptn5110", "tcpci";
> + reg = <0x50>;
> + interrupt-parent = <&gpio3>;
> + interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
> +
> + typec1_con: connector {
> + compatible = "usb-c-connector";
> + label = "USB-C";
> + power-role = "dual";
> + data-role = "dual";
> + try-power-role = "sink";
> + source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
> + sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
> + PDO_VAR(5000, 20000, 3000)>;
> + op-sink-microwatt = <15000000>;
> + self-powered;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
Have a newline between properties and child node.
Shawn
> + typec1_dr_sw: endpoint {
> + remote-endpoint = <&usb1_drd_sw>;
> + };
> + };
> + };
> + };
> + };
> +
> + ptn5110_2: tcpc@51 {
> + compatible = "nxp,ptn5110", "tcpci";
> + reg = <0x51>;
> + interrupt-parent = <&gpio3>;
> + interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
> +
> + typec2_con: connector {
> + compatible = "usb-c-connector";
> + label = "USB-C";
> + power-role = "dual";
> + data-role = "dual";
> + try-power-role = "sink";
> + source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
> + sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
> + PDO_VAR(5000, 20000, 3000)>;
> + op-sink-microwatt = <15000000>;
> + self-powered;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + typec2_dr_sw: endpoint {
> + remote-endpoint = <&usb2_drd_sw>;
> + };
> + };
> + };
> + };
> + };
> +};
> +
> &eqos {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_eqos>;
> @@ -156,6 +231,42 @@ &lpuart5 {
> status = "okay";
> };
>
> +&usbotg1 {
> + dr_mode = "otg";
> + hnp-disable;
> + srp-disable;
> + adp-disable;
> + usb-role-switch;
> + disable-over-current;
> + samsung,picophy-pre-emp-curr-control = <3>;
> + samsung,picophy-dc-vol-level-adjust = <7>;
> + status = "okay";
> +
> + port {
> + usb1_drd_sw: endpoint {
> + remote-endpoint = <&typec1_dr_sw>;
> + };
> + };
> +};
> +
> +&usbotg2 {
> + dr_mode = "otg";
> + hnp-disable;
> + srp-disable;
> + adp-disable;
> + usb-role-switch;
> + disable-over-current;
> + samsung,picophy-pre-emp-curr-control = <3>;
> + samsung,picophy-dc-vol-level-adjust = <7>;
> + status = "okay";
> +
> + port {
> + usb2_drd_sw: endpoint {
> + remote-endpoint = <&typec2_dr_sw>;
> + };
> + };
> +};
> +
> &usdhc1 {
> pinctrl-names = "default", "state_100mhz", "state_200mhz";
> pinctrl-0 = <&pinctrl_usdhc1>;
> @@ -222,6 +333,13 @@ MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x57e
> >;
> };
>
> + pinctrl_lpi2c3: lpi2c3grp {
> + fsl,pins = <
> + MX93_PAD_GPIO_IO28__LPI2C3_SDA 0x40000b9e
> + MX93_PAD_GPIO_IO29__LPI2C3_SCL 0x40000b9e
> + >;
> + };
> +
> pinctrl_uart1: uart1grp {
> fsl,pins = <
> MX93_PAD_UART1_RXD__LPUART1_RX 0x31e
> --
> 2.34.1
>
^ permalink raw reply
* Re: [PATCH v7 2/2] dmaengine: Loongson1: Add Loongson-1 APB DMA driver
From: Huacai Chen @ 2024-04-02 9:04 UTC (permalink / raw)
To: Keguang Zhang
Cc: Vinod Koul, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-mips, dmaengine, devicetree, linux-kernel
In-Reply-To: <CAJhJPsU6agzBR1jOw73SpMoogUMYu0qQT2VaBa+z1DXw2ZPNvw@mail.gmail.com>
On Tue, Apr 2, 2024 at 9:56 AM Keguang Zhang <keguang.zhang@gmail.com> wrote:
>
> On Mon, Apr 1, 2024 at 9:24 PM Huacai Chen <chenhuacai@kernel.org> wrote:
> >
> > On Mon, Apr 1, 2024 at 7:10 PM Keguang Zhang <keguang.zhang@gmail.com> wrote:
> > >
> > > On Mon, Apr 1, 2024 at 5:06 PM Huacai Chen <chenhuacai@kernel.org> wrote:
> > > >
> > > > On Mon, Apr 1, 2024 at 10:45 AM Keguang Zhang <keguang.zhang@gmail.com> wrote:
> > > > >
> > > > > Hi Huacai,
> > > > >
> > > > > On Sat, Mar 30, 2024 at 9:59 PM Huacai Chen <chenhuacai@kernel.org> wrote:
> > > > > >
> > > > > > Hi, Keguang,
> > > > > >
> > > > > > On Fri, Mar 29, 2024 at 7:28 PM Keguang Zhang via B4 Relay
> > > > > > <devnull+keguang.zhang.gmail.com@kernel.org> wrote:
> > > > > > >
> > > > > > > From: Keguang Zhang <keguang.zhang@gmail.com>
> > > > > > >
> > > > > > > This patch adds APB DMA driver for Loongson-1 SoCs.
> > > > > > >
> > > > > > > Signed-off-by: Keguang Zhang <keguang.zhang@gmail.com>
> > > > > > > ---
> > > > > > > Changes in v7:
> > > > > > > - Change the comptible to 'loongson,ls1*-apbdma'
> > > > > > > - Update Kconfig and Makefile accordingly
> > > > > > > - Rename the file to loongson1-apb-dma.c to keep the consistency
> > > > > > >
> > > > > > > Changes in v6:
> > > > > > > - Implement .device_prep_dma_cyclic for Loongson1 audio driver,
> > > > > > > - as well as .device_pause and .device_resume.
> > > > > > > - Set the limitation LS1X_DMA_MAX_DESC and put all descriptors
> > > > > > > - into one page to save memory
> > > > > > > - Move dma_pool_zalloc() into ls1x_dma_alloc_desc()
> > > > > > > - Drop dma_slave_config structure
> > > > > > > - Use .remove_new instead of .remove
> > > > > > > - Use KBUILD_MODNAME for the driver name
> > > > > > > - Improve the debug information
> > > > > > >
> > > > > > > Changes in v5:
> > > > > > > - Add DT support
> > > > > > > - Use DT data instead of platform data
> > > > > > > - Use chan_id of struct dma_chan instead of own id
> > > > > > > - Use of_dma_xlate_by_chan_id() instead of ls1x_dma_filter()
> > > > > > > - Update the author information to my official name
> > > > > > >
> > > > > > > Changes in v4:
> > > > > > > - Use dma_slave_map to find the proper channel.
> > > > > > > - Explicitly call devm_request_irq() and tasklet_kill().
> > > > > > > - Fix namespace issue.
> > > > > > > - Some minor fixes and cleanups.
> > > > > > >
> > > > > > > Changes in v3:
> > > > > > > - Rename ls1x_dma_filter_fn to ls1x_dma_filter.
> > > > > > >
> > > > > > > Changes in v2:
> > > > > > > - Change the config from 'DMA_LOONGSON1' to 'LOONGSON1_DMA',
> > > > > > > - and rearrange it in alphabetical order in Kconfig and Makefile.
> > > > > > > - Fix comment style.
> > > > > > > ---
> > > > > > > drivers/dma/Kconfig | 9 +
> > > > > > > drivers/dma/Makefile | 1 +
> > > > > > > drivers/dma/loongson1-apb-dma.c | 665 ++++++++++++++++++++++++++++++++++++++++
> > > > > > > 3 files changed, 675 insertions(+)
> > > > > > >
> > > > > > > diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
> > > > > > > index 002a5ec80620..f7b06c4cdf3f 100644
> > > > > > > --- a/drivers/dma/Kconfig
> > > > > > > +++ b/drivers/dma/Kconfig
> > > > > > > @@ -369,6 +369,15 @@ config K3_DMA
> > > > > > > Support the DMA engine for Hisilicon K3 platform
> > > > > > > devices.
> > > > > > >
> > > > > > > +config LOONGSON1_APB_DMA
> > > > > > > + tristate "Loongson1 APB DMA support"
> > > > > > > + depends on MACH_LOONGSON32 || COMPILE_TEST
> > > > > > > + select DMA_ENGINE
> > > > > > > + select DMA_VIRTUAL_CHANNELS
> > > > > > > + help
> > > > > > > + This selects support for the APB DMA controller in Loongson1 SoCs,
> > > > > > > + which is required by Loongson1 NAND and audio support.
> > > > > > Why not rename to LS1X_APB_DMA and put it just before LS2X_APB_DMA
> > > > > > (and also the driver file name)?
> > > > > >
> > > > > So far all Kconfig entries of Loongson-1 drivers are named with the
> > > > > keyword "LOONGSON1".
> > > > > The same is true for these file names.
> > > > > Therefore, I need to keep the consistency.
> > > > But I see LS1X_IRQ in drivers/irqchip/Kconfig
> > > >
> > > Indeed, that's an exception, which was submitted by Jiaxun several years ago.
> > > Actually, most drivers of Loongson family use the keyword "LOONGSON"
> > > for Kconfig and "loongson" for filename.
> > > Thus I take this keywork as the naming convention.
> > But I think keeping consistency in a same subsystem is better than
> > keeping consistency in a same SoC (but cross subsystems).
> >
> In my opinion, "LS*X" is too short and may be confused with other SoCs.
> Meanwhile, there are only four drivers that use this keyword.
> config I2C_LS2X
> config LS2K_RESET
> config LS2X_APB_DMA
> config LS1X_IRQ
> Then, my suggestion is to change these "LS*X" to "LOONGSON*" to get a
> clear meaning.
We have made a naming conversion some years before with Jiaxun.
1, Use "Loongson" for CPU in arch code;
2, Use "LS7A" or something like this for bridges and devices.
3, For drivers in SoC, if the driver is specific to Loongson-1, use
LS1X, if it is to Loongson-2, use LS2X, if it is shared by both
Loongson-1 and Loongson-2, use LOONGSON.
Huacai
>
> > Huacai
> >
> > >
> > > > Huacai
> > > >
> > > > >
> > > > >
> > > > > > Huacai
> > > > > >
> > > > > > > +
> > > > > > > config LPC18XX_DMAMUX
> > > > > > > bool "NXP LPC18xx/43xx DMA MUX for PL080"
> > > > > > > depends on ARCH_LPC18XX || COMPILE_TEST
> > > > > > > diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile
> > > > > > > index dfd40d14e408..b26f6677978a 100644
> > > > > > > --- a/drivers/dma/Makefile
> > > > > > > +++ b/drivers/dma/Makefile
> > > > > > > @@ -47,6 +47,7 @@ obj-$(CONFIG_INTEL_IDMA64) += idma64.o
> > > > > > > obj-$(CONFIG_INTEL_IOATDMA) += ioat/
> > > > > > > obj-y += idxd/
> > > > > > > obj-$(CONFIG_K3_DMA) += k3dma.o
> > > > > > > +obj-$(CONFIG_LOONGSON1_APB_DMA) += loongson1-apb-dma.o
> > > > > > > obj-$(CONFIG_LPC18XX_DMAMUX) += lpc18xx-dmamux.o
> > > > > > > obj-$(CONFIG_LS2X_APB_DMA) += ls2x-apb-dma.o
> > > > > > > obj-$(CONFIG_MILBEAUT_HDMAC) += milbeaut-hdmac.o
> > > > > > > diff --git a/drivers/dma/loongson1-apb-dma.c b/drivers/dma/loongson1-apb-dma.c
> > > > > > > new file mode 100644
> > > > > > > index 000000000000..d474a2601e6e
> > > > > > > --- /dev/null
> > > > > > > +++ b/drivers/dma/loongson1-apb-dma.c
> > > > > > > @@ -0,0 +1,665 @@
> > > > > > > +// SPDX-License-Identifier: GPL-2.0-or-later
> > > > > > > +/*
> > > > > > > + * Driver for Loongson-1 APB DMA Controller
> > > > > > > + *
> > > > > > > + * Copyright (C) 2015-2024 Keguang Zhang <keguang.zhang@gmail.com>
> > > > > > > + */
> > > > > > > +
> > > > > > > +#include <linux/dmapool.h>
> > > > > > > +#include <linux/dma-mapping.h>
> > > > > > > +#include <linux/init.h>
> > > > > > > +#include <linux/interrupt.h>
> > > > > > > +#include <linux/iopoll.h>
> > > > > > > +#include <linux/module.h>
> > > > > > > +#include <linux/of.h>
> > > > > > > +#include <linux/of_dma.h>
> > > > > > > +#include <linux/platform_device.h>
> > > > > > > +#include <linux/slab.h>
> > > > > > > +
> > > > > > > +#include "dmaengine.h"
> > > > > > > +#include "virt-dma.h"
> > > > > > > +
> > > > > > > +/* Loongson-1 DMA Control Register */
> > > > > > > +#define DMA_CTRL 0x0
> > > > > > > +
> > > > > > > +/* DMA Control Register Bits */
> > > > > > > +#define DMA_STOP BIT(4)
> > > > > > > +#define DMA_START BIT(3)
> > > > > > > +#define DMA_ASK_VALID BIT(2)
> > > > > > > +
> > > > > > > +#define DMA_ADDR_MASK GENMASK(31, 6)
> > > > > > > +
> > > > > > > +/* DMA Next Field Bits */
> > > > > > > +#define DMA_NEXT_VALID BIT(0)
> > > > > > > +
> > > > > > > +/* DMA Command Field Bits */
> > > > > > > +#define DMA_RAM2DEV BIT(12)
> > > > > > > +#define DMA_INT BIT(1)
> > > > > > > +#define DMA_INT_MASK BIT(0)
> > > > > > > +
> > > > > > > +#define LS1X_DMA_MAX_CHANNELS 3
> > > > > > > +
> > > > > > > +/* Size of allocations for hardware descriptors */
> > > > > > > +#define LS1X_DMA_DESCS_SIZE PAGE_SIZE
> > > > > > > +#define LS1X_DMA_MAX_DESC \
> > > > > > > + (LS1X_DMA_DESCS_SIZE / sizeof(struct ls1x_dma_hwdesc))
> > > > > > > +
> > > > > > > +struct ls1x_dma_hwdesc {
> > > > > > > + u32 next; /* next descriptor address */
> > > > > > > + u32 saddr; /* memory DMA address */
> > > > > > > + u32 daddr; /* device DMA address */
> > > > > > > + u32 length;
> > > > > > > + u32 stride;
> > > > > > > + u32 cycles;
> > > > > > > + u32 cmd;
> > > > > > > + u32 stats;
> > > > > > > +};
> > > > > > > +
> > > > > > > +struct ls1x_dma_desc {
> > > > > > > + struct virt_dma_desc vdesc;
> > > > > > > + enum dma_transfer_direction dir;
> > > > > > > + enum dma_transaction_type type;
> > > > > > > + unsigned int bus_width;
> > > > > > > +
> > > > > > > + unsigned int nr_descs; /* number of descriptors */
> > > > > > > +
> > > > > > > + struct ls1x_dma_hwdesc *hwdesc;
> > > > > > > + dma_addr_t hwdesc_phys;
> > > > > > > +};
> > > > > > > +
> > > > > > > +struct ls1x_dma_chan {
> > > > > > > + struct virt_dma_chan vchan;
> > > > > > > + struct dma_pool *desc_pool;
> > > > > > > + phys_addr_t src_addr;
> > > > > > > + phys_addr_t dst_addr;
> > > > > > > + enum dma_slave_buswidth src_addr_width;
> > > > > > > + enum dma_slave_buswidth dst_addr_width;
> > > > > > > +
> > > > > > > + void __iomem *reg_base;
> > > > > > > + int irq;
> > > > > > > +
> > > > > > > + struct ls1x_dma_desc *desc;
> > > > > > > +
> > > > > > > + struct ls1x_dma_hwdesc *curr_hwdesc;
> > > > > > > + dma_addr_t curr_hwdesc_phys;
> > > > > > > +};
> > > > > > > +
> > > > > > > +struct ls1x_dma {
> > > > > > > + struct dma_device ddev;
> > > > > > > + void __iomem *reg_base;
> > > > > > > +
> > > > > > > + unsigned int nr_chans;
> > > > > > > + struct ls1x_dma_chan chan[];
> > > > > > > +};
> > > > > > > +
> > > > > > > +#define to_ls1x_dma_chan(dchan) \
> > > > > > > + container_of(dchan, struct ls1x_dma_chan, vchan.chan)
> > > > > > > +
> > > > > > > +#define to_ls1x_dma_desc(vd) \
> > > > > > > + container_of(vd, struct ls1x_dma_desc, vdesc)
> > > > > > > +
> > > > > > > +/* macros for registers read/write */
> > > > > > > +#define chan_readl(chan, off) \
> > > > > > > + readl((chan)->reg_base + (off))
> > > > > > > +
> > > > > > > +#define chan_writel(chan, off, val) \
> > > > > > > + writel((val), (chan)->reg_base + (off))
> > > > > > > +
> > > > > > > +static inline struct device *chan2dev(struct dma_chan *chan)
> > > > > > > +{
> > > > > > > + return &chan->dev->device;
> > > > > > > +}
> > > > > > > +
> > > > > > > +static inline int ls1x_dma_query(struct ls1x_dma_chan *chan,
> > > > > > > + dma_addr_t *hwdesc_phys)
> > > > > > > +{
> > > > > > > + struct dma_chan *dchan = &chan->vchan.chan;
> > > > > > > + int val, ret;
> > > > > > > +
> > > > > > > + val = *hwdesc_phys & DMA_ADDR_MASK;
> > > > > > > + val |= DMA_ASK_VALID;
> > > > > > > + val |= dchan->chan_id;
> > > > > > > + chan_writel(chan, DMA_CTRL, val);
> > > > > > > + ret = readl_poll_timeout_atomic(chan->reg_base + DMA_CTRL, val,
> > > > > > > + !(val & DMA_ASK_VALID), 0, 3000);
> > > > > > > + if (ret)
> > > > > > > + dev_err(chan2dev(dchan), "failed to query DMA\n");
> > > > > > > +
> > > > > > > + return ret;
> > > > > > > +}
> > > > > > > +
> > > > > > > +static inline int ls1x_dma_start(struct ls1x_dma_chan *chan,
> > > > > > > + dma_addr_t *hwdesc_phys)
> > > > > > > +{
> > > > > > > + struct dma_chan *dchan = &chan->vchan.chan;
> > > > > > > + int val, ret;
> > > > > > > +
> > > > > > > + dev_dbg(chan2dev(dchan), "cookie=%d, starting hwdesc=%x\n",
> > > > > > > + dchan->cookie, *hwdesc_phys);
> > > > > > > +
> > > > > > > + val = *hwdesc_phys & DMA_ADDR_MASK;
> > > > > > > + val |= DMA_START;
> > > > > > > + val |= dchan->chan_id;
> > > > > > > + chan_writel(chan, DMA_CTRL, val);
> > > > > > > + ret = readl_poll_timeout(chan->reg_base + DMA_CTRL, val,
> > > > > > > + !(val & DMA_START), 0, 3000);
> > > > > > > + if (ret)
> > > > > > > + dev_err(chan2dev(dchan), "failed to start DMA\n");
> > > > > > > +
> > > > > > > + return ret;
> > > > > > > +}
> > > > > > > +
> > > > > > > +static inline void ls1x_dma_stop(struct ls1x_dma_chan *chan)
> > > > > > > +{
> > > > > > > + chan_writel(chan, DMA_CTRL, chan_readl(chan, DMA_CTRL) | DMA_STOP);
> > > > > > > +}
> > > > > > > +
> > > > > > > +static void ls1x_dma_free_chan_resources(struct dma_chan *dchan)
> > > > > > > +{
> > > > > > > + struct ls1x_dma_chan *chan = to_ls1x_dma_chan(dchan);
> > > > > > > +
> > > > > > > + dma_free_coherent(chan2dev(dchan), sizeof(struct ls1x_dma_hwdesc),
> > > > > > > + chan->curr_hwdesc, chan->curr_hwdesc_phys);
> > > > > > > + vchan_free_chan_resources(&chan->vchan);
> > > > > > > + dma_pool_destroy(chan->desc_pool);
> > > > > > > + chan->desc_pool = NULL;
> > > > > > > +}
> > > > > > > +
> > > > > > > +static int ls1x_dma_alloc_chan_resources(struct dma_chan *dchan)
> > > > > > > +{
> > > > > > > + struct ls1x_dma_chan *chan = to_ls1x_dma_chan(dchan);
> > > > > > > +
> > > > > > > + chan->desc_pool = dma_pool_create(dma_chan_name(dchan),
> > > > > > > + chan2dev(dchan),
> > > > > > > + sizeof(struct ls1x_dma_hwdesc),
> > > > > > > + __alignof__(struct ls1x_dma_hwdesc),
> > > > > > > + 0);
> > > > > > > + if (!chan->desc_pool)
> > > > > > > + return -ENOMEM;
> > > > > > > +
> > > > > > > + /* allocate memory for querying current HW descriptor */
> > > > > > > + dma_set_coherent_mask(chan2dev(dchan), DMA_BIT_MASK(32));
> > > > > > > + chan->curr_hwdesc = dma_alloc_coherent(chan2dev(dchan),
> > > > > > > + sizeof(struct ls1x_dma_hwdesc),
> > > > > > > + &chan->curr_hwdesc_phys,
> > > > > > > + GFP_KERNEL);
> > > > > > > + if (!chan->curr_hwdesc)
> > > > > > > + return -ENOMEM;
> > > > > > > +
> > > > > > > + return 0;
> > > > > > > +}
> > > > > > > +
> > > > > > > +static void ls1x_dma_free_desc(struct virt_dma_desc *vdesc)
> > > > > > > +{
> > > > > > > + struct ls1x_dma_desc *desc = to_ls1x_dma_desc(vdesc);
> > > > > > > + struct ls1x_dma_chan *chan = to_ls1x_dma_chan(vdesc->tx.chan);
> > > > > > > +
> > > > > > > + dma_pool_free(chan->desc_pool, desc->hwdesc, desc->hwdesc_phys);
> > > > > > > + chan->desc = NULL;
> > > > > > > + kfree(desc);
> > > > > > > +}
> > > > > > > +
> > > > > > > +static struct ls1x_dma_desc *
> > > > > > > +ls1x_dma_alloc_desc(struct dma_chan *dchan, int sg_len,
> > > > > > > + enum dma_transfer_direction direction,
> > > > > > > + enum dma_transaction_type type)
> > > > > > > +{
> > > > > > > + struct ls1x_dma_chan *chan = to_ls1x_dma_chan(dchan);
> > > > > > > + struct ls1x_dma_desc *desc;
> > > > > > > +
> > > > > > > + if (sg_len > LS1X_DMA_MAX_DESC) {
> > > > > > > + dev_err(chan2dev(dchan), "sg_len %u exceeds limit %lu",
> > > > > > > + sg_len, LS1X_DMA_MAX_DESC);
> > > > > > > + return NULL;
> > > > > > > + }
> > > > > > > +
> > > > > > > + desc = kzalloc(sizeof(*desc), GFP_NOWAIT);
> > > > > > > + if (!desc)
> > > > > > > + return NULL;
> > > > > > > +
> > > > > > > + /* allocate HW descriptors */
> > > > > > > + desc->hwdesc = dma_pool_zalloc(chan->desc_pool, GFP_NOWAIT,
> > > > > > > + &desc->hwdesc_phys);
> > > > > > > + if (!desc->hwdesc) {
> > > > > > > + dev_err(chan2dev(dchan), "failed to alloc HW descriptors\n");
> > > > > > > + ls1x_dma_free_desc(&desc->vdesc);
> > > > > > > + return NULL;
> > > > > > > + }
> > > > > > > +
> > > > > > > + desc->dir = direction;
> > > > > > > + desc->type = type;
> > > > > > > + desc->nr_descs = sg_len;
> > > > > > > +
> > > > > > > + return desc;
> > > > > > > +}
> > > > > > > +
> > > > > > > +static int ls1x_dma_setup_hwdescs(struct dma_chan *dchan,
> > > > > > > + struct ls1x_dma_desc *desc,
> > > > > > > + struct scatterlist *sgl, unsigned int sg_len)
> > > > > > > +{
> > > > > > > + struct ls1x_dma_chan *chan = to_ls1x_dma_chan(dchan);
> > > > > > > + dma_addr_t next_hwdesc_phys = desc->hwdesc_phys;
> > > > > > > +
> > > > > > > + struct scatterlist *sg;
> > > > > > > + unsigned int dev_addr, cmd, i;
> > > > > > > +
> > > > > > > + switch (desc->dir) {
> > > > > > > + case DMA_MEM_TO_DEV:
> > > > > > > + dev_addr = chan->dst_addr;
> > > > > > > + desc->bus_width = chan->dst_addr_width;
> > > > > > > + cmd = DMA_RAM2DEV | DMA_INT;
> > > > > > > + break;
> > > > > > > + case DMA_DEV_TO_MEM:
> > > > > > > + dev_addr = chan->src_addr;
> > > > > > > + desc->bus_width = chan->src_addr_width;
> > > > > > > + cmd = DMA_INT;
> > > > > > > + break;
> > > > > > > + default:
> > > > > > > + dev_err(chan2dev(dchan), "unsupported DMA direction: %s\n",
> > > > > > > + dmaengine_get_direction_text(desc->dir));
> > > > > > > + return -EINVAL;
> > > > > > > + }
> > > > > > > +
> > > > > > > + /* setup HW descriptors */
> > > > > > > + for_each_sg(sgl, sg, sg_len, i) {
> > > > > > > + dma_addr_t buf_addr = sg_dma_address(sg);
> > > > > > > + size_t buf_len = sg_dma_len(sg);
> > > > > > > + struct ls1x_dma_hwdesc *hwdesc = &desc->hwdesc[i];
> > > > > > > +
> > > > > > > + if (!is_dma_copy_aligned(dchan->device, buf_addr, 0, buf_len)) {
> > > > > > > + dev_err(chan2dev(dchan), "buffer is not aligned!\n");
> > > > > > > + return -EINVAL;
> > > > > > > + }
> > > > > > > +
> > > > > > > + hwdesc->saddr = buf_addr;
> > > > > > > + hwdesc->daddr = dev_addr;
> > > > > > > + hwdesc->length = buf_len / desc->bus_width;
> > > > > > > + hwdesc->stride = 0;
> > > > > > > + hwdesc->cycles = 1;
> > > > > > > + hwdesc->cmd = cmd;
> > > > > > > +
> > > > > > > + if (i) {
> > > > > > > + next_hwdesc_phys += sizeof(*hwdesc);
> > > > > > > + desc->hwdesc[i - 1].next = next_hwdesc_phys
> > > > > > > + | DMA_NEXT_VALID;
> > > > > > > + }
> > > > > > > + }
> > > > > > > +
> > > > > > > + if (desc->type == DMA_CYCLIC)
> > > > > > > + desc->hwdesc[i - 1].next = desc->hwdesc_phys | DMA_NEXT_VALID;
> > > > > > > +
> > > > > > > + for_each_sg(sgl, sg, sg_len, i) {
> > > > > > > + struct ls1x_dma_hwdesc *hwdesc = &desc->hwdesc[i];
> > > > > > > +
> > > > > > > + print_hex_dump_debug("HW DESC: ", DUMP_PREFIX_OFFSET, 16, 4,
> > > > > > > + hwdesc, sizeof(*hwdesc), false);
> > > > > > > + }
> > > > > > > +
> > > > > > > + return 0;
> > > > > > > +}
> > > > > > > +
> > > > > > > +static struct dma_async_tx_descriptor *
> > > > > > > +ls1x_dma_prep_slave_sg(struct dma_chan *dchan,
> > > > > > > + struct scatterlist *sgl, unsigned int sg_len,
> > > > > > > + enum dma_transfer_direction direction,
> > > > > > > + unsigned long flags, void *context)
> > > > > > > +{
> > > > > > > + struct ls1x_dma_chan *chan = to_ls1x_dma_chan(dchan);
> > > > > > > + struct ls1x_dma_desc *desc;
> > > > > > > +
> > > > > > > + dev_dbg(chan2dev(dchan), "sg_len=%u flags=0x%lx dir=%s\n",
> > > > > > > + sg_len, flags, dmaengine_get_direction_text(direction));
> > > > > > > +
> > > > > > > + desc = ls1x_dma_alloc_desc(dchan, sg_len, direction, DMA_SLAVE);
> > > > > > > + if (!desc)
> > > > > > > + return NULL;
> > > > > > > +
> > > > > > > + if (ls1x_dma_setup_hwdescs(dchan, desc, sgl, sg_len)) {
> > > > > > > + ls1x_dma_free_desc(&desc->vdesc);
> > > > > > > + return NULL;
> > > > > > > + }
> > > > > > > +
> > > > > > > + return vchan_tx_prep(&chan->vchan, &desc->vdesc, flags);
> > > > > > > +}
> > > > > > > +
> > > > > > > +static struct dma_async_tx_descriptor *
> > > > > > > +ls1x_dma_prep_dma_cyclic(struct dma_chan *dchan,
> > > > > > > + dma_addr_t buf_addr, size_t buf_len, size_t period_len,
> > > > > > > + enum dma_transfer_direction direction,
> > > > > > > + unsigned long flags)
> > > > > > > +{
> > > > > > > + struct ls1x_dma_chan *chan = to_ls1x_dma_chan(dchan);
> > > > > > > + struct ls1x_dma_desc *desc;
> > > > > > > + struct scatterlist *sgl;
> > > > > > > + unsigned int sg_len;
> > > > > > > + unsigned int i;
> > > > > > > +
> > > > > > > + dev_dbg(chan2dev(dchan),
> > > > > > > + "buf_len=%d period_len=%zu flags=0x%lx dir=%s\n", buf_len,
> > > > > > > + period_len, flags, dmaengine_get_direction_text(direction));
> > > > > > > +
> > > > > > > + sg_len = buf_len / period_len;
> > > > > > > + desc = ls1x_dma_alloc_desc(dchan, sg_len, direction, DMA_CYCLIC);
> > > > > > > + if (!desc)
> > > > > > > + return NULL;
> > > > > > > +
> > > > > > > + /* allocate the scatterlist */
> > > > > > > + sgl = kmalloc_array(sg_len, sizeof(*sgl), GFP_NOWAIT);
> > > > > > > + if (!sgl)
> > > > > > > + return NULL;
> > > > > > > +
> > > > > > > + sg_init_table(sgl, sg_len);
> > > > > > > + for (i = 0; i < sg_len; ++i) {
> > > > > > > + sg_set_page(&sgl[i], pfn_to_page(PFN_DOWN(buf_addr)),
> > > > > > > + period_len, offset_in_page(buf_addr));
> > > > > > > + sg_dma_address(&sgl[i]) = buf_addr;
> > > > > > > + sg_dma_len(&sgl[i]) = period_len;
> > > > > > > + buf_addr += period_len;
> > > > > > > + }
> > > > > > > +
> > > > > > > + if (ls1x_dma_setup_hwdescs(dchan, desc, sgl, sg_len)) {
> > > > > > > + ls1x_dma_free_desc(&desc->vdesc);
> > > > > > > + return NULL;
> > > > > > > + }
> > > > > > > +
> > > > > > > + kfree(sgl);
> > > > > > > +
> > > > > > > + return vchan_tx_prep(&chan->vchan, &desc->vdesc, flags);
> > > > > > > +}
> > > > > > > +
> > > > > > > +static int ls1x_dma_slave_config(struct dma_chan *dchan,
> > > > > > > + struct dma_slave_config *config)
> > > > > > > +{
> > > > > > > + struct ls1x_dma_chan *chan = to_ls1x_dma_chan(dchan);
> > > > > > > +
> > > > > > > + chan->src_addr = config->src_addr;
> > > > > > > + chan->src_addr_width = config->src_addr_width;
> > > > > > > + chan->dst_addr = config->dst_addr;
> > > > > > > + chan->dst_addr_width = config->dst_addr_width;
> > > > > > > +
> > > > > > > + return 0;
> > > > > > > +}
> > > > > > > +
> > > > > > > +static int ls1x_dma_pause(struct dma_chan *dchan)
> > > > > > > +{
> > > > > > > + struct ls1x_dma_chan *chan = to_ls1x_dma_chan(dchan);
> > > > > > > + unsigned long flags;
> > > > > > > + int ret;
> > > > > > > +
> > > > > > > + spin_lock_irqsave(&chan->vchan.lock, flags);
> > > > > > > + ret = ls1x_dma_query(chan, &chan->curr_hwdesc_phys);
> > > > > > > + if (!ret)
> > > > > > > + ls1x_dma_stop(chan);
> > > > > > > + spin_unlock_irqrestore(&chan->vchan.lock, flags);
> > > > > > > +
> > > > > > > + return ret;
> > > > > > > +}
> > > > > > > +
> > > > > > > +static int ls1x_dma_resume(struct dma_chan *dchan)
> > > > > > > +{
> > > > > > > + struct ls1x_dma_chan *chan = to_ls1x_dma_chan(dchan);
> > > > > > > + unsigned long flags;
> > > > > > > + int ret;
> > > > > > > +
> > > > > > > + spin_lock_irqsave(&chan->vchan.lock, flags);
> > > > > > > + ret = ls1x_dma_start(chan, &chan->curr_hwdesc_phys);
> > > > > > > + spin_unlock_irqrestore(&chan->vchan.lock, flags);
> > > > > > > +
> > > > > > > + return ret;
> > > > > > > +}
> > > > > > > +
> > > > > > > +static int ls1x_dma_terminate_all(struct dma_chan *dchan)
> > > > > > > +{
> > > > > > > + struct ls1x_dma_chan *chan = to_ls1x_dma_chan(dchan);
> > > > > > > + unsigned long flags;
> > > > > > > + LIST_HEAD(head);
> > > > > > > +
> > > > > > > + spin_lock_irqsave(&chan->vchan.lock, flags);
> > > > > > > + ls1x_dma_stop(chan);
> > > > > > > + vchan_get_all_descriptors(&chan->vchan, &head);
> > > > > > > + spin_unlock_irqrestore(&chan->vchan.lock, flags);
> > > > > > > +
> > > > > > > + vchan_dma_desc_free_list(&chan->vchan, &head);
> > > > > > > +
> > > > > > > + return 0;
> > > > > > > +}
> > > > > > > +
> > > > > > > +static enum dma_status ls1x_dma_tx_status(struct dma_chan *dchan,
> > > > > > > + dma_cookie_t cookie,
> > > > > > > + struct dma_tx_state *state)
> > > > > > > +{
> > > > > > > + struct ls1x_dma_chan *chan = to_ls1x_dma_chan(dchan);
> > > > > > > + struct virt_dma_desc *vdesc;
> > > > > > > + enum dma_status status;
> > > > > > > + size_t bytes = 0;
> > > > > > > + unsigned long flags;
> > > > > > > +
> > > > > > > + status = dma_cookie_status(dchan, cookie, state);
> > > > > > > + if (status == DMA_COMPLETE)
> > > > > > > + return status;
> > > > > > > +
> > > > > > > + spin_lock_irqsave(&chan->vchan.lock, flags);
> > > > > > > + vdesc = vchan_find_desc(&chan->vchan, cookie);
> > > > > > > + if (chan->desc && cookie == chan->desc->vdesc.tx.cookie) {
> > > > > > > + struct ls1x_dma_desc *desc = chan->desc;
> > > > > > > + int i;
> > > > > > > +
> > > > > > > + if (ls1x_dma_query(chan, &chan->curr_hwdesc_phys))
> > > > > > > + return status;
> > > > > > > +
> > > > > > > + /* locate the current HW descriptor */
> > > > > > > + for (i = 0; i < desc->nr_descs; i++)
> > > > > > > + if (desc->hwdesc[i].next == chan->curr_hwdesc->next)
> > > > > > > + break;
> > > > > > > +
> > > > > > > + /* count the residues */
> > > > > > > + for (; i < desc->nr_descs; i++)
> > > > > > > + bytes += desc->hwdesc[i].length * desc->bus_width;
> > > > > > > +
> > > > > > > + dma_set_residue(state, bytes);
> > > > > > > + }
> > > > > > > + spin_unlock_irqrestore(&chan->vchan.lock, flags);
> > > > > > > +
> > > > > > > + return status;
> > > > > > > +}
> > > > > > > +
> > > > > > > +static void ls1x_dma_issue_pending(struct dma_chan *dchan)
> > > > > > > +{
> > > > > > > + struct ls1x_dma_chan *chan = to_ls1x_dma_chan(dchan);
> > > > > > > + struct virt_dma_desc *vdesc;
> > > > > > > + unsigned long flags;
> > > > > > > +
> > > > > > > + spin_lock_irqsave(&chan->vchan.lock, flags);
> > > > > > > + if (vchan_issue_pending(&chan->vchan) && !chan->desc) {
> > > > > > > + vdesc = vchan_next_desc(&chan->vchan);
> > > > > > > + if (!vdesc) {
> > > > > > > + chan->desc = NULL;
> > > > > > > + return;
> > > > > > > + }
> > > > > > > + chan->desc = to_ls1x_dma_desc(vdesc);
> > > > > > > + ls1x_dma_start(chan, &chan->desc->hwdesc_phys);
> > > > > > > + }
> > > > > > > + spin_unlock_irqrestore(&chan->vchan.lock, flags);
> > > > > > > +}
> > > > > > > +
> > > > > > > +static irqreturn_t ls1x_dma_irq_handler(int irq, void *data)
> > > > > > > +{
> > > > > > > + struct ls1x_dma_chan *chan = data;
> > > > > > > + struct ls1x_dma_desc *desc = chan->desc;
> > > > > > > + struct dma_chan *dchan = &chan->vchan.chan;
> > > > > > > +
> > > > > > > + if (!desc) {
> > > > > > > + dev_warn(chan2dev(dchan),
> > > > > > > + "IRQ %d with no active descriptor on channel %d\n",
> > > > > > > + irq, dchan->chan_id);
> > > > > > > + return IRQ_NONE;
> > > > > > > + }
> > > > > > > +
> > > > > > > + dev_dbg(chan2dev(dchan), "DMA IRQ %d on channel %d\n", irq,
> > > > > > > + dchan->chan_id);
> > > > > > > +
> > > > > > > + spin_lock(&chan->vchan.lock);
> > > > > > > +
> > > > > > > + if (desc->type == DMA_CYCLIC) {
> > > > > > > + vchan_cyclic_callback(&desc->vdesc);
> > > > > > > + } else {
> > > > > > > + list_del(&desc->vdesc.node);
> > > > > > > + vchan_cookie_complete(&desc->vdesc);
> > > > > > > + chan->desc = NULL;
> > > > > > > + }
> > > > > > > +
> > > > > > > + spin_unlock(&chan->vchan.lock);
> > > > > > > + return IRQ_HANDLED;
> > > > > > > +}
> > > > > > > +
> > > > > > > +static int ls1x_dma_chan_probe(struct platform_device *pdev,
> > > > > > > + struct ls1x_dma *dma, int chan_id)
> > > > > > > +{
> > > > > > > + struct device *dev = &pdev->dev;
> > > > > > > + struct ls1x_dma_chan *chan = &dma->chan[chan_id];
> > > > > > > + char pdev_irqname[4];
> > > > > > > + char *irqname;
> > > > > > > + int ret;
> > > > > > > +
> > > > > > > + sprintf(pdev_irqname, "ch%u", chan_id);
> > > > > > > + chan->irq = platform_get_irq_byname(pdev, pdev_irqname);
> > > > > > > + if (chan->irq < 0)
> > > > > > > + return -ENODEV;
> > > > > > > +
> > > > > > > + irqname = devm_kasprintf(dev, GFP_KERNEL, "%s:%s",
> > > > > > > + dev_name(dev), pdev_irqname);
> > > > > > > + if (!irqname)
> > > > > > > + return -ENOMEM;
> > > > > > > +
> > > > > > > + ret = devm_request_irq(dev, chan->irq, ls1x_dma_irq_handler,
> > > > > > > + IRQF_SHARED, irqname, chan);
> > > > > > > + if (ret)
> > > > > > > + return dev_err_probe(dev, ret,
> > > > > > > + "failed to request IRQ %u!\n", chan->irq);
> > > > > > > +
> > > > > > > + chan->reg_base = dma->reg_base;
> > > > > > > + chan->vchan.desc_free = ls1x_dma_free_desc;
> > > > > > > + vchan_init(&chan->vchan, &dma->ddev);
> > > > > > > + dev_info(dev, "%s (irq %d) initialized\n", pdev_irqname, chan->irq);
> > > > > > > +
> > > > > > > + return 0;
> > > > > > > +}
> > > > > > > +
> > > > > > > +static void ls1x_dma_chan_remove(struct ls1x_dma *dma, int chan_id)
> > > > > > > +{
> > > > > > > + struct device *dev = dma->ddev.dev;
> > > > > > > + struct ls1x_dma_chan *chan = &dma->chan[chan_id];
> > > > > > > +
> > > > > > > + devm_free_irq(dev, chan->irq, chan);
> > > > > > > + list_del(&chan->vchan.chan.device_node);
> > > > > > > + tasklet_kill(&chan->vchan.task);
> > > > > > > +}
> > > > > > > +
> > > > > > > +static int ls1x_dma_probe(struct platform_device *pdev)
> > > > > > > +{
> > > > > > > + struct device *dev = &pdev->dev;
> > > > > > > + struct dma_device *ddev;
> > > > > > > + struct ls1x_dma *dma;
> > > > > > > + int nr_chans, ret, i;
> > > > > > > +
> > > > > > > + nr_chans = platform_irq_count(pdev);
> > > > > > > + if (nr_chans <= 0)
> > > > > > > + return nr_chans;
> > > > > > > + if (nr_chans > LS1X_DMA_MAX_CHANNELS)
> > > > > > > + return dev_err_probe(dev, -EINVAL,
> > > > > > > + "nr_chans=%d exceeds the maximum\n",
> > > > > > > + nr_chans);
> > > > > > > +
> > > > > > > + dma = devm_kzalloc(dev, struct_size(dma, chan, nr_chans), GFP_KERNEL);
> > > > > > > + if (!dma)
> > > > > > > + return -ENOMEM;
> > > > > > > +
> > > > > > > + /* initialize DMA device */
> > > > > > > + dma->reg_base = devm_platform_ioremap_resource(pdev, 0);
> > > > > > > + if (IS_ERR(dma->reg_base))
> > > > > > > + return PTR_ERR(dma->reg_base);
> > > > > > > +
> > > > > > > + ddev = &dma->ddev;
> > > > > > > + ddev->dev = dev;
> > > > > > > + ddev->copy_align = DMAENGINE_ALIGN_4_BYTES;
> > > > > > > + ddev->src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |
> > > > > > > + BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
> > > > > > > + ddev->dst_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |
> > > > > > > + BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
> > > > > > > + ddev->directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);
> > > > > > > + ddev->max_sg_burst = LS1X_DMA_MAX_DESC;
> > > > > > > + ddev->residue_granularity = DMA_RESIDUE_GRANULARITY_SEGMENT;
> > > > > > > + ddev->device_alloc_chan_resources = ls1x_dma_alloc_chan_resources;
> > > > > > > + ddev->device_free_chan_resources = ls1x_dma_free_chan_resources;
> > > > > > > + ddev->device_prep_slave_sg = ls1x_dma_prep_slave_sg;
> > > > > > > + ddev->device_prep_dma_cyclic = ls1x_dma_prep_dma_cyclic;
> > > > > > > + ddev->device_config = ls1x_dma_slave_config;
> > > > > > > + ddev->device_pause = ls1x_dma_pause;
> > > > > > > + ddev->device_resume = ls1x_dma_resume;
> > > > > > > + ddev->device_terminate_all = ls1x_dma_terminate_all;
> > > > > > > + ddev->device_tx_status = ls1x_dma_tx_status;
> > > > > > > + ddev->device_issue_pending = ls1x_dma_issue_pending;
> > > > > > > +
> > > > > > > + dma_cap_set(DMA_SLAVE, ddev->cap_mask);
> > > > > > > + INIT_LIST_HEAD(&ddev->channels);
> > > > > > > +
> > > > > > > + /* initialize DMA channels */
> > > > > > > + for (i = 0; i < nr_chans; i++) {
> > > > > > > + ret = ls1x_dma_chan_probe(pdev, dma, i);
> > > > > > > + if (ret)
> > > > > > > + return ret;
> > > > > > > + }
> > > > > > > + dma->nr_chans = nr_chans;
> > > > > > > +
> > > > > > > + ret = dmaenginem_async_device_register(ddev);
> > > > > > > + if (ret) {
> > > > > > > + dev_err(dev, "failed to register DMA device! %d\n", ret);
> > > > > > > + return ret;
> > > > > > > + }
> > > > > > > +
> > > > > > > + ret =
> > > > > > > + of_dma_controller_register(dev->of_node, of_dma_xlate_by_chan_id,
> > > > > > > + ddev);
> > > > > > > + if (ret) {
> > > > > > > + dev_err(dev, "failed to register DMA controller! %d\n", ret);
> > > > > > > + return ret;
> > > > > > > + }
> > > > > > > +
> > > > > > > + platform_set_drvdata(pdev, dma);
> > > > > > > + dev_info(dev, "Loongson1 DMA driver registered\n");
> > > > > > > +
> > > > > > > + return 0;
> > > > > > > +}
> > > > > > > +
> > > > > > > +static void ls1x_dma_remove(struct platform_device *pdev)
> > > > > > > +{
> > > > > > > + struct ls1x_dma *dma = platform_get_drvdata(pdev);
> > > > > > > + int i;
> > > > > > > +
> > > > > > > + of_dma_controller_free(pdev->dev.of_node);
> > > > > > > +
> > > > > > > + for (i = 0; i < dma->nr_chans; i++)
> > > > > > > + ls1x_dma_chan_remove(dma, i);
> > > > > > > +}
> > > > > > > +
> > > > > > > +static const struct of_device_id ls1x_dma_match[] = {
> > > > > > > + { .compatible = "loongson,ls1b-apbdma" },
> > > > > > > + { .compatible = "loongson,ls1c-apbdma" },
> > > > > > > + { /* sentinel */ }
> > > > > > > +};
> > > > > > > +MODULE_DEVICE_TABLE(of, ls1x_dma_match);
> > > > > > > +
> > > > > > > +static struct platform_driver ls1x_dma_driver = {
> > > > > > > + .probe = ls1x_dma_probe,
> > > > > > > + .remove_new = ls1x_dma_remove,
> > > > > > > + .driver = {
> > > > > > > + .name = KBUILD_MODNAME,
> > > > > > > + .of_match_table = ls1x_dma_match,
> > > > > > > + },
> > > > > > > +};
> > > > > > > +
> > > > > > > +module_platform_driver(ls1x_dma_driver);
> > > > > > > +
> > > > > > > +MODULE_AUTHOR("Keguang Zhang <keguang.zhang@gmail.com>");
> > > > > > > +MODULE_DESCRIPTION("Loongson-1 APB DMA Controller driver");
> > > > > > > +MODULE_LICENSE("GPL");
> > > > > > >
> > > > > > > --
> > > > > > > 2.40.1
> > > > > > >
> > > > > > >
> > > > >
> > > > >
> > > > >
> > > > > --
> > > > > Best regards,
> > > > >
> > > > > Keguang Zhang
> > > > >
> > >
> > >
> > >
> > > --
> > > Best regards,
> > >
> > > Keguang Zhang
>
>
>
> --
> Best regards,
>
> Keguang Zhang
^ permalink raw reply
* Re: [PATCH v1 2/6] clk: meson: a1: pll: support 'syspll' general-purpose PLL for CPU clock
From: Jerome Brunet @ 2024-04-02 9:00 UTC (permalink / raw)
To: Dmitry Rokosov
Cc: neil.armstrong, jbrunet, mturquette, sboyd, robh+dt,
krzysztof.kozlowski+dt, khilman, martin.blumenstingl, kernel,
rockosov, linux-amlogic, linux-clk, devicetree, linux-kernel,
linux-arm-kernel
In-Reply-To: <20240329205904.25002-3-ddrokosov@salutedevices.com>
On Fri 29 Mar 2024 at 23:58, Dmitry Rokosov <ddrokosov@salutedevices.com> wrote:
> The 'syspll' PLL, also known as the system PLL, is a general and
> essential PLL responsible for generating the CPU clock frequency.
> With its wide-ranging capabilities, it is designed to accommodate
> frequencies within the range of 768MHz to 1536MHz.
>
> Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com>
> ---
> drivers/clk/meson/a1-pll.c | 78 ++++++++++++++++++++++++++++++++++++++
> drivers/clk/meson/a1-pll.h | 6 +++
> 2 files changed, 84 insertions(+)
>
> diff --git a/drivers/clk/meson/a1-pll.c b/drivers/clk/meson/a1-pll.c
> index 60b2e53e7e51..02fd2d325cc6 100644
> --- a/drivers/clk/meson/a1-pll.c
> +++ b/drivers/clk/meson/a1-pll.c
> @@ -138,6 +138,81 @@ static struct clk_regmap hifi_pll = {
> },
> };
>
> +static const struct pll_mult_range sys_pll_mult_range = {
> + .min = 32,
> + .max = 64,
> +};
> +
> +/*
> + * We assume that the sys_pll_clk has already been set up by the low-level
> + * bootloaders as the main CPU PLL source. Therefore, it is not necessary to
> + * run the initialization sequence.
> + */
I see no reason to make such assumption.
This clock is no read-only, it apparently is able to re-lock so assuming
anything from the bootloader is just asking from trouble
> +static struct clk_regmap sys_pll = {
> + .data = &(struct meson_clk_pll_data){
> + .en = {
> + .reg_off = ANACTRL_SYSPLL_CTRL0,
> + .shift = 28,
> + .width = 1,
> + },
> + .m = {
> + .reg_off = ANACTRL_SYSPLL_CTRL0,
> + .shift = 0,
> + .width = 8,
> + },
> + .n = {
> + .reg_off = ANACTRL_SYSPLL_CTRL0,
> + .shift = 10,
> + .width = 5,
> + },
> + .frac = {
> + .reg_off = ANACTRL_SYSPLL_CTRL1,
> + .shift = 0,
> + .width = 19,
> + },
> + .l = {
> + .reg_off = ANACTRL_SYSPLL_STS,
> + .shift = 31,
> + .width = 1,
> + },
> + .current_en = {
> + .reg_off = ANACTRL_SYSPLL_CTRL0,
> + .shift = 26,
> + .width = 1,
> + },
> + .l_detect = {
> + .reg_off = ANACTRL_SYSPLL_CTRL2,
> + .shift = 6,
> + .width = 1,
> + },
> + .range = &sys_pll_mult_range,
> + },
> + .hw.init = &(struct clk_init_data){
> + .name = "sys_pll",
> + .ops = &meson_clk_pll_ops,
> + .parent_names = (const char *[]){ "syspll_in" },
> + .num_parents = 1,
> + /*
> + * This clock is used as the main CPU PLL source in low-level
> + * bootloaders, and it is necessary to mark it as critical.
> + */
> + .flags = CLK_IS_CRITICAL,
No I don't think so. Downstream consumer maybe critical but that one is
not, unless it is read-only.
A CPU pll, like on the g12 family, is unlikely to be read-only since the
PLL will need to relock to change rates. During this phase, there will
be no reate coming from the PLL so the PLL is not critical and you must
be able to "park" your CPU an another clock while poking this one
> + },
> +};
> +
> +static struct clk_fixed_factor sys_pll_div16 = {
> + .mult = 1,
> + .div = 16,
> + .hw.init = &(struct clk_init_data){
> + .name = "sys_pll_div16",
> + .ops = &clk_fixed_factor_ops,
> + .parent_hws = (const struct clk_hw *[]) {
> + &sys_pll.hw
> + },
> + .num_parents = 1,
> + },
> +};
> +
> static struct clk_fixed_factor fclk_div2_div = {
> .mult = 1,
> .div = 2,
> @@ -283,6 +358,8 @@ static struct clk_hw *a1_pll_hw_clks[] = {
> [CLKID_FCLK_DIV5] = &fclk_div5.hw,
> [CLKID_FCLK_DIV7] = &fclk_div7.hw,
> [CLKID_HIFI_PLL] = &hifi_pll.hw,
> + [CLKID_SYS_PLL] = &sys_pll.hw,
> + [CLKID_SYS_PLL_DIV16] = &sys_pll_div16.hw,
> };
>
> static struct clk_regmap *const a1_pll_regmaps[] = {
> @@ -293,6 +370,7 @@ static struct clk_regmap *const a1_pll_regmaps[] = {
> &fclk_div5,
> &fclk_div7,
> &hifi_pll,
> + &sys_pll,
> };
>
> static struct regmap_config a1_pll_regmap_cfg = {
> diff --git a/drivers/clk/meson/a1-pll.h b/drivers/clk/meson/a1-pll.h
> index 4be17b2bf383..666d9b2137e9 100644
> --- a/drivers/clk/meson/a1-pll.h
> +++ b/drivers/clk/meson/a1-pll.h
> @@ -18,6 +18,12 @@
> #define ANACTRL_FIXPLL_CTRL0 0x0
> #define ANACTRL_FIXPLL_CTRL1 0x4
> #define ANACTRL_FIXPLL_STS 0x14
> +#define ANACTRL_SYSPLL_CTRL0 0x80
> +#define ANACTRL_SYSPLL_CTRL1 0x84
> +#define ANACTRL_SYSPLL_CTRL2 0x88
> +#define ANACTRL_SYSPLL_CTRL3 0x8c
> +#define ANACTRL_SYSPLL_CTRL4 0x90
> +#define ANACTRL_SYSPLL_STS 0x94
> #define ANACTRL_HIFIPLL_CTRL0 0xc0
> #define ANACTRL_HIFIPLL_CTRL1 0xc4
> #define ANACTRL_HIFIPLL_CTRL2 0xc8
--
Jerome
^ permalink raw reply
* [PATCH v2 2/2] arm64: dts: qcom: qcs6490-rb3gen2: Enable various remoteprocs
From: Komal Bajaj @ 2024-04-02 9:03 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, quic_tsoni, Komal Bajaj
In-Reply-To: <20240402090349.30172-1-quic_kbajaj@quicinc.com>
Enable the ADSP, CDSP and WPSS that are found on qcs6490-rb3gen2.
Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
---
arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
index 97824c769ba3..a25431ddf922 100644
--- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
+++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
@@ -434,6 +434,21 @@ &qupv3_id_0 {
status = "okay";
};
+&remoteproc_adsp {
+ firmware-name = "qcom/qcm6490/adsp.mbn";
+ status = "okay";
+};
+
+&remoteproc_cdsp {
+ firmware-name = "qcom/qcm6490/cdsp.mbn";
+ status = "okay";
+};
+
+&remoteproc_wpss {
+ firmware-name = "qcom/qcm6490/wpss.mbn";
+ status = "okay";
+};
+
&tlmm {
gpio-reserved-ranges = <32 2>, /* ADSP */
<48 4>; /* NFC */
--
2.42.0
^ permalink raw reply related
* [PATCH v2 1/2] arm64: dts: qcom: qcm6490-idp: Enable various remoteprocs
From: Komal Bajaj @ 2024-04-02 9:03 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, quic_tsoni, Komal Bajaj
In-Reply-To: <20240402090349.30172-1-quic_kbajaj@quicinc.com>
Enable the ADSP, CDSP, MPSS and WPSS that are found on the SoC.
Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
---
arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts
index e4bfad50a669..3014056a3607 100644
--- a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts
+++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts
@@ -452,6 +452,26 @@ &qupv3_id_0 {
status = "okay";
};
+&remoteproc_adsp {
+ firmware-name = "qcom/qcm6490/adsp.mbn";
+ status = "okay";
+};
+
+&remoteproc_cdsp {
+ firmware-name = "qcom/qcm6490/cdsp.mbn";
+ status = "okay";
+};
+
+&remoteproc_mpss {
+ firmware-name = "qcom/qcm6490/modem.mbn";
+ status = "okay";
+};
+
+&remoteproc_wpss {
+ firmware-name = "qcom/qcm6490/wpss.mbn";
+ status = "okay";
+};
+
&sdhc_1 {
non-removable;
no-sd;
--
2.42.0
^ permalink raw reply related
* [PATCH v2 0/2] Enable various remoteprocs for qcm6490-idp and qcs6490-rb3gen2
From: Komal Bajaj @ 2024-04-02 9:03 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, quic_tsoni, Komal Bajaj
Enable various applicable remoteproc nodes for qcm6490-idp
and qcs6490-rb3gen2.
Firmwares are not shared at linux-firmware.git, it is under legal approval process.
Meantime, submitting the DT node changes for FW for review.
--------
Changes in v2:
* Updating the firmware name from mdt to mbn
* Link to v1: https://lore.kernel.org/all/20231220114225.26567-1-quic_kbajaj@quicinc.com/
Komal Bajaj (2):
arm64: dts: qcom: qcm6490-idp: Enable various remoteprocs
arm64: dts: qcom: qcs6490-rb3gen2: Enable various remoteprocs
arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 20 ++++++++++++++++++++
arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 15 +++++++++++++++
2 files changed, 35 insertions(+)
--
2.42.0
^ permalink raw reply
* RE: [PATCH v6 3/5] crypto: tegra: Add Tegra Security Engine driver
From: Akhil R @ 2024-04-02 9:00 UTC (permalink / raw)
To: Herbert Xu
Cc: davem@davemloft.net, robh@kernel.org,
krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
thierry.reding@gmail.com, Jon Hunter, catalin.marinas@arm.com,
will@kernel.org, Mikko Perttunen, airlied@gmail.com,
daniel@ffwll.ch, linux-crypto@vger.kernel.org,
devicetree@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
dri-devel@lists.freedesktop.org
In-Reply-To: <ZgVBAFmfK7GKgmYi@gondor.apana.org.au>
> >
> > + .alg.skcipher.op.do_one_request = tegra_aes_do_one_req,
> > + .alg.skcipher.base = {
> > + .init = tegra_aes_cra_init,
> > + .exit = tegra_aes_cra_exit,
> > + .setkey = tegra_aes_setkey,
> > + .encrypt = tegra_aes_encrypt,
> > + .decrypt = tegra_aes_decrypt,
> > + .min_keysize = AES_MIN_KEY_SIZE,
> > + .max_keysize = AES_MAX_KEY_SIZE,
> > + .ivsize = AES_BLOCK_SIZE,
> > + .base = {
> > + .cra_name = "ofb(aes)",
> > + .cra_driver_name = "ofb-aes-tegra",
> > + .cra_priority = 500,
> > + .cra_flags = CRYPTO_ALG_TYPE_SKCIPHER |
> CRYPTO_ALG_ASYNC,
> > + .cra_blocksize = AES_BLOCK_SIZE,
> > + .cra_ctxsize = sizeof(struct tegra_aes_ctx),
> > + .cra_alignmask = 0xf,
> > + .cra_module = THIS_MODULE,
> > + },
> > + }
> > + }, {
>
> OFB no longer exists in the kernel. Please remove all traces of it from your driver.
Okay. Will remove and post a new version.
>
> Also please ensure that yuor driver passes the extra fuzz tests.
Yes. It does pass the extra fuzz tests.
Regards,
Akhil
^ permalink raw reply
* Re: [PATCH v2 0/3] dt-bindings: arm: bcm: raspberrypi,bcm2835-firmware: Drive-by fixes
From: Ivan T. Ivanov @ 2024-04-02 8:58 UTC (permalink / raw)
To: Laurent Pinchart
Cc: Stefan Wahren, Peter Robinson, Dave Stevenson, Naushir Patuck,
Bartosz Golaszewski, Broadcom internal kernel review list,
Conor Dooley, Florian Fainelli, Krzysztof Kozlowski,
Linus Walleij, Nicolas Saenz Julienne, Ray Jui, Rob Herring,
Scott Branden, linux-arm-kernel, devicetree, linux-rpi-kernel,
u-boot
In-Reply-To: <20240327233700.GA21080@pendragon.ideasonboard.com>
Hi,
On 2024-03-28 01:37, Laurent Pinchart wrote:
> On Wed, Mar 27, 2024 at 07:49:38AM +0100, Stefan Wahren wrote:
>> Hi,
>>
>> [add Peter and Ivan]
>>
>> Am 26.03.24 um 20:58 schrieb Laurent Pinchart:
>> > Hello,
>> >
>> > This small series includes a few drive-by fixes for DT validation
>> > errors.
>> >
>> > The first patch has been posted previously in v1 ([1], and now addresses
>> > a small review comment. I think it's good to go.
>> >
>> > The next two patches address the same issue as "[PATCH 1/2] dt-bindings:
>> > arm: bcm: raspberrypi,bcm2835-firmware: Add missing properties" ([2]),
>> > but this time with a (hopefully) correct approach. Patch 2/3 starts by
>> > fixing the raspberrypi-bcm2835-firmware driver, removing the need for DT
>> > properties that are specified in bcm2835-rpi.dtsi but not documented in
>> > the corresponding bindings. Patch 3/3 can then drop those properties,
>> > getting rid of the warnings.
>>
>> since this series drops properties from the device tree, does anyone
>> have the chance to test it with a recent U-Boot?
>
> I don't have U-Boot running with my RPi, so I would appreciate if
> someone could help :-)
Sorry for taking me so long to verify this.
I think on RPi U-Boot side we are fine. API used when accessing Mbox
device do not follow DM model and do not use DMA, but just access
device directly using this nice macros phys_to_bus/bus_to_phys.
I build new DTB files with this patch included and U-Boot build
from the latest sources. No obvious issues on RPi3 and RPi4.
Devices boot fine.
Regards,
Ivan
^ permalink raw reply
* Re: [PATCH v2 1/8] dt-bindings: clock: add Loongson-2K expand clock index
From: Huacai Chen @ 2024-04-02 8:58 UTC (permalink / raw)
To: Binbin Zhou
Cc: Binbin Zhou, Huacai Chen, Michael Turquette, Stephen Boyd,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Yinbo Zhu,
loongson-kernel, linux-clk, devicetree, Xuerui Wang, loongarch,
Conor Dooley
In-Reply-To: <6c4eb239cbde62e7e1a8c647c945e128a0b78b2b.1711504700.git.zhoubinbin@loongson.cn>
Hi, Binbin,
On Mon, Apr 1, 2024 at 4:24 PM Binbin Zhou <zhoubinbin@loongson.cn> wrote:
>
> In the new Loongson-2K family of SoCs, more clock indexes are needed,
> such as clock gates.
> The patch adds these clock indexes
>
> Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> include/dt-bindings/clock/loongson,ls2k-clk.h | 56 ++++++++++++-------
> 1 file changed, 37 insertions(+), 19 deletions(-)
>
> diff --git a/include/dt-bindings/clock/loongson,ls2k-clk.h b/include/dt-bindings/clock/loongson,ls2k-clk.h
> index 3bc4dfc193c2..4e6811eca8c6 100644
> --- a/include/dt-bindings/clock/loongson,ls2k-clk.h
> +++ b/include/dt-bindings/clock/loongson,ls2k-clk.h
> @@ -7,24 +7,42 @@
> #ifndef __DT_BINDINGS_CLOCK_LOONGSON2_H
> #define __DT_BINDINGS_CLOCK_LOONGSON2_H
>
> -#define LOONGSON2_REF_100M 0
> -#define LOONGSON2_NODE_PLL 1
> -#define LOONGSON2_DDR_PLL 2
> -#define LOONGSON2_DC_PLL 3
> -#define LOONGSON2_PIX0_PLL 4
> -#define LOONGSON2_PIX1_PLL 5
> -#define LOONGSON2_NODE_CLK 6
> -#define LOONGSON2_HDA_CLK 7
> -#define LOONGSON2_GPU_CLK 8
> -#define LOONGSON2_DDR_CLK 9
> -#define LOONGSON2_GMAC_CLK 10
> -#define LOONGSON2_DC_CLK 11
> -#define LOONGSON2_APB_CLK 12
> -#define LOONGSON2_USB_CLK 13
> -#define LOONGSON2_SATA_CLK 14
> -#define LOONGSON2_PIX0_CLK 15
> -#define LOONGSON2_PIX1_CLK 16
> -#define LOONGSON2_BOOT_CLK 17
> -#define LOONGSON2_CLK_END 18
> +#define LOONGSON2_REF_100M 0
> +#define LOONGSON2_NODE_PLL 1
> +#define LOONGSON2_DDR_PLL 2
> +#define LOONGSON2_DC_PLL 3
> +#define LOONGSON2_PIX0_PLL 4
> +#define LOONGSON2_PIX1_PLL 5
> +#define LOONGSON2_NODE_CLK 6
> +#define LOONGSON2_HDA_CLK 7
> +#define LOONGSON2_GPU_CLK 8
> +#define LOONGSON2_DDR_CLK 9
> +#define LOONGSON2_GMAC_CLK 10
> +#define LOONGSON2_DC_CLK 11
> +#define LOONGSON2_APB_CLK 12
> +#define LOONGSON2_USB_CLK 13
> +#define LOONGSON2_SATA_CLK 14
> +#define LOONGSON2_PIX0_CLK 15
> +#define LOONGSON2_PIX1_CLK 16
> +#define LOONGSON2_BOOT_CLK 17
> +
> +/* Loongson-2K2000 */
This line should be removed, because the below definition is not
specific to Loongson-2K2000.
Huacai
> +#define LOONGSON2_OUT0_GATE 18
> +#define LOONGSON2_GMAC_GATE 19
> +#define LOONGSON2_RIO_GATE 20
> +#define LOONGSON2_DC_GATE 21
> +#define LOONGSON2_GPU_GATE 22
> +#define LOONGSON2_DDR_GATE 23
> +#define LOONGSON2_HDA_GATE 24
> +#define LOONGSON2_NODE_GATE 25
> +#define LOONGSON2_EMMC_GATE 26
> +#define LOONGSON2_PIX0_GATE 27
> +#define LOONGSON2_PIX1_GATE 28
> +#define LOONGSON2_OUT0_CLK 29
> +#define LOONGSON2_RIO_CLK 30
> +#define LOONGSON2_EMMC_CLK 31
> +#define LOONGSON2_DES_CLK 32
> +#define LOONGSON2_I2S_CLK 33
> +#define LOONGSON2_MISC_CLK 34
>
> #endif
> --
> 2.43.0
>
^ permalink raw reply
* Re: [PATCH v7 6/6] spmi: pmic-arb: Add multi bus support
From: Neil Armstrong @ 2024-04-02 8:55 UTC (permalink / raw)
To: Abel Vesa
Cc: Stephen Boyd, Matthias Brugger, Bjorn Andersson, Konrad Dybcio,
Dmitry Baryshkov, AngeloGioacchino Del Regno, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Srini Kandagatla, Johan Hovold,
linux-kernel, linux-arm-kernel, linux-arm-msm, linux-mediatek,
devicetree
In-Reply-To: <ZgvG08kfV2PvzLeb@linaro.org>
On 02/04/2024 10:50, Abel Vesa wrote:
> On 24-04-02 10:25:52, Neil Armstrong wrote:
>> Hi Abel,
>>
>> On 29/03/2024 19:54, Abel Vesa wrote:
>>> Starting with HW version 7, there are actually two separate buses
>>> (with two separate sets of wires). So add support for the second bus.
>>> The first platform that needs this support for the second bus is the
>>> Qualcomm X1 Elite, so add the compatible for it as well.
>>>
>>> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
>>> ---
>>> drivers/spmi/spmi-pmic-arb.c | 138 +++++++++++++++++++++++++++++++++++++------
>>> 1 file changed, 120 insertions(+), 18 deletions(-)
>>>
>>> diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c
>>> index 19ff8665f3d9..56f2b3190d82 100644
>>> --- a/drivers/spmi/spmi-pmic-arb.c
>>> +++ b/drivers/spmi/spmi-pmic-arb.c
>>> @@ -13,6 +13,7 @@
>>> #include <linux/kernel.h>
>>> #include <linux/module.h>
>>> #include <linux/of.h>
>>> +#include <linux/of_address.h>
>>> #include <linux/of_irq.h>
>>> #include <linux/platform_device.h>
>>> #include <linux/slab.h>
>>> @@ -95,6 +96,8 @@ enum pmic_arb_channel {
>>> PMIC_ARB_CHANNEL_OBS,
>>> };
>>> +#define PMIC_ARB_MAX_BUSES 2
>>> +
>>> /* Maximum number of support PMIC peripherals */
>>> #define PMIC_ARB_MAX_PERIPHS 512
>>> #define PMIC_ARB_MAX_PERIPHS_V7 1024
>>> @@ -148,6 +151,7 @@ struct spmi_pmic_arb;
>>> * @min_apid: minimum APID (used for bounding IRQ search)
>>> * @max_apid: maximum APID
>>> * @irq: PMIC ARB interrupt.
>>> + * @id: unique ID of the bus
>>> */
>>> struct spmi_pmic_arb_bus {
>>> struct spmi_pmic_arb *pmic_arb;
>>> @@ -165,6 +169,7 @@ struct spmi_pmic_arb_bus {
>>> u16 min_apid;
>>> u16 max_apid;
>>> int irq;
>>> + u8 id;
>>> };
>>> /**
>>> @@ -179,7 +184,8 @@ struct spmi_pmic_arb_bus {
>>> * @ee: the current Execution Environment
>>> * @ver_ops: version dependent operations.
>>> * @max_periphs: Number of elements in apid_data[]
>>> - * @bus: per arbiter bus instance
>>> + * @buses: per arbiter buses instances
>>> + * @buses_available: number of buses registered
>>> */
>>> struct spmi_pmic_arb {
>>> void __iomem *rd_base;
>>> @@ -191,7 +197,8 @@ struct spmi_pmic_arb {
>>> u8 ee;
>>> const struct pmic_arb_ver_ops *ver_ops;
>>> int max_periphs;
>>> - struct spmi_pmic_arb_bus *bus;
>>> + struct spmi_pmic_arb_bus *buses[PMIC_ARB_MAX_BUSES];
>>> + int buses_available;
>>> };
>>> /**
>>> @@ -219,7 +226,7 @@ struct spmi_pmic_arb {
>>> struct pmic_arb_ver_ops {
>>> const char *ver_str;
>>> int (*get_core_resources)(struct platform_device *pdev, void __iomem *core);
>>> - int (*init_apid)(struct spmi_pmic_arb_bus *bus);
>>> + int (*init_apid)(struct spmi_pmic_arb_bus *bus, int index);
>>> int (*ppid_to_apid)(struct spmi_pmic_arb_bus *bus, u16 ppid);
>>> /* spmi commands (read_cmd, write_cmd, cmd) functionality */
>>> int (*offset)(struct spmi_pmic_arb_bus *bus, u8 sid, u16 addr,
>>> @@ -308,8 +315,8 @@ static int pmic_arb_wait_for_done(struct spmi_controller *ctrl,
>>> }
>>> if (status & PMIC_ARB_STATUS_FAILURE) {
>>> - dev_err(&ctrl->dev, "%s: %#x %#x: transaction failed (%#x)\n",
>>> - __func__, sid, addr, status);
>>> + dev_err(&ctrl->dev, "%s: %#x %#x: transaction failed (%#x) reg: 0x%x\n",
>>> + __func__, sid, addr, status, offset);
>>> WARN_ON(1);
>>> return -EIO;
>>> }
>>> @@ -325,8 +332,8 @@ static int pmic_arb_wait_for_done(struct spmi_controller *ctrl,
>>> udelay(1);
>>> }
>>> - dev_err(&ctrl->dev, "%s: %#x %#x: timeout, status %#x\n",
>>> - __func__, sid, addr, status);
>>> + dev_err(&ctrl->dev, "%s: %#x %#x %#x: timeout, status %#x\n",
>>> + __func__, bus->id, sid, addr, status);
>>> return -ETIMEDOUT;
>>> }
>>> @@ -1005,11 +1012,17 @@ static int pmic_arb_get_core_resources_v1(struct platform_device *pdev,
>>> return 0;
>>> }
>>> -static int pmic_arb_init_apid_v1(struct spmi_pmic_arb_bus *bus)
>>> +static int pmic_arb_init_apid_v1(struct spmi_pmic_arb_bus *bus, int index)
>>> {
>>> struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
>>> u32 *mapping_table;
>>> + if (index) {
>>> + dev_err(&bus->spmic->dev, "Unsupported buses count %d detected\n",
>>> + index);
>>> + return -EINVAL;
>>> + }
>>
>> Shouldn't be here
>>
>
> You're right. Since the DT bindings for HW < v7 doesn't allow multi bus
> support, this check is not needed. Will drop.
>
>>> +
>>> mapping_table = devm_kcalloc(&bus->spmic->dev, pmic_arb->max_periphs,
>>> sizeof(*mapping_table), GFP_KERNEL);
>>> if (!mapping_table)
>>> @@ -1252,11 +1265,17 @@ static int pmic_arb_offset_v2(struct spmi_pmic_arb_bus *bus, u8 sid, u16 addr,
>>> return 0x1000 * pmic_arb->ee + 0x8000 * apid;
>>> }
>>> -static int pmic_arb_init_apid_v5(struct spmi_pmic_arb_bus *bus)
>>> +static int pmic_arb_init_apid_v5(struct spmi_pmic_arb_bus *bus, int index)
>>> {
>>> struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
>>> int ret;
>>> + if (index) {
>>> + dev_err(&bus->spmic->dev, "Unsupported buses count %d detected\n",
>>> + index);
>>> + return -EINVAL;
>>> + }
>>
>> Shouldn't be here
>>
>
> Ditto.
>
>>> +
>>> bus->base_apid = 0;
>>> bus->apid_count = readl_relaxed(pmic_arb->core + PMIC_ARB_FEATURES) &
>>> PMIC_ARB_FEATURES_PERIPH_MASK;
>>> @@ -1328,6 +1347,50 @@ static int pmic_arb_get_core_resources_v7(struct platform_device *pdev,
>>> return pmic_arb_get_obsrvr_chnls_v2(pdev);
>>> }
>>> +/*
>>> + * Only v7 supports 2 buses. Each bus will get a different apid count, read
>>> + * from different registers.
>>> + */
>>> +static int pmic_arb_init_apid_v7(struct spmi_pmic_arb_bus *bus, int index)
>>> +{
>>> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
>>> + int ret;
>>> +
>>> + if (index == 0) {
>>> + bus->base_apid = 0;
>>> + bus->apid_count = readl_relaxed(pmic_arb->core + PMIC_ARB_FEATURES) &
>>> + PMIC_ARB_FEATURES_PERIPH_MASK;
>>> + } else if (index == 1) {
>>> + bus->base_apid = readl_relaxed(pmic_arb->core + PMIC_ARB_FEATURES) &
>>> + PMIC_ARB_FEATURES_PERIPH_MASK;
>>> + bus->apid_count = readl_relaxed(pmic_arb->core + PMIC_ARB_FEATURES1) &
>>> + PMIC_ARB_FEATURES_PERIPH_MASK;
>>> + } else {
>>> + dev_err(&bus->spmic->dev, "Unsupported buses count %d detected\n",
>>> + bus->id);
>>> + return -EINVAL;
>>> + }
>>> +
>>> + if (bus->base_apid + bus->apid_count > pmic_arb->max_periphs) {
>>> + dev_err(&bus->spmic->dev, "Unsupported APID count %d detected\n",
>>> + bus->base_apid + bus->apid_count);
>>> + return -EINVAL;
>>> + }
>>> +
>>> + ret = pmic_arb_init_apid_min_max(bus);
>>> + if (ret)
>>> + return ret;
>>> +
>>> + ret = pmic_arb_read_apid_map_v5(bus);
>>> + if (ret) {
>>> + dev_err(&bus->spmic->dev, "could not read APID->PPID mapping table, rc= %d\n",
>>> + ret);
>>> + return ret;
>>> + }
>>> +
>>> + return 0;
>>> +}
>>
>> Shouldn't be here
>>
>
> Since the apid base and count are different between buses and since v7
> supports 2 buses, we need a v7 specific init_apid. So this one is
> needed.
I know, all those were wrongly removed in patch 5, just let them in place.
Neil
>
>>> +
>>> /*
>>> * v7 offset per ee and per apid for observer channels and per apid for
>>> * read/write channels.
>>> @@ -1580,7 +1643,7 @@ static const struct pmic_arb_ver_ops pmic_arb_v5 = {
>>> static const struct pmic_arb_ver_ops pmic_arb_v7 = {
>>> .ver_str = "v7",
>>> .get_core_resources = pmic_arb_get_core_resources_v7,
>>> - .init_apid = pmic_arb_init_apid_v5,
>>> + .init_apid = pmic_arb_init_apid_v7,
>>
>> Shouldn't be here
>>
>
> See above.
>
>>> .ppid_to_apid = pmic_arb_ppid_to_apid_v5,
>>> .non_data_cmd = pmic_arb_non_data_cmd_v2,
>>> .offset = pmic_arb_offset_v7,
>>> @@ -1604,6 +1667,7 @@ static int spmi_pmic_arb_bus_init(struct platform_device *pdev,
>>> struct device_node *node,
>>> struct spmi_pmic_arb *pmic_arb)
>>> {
>>> + int bus_index = pmic_arb->buses_available;
>>> struct spmi_pmic_arb_bus *bus;
>>> struct device *dev = &pdev->dev;
>>> struct spmi_controller *ctrl;
>>> @@ -1622,7 +1686,7 @@ static int spmi_pmic_arb_bus_init(struct platform_device *pdev,
>>> bus = spmi_controller_get_drvdata(ctrl);
>>> - pmic_arb->bus = bus;
>>> + pmic_arb->buses[bus_index] = bus;
>>> bus->ppid_to_apid = devm_kcalloc(dev, PMIC_ARB_MAX_PPID,
>>> sizeof(*bus->ppid_to_apid),
>>> @@ -1665,12 +1729,13 @@ static int spmi_pmic_arb_bus_init(struct platform_device *pdev,
>>> bus->cnfg = cnfg;
>>> bus->irq = irq;
>>> bus->spmic = ctrl;
>>> + bus->id = bus_index;
>>> - ret = pmic_arb->ver_ops->init_apid(bus);
>>> + ret = pmic_arb->ver_ops->init_apid(bus, bus_index);
>>> if (ret)
>>> return ret;
>>> - dev_dbg(&pdev->dev, "adding irq domain\n");
>>> + dev_dbg(&pdev->dev, "adding irq domain for bus %d\n", bus_index);
>>> bus->domain = irq_domain_add_tree(dev->of_node,
>>> &pmic_arb_irq_domain_ops, bus);
>>> @@ -1683,14 +1748,53 @@ static int spmi_pmic_arb_bus_init(struct platform_device *pdev,
>>> pmic_arb_chained_irq, bus);
>>> ctrl->dev.of_node = node;
>>> + dev_set_name(&ctrl->dev, "spmi-%d", bus_index);
>>> ret = devm_spmi_controller_add(dev, ctrl);
>>> if (ret)
>>> return ret;
>>> + pmic_arb->buses_available++;
>>> +
>>> return 0;
>>> }
>>> +static int spmi_pmic_arb_register_buses(struct spmi_pmic_arb *pmic_arb,
>>> + struct platform_device *pdev)
>>> +{
>>> + struct device *dev = &pdev->dev;
>>> + struct device_node *node = dev->of_node;
>>> + struct device_node *child;
>>> + int ret;
>>> +
>>> + /* legacy mode doesn't provide child node for the bus */
>>> + if (of_device_is_compatible(node, "qcom,spmi-pmic-arb"))
>>> + return spmi_pmic_arb_bus_init(pdev, node, pmic_arb);
>>> +
>>> + for_each_available_child_of_node(node, child) {
>>> + if (of_node_name_eq(child, "spmi")) {
>>> + ret = spmi_pmic_arb_bus_init(pdev, child, pmic_arb);
>>> + if (ret)
>>> + return ret;
>>> + }
>>> + }
>>> +
>>> + return ret;
>>> +}
>>> +
>>> +static void spmi_pmic_arb_deregister_buses(struct spmi_pmic_arb *pmic_arb)
>>> +{
>>> + int i;
>>> +
>>> + for (i = 0; i < PMIC_ARB_MAX_BUSES; i++) {
>>> + struct spmi_pmic_arb_bus *bus = pmic_arb->buses[i];
>>> +
>>> + irq_set_chained_handler_and_data(bus->irq,
>>> + NULL, NULL);
>>> + irq_domain_remove(bus->domain);
>>> + }
>>> +}
>>> +
>>> static int spmi_pmic_arb_probe(struct platform_device *pdev)
>>> {
>>> struct spmi_pmic_arb *pmic_arb;
>>> @@ -1761,21 +1865,19 @@ static int spmi_pmic_arb_probe(struct platform_device *pdev)
>>> pmic_arb->ee = ee;
>>> - return spmi_pmic_arb_bus_init(pdev, dev->of_node, pmic_arb);
>>> + return spmi_pmic_arb_register_buses(pmic_arb, pdev);
>>> }
>>> static void spmi_pmic_arb_remove(struct platform_device *pdev)
>>> {
>>> struct spmi_pmic_arb *pmic_arb = platform_get_drvdata(pdev);
>>> - struct spmi_pmic_arb_bus *bus = pmic_arb->bus;
>>> - irq_set_chained_handler_and_data(bus->irq,
>>> - NULL, NULL);
>>> - irq_domain_remove(bus->domain);
>>> + spmi_pmic_arb_deregister_buses(pmic_arb);
>>> }
>>> static const struct of_device_id spmi_pmic_arb_match_table[] = {
>>> { .compatible = "qcom,spmi-pmic-arb", },
>>> + { .compatible = "qcom,x1e80100-spmi-pmic-arb", },
>>> {},
>>> };
>>> MODULE_DEVICE_TABLE(of, spmi_pmic_arb_match_table);
>>>
>>
>> With issues fixed, it looks fine.
>>
>> Thanks,
>> Neil
^ permalink raw reply
* Re: [PATCH v7 6/6] spmi: pmic-arb: Add multi bus support
From: Abel Vesa @ 2024-04-02 8:50 UTC (permalink / raw)
To: Neil Armstrong
Cc: Stephen Boyd, Matthias Brugger, Bjorn Andersson, Konrad Dybcio,
Dmitry Baryshkov, AngeloGioacchino Del Regno, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Srini Kandagatla, Johan Hovold,
linux-kernel, linux-arm-kernel, linux-arm-msm, linux-mediatek,
devicetree
In-Reply-To: <871bc3f2-d4c3-4c83-ad0c-04c65ed15598@linaro.org>
On 24-04-02 10:25:52, Neil Armstrong wrote:
> Hi Abel,
>
> On 29/03/2024 19:54, Abel Vesa wrote:
> > Starting with HW version 7, there are actually two separate buses
> > (with two separate sets of wires). So add support for the second bus.
> > The first platform that needs this support for the second bus is the
> > Qualcomm X1 Elite, so add the compatible for it as well.
> >
> > Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> > ---
> > drivers/spmi/spmi-pmic-arb.c | 138 +++++++++++++++++++++++++++++++++++++------
> > 1 file changed, 120 insertions(+), 18 deletions(-)
> >
> > diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c
> > index 19ff8665f3d9..56f2b3190d82 100644
> > --- a/drivers/spmi/spmi-pmic-arb.c
> > +++ b/drivers/spmi/spmi-pmic-arb.c
> > @@ -13,6 +13,7 @@
> > #include <linux/kernel.h>
> > #include <linux/module.h>
> > #include <linux/of.h>
> > +#include <linux/of_address.h>
> > #include <linux/of_irq.h>
> > #include <linux/platform_device.h>
> > #include <linux/slab.h>
> > @@ -95,6 +96,8 @@ enum pmic_arb_channel {
> > PMIC_ARB_CHANNEL_OBS,
> > };
> > +#define PMIC_ARB_MAX_BUSES 2
> > +
> > /* Maximum number of support PMIC peripherals */
> > #define PMIC_ARB_MAX_PERIPHS 512
> > #define PMIC_ARB_MAX_PERIPHS_V7 1024
> > @@ -148,6 +151,7 @@ struct spmi_pmic_arb;
> > * @min_apid: minimum APID (used for bounding IRQ search)
> > * @max_apid: maximum APID
> > * @irq: PMIC ARB interrupt.
> > + * @id: unique ID of the bus
> > */
> > struct spmi_pmic_arb_bus {
> > struct spmi_pmic_arb *pmic_arb;
> > @@ -165,6 +169,7 @@ struct spmi_pmic_arb_bus {
> > u16 min_apid;
> > u16 max_apid;
> > int irq;
> > + u8 id;
> > };
> > /**
> > @@ -179,7 +184,8 @@ struct spmi_pmic_arb_bus {
> > * @ee: the current Execution Environment
> > * @ver_ops: version dependent operations.
> > * @max_periphs: Number of elements in apid_data[]
> > - * @bus: per arbiter bus instance
> > + * @buses: per arbiter buses instances
> > + * @buses_available: number of buses registered
> > */
> > struct spmi_pmic_arb {
> > void __iomem *rd_base;
> > @@ -191,7 +197,8 @@ struct spmi_pmic_arb {
> > u8 ee;
> > const struct pmic_arb_ver_ops *ver_ops;
> > int max_periphs;
> > - struct spmi_pmic_arb_bus *bus;
> > + struct spmi_pmic_arb_bus *buses[PMIC_ARB_MAX_BUSES];
> > + int buses_available;
> > };
> > /**
> > @@ -219,7 +226,7 @@ struct spmi_pmic_arb {
> > struct pmic_arb_ver_ops {
> > const char *ver_str;
> > int (*get_core_resources)(struct platform_device *pdev, void __iomem *core);
> > - int (*init_apid)(struct spmi_pmic_arb_bus *bus);
> > + int (*init_apid)(struct spmi_pmic_arb_bus *bus, int index);
> > int (*ppid_to_apid)(struct spmi_pmic_arb_bus *bus, u16 ppid);
> > /* spmi commands (read_cmd, write_cmd, cmd) functionality */
> > int (*offset)(struct spmi_pmic_arb_bus *bus, u8 sid, u16 addr,
> > @@ -308,8 +315,8 @@ static int pmic_arb_wait_for_done(struct spmi_controller *ctrl,
> > }
> > if (status & PMIC_ARB_STATUS_FAILURE) {
> > - dev_err(&ctrl->dev, "%s: %#x %#x: transaction failed (%#x)\n",
> > - __func__, sid, addr, status);
> > + dev_err(&ctrl->dev, "%s: %#x %#x: transaction failed (%#x) reg: 0x%x\n",
> > + __func__, sid, addr, status, offset);
> > WARN_ON(1);
> > return -EIO;
> > }
> > @@ -325,8 +332,8 @@ static int pmic_arb_wait_for_done(struct spmi_controller *ctrl,
> > udelay(1);
> > }
> > - dev_err(&ctrl->dev, "%s: %#x %#x: timeout, status %#x\n",
> > - __func__, sid, addr, status);
> > + dev_err(&ctrl->dev, "%s: %#x %#x %#x: timeout, status %#x\n",
> > + __func__, bus->id, sid, addr, status);
> > return -ETIMEDOUT;
> > }
> > @@ -1005,11 +1012,17 @@ static int pmic_arb_get_core_resources_v1(struct platform_device *pdev,
> > return 0;
> > }
> > -static int pmic_arb_init_apid_v1(struct spmi_pmic_arb_bus *bus)
> > +static int pmic_arb_init_apid_v1(struct spmi_pmic_arb_bus *bus, int index)
> > {
> > struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> > u32 *mapping_table;
> > + if (index) {
> > + dev_err(&bus->spmic->dev, "Unsupported buses count %d detected\n",
> > + index);
> > + return -EINVAL;
> > + }
>
> Shouldn't be here
>
You're right. Since the DT bindings for HW < v7 doesn't allow multi bus
support, this check is not needed. Will drop.
> > +
> > mapping_table = devm_kcalloc(&bus->spmic->dev, pmic_arb->max_periphs,
> > sizeof(*mapping_table), GFP_KERNEL);
> > if (!mapping_table)
> > @@ -1252,11 +1265,17 @@ static int pmic_arb_offset_v2(struct spmi_pmic_arb_bus *bus, u8 sid, u16 addr,
> > return 0x1000 * pmic_arb->ee + 0x8000 * apid;
> > }
> > -static int pmic_arb_init_apid_v5(struct spmi_pmic_arb_bus *bus)
> > +static int pmic_arb_init_apid_v5(struct spmi_pmic_arb_bus *bus, int index)
> > {
> > struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> > int ret;
> > + if (index) {
> > + dev_err(&bus->spmic->dev, "Unsupported buses count %d detected\n",
> > + index);
> > + return -EINVAL;
> > + }
>
> Shouldn't be here
>
Ditto.
> > +
> > bus->base_apid = 0;
> > bus->apid_count = readl_relaxed(pmic_arb->core + PMIC_ARB_FEATURES) &
> > PMIC_ARB_FEATURES_PERIPH_MASK;
> > @@ -1328,6 +1347,50 @@ static int pmic_arb_get_core_resources_v7(struct platform_device *pdev,
> > return pmic_arb_get_obsrvr_chnls_v2(pdev);
> > }
> > +/*
> > + * Only v7 supports 2 buses. Each bus will get a different apid count, read
> > + * from different registers.
> > + */
> > +static int pmic_arb_init_apid_v7(struct spmi_pmic_arb_bus *bus, int index)
> > +{
> > + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> > + int ret;
> > +
> > + if (index == 0) {
> > + bus->base_apid = 0;
> > + bus->apid_count = readl_relaxed(pmic_arb->core + PMIC_ARB_FEATURES) &
> > + PMIC_ARB_FEATURES_PERIPH_MASK;
> > + } else if (index == 1) {
> > + bus->base_apid = readl_relaxed(pmic_arb->core + PMIC_ARB_FEATURES) &
> > + PMIC_ARB_FEATURES_PERIPH_MASK;
> > + bus->apid_count = readl_relaxed(pmic_arb->core + PMIC_ARB_FEATURES1) &
> > + PMIC_ARB_FEATURES_PERIPH_MASK;
> > + } else {
> > + dev_err(&bus->spmic->dev, "Unsupported buses count %d detected\n",
> > + bus->id);
> > + return -EINVAL;
> > + }
> > +
> > + if (bus->base_apid + bus->apid_count > pmic_arb->max_periphs) {
> > + dev_err(&bus->spmic->dev, "Unsupported APID count %d detected\n",
> > + bus->base_apid + bus->apid_count);
> > + return -EINVAL;
> > + }
> > +
> > + ret = pmic_arb_init_apid_min_max(bus);
> > + if (ret)
> > + return ret;
> > +
> > + ret = pmic_arb_read_apid_map_v5(bus);
> > + if (ret) {
> > + dev_err(&bus->spmic->dev, "could not read APID->PPID mapping table, rc= %d\n",
> > + ret);
> > + return ret;
> > + }
> > +
> > + return 0;
> > +}
>
> Shouldn't be here
>
Since the apid base and count are different between buses and since v7
supports 2 buses, we need a v7 specific init_apid. So this one is
needed.
> > +
> > /*
> > * v7 offset per ee and per apid for observer channels and per apid for
> > * read/write channels.
> > @@ -1580,7 +1643,7 @@ static const struct pmic_arb_ver_ops pmic_arb_v5 = {
> > static const struct pmic_arb_ver_ops pmic_arb_v7 = {
> > .ver_str = "v7",
> > .get_core_resources = pmic_arb_get_core_resources_v7,
> > - .init_apid = pmic_arb_init_apid_v5,
> > + .init_apid = pmic_arb_init_apid_v7,
>
> Shouldn't be here
>
See above.
> > .ppid_to_apid = pmic_arb_ppid_to_apid_v5,
> > .non_data_cmd = pmic_arb_non_data_cmd_v2,
> > .offset = pmic_arb_offset_v7,
> > @@ -1604,6 +1667,7 @@ static int spmi_pmic_arb_bus_init(struct platform_device *pdev,
> > struct device_node *node,
> > struct spmi_pmic_arb *pmic_arb)
> > {
> > + int bus_index = pmic_arb->buses_available;
> > struct spmi_pmic_arb_bus *bus;
> > struct device *dev = &pdev->dev;
> > struct spmi_controller *ctrl;
> > @@ -1622,7 +1686,7 @@ static int spmi_pmic_arb_bus_init(struct platform_device *pdev,
> > bus = spmi_controller_get_drvdata(ctrl);
> > - pmic_arb->bus = bus;
> > + pmic_arb->buses[bus_index] = bus;
> > bus->ppid_to_apid = devm_kcalloc(dev, PMIC_ARB_MAX_PPID,
> > sizeof(*bus->ppid_to_apid),
> > @@ -1665,12 +1729,13 @@ static int spmi_pmic_arb_bus_init(struct platform_device *pdev,
> > bus->cnfg = cnfg;
> > bus->irq = irq;
> > bus->spmic = ctrl;
> > + bus->id = bus_index;
> > - ret = pmic_arb->ver_ops->init_apid(bus);
> > + ret = pmic_arb->ver_ops->init_apid(bus, bus_index);
> > if (ret)
> > return ret;
> > - dev_dbg(&pdev->dev, "adding irq domain\n");
> > + dev_dbg(&pdev->dev, "adding irq domain for bus %d\n", bus_index);
> > bus->domain = irq_domain_add_tree(dev->of_node,
> > &pmic_arb_irq_domain_ops, bus);
> > @@ -1683,14 +1748,53 @@ static int spmi_pmic_arb_bus_init(struct platform_device *pdev,
> > pmic_arb_chained_irq, bus);
> > ctrl->dev.of_node = node;
> > + dev_set_name(&ctrl->dev, "spmi-%d", bus_index);
> > ret = devm_spmi_controller_add(dev, ctrl);
> > if (ret)
> > return ret;
> > + pmic_arb->buses_available++;
> > +
> > return 0;
> > }
> > +static int spmi_pmic_arb_register_buses(struct spmi_pmic_arb *pmic_arb,
> > + struct platform_device *pdev)
> > +{
> > + struct device *dev = &pdev->dev;
> > + struct device_node *node = dev->of_node;
> > + struct device_node *child;
> > + int ret;
> > +
> > + /* legacy mode doesn't provide child node for the bus */
> > + if (of_device_is_compatible(node, "qcom,spmi-pmic-arb"))
> > + return spmi_pmic_arb_bus_init(pdev, node, pmic_arb);
> > +
> > + for_each_available_child_of_node(node, child) {
> > + if (of_node_name_eq(child, "spmi")) {
> > + ret = spmi_pmic_arb_bus_init(pdev, child, pmic_arb);
> > + if (ret)
> > + return ret;
> > + }
> > + }
> > +
> > + return ret;
> > +}
> > +
> > +static void spmi_pmic_arb_deregister_buses(struct spmi_pmic_arb *pmic_arb)
> > +{
> > + int i;
> > +
> > + for (i = 0; i < PMIC_ARB_MAX_BUSES; i++) {
> > + struct spmi_pmic_arb_bus *bus = pmic_arb->buses[i];
> > +
> > + irq_set_chained_handler_and_data(bus->irq,
> > + NULL, NULL);
> > + irq_domain_remove(bus->domain);
> > + }
> > +}
> > +
> > static int spmi_pmic_arb_probe(struct platform_device *pdev)
> > {
> > struct spmi_pmic_arb *pmic_arb;
> > @@ -1761,21 +1865,19 @@ static int spmi_pmic_arb_probe(struct platform_device *pdev)
> > pmic_arb->ee = ee;
> > - return spmi_pmic_arb_bus_init(pdev, dev->of_node, pmic_arb);
> > + return spmi_pmic_arb_register_buses(pmic_arb, pdev);
> > }
> > static void spmi_pmic_arb_remove(struct platform_device *pdev)
> > {
> > struct spmi_pmic_arb *pmic_arb = platform_get_drvdata(pdev);
> > - struct spmi_pmic_arb_bus *bus = pmic_arb->bus;
> > - irq_set_chained_handler_and_data(bus->irq,
> > - NULL, NULL);
> > - irq_domain_remove(bus->domain);
> > + spmi_pmic_arb_deregister_buses(pmic_arb);
> > }
> > static const struct of_device_id spmi_pmic_arb_match_table[] = {
> > { .compatible = "qcom,spmi-pmic-arb", },
> > + { .compatible = "qcom,x1e80100-spmi-pmic-arb", },
> > {},
> > };
> > MODULE_DEVICE_TABLE(of, spmi_pmic_arb_match_table);
> >
>
> With issues fixed, it looks fine.
>
> Thanks,
> Neil
^ permalink raw reply
* Re: [PATCH v10 08/11] arm64: dts: imx93: add usb nodes
From: Shawn Guo @ 2024-04-02 8:39 UTC (permalink / raw)
To: Xu Yang
Cc: gregkh, robh+dt, krzysztof.kozlowski+dt, shawnguo, conor+dt,
s.hauer, kernel, festevam, linux-imx, peter.chen, jun.li,
linux-usb, devicetree, linux-arm-kernel, imx, linux-kernel
In-Reply-To: <20240321081439.541799-8-xu.yang_2@nxp.com>
On Thu, Mar 21, 2024 at 04:14:36PM +0800, Xu Yang wrote:
> There are 2 USB controllers on i.MX93. Add them.
>
> Acked-by: Alexander Stein <alexander.stein@ew.tq-group.com>
> Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com> # TQMa9352LA/CA
> Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
>
> ---
> Changes in v2:
> - fix format as suggested by Alexander
> - change compatible from fsl,imx8mm-usb to fsl,imx93-usb
> Changes in v3:
> - replace deprecated fsl,usbphy with phys as suggested by Alexander
> - reorder nodes
> Changes in v4:
> - fix the alignment
> Changes in v5:
> - rename usb_wakeup_clk to usb_wakeup
> Changes in v6:
> - rename usb_ctrl_root_clk to usb_ctrl_root
> Changes in v7:
> - no changes
> Changes in v8:
> - no changes
> Changes in v9:
> - no changes
> Changes in v10:
> - no changes
> ---
> arch/arm64/boot/dts/freescale/imx93.dtsi | 58 ++++++++++++++++++++++++
> 1 file changed, 58 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi
> index 8f2e7c42ad6e..4a7efccb4f67 100644
> --- a/arch/arm64/boot/dts/freescale/imx93.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
> @@ -183,6 +183,20 @@ mqs2: mqs2 {
> status = "disabled";
> };
>
> + usbphynop1: usbphynop1 {
> + compatible = "usb-nop-xceiv";
> + #phy-cells = <0>;
> + clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>;
> + clock-names = "main_clk";
> + };
> +
> + usbphynop2: usbphynop2 {
> + compatible = "usb-nop-xceiv";
> + #phy-cells = <0>;
> + clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>;
> + clock-names = "main_clk";
> + };
> +
> soc@0 {
> compatible = "simple-bus";
> #address-cells = <1>;
> @@ -1167,6 +1181,50 @@ media_blk_ctrl: system-controller@4ac10000 {
> status = "disabled";
> };
>
> + usbotg1: usb@4c100000 {
> + compatible = "fsl,imx93-usb", "fsl,imx7d-usb", "fsl,imx27-usb";
> + reg = <0x4c100000 0x200>;
> + interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>,
> + <&clk IMX93_CLK_HSIO_32K_GATE>;
> + clock-names = "usb_ctrl_root", "usb_wakeup";
> + assigned-clocks = <&clk IMX93_CLK_HSIO>;
> + assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
> + assigned-clock-rates = <133000000>;
> + phys = <&usbphynop1>;
> + fsl,usbmisc = <&usbmisc1 0>;
> + status = "disabled";
> + };
> +
> + usbmisc1: usbmisc@4c100200 {
> + compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc",
> + "fsl,imx6q-usbmisc";
> + reg = <0x4c100200 0x200>;
> + #index-cells = <1>;
Do we still need this '#index-cells' property? I see it's being marked
as deprecated in bindings doc.
Shawn
> + };
> +
> + usbotg2: usb@4c200000 {
> + compatible = "fsl,imx93-usb", "fsl,imx7d-usb", "fsl,imx27-usb";
> + reg = <0x4c200000 0x200>;
> + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>,
> + <&clk IMX93_CLK_HSIO_32K_GATE>;
> + clock-names = "usb_ctrl_root", "usb_wakeup";
> + assigned-clocks = <&clk IMX93_CLK_HSIO>;
> + assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
> + assigned-clock-rates = <133000000>;
> + phys = <&usbphynop2>;
> + fsl,usbmisc = <&usbmisc2 0>;
> + status = "disabled";
> + };
> +
> + usbmisc2: usbmisc@4c200200 {
> + compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc",
> + "fsl,imx6q-usbmisc";
> + reg = <0x4c200200 0x200>;
> + #index-cells = <1>;
> + };
> +
> ddr-pmu@4e300dc0 {
> compatible = "fsl,imx93-ddr-pmu";
> reg = <0x4e300dc0 0x200>;
> --
> 2.34.1
>
^ permalink raw reply
* Re: [PATCH v10 03/11] arm64: dts: imx8ulp-evk: enable usb nodes and add ptn5150 nodes
From: Shawn Guo @ 2024-04-02 8:35 UTC (permalink / raw)
To: Xu Yang
Cc: gregkh, robh+dt, krzysztof.kozlowski+dt, shawnguo, conor+dt,
s.hauer, kernel, festevam, linux-imx, peter.chen, jun.li,
linux-usb, devicetree, linux-arm-kernel, imx, linux-kernel
In-Reply-To: <20240321081439.541799-3-xu.yang_2@nxp.com>
On Thu, Mar 21, 2024 at 04:14:31PM +0800, Xu Yang wrote:
> Enable 2 USB nodes and add 2 PTN5150 nodes on i.MX8ULP evk board.
>
> Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
>
> ---
> Changes in v2:
> - fix format as suggusted by Fabio
> - add PTN5150 nodes
> Changes in v3:
> - no changes
> Changes in v4:
> - no changes
> Changes in v5:
> - no changes
> Changes in v6:
> - no changes
> Changes in v7:
> - no changes
> Changes in v8:
> - no changes
> Changes in v9:
> - no changes
> Changes in v10:
> - no changes
> ---
> arch/arm64/boot/dts/freescale/imx8ulp-evk.dts | 84 +++++++++++++++++++
> 1 file changed, 84 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
> index 69dd8e31027c..bf418af31039 100644
> --- a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
> @@ -133,6 +133,64 @@ pcal6408: gpio@21 {
> gpio-controller;
> #gpio-cells = <2>;
> };
> +
> + ptn5150_1: typec@1d {
Could you sort devices in unit-address?
> + compatible = "nxp,ptn5150";
> + reg = <0x1d>;
> + int-gpios = <&gpiof 3 IRQ_TYPE_EDGE_FALLING>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_typec1>;
> + status = "disabled";
> + };
> +
> + ptn5150_2: typec@3d {
> + compatible = "nxp,ptn5150";
> + reg = <0x3d>;
> + int-gpios = <&gpiof 5 IRQ_TYPE_EDGE_FALLING>;
> + pinctrl-names = "default";
Broken indent?
Shawn
> + pinctrl-0 = <&pinctrl_typec2>;
> + status = "disabled";
> + };
> +};
> +
> +&usbotg1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usb1>;
> + dr_mode = "otg";
> + hnp-disable;
> + srp-disable;
> + adp-disable;
> + over-current-active-low;
> + status = "okay";
> +};
> +
> +&usbphy1 {
> + fsl,tx-d-cal = <110>;
> + status = "okay";
> +};
> +
> +&usbmisc1 {
> + status = "okay";
> +};
> +
> +&usbotg2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usb2>;
> + dr_mode = "otg";
> + hnp-disable;
> + srp-disable;
> + adp-disable;
> + over-current-active-low;
> + status = "okay";
> +};
> +
> +&usbphy2 {
> + fsl,tx-d-cal = <110>;
> + status = "okay";
> +};
> +
> +&usbmisc2 {
> + status = "okay";
> };
>
> &usdhc0 {
> @@ -224,6 +282,32 @@ MX8ULP_PAD_PTE13__LPI2C7_SDA 0x20
> >;
> };
>
> + pinctrl_typec1: typec1grp {
> + fsl,pins = <
> + MX8ULP_PAD_PTF3__PTF3 0x3
> + >;
> + };
> +
> + pinctrl_typec2: typec2grp {
> + fsl,pins = <
> + MX8ULP_PAD_PTF5__PTF5 0x3
> + >;
> + };
> +
> + pinctrl_usb1: usb1grp {
> + fsl,pins = <
> + MX8ULP_PAD_PTF2__USB0_ID 0x10003
> + MX8ULP_PAD_PTF4__USB0_OC 0x10003
> + >;
> + };
> +
> + pinctrl_usb2: usb2grp {
> + fsl,pins = <
> + MX8ULP_PAD_PTD23__USB1_ID 0x10003
> + MX8ULP_PAD_PTF6__USB1_OC 0x10003
> + >;
> + };
> +
> pinctrl_usdhc0: usdhc0grp {
> fsl,pins = <
> MX8ULP_PAD_PTD1__SDHC0_CMD 0x3
> --
> 2.34.1
>
^ permalink raw reply
* Re: [PATCH v10 02/11] arm64: dts: imx8ulp: add usb nodes
From: Shawn Guo @ 2024-04-02 8:31 UTC (permalink / raw)
To: Xu Yang
Cc: gregkh, robh+dt, krzysztof.kozlowski+dt, shawnguo, conor+dt,
s.hauer, kernel, festevam, linux-imx, peter.chen, jun.li,
linux-usb, devicetree, linux-arm-kernel, imx, linux-kernel
In-Reply-To: <20240321081439.541799-2-xu.yang_2@nxp.com>
On Thu, Mar 21, 2024 at 04:14:30PM +0800, Xu Yang wrote:
> Add USB nodes on i.MX8ULP platform which has 2 USB controllers.
>
> Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
>
> ---
> Changes in v2:
> - no changes
> Changes in v3:
> - no changes
> Changes in v4:
> - no changes
> Changes in v5:
> - no changes
> Changes in v6:
> - drop usbphy aliases
> Changes in v7:
> - no changes
> Changes in v8:
> - no changes
> Changes in v9:
> - no changes
> Changes in v10:
> - no changes
> ---
> arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 62 ++++++++++++++++++++++
> 1 file changed, 62 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> index c4a0082f30d3..7da9461a5745 100644
> --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> @@ -472,6 +472,68 @@ usdhc2: mmc@298f0000 {
> status = "disabled";
> };
>
> + usbotg1: usb@29900000 {
> + compatible = "fsl,imx8ulp-usb", "fsl,imx7ulp-usb", "fsl,imx6ul-usb";
> + reg = <0x29900000 0x200>;
> + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&pcc4 IMX8ULP_CLK_USB0>;
> + power-domains = <&scmi_devpd IMX8ULP_PD_USB0>;
> + phys = <&usbphy1>;
> + fsl,usbmisc = <&usbmisc1 0>;
> + ahb-burst-config = <0x0>;
> + tx-burst-size-dword = <0x8>;
> + rx-burst-size-dword = <0x8>;
> + status = "disabled";
> + };
> +
> + usbmisc1: usbmisc@29900200 {
> + compatible = "fsl,imx8ulp-usbmisc", "fsl,imx7d-usbmisc",
> + "fsl,imx6q-usbmisc";
> + #index-cells = <1>;
> + reg = <0x29900200 0x200>;
Could you move 'reg' above so that it's after compatible?
> + status = "disabled";
> + };
> +
> + usbphy1: usb-phy@29910000 {
> + compatible = "fsl,imx8ulp-usbphy", "fsl,imx7ulp-usbphy";
> + reg = <0x29910000 0x10000>;
> + interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&pcc4 IMX8ULP_CLK_USB0_PHY>;
> + #phy-cells = <0>;
> + status = "disabled";
> + };
> +
> + usbotg2: usb@29920000 {
> + compatible = "fsl,imx8ulp-usb", "fsl,imx7ulp-usb", "fsl,imx6ul-usb";
> + reg = <0x29920000 0x200>;
> + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&pcc4 IMX8ULP_CLK_USB1>;
> + power-domains = <&scmi_devpd IMX8ULP_PD_USDHC2_USB1>;
> + phys = <&usbphy2>;
> + fsl,usbmisc = <&usbmisc2 0>;
> + ahb-burst-config = <0x0>;
> + tx-burst-size-dword = <0x8>;
> + rx-burst-size-dword = <0x8>;
> + status = "disabled";
> + };
> +
> + usbmisc2: usbmisc@29920200 {
> + compatible = "fsl,imx8ulp-usbmisc", "fsl,imx7d-usbmisc",
> + "fsl,imx6q-usbmisc";
> + #index-cells = <1>;
> + reg = <0x29920200 0x200>;
Ditto
Shawn
> + status = "disabled";
> + };
> +
> + usbphy2: usb-phy@29930000 {
> + compatible = "fsl,imx8ulp-usbphy", "fsl,imx7ulp-usbphy";
> + reg = <0x29930000 0x10000>;
> + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&pcc4 IMX8ULP_CLK_USB1_PHY>;
> + #phy-cells = <0>;
> + status = "disabled";
> + };
> +
> fec: ethernet@29950000 {
> compatible = "fsl,imx8ulp-fec", "fsl,imx6ul-fec", "fsl,imx6q-fec";
> reg = <0x29950000 0x10000>;
> --
> 2.34.1
>
^ permalink raw reply
* Re: [PATCH 0/3] media: i2c: Add imx283 camera sensor driver
From: Umang Jain @ 2024-04-02 8:31 UTC (permalink / raw)
To: Kieran Bingham, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
Sakari Ailus
Cc: linux-media, devicetree, linux-arm-kernel, linux-kernel,
Rob Herring, Laurent Pinchart
In-Reply-To: <20240402-kernel-name-extraversion-v1-0-57bb38de841b@ideasonboard.com>
Hi all,
PLease ignore the series, I was testing/learning the b4 tool.
I did pass --offline-mode but it has sent the patches anyway :-//
On 02/04/24 1:59 pm, Umang Jain wrote:
> Add a v4l2 subdevice driver for the Sony IMX283 image sensor.
>
> The IMX283 is a 20MP Diagonal 15.86 mm (Type 1) CMOS Image Sensor with
> Square Pixel for Color Cameras.
>
> The following features are supported:
> - Manual exposure an gain control support
> - vblank/hblank/link freq control support
> - Test pattern support control
> - Arbitrary horizontal and vertical cropping
> - Supported resolution:
> - 5472x3648 @ 20fps (SRGGB12)
> - 5472x3648 @ 25fps (SRGGB10)
> - 2736x1824 @ 50fps (SRGGB12)
>
> The driver is tested on mainline branch v6.8-rc2 on IMX8MP Debix-SOM-A.
> Additional testing has been done on RPi5 with the downstream BSP.
>
> Changes in v4:
> - fix 32-bit build error around u64 divisions (use do_div)
> - Fix hmax default and minimum values
>
> Changes in v3:
> - fix headers includes
> - Improve #define(s) readability
> - Drop __func__ from error logs
> - Use HZ_PER_MHZ instead of MEGA
> - mdsel* variables should be u8
> - Use container_of_const() instead of container_of()
> - Use clamp() used of clamp_t variant
> - Use streams API imx283_{enable|disable}_streams (**NOTE**)
> - Properly fix PM runtime handling
> (pm_ptr(), DEFINE_RUNTIME_DEV_PM_OPS,
> imx283_runtime_suspend, imx283_runtime_resume)
> - Fix format modifiers, signed-ness at various places
>
> changes in v2 (summary):
> - Use u32 wherever possible
> - Use MEGA macro instead of self defined MHZ() macro
> - Properly refine regs using CCI
> - Drop tracking of current mode. Shifted to infer from active state directly.
> (Laurent's review)
> - Cont. from above: Pass the struct imx283_mode to functions whereever required.
> - Remove unused comments
> - Remove custom mutex. Use control handler one instead.
> - Drop imx283_reset_colorspace() and inline
> - Set colorspace field properly (drop _DEFAULTS)
> - Use __maybe_unused for imx283_power_on() and imx283_power_off()
> - Store controls v4l2_ctrl handles for those required, not all.
> - Drop imx283_free_controls(). Use v4l2_ctrl_handler_free
> - fix reset-gpios handling and add it to DT schema
> - fix data-lanes property in DT schema
> - fix IMX283 Kconfig
> - Remove unused macros
> - Alphabetical case consistency
>
> Signed-off-by: Umang Jain <umang.jain@ideasonboard.com>
> ---
> Kieran Bingham (1):
> media: i2c: Add imx283 camera sensor driver
>
> Umang Jain (2):
> media: dt-bindings: media: Add bindings for IMX283
> fixups
>
> .../devicetree/bindings/media/i2c/sony,imx283.yaml | 107 ++
> MAINTAINERS | 9 +
> drivers/media/i2c/Kconfig | 10 +
> drivers/media/i2c/Makefile | 1 +
> drivers/media/i2c/imx283.c | 1605 ++++++++++++++++++++
> 5 files changed, 1732 insertions(+)
> ---
> base-commit: 54ee11761885407056f4ca60309739e2db6b02dc
> change-id: 20240402-kernel-name-extraversion-2b08d441e08c
>
> Best regards,
^ permalink raw reply
* Re: [PATCH 3/3] fixups
From: Krzysztof Kozlowski @ 2024-04-02 8:30 UTC (permalink / raw)
To: Umang Jain, Kieran Bingham, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
Sakari Ailus
Cc: linux-media, devicetree, linux-arm-kernel, linux-kernel
In-Reply-To: <20240402-kernel-name-extraversion-v1-3-57bb38de841b@ideasonboard.com>
On 02/04/2024 10:29, Umang Jain wrote:
> ---
> drivers/media/i2c/imx283.c | 25 +++++++++++++++++--------
> 1 file changed, 17 insertions(+), 8 deletions(-)
Patch should be squashed.
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH] media: dt-bindings: ovti,ov2680: Document clock/data-lanes
From: Sakari Ailus @ 2024-04-02 8:30 UTC (permalink / raw)
To: Fabio Estevam
Cc: rmfrfs, robh, krzysztof.kozlowski+dt, conor+dt, linux-media,
devicetree, Fabio Estevam
In-Reply-To: <CAOMZO5BGYhnhOrBRS9zBeYYJFHXnQkqZCAV2wGtdpmiA3HZTqA@mail.gmail.com>
Hi Fabio,
On Mon, Apr 01, 2024 at 12:03:15PM -0300, Fabio Estevam wrote:
> Hi Sakari,
>
> On Wed, Mar 27, 2024 at 7:30 PM Sakari Ailus
> <sakari.ailus@linux.intel.com> wrote:
>
> > > In this case, the correct fix would be to remove 'clock-lanes' and
> > > 'data-lanes' from imx7s-warp.dts.
> >
> > Agreed.
>
> I tried removing 'clock-lanes' and 'data-lanes', but it did not work:
>
> ov2680 1-0036: error -EINVAL: only a 1-lane CSI2 config is supported
> ov2680 1-0036: probe with driver ov2680 failed with error -22
If it's a problem with the driver, you should fix the driver instead of
working around it in DT. Just remove the check.
>
> I will send a v2 that documents 'clock-lanes', 'data-lanes', and
> 'link-frequencies'.
--
Regards,
Sakari Ailus
^ permalink raw reply
* [PATCH 3/3] fixups
From: Umang Jain @ 2024-04-02 8:29 UTC (permalink / raw)
To: Kieran Bingham, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
Sakari Ailus
Cc: linux-media, devicetree, linux-arm-kernel, linux-kernel,
Umang Jain
In-Reply-To: <20240402-kernel-name-extraversion-v1-0-57bb38de841b@ideasonboard.com>
---
| 25 +++++++++++++++++--------
1 file changed, 17 insertions(+), 8 deletions(-)
--git a/drivers/media/i2c/imx283.c b/drivers/media/i2c/imx283.c
index 81fe2d4fd4d3..ace8f65aa6b3 100644
--- a/drivers/media/i2c/imx283.c
+++ b/drivers/media/i2c/imx283.c
@@ -450,12 +450,12 @@ static const struct imx283_mode supported_modes_12bit[] = {
.bpp = 12,
.width = 2736,
.height = 1824,
- .min_hmax = 1870, /* Pixels (362 * 360/72 + padding) */
+ .min_hmax = 2414, /* Pixels (362 * 480MHz/72MHz + padding) */
.min_vmax = 3840, /* Lines */
/* 50.00 FPS */
- .default_hmax = 1870, /* 362 @ 360MHz/72MHz */
- .default_vmax = 3960,
+ .default_hmax = 2500, /* 375 @ 480MHz/72Mhz */
+ .default_vmax = 3840,
.veff = 1824,
.vst = 0,
@@ -483,7 +483,7 @@ static const struct imx283_mode supported_modes_10bit[] = {
.min_vmax = 3793,
/* 25.00 FPS */
- .default_hmax = 1500, /* 750 @ 576MHz / 72MHz */
+ .default_hmax = 6000, /* 750 @ 576MHz / 72MHz */
.default_vmax = 3840,
.min_shr = 10,
@@ -568,12 +568,15 @@ static inline void get_mode_table(unsigned int code,
static u64 imx283_pixel_rate(struct imx283 *imx283,
const struct imx283_mode *mode)
{
+ u64 link_frequency = link_frequencies[__ffs(imx283->link_freq_bitmap)];
unsigned int bpp = mode->bpp;
const unsigned int ddr = 2; /* Double Data Rate */
const unsigned int lanes = 4; /* Only 4 lane support */
- u64 link_frequency = link_frequencies[__ffs(imx283->link_freq_bitmap)];
+ u64 numerator = link_frequency * ddr * lanes;
- return link_frequency * ddr * lanes / bpp;
+ do_div(numerator, bpp);
+
+ return numerator;
}
/* Convert from a variable pixel_rate to 72 MHz clock cycles */
@@ -588,8 +591,11 @@ static u64 imx283_internal_clock(unsigned int pixel_rate, unsigned int pixels)
*/
const u32 iclk_pre = 72;
const u32 pclk_pre = pixel_rate / HZ_PER_MHZ;
+ u64 numerator = pixels * iclk_pre;
+
+ do_div(numerator, pclk_pre);
- return pixels * iclk_pre / pclk_pre;
+ return numerator;
}
/* Internal clock (72MHz) to Pixel Rate clock (Variable) */
@@ -604,8 +610,11 @@ static u64 imx283_iclk_to_pix(unsigned int pixel_rate, unsigned int cycles)
*/
const u32 iclk_pre = 72;
const u32 pclk_pre = pixel_rate / HZ_PER_MHZ;
+ u64 numerator = cycles * pclk_pre;
+
+ do_div(numerator, iclk_pre);
- return cycles * pclk_pre / iclk_pre;
+ return numerator;
}
/* Determine the exposure based on current hmax, vmax and a given SHR */
--
2.43.0
^ permalink raw reply related
* [PATCH 2/3] media: i2c: Add imx283 camera sensor driver
From: Umang Jain @ 2024-04-02 8:29 UTC (permalink / raw)
To: Kieran Bingham, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
Sakari Ailus
Cc: linux-media, devicetree, linux-arm-kernel, linux-kernel,
Umang Jain
In-Reply-To: <20240402-kernel-name-extraversion-v1-0-57bb38de841b@ideasonboard.com>
From: Kieran Bingham <kieran.bingham@ideasonboard.com>
Add a v4l2 subdevice driver for the Sony IMX283 image sensor.
The IMX283 is a 20MP Diagonal 15.86 mm (Type 1) CMOS Image Sensor with
Square Pixel for Color Cameras.
The following features are supported:
- Manual exposure an gain control support
- vblank/hblank/link freq control support
- Test pattern support control
- Arbitrary horizontal and vertical cropping
- Supported resolution:
- 5472x3648 @ 20fps (SRGGB12)
- 5472x3648 @ 25fps (SRGGB10)
- 2736x1824 @ 50fps (SRGGB12)
Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
Signed-off-by: Umang Jain <umang.jain@ideasonboard.com>
---
MAINTAINERS | 1 +
| 10 +
| 1 +
| 1596 ++++++++++++++++++++++++++++++++++++++++++++
4 files changed, 1608 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index a2e164131650..64d3780afb99 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -20374,6 +20374,7 @@ L: linux-media@vger.kernel.org
S: Maintained
T: git git://linuxtv.org/media_tree.git
F: Documentation/devicetree/bindings/media/i2c/sony,imx283.yaml
+F: drivers/media/i2c/imx283.c
SONY IMX290 SENSOR DRIVER
M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
--git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig
index e4da68835683..b84d64d37f0e 100644
--- a/drivers/media/i2c/Kconfig
+++ b/drivers/media/i2c/Kconfig
@@ -163,6 +163,16 @@ config VIDEO_IMX274
This is a V4L2 sensor driver for the Sony IMX274
CMOS image sensor.
+config VIDEO_IMX283
+ tristate "Sony IMX283 sensor support"
+ select V4L2_CCI_I2C
+ help
+ This is a V4L2 sensor driver for the Sony IMX283
+ CMOS image sensor.
+
+ To compile this driver as a module, choose M here: the
+ module will be called imx283.
+
config VIDEO_IMX290
tristate "Sony IMX290 sensor support"
select REGMAP_I2C
--git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile
index b82e99ca7578..bbe41e831c76 100644
--- a/drivers/media/i2c/Makefile
+++ b/drivers/media/i2c/Makefile
@@ -49,6 +49,7 @@ obj-$(CONFIG_VIDEO_IMX214) += imx214.o
obj-$(CONFIG_VIDEO_IMX219) += imx219.o
obj-$(CONFIG_VIDEO_IMX258) += imx258.o
obj-$(CONFIG_VIDEO_IMX274) += imx274.o
+obj-$(CONFIG_VIDEO_IMX283) += imx283.o
obj-$(CONFIG_VIDEO_IMX290) += imx290.o
obj-$(CONFIG_VIDEO_IMX296) += imx296.o
obj-$(CONFIG_VIDEO_IMX319) += imx319.o
--git a/drivers/media/i2c/imx283.c b/drivers/media/i2c/imx283.c
new file mode 100644
index 000000000000..81fe2d4fd4d3
--- /dev/null
+++ b/drivers/media/i2c/imx283.c
@@ -0,0 +1,1596 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * V4L2 Support for the IMX283
+ *
+ * Diagonal 15.86 mm (Type 1) CMOS Image Sensor with Square Pixel for Color
+ * Cameras.
+ *
+ * Copyright (C) 2024 Ideas on Board Oy.
+ *
+ * Based on Sony IMX283 driver prepared by Will Whang
+ *
+ * Based on Sony imx477 camera driver
+ * Copyright (C) 2019-2020 Raspberry Pi (Trading) Ltd
+ */
+
+#include <linux/array_size.h>
+#include <linux/bitops.h>
+#include <linux/container_of.h>
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/gpio/consumer.h>
+#include <linux/i2c.h>
+#include <linux/minmax.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/pm_runtime.h>
+#include <linux/property.h>
+#include <linux/regulator/consumer.h>
+#include <linux/types.h>
+#include <linux/units.h>
+#include <media/v4l2-cci.h>
+#include <media/v4l2-ctrls.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-event.h>
+#include <media/v4l2-fwnode.h>
+#include <media/v4l2-mediabus.h>
+
+/* Chip ID */
+#define IMX283_REG_CHIP_ID CCI_REG8(0x3000)
+#define IMX283_CHIP_ID 0x0b // Default power on state
+
+#define IMX283_REG_STANDBY CCI_REG8(0x3000)
+#define IMX283_ACTIVE 0
+#define IMX283_STANDBY BIT(0)
+#define IMX283_STBLOGIC BIT(1)
+#define IMX283_STBMIPI BIT(2)
+#define IMX283_STBDV BIT(3)
+#define IMX283_SLEEP BIT(4)
+
+#define IMX283_REG_CLAMP CCI_REG8(0x3001)
+#define IMX283_CLPSQRST BIT(4)
+
+#define IMX283_REG_PLSTMG08 CCI_REG8(0x3003)
+#define IMX283_PLSTMG08_VAL 0x77
+
+#define IMX283_REG_MDSEL1 CCI_REG8(0x3004)
+#define IMX283_REG_MDSEL2 CCI_REG8(0x3005)
+#define IMX283_REG_MDSEL3 CCI_REG8(0x3006)
+#define IMX283_MDSEL3_VCROP_EN BIT(5)
+#define IMX283_REG_MDSEL4 CCI_REG8(0x3007)
+#define IMX283_MDSEL4_VCROP_EN (BIT(4) | BIT(6))
+
+#define IMX283_REG_SVR CCI_REG16_LE(0x3009)
+
+#define IMX283_REG_HTRIMMING CCI_REG8(0x300b)
+#define IMX283_MDVREV BIT(0) /* VFLIP */
+#define IMX283_HTRIMMING_EN BIT(4)
+
+#define IMX283_REG_VWINPOS CCI_REG16_LE(0x300f)
+#define IMX283_REG_VWIDCUT CCI_REG16_LE(0x3011)
+
+#define IMX283_REG_MDSEL7 CCI_REG16_LE(0x3013)
+
+/* CSI Clock Configuration */
+#define IMX283_REG_TCLKPOST CCI_REG8(0x3018)
+#define IMX283_REG_THSPREPARE CCI_REG8(0x301a)
+#define IMX283_REG_THSZERO CCI_REG8(0x301c)
+#define IMX283_REG_THSTRAIL CCI_REG8(0x301e)
+#define IMX283_REG_TCLKTRAIL CCI_REG8(0x3020)
+#define IMX283_REG_TCLKPREPARE CCI_REG8(0x3022)
+#define IMX283_REG_TCLKZERO CCI_REG16_LE(0x3024)
+#define IMX283_REG_TLPX CCI_REG8(0x3026)
+#define IMX283_REG_THSEXIT CCI_REG8(0x3028)
+#define IMX283_REG_TCLKPRE CCI_REG8(0x302a)
+#define IMX283_REG_SYSMODE CCI_REG8(0x3104)
+
+#define IMX283_REG_Y_OUT_SIZE CCI_REG16_LE(0x302f)
+#define IMX283_REG_WRITE_VSIZE CCI_REG16_LE(0x3031)
+#define IMX283_REG_OB_SIZE_V CCI_REG8(0x3033)
+
+/* HMAX internal HBLANK */
+#define IMX283_REG_HMAX CCI_REG16_LE(0x3036)
+#define IMX283_HMAX_MAX (BIT(16) - 1)
+
+/* VMAX internal VBLANK */
+#define IMX283_REG_VMAX CCI_REG24_LE(0x3038)
+#define IMX283_VMAX_MAX (BIT(16) - 1)
+
+/* SHR internal */
+#define IMX283_REG_SHR CCI_REG16_LE(0x303b)
+#define IMX283_SHR_MIN 11
+
+/*
+ * Analog gain control
+ * Gain [dB] = -20log{(2048 - value [10:0]) /2048}
+ * Range: 0dB to approximately +27dB
+ */
+#define IMX283_REG_ANALOG_GAIN CCI_REG16_LE(0x3042)
+#define IMX283_ANA_GAIN_MIN 0
+#define IMX283_ANA_GAIN_MAX 1957
+#define IMX283_ANA_GAIN_STEP 1
+#define IMX283_ANA_GAIN_DEFAULT 0x0
+
+/*
+ * Digital gain control
+ * Gain [dB] = value * 6
+ * Range: 0dB to +18db
+ */
+#define IMX283_REG_DIGITAL_GAIN CCI_REG8(0x3044)
+#define IMX283_DGTL_GAIN_MIN 0
+#define IMX283_DGTL_GAIN_MAX 3
+#define IMX283_DGTL_GAIN_DEFAULT 0
+#define IMX283_DGTL_GAIN_STEP 1
+
+#define IMX283_REG_HTRIMMING_START CCI_REG16_LE(0x3058)
+#define IMX283_REG_HTRIMMING_END CCI_REG16_LE(0x305a)
+
+#define IMX283_REG_MDSEL18 CCI_REG16_LE(0x30f6)
+
+/* Master Mode Operation Control */
+#define IMX283_REG_XMSTA CCI_REG8(0x3105)
+#define IMX283_XMSTA BIT(0)
+
+#define IMX283_REG_SYNCDRV CCI_REG8(0x3107)
+#define IMX283_SYNCDRV_XHS_XVS (0xa0 | 0x02)
+#define IMX283_SYNCDRV_HIZ (0xa0 | 0x03)
+
+/* PLL Standby */
+#define IMX283_REG_STBPL CCI_REG8(0x320b)
+#define IMX283_STBPL_NORMAL 0x00
+#define IMX283_STBPL_STANDBY 0x03
+
+/* Input Frequency Setting */
+#define IMX283_REG_PLRD1 CCI_REG8(0x36c1)
+#define IMX283_REG_PLRD2 CCI_REG16_LE(0x36c2)
+#define IMX283_REG_PLRD3 CCI_REG8(0x36f7)
+#define IMX283_REG_PLRD4 CCI_REG8(0x36f8)
+
+#define IMX283_REG_PLSTMG02 CCI_REG8(0x36aa)
+#define IMX283_PLSTMG02_VAL 0x00
+
+#define IMX283_REG_EBD_X_OUT_SIZE CCI_REG16_LE(0x3a54)
+
+/* Test pattern generator */
+#define IMX283_REG_TPG_CTRL CCI_REG8(0x3156)
+#define IMX283_TPG_CTRL_CLKEN BIT(0)
+#define IMX283_TPG_CTRL_PATEN BIT(4)
+
+#define IMX283_REG_TPG_PAT CCI_REG8(0x3157)
+#define IMX283_TPG_PAT_ALL_000 0x00
+#define IMX283_TPG_PAT_ALL_FFF 0x01
+#define IMX283_TPG_PAT_ALL_555 0x02
+#define IMX283_TPG_PAT_ALL_AAA 0x03
+#define IMX283_TPG_PAT_H_COLOR_BARS 0x0a
+#define IMX283_TPG_PAT_V_COLOR_BARS 0x0b
+
+/* Exposure control */
+#define IMX283_EXPOSURE_MIN 52
+#define IMX283_EXPOSURE_STEP 1
+#define IMX283_EXPOSURE_DEFAULT 1000
+#define IMX283_EXPOSURE_MAX 49865
+
+#define IMAGE_PAD 0
+
+#define IMX283_XCLR_MIN_DELAY_US (1 * USEC_PER_MSEC)
+#define IMX283_XCLR_DELAY_RANGE_US (1 * USEC_PER_MSEC)
+
+/* IMX283 native and active pixel array size. */
+static const struct v4l2_rect imx283_native_area = {
+ .top = 0,
+ .left = 0,
+ .width = 5592,
+ .height = 3710,
+};
+
+static const struct v4l2_rect imx283_active_area = {
+ .top = 40,
+ .left = 108,
+ .width = 5472,
+ .height = 3648,
+};
+
+struct imx283_reg_list {
+ unsigned int num_of_regs;
+ const struct cci_reg_sequence *regs;
+};
+
+/* Mode : resolution and related config values */
+struct imx283_mode {
+ unsigned int mode;
+
+ /* Bits per pixel */
+ unsigned int bpp;
+
+ /* Frame width */
+ unsigned int width;
+
+ /* Frame height */
+ unsigned int height;
+
+ /*
+ * Minimum horizontal timing in pixel-units
+ *
+ * Note that HMAX is written in 72MHz units, and the datasheet assumes a
+ * 720MHz link frequency. Convert datasheet values with the following:
+ *
+ * For 12 bpp modes (480Mbps) convert with:
+ * hmax = [hmax in 72MHz units] * 480 / 72
+ *
+ * For 10 bpp modes (576Mbps) convert with:
+ * hmax = [hmax in 72MHz units] * 576 / 72
+ */
+ u32 min_hmax;
+
+ /* minimum V-timing in lines */
+ u32 min_vmax;
+
+ /* default H-timing */
+ u32 default_hmax;
+
+ /* default V-timing */
+ u32 default_vmax;
+
+ /* minimum SHR */
+ u32 min_shr;
+
+ /*
+ * Per-mode vertical crop constants used to calculate values
+ * of IMX283REG_WIDCUT and IMX283_REG_VWINPOS.
+ */
+ u32 veff;
+ u32 vst;
+ u32 vct;
+
+ /* Horizontal and vertical binning ratio */
+ u8 hbin_ratio;
+ u8 vbin_ratio;
+
+ /* Optical Blanking */
+ u32 horizontal_ob;
+ u32 vertical_ob;
+
+ /* Analog crop rectangle. */
+ struct v4l2_rect crop;
+};
+
+struct imx283_input_frequency {
+ unsigned int mhz;
+ unsigned int reg_count;
+ struct cci_reg_sequence regs[4];
+};
+
+static const struct imx283_input_frequency imx283_frequencies[] = {
+ {
+ .mhz = 6 * HZ_PER_MHZ,
+ .reg_count = 4,
+ .regs = {
+ { IMX283_REG_PLRD1, 0x00 },
+ { IMX283_REG_PLRD2, 0x00f0 },
+ { IMX283_REG_PLRD3, 0x00 },
+ { IMX283_REG_PLRD4, 0xc0 },
+ },
+ },
+ {
+ .mhz = 12 * HZ_PER_MHZ,
+ .reg_count = 4,
+ .regs = {
+ { IMX283_REG_PLRD1, 0x01 },
+ { IMX283_REG_PLRD2, 0x00f0 },
+ { IMX283_REG_PLRD3, 0x01 },
+ { IMX283_REG_PLRD4, 0xc0 },
+ },
+ },
+ {
+ .mhz = 18 * HZ_PER_MHZ,
+ .reg_count = 4,
+ .regs = {
+ { IMX283_REG_PLRD1, 0x01 },
+ { IMX283_REG_PLRD2, 0x00a0 },
+ { IMX283_REG_PLRD3, 0x01 },
+ { IMX283_REG_PLRD4, 0x80 },
+ },
+ },
+ {
+ .mhz = 24 * HZ_PER_MHZ,
+ .reg_count = 4,
+ .regs = {
+ { IMX283_REG_PLRD1, 0x02 },
+ { IMX283_REG_PLRD2, 0x00f0 },
+ { IMX283_REG_PLRD3, 0x02 },
+ { IMX283_REG_PLRD4, 0xc0 },
+ },
+ },
+};
+
+enum imx283_modes {
+ IMX283_MODE_0,
+ IMX283_MODE_1,
+ IMX283_MODE_1A,
+ IMX283_MODE_1S,
+ IMX283_MODE_2,
+ IMX283_MODE_2A,
+ IMX283_MODE_3,
+ IMX283_MODE_4,
+ IMX283_MODE_5,
+ IMX283_MODE_6,
+};
+
+struct imx283_readout_mode {
+ u8 mdsel1;
+ u8 mdsel2;
+ u8 mdsel3;
+ u8 mdsel4;
+};
+
+static const struct imx283_readout_mode imx283_readout_modes[] = {
+ /* All pixel scan modes */
+ [IMX283_MODE_0] = { 0x04, 0x03, 0x10, 0x00 }, /* 12 bit */
+ [IMX283_MODE_1] = { 0x04, 0x01, 0x00, 0x00 }, /* 10 bit */
+ [IMX283_MODE_1A] = { 0x04, 0x01, 0x20, 0x50 }, /* 10 bit */
+ [IMX283_MODE_1S] = { 0x04, 0x41, 0x20, 0x50 }, /* 10 bit */
+
+ /* Horizontal / Vertical 2/2-line binning */
+ [IMX283_MODE_2] = { 0x0d, 0x11, 0x50, 0x00 }, /* 12 bit */
+ [IMX283_MODE_2A] = { 0x0d, 0x11, 0x70, 0x50 }, /* 12 bit */
+
+ /* Horizontal / Vertical 3/3-line binning */
+ [IMX283_MODE_3] = { 0x1e, 0x18, 0x10, 0x00 }, /* 12 bit */
+
+ /* Vertical 2/9 subsampling, horizontal 3 binning cropping */
+ [IMX283_MODE_4] = { 0x29, 0x18, 0x30, 0x50 }, /* 12 bit */
+
+ /* Vertical 2/19 subsampling binning, horizontal 3 binning */
+ [IMX283_MODE_5] = { 0x2d, 0x18, 0x10, 0x00 }, /* 12 bit */
+
+ /* Vertical 2 binning horizontal 2/4, subsampling 16:9 cropping */
+ [IMX283_MODE_6] = { 0x18, 0x21, 0x00, 0x09 }, /* 10 bit */
+
+ /*
+ * New modes should make sure the offset period is complied.
+ * See imx283_exposure() for reference.
+ */
+};
+
+static const struct cci_reg_sequence mipi_data_rate_1440Mbps[] = {
+ /* The default register settings provide the 1440Mbps rate */
+ { CCI_REG8(0x36c5), 0x00 }, /* Undocumented */
+ { CCI_REG8(0x3ac4), 0x00 }, /* Undocumented */
+
+ { IMX283_REG_STBPL, 0x00 },
+ { IMX283_REG_TCLKPOST, 0xa7 },
+ { IMX283_REG_THSPREPARE, 0x6f },
+ { IMX283_REG_THSZERO, 0x9f },
+ { IMX283_REG_THSTRAIL, 0x5f },
+ { IMX283_REG_TCLKTRAIL, 0x5f },
+ { IMX283_REG_TCLKPREPARE, 0x6f },
+ { IMX283_REG_TCLKZERO, 0x017f },
+ { IMX283_REG_TLPX, 0x4f },
+ { IMX283_REG_THSEXIT, 0x47 },
+ { IMX283_REG_TCLKPRE, 0x07 },
+ { IMX283_REG_SYSMODE, 0x02 },
+};
+
+static const struct cci_reg_sequence mipi_data_rate_720Mbps[] = {
+ /* Undocumented Additions "For 720MBps" Setting */
+ { CCI_REG8(0x36c5), 0x01 }, /* Undocumented */
+ { CCI_REG8(0x3ac4), 0x01 }, /* Undocumented */
+
+ { IMX283_REG_STBPL, 0x00 },
+ { IMX283_REG_TCLKPOST, 0x77 },
+ { IMX283_REG_THSPREPARE, 0x37 },
+ { IMX283_REG_THSZERO, 0x67 },
+ { IMX283_REG_THSTRAIL, 0x37 },
+ { IMX283_REG_TCLKTRAIL, 0x37 },
+ { IMX283_REG_TCLKPREPARE, 0x37 },
+ { IMX283_REG_TCLKZERO, 0xdf },
+ { IMX283_REG_TLPX, 0x2f },
+ { IMX283_REG_THSEXIT, 0x47 },
+ { IMX283_REG_TCLKPRE, 0x0f },
+ { IMX283_REG_SYSMODE, 0x02 },
+};
+
+static const s64 link_frequencies[] = {
+ 720 * HZ_PER_MHZ, /* 1440 Mbps lane data rate */
+ 360 * HZ_PER_MHZ, /* 720 Mbps data lane rate */
+};
+
+static const struct imx283_reg_list link_freq_reglist[] = {
+ { /* 720 MHz */
+ .num_of_regs = ARRAY_SIZE(mipi_data_rate_1440Mbps),
+ .regs = mipi_data_rate_1440Mbps,
+ },
+ { /* 360 MHz */
+ .num_of_regs = ARRAY_SIZE(mipi_data_rate_720Mbps),
+ .regs = mipi_data_rate_720Mbps,
+ },
+};
+
+#define CENTERED_RECTANGLE(rect, _width, _height) \
+ { \
+ .left = rect.left + ((rect.width - (_width)) / 2), \
+ .top = rect.top + ((rect.height - (_height)) / 2), \
+ .width = (_width), \
+ .height = (_height), \
+ }
+
+/* Mode configs */
+static const struct imx283_mode supported_modes_12bit[] = {
+ {
+ /* 20MPix 21.40 fps readout mode 0 */
+ .mode = IMX283_MODE_0,
+ .bpp = 12,
+ .width = 5472,
+ .height = 3648,
+ .min_hmax = 5914, /* 887 @ 480MHz/72MHz */
+ .min_vmax = 3793, /* Lines */
+
+ .veff = 3694,
+ .vst = 0,
+ .vct = 0,
+
+ .hbin_ratio = 1,
+ .vbin_ratio = 1,
+
+ /* 20.00 FPS */
+ .default_hmax = 6000, /* 900 @ 480MHz/72MHz */
+ .default_vmax = 4000,
+
+ .min_shr = 11,
+ .horizontal_ob = 96,
+ .vertical_ob = 16,
+ .crop = CENTERED_RECTANGLE(imx283_active_area, 5472, 3648),
+ },
+ {
+ /*
+ * Readout mode 2 : 2/2 binned mode (2736x1824)
+ */
+ .mode = IMX283_MODE_2,
+ .bpp = 12,
+ .width = 2736,
+ .height = 1824,
+ .min_hmax = 1870, /* Pixels (362 * 360/72 + padding) */
+ .min_vmax = 3840, /* Lines */
+
+ /* 50.00 FPS */
+ .default_hmax = 1870, /* 362 @ 360MHz/72MHz */
+ .default_vmax = 3960,
+
+ .veff = 1824,
+ .vst = 0,
+ .vct = 0,
+
+ .hbin_ratio = 2,
+ .vbin_ratio = 2,
+
+ .min_shr = 12,
+ .horizontal_ob = 48,
+ .vertical_ob = 4,
+
+ .crop = CENTERED_RECTANGLE(imx283_active_area, 5472, 3648),
+ },
+};
+
+static const struct imx283_mode supported_modes_10bit[] = {
+ {
+ /* 20MPix 25.48 fps readout mode 1 */
+ .mode = IMX283_MODE_1,
+ .bpp = 10,
+ .width = 5472,
+ .height = 3648,
+ .min_hmax = 5960, /* 745 @ 576MHz / 72MHz */
+ .min_vmax = 3793,
+
+ /* 25.00 FPS */
+ .default_hmax = 1500, /* 750 @ 576MHz / 72MHz */
+ .default_vmax = 3840,
+
+ .min_shr = 10,
+ .horizontal_ob = 96,
+ .vertical_ob = 16,
+ .crop = CENTERED_RECTANGLE(imx283_active_area, 5472, 3648),
+ },
+};
+
+static const u32 imx283_mbus_codes[] = {
+ MEDIA_BUS_FMT_SRGGB12_1X12,
+ MEDIA_BUS_FMT_SRGGB10_1X10,
+};
+
+/* regulator supplies */
+static const char *const imx283_supply_name[] = {
+ "vadd", /* Analog (2.9V) supply */
+ "vdd1", /* Supply Voltage 2 (1.8V) supply */
+ "vdd2", /* Supply Voltage 3 (1.2V) supply */
+};
+
+struct imx283 {
+ struct device *dev;
+ struct regmap *cci;
+
+ const struct imx283_input_frequency *freq;
+
+ struct v4l2_subdev sd;
+ struct media_pad pad;
+
+ struct clk *xclk;
+
+ struct gpio_desc *reset_gpio;
+ struct regulator_bulk_data supplies[ARRAY_SIZE(imx283_supply_name)];
+
+ /* V4L2 Controls */
+ struct v4l2_ctrl_handler ctrl_handler;
+ struct v4l2_ctrl *exposure;
+ struct v4l2_ctrl *vblank;
+ struct v4l2_ctrl *hblank;
+ struct v4l2_ctrl *vflip;
+
+ unsigned long link_freq_bitmap;
+
+ u16 hmax;
+ u32 vmax;
+};
+
+static inline struct imx283 *to_imx283(struct v4l2_subdev *sd)
+{
+ return container_of_const(sd, struct imx283, sd);
+}
+
+static inline void get_mode_table(unsigned int code,
+ const struct imx283_mode **mode_list,
+ unsigned int *num_modes)
+{
+ switch (code) {
+ case MEDIA_BUS_FMT_SRGGB12_1X12:
+ case MEDIA_BUS_FMT_SGRBG12_1X12:
+ case MEDIA_BUS_FMT_SGBRG12_1X12:
+ case MEDIA_BUS_FMT_SBGGR12_1X12:
+ *mode_list = supported_modes_12bit;
+ *num_modes = ARRAY_SIZE(supported_modes_12bit);
+ break;
+
+ case MEDIA_BUS_FMT_SRGGB10_1X10:
+ case MEDIA_BUS_FMT_SGRBG10_1X10:
+ case MEDIA_BUS_FMT_SGBRG10_1X10:
+ case MEDIA_BUS_FMT_SBGGR10_1X10:
+ *mode_list = supported_modes_10bit;
+ *num_modes = ARRAY_SIZE(supported_modes_10bit);
+ break;
+ default:
+ *mode_list = NULL;
+ *num_modes = 0;
+ break;
+ }
+}
+
+/* Calculate the Pixel Rate based on the current mode */
+static u64 imx283_pixel_rate(struct imx283 *imx283,
+ const struct imx283_mode *mode)
+{
+ unsigned int bpp = mode->bpp;
+ const unsigned int ddr = 2; /* Double Data Rate */
+ const unsigned int lanes = 4; /* Only 4 lane support */
+ u64 link_frequency = link_frequencies[__ffs(imx283->link_freq_bitmap)];
+
+ return link_frequency * ddr * lanes / bpp;
+}
+
+/* Convert from a variable pixel_rate to 72 MHz clock cycles */
+static u64 imx283_internal_clock(unsigned int pixel_rate, unsigned int pixels)
+{
+ /*
+ * Determine the following operation without overflow:
+ * pixels = 72 Mhz / pixel_rate
+ *
+ * The internal clock at 72MHz and Pixel Rate (between 240 and 576MHz)
+ * can easily overflow this calculation, so pre-divide to simplify.
+ */
+ const u32 iclk_pre = 72;
+ const u32 pclk_pre = pixel_rate / HZ_PER_MHZ;
+
+ return pixels * iclk_pre / pclk_pre;
+}
+
+/* Internal clock (72MHz) to Pixel Rate clock (Variable) */
+static u64 imx283_iclk_to_pix(unsigned int pixel_rate, unsigned int cycles)
+{
+ /*
+ * Determine the following operation without overflow:
+ * cycles * pixel_rate / 72 MHz
+ *
+ * The internal clock at 72MHz and Pixel Rate (between 240 and 576MHz)
+ * can easily overflow this calculation, so pre-divide to simplify.
+ */
+ const u32 iclk_pre = 72;
+ const u32 pclk_pre = pixel_rate / HZ_PER_MHZ;
+
+ return cycles * pclk_pre / iclk_pre;
+}
+
+/* Determine the exposure based on current hmax, vmax and a given SHR */
+static u32 imx283_exposure(struct imx283 *imx283,
+ const struct imx283_mode *mode, u64 shr)
+{
+ u32 svr = 0; /* SVR feature is not currently supported */
+ u32 offset;
+ u64 numerator;
+
+ /* Number of clocks per internal offset period */
+ offset = mode->mode == IMX283_MODE_0 ? 209 : 157;
+ numerator = (imx283->vmax * (svr + 1) - shr) * imx283->hmax + offset;
+
+ do_div(numerator, imx283->hmax);
+
+ return clamp(numerator, 0, U32_MAX);
+}
+
+static void imx283_exposure_limits(struct imx283 *imx283,
+ const struct imx283_mode *mode,
+ s64 *min_exposure, s64 *max_exposure)
+{
+ u32 svr = 0; /* SVR feature is not currently supported */
+ u64 min_shr = mode->min_shr;
+ /* Global Shutter is not supported */
+ u64 max_shr = (svr + 1) * imx283->vmax - 4;
+
+ max_shr = min(max_shr, BIT(16) - 1);
+
+ *min_exposure = imx283_exposure(imx283, mode, max_shr);
+ *max_exposure = imx283_exposure(imx283, mode, min_shr);
+}
+
+/*
+ * Integration Time [s] = [ {VMAX x (SVR + 1) – (SHR)} x HMAX + offset ]
+ * / [ 72 x 10^6 ]
+ */
+static u32 imx283_shr(struct imx283 *imx283, const struct imx283_mode *mode,
+ u32 exposure)
+{
+ u32 svr = 0; /* SVR feature is not currently supported */
+ u32 offset;
+ u64 temp;
+
+ /* Number of clocks per internal offset period */
+ offset = mode->mode == IMX283_MODE_0 ? 209 : 157;
+ temp = ((u64)exposure * imx283->hmax - offset);
+ do_div(temp, imx283->hmax);
+
+ return (imx283->vmax * (svr + 1) - temp);
+}
+
+static const char * const imx283_tpg_menu[] = {
+ "Disabled",
+ "All 000h",
+ "All FFFh",
+ "All 555h",
+ "All AAAh",
+ "Horizontal color bars",
+ "Vertical color bars",
+};
+
+static const int imx283_tpg_val[] = {
+ IMX283_TPG_PAT_ALL_000,
+ IMX283_TPG_PAT_ALL_000,
+ IMX283_TPG_PAT_ALL_FFF,
+ IMX283_TPG_PAT_ALL_555,
+ IMX283_TPG_PAT_ALL_AAA,
+ IMX283_TPG_PAT_H_COLOR_BARS,
+ IMX283_TPG_PAT_V_COLOR_BARS,
+};
+
+static int imx283_update_test_pattern(struct imx283 *imx283, u32 pattern_index)
+{
+ int ret;
+
+ if (pattern_index >= ARRAY_SIZE(imx283_tpg_val))
+ return -EINVAL;
+
+ if (!pattern_index)
+ return cci_write(imx283->cci, IMX283_REG_TPG_CTRL, 0x00, NULL);
+
+ ret = cci_write(imx283->cci, IMX283_REG_TPG_PAT,
+ imx283_tpg_val[pattern_index], NULL);
+ if (ret)
+ return ret;
+
+ return cci_write(imx283->cci, IMX283_REG_TPG_CTRL,
+ IMX283_TPG_CTRL_CLKEN | IMX283_TPG_CTRL_PATEN, NULL);
+}
+
+static int imx283_set_ctrl(struct v4l2_ctrl *ctrl)
+{
+ struct imx283 *imx283 = container_of(ctrl->handler, struct imx283,
+ ctrl_handler);
+ const struct imx283_mode *mode;
+ struct v4l2_mbus_framefmt *fmt;
+ const struct imx283_mode *mode_list;
+ struct v4l2_subdev_state *state;
+ unsigned int num_modes;
+ u64 shr, pixel_rate;
+ int ret = 0;
+
+ state = v4l2_subdev_get_locked_active_state(&imx283->sd);
+ fmt = v4l2_subdev_state_get_format(state, 0);
+
+ get_mode_table(fmt->code, &mode_list, &num_modes);
+ mode = v4l2_find_nearest_size(mode_list, num_modes, width, height,
+ fmt->width, fmt->height);
+
+ /*
+ * The VBLANK control may change the limits of usable exposure, so check
+ * and adjust if necessary.
+ */
+ if (ctrl->id == V4L2_CID_VBLANK) {
+ /* Honour the VBLANK limits when setting exposure. */
+ s64 current_exposure, max_exposure, min_exposure;
+
+ imx283->vmax = mode->height + ctrl->val;
+
+ imx283_exposure_limits(imx283, mode,
+ &min_exposure, &max_exposure);
+
+ current_exposure = imx283->exposure->val;
+ current_exposure = clamp(current_exposure, min_exposure,
+ max_exposure);
+
+ __v4l2_ctrl_modify_range(imx283->exposure, min_exposure,
+ max_exposure, 1, current_exposure);
+ }
+
+ /*
+ * Applying V4L2 control value only happens
+ * when power is up for streaming
+ */
+ if (!pm_runtime_get_if_active(imx283->dev, true))
+ return 0;
+
+ switch (ctrl->id) {
+ case V4L2_CID_EXPOSURE:
+ shr = imx283_shr(imx283, mode, ctrl->val);
+ dev_dbg(imx283->dev, "V4L2_CID_EXPOSURE : %d - SHR: %lld\n",
+ ctrl->val, shr);
+ ret = cci_write(imx283->cci, IMX283_REG_SHR, shr, NULL);
+ break;
+
+ case V4L2_CID_HBLANK:
+ pixel_rate = imx283_pixel_rate(imx283, mode);
+ imx283->hmax = imx283_internal_clock(pixel_rate, mode->width + ctrl->val);
+ dev_dbg(imx283->dev, "V4L2_CID_HBLANK : %d HMAX : %u\n",
+ ctrl->val, imx283->hmax);
+ ret = cci_write(imx283->cci, IMX283_REG_HMAX, imx283->hmax, NULL);
+ break;
+
+ case V4L2_CID_VBLANK:
+ imx283->vmax = mode->height + ctrl->val;
+ dev_dbg(imx283->dev, "V4L2_CID_VBLANK : %d VMAX : %u\n",
+ ctrl->val, imx283->vmax);
+ ret = cci_write(imx283->cci, IMX283_REG_VMAX, imx283->vmax, NULL);
+ break;
+
+ case V4L2_CID_ANALOGUE_GAIN:
+ ret = cci_write(imx283->cci, IMX283_REG_ANALOG_GAIN, ctrl->val, NULL);
+ break;
+
+ case V4L2_CID_DIGITAL_GAIN:
+ ret = cci_write(imx283->cci, IMX283_REG_DIGITAL_GAIN, ctrl->val, NULL);
+ break;
+
+ case V4L2_CID_VFLIP:
+ /*
+ * VFLIP is managed by BIT(0) of IMX283_REG_HTRIMMING address, hence
+ * both need to be set simultaneously.
+ */
+ if (ctrl->val) {
+ cci_write(imx283->cci, IMX283_REG_HTRIMMING,
+ IMX283_HTRIMMING_EN | IMX283_MDVREV, &ret);
+ } else {
+ cci_write(imx283->cci, IMX283_REG_HTRIMMING,
+ IMX283_HTRIMMING_EN, &ret);
+ }
+ break;
+
+ case V4L2_CID_TEST_PATTERN:
+ ret = imx283_update_test_pattern(imx283, ctrl->val);
+ break;
+
+ default:
+ dev_err(imx283->dev, "ctrl(id:0x%x, val:0x%x) is not handled\n",
+ ctrl->id, ctrl->val);
+ break;
+ }
+
+ pm_runtime_put(imx283->dev);
+
+ return ret;
+}
+
+static const struct v4l2_ctrl_ops imx283_ctrl_ops = {
+ .s_ctrl = imx283_set_ctrl,
+};
+
+static int imx283_enum_mbus_code(struct v4l2_subdev *sd,
+ struct v4l2_subdev_state *sd_state,
+ struct v4l2_subdev_mbus_code_enum *code)
+{
+ if (code->index >= ARRAY_SIZE(imx283_mbus_codes))
+ return -EINVAL;
+
+ code->code = imx283_mbus_codes[code->index];
+
+ return 0;
+}
+
+static int imx283_enum_frame_size(struct v4l2_subdev *sd,
+ struct v4l2_subdev_state *sd_state,
+ struct v4l2_subdev_frame_size_enum *fse)
+{
+ const struct imx283_mode *mode_list;
+ unsigned int num_modes;
+
+ get_mode_table(fse->code, &mode_list, &num_modes);
+
+ if (fse->index >= num_modes)
+ return -EINVAL;
+
+ fse->min_width = mode_list[fse->index].width;
+ fse->max_width = fse->min_width;
+ fse->min_height = mode_list[fse->index].height;
+ fse->max_height = fse->min_height;
+
+ return 0;
+}
+
+static void imx283_update_image_pad_format(struct imx283 *imx283,
+ const struct imx283_mode *mode,
+ struct v4l2_mbus_framefmt *format)
+{
+ format->width = mode->width;
+ format->height = mode->height;
+ format->field = V4L2_FIELD_NONE;
+ format->colorspace = V4L2_COLORSPACE_RAW;
+ format->ycbcr_enc = V4L2_YCBCR_ENC_601;
+ format->quantization = V4L2_QUANTIZATION_FULL_RANGE;
+ format->xfer_func = V4L2_XFER_FUNC_NONE;
+}
+
+static int imx283_init_state(struct v4l2_subdev *sd,
+ struct v4l2_subdev_state *state)
+{
+ struct imx283 *imx283 = to_imx283(sd);
+ struct v4l2_mbus_framefmt *format;
+ const struct imx283_mode *mode;
+ struct v4l2_rect *crop;
+
+ /* Initialize try_fmt */
+ format = v4l2_subdev_state_get_format(state, IMAGE_PAD);
+
+ mode = &supported_modes_12bit[0];
+ format->code = MEDIA_BUS_FMT_SRGGB12_1X12;
+ imx283_update_image_pad_format(imx283, mode, format);
+
+ /* Initialize crop rectangle to mode default */
+ crop = v4l2_subdev_state_get_crop(state, IMAGE_PAD);
+ *crop = mode->crop;
+
+ return 0;
+}
+
+static void imx283_set_framing_limits(struct imx283 *imx283,
+ const struct imx283_mode *mode)
+{
+ u64 pixel_rate = imx283_pixel_rate(imx283, mode);
+ u64 min_hblank, max_hblank, def_hblank;
+
+ /* Initialise hmax and vmax for exposure calculations */
+ imx283->hmax = imx283_internal_clock(pixel_rate, mode->default_hmax);
+ imx283->vmax = mode->default_vmax;
+
+ /*
+ * Horizontal Blanking
+ * Convert the HMAX_MAX (72MHz) to Pixel rate values for HBLANK_MAX
+ */
+ min_hblank = mode->min_hmax - mode->width;
+ max_hblank = imx283_iclk_to_pix(pixel_rate, IMX283_HMAX_MAX) - mode->width;
+ def_hblank = mode->default_hmax - mode->width;
+ __v4l2_ctrl_modify_range(imx283->hblank, min_hblank, max_hblank, 1,
+ def_hblank);
+ __v4l2_ctrl_s_ctrl(imx283->hblank, def_hblank);
+
+ /* Vertical Blanking */
+ __v4l2_ctrl_modify_range(imx283->vblank, mode->min_vmax - mode->height,
+ IMX283_VMAX_MAX - mode->height, 1,
+ mode->default_vmax - mode->height);
+ __v4l2_ctrl_s_ctrl(imx283->vblank, mode->default_vmax - mode->height);
+}
+
+static int imx283_set_pad_format(struct v4l2_subdev *sd,
+ struct v4l2_subdev_state *sd_state,
+ struct v4l2_subdev_format *fmt)
+{
+ struct v4l2_mbus_framefmt *format;
+ const struct imx283_mode *mode;
+ struct imx283 *imx283 = to_imx283(sd);
+ const struct imx283_mode *mode_list;
+ unsigned int num_modes;
+
+ get_mode_table(fmt->format.code, &mode_list, &num_modes);
+
+ mode = v4l2_find_nearest_size(mode_list, num_modes, width, height,
+ fmt->format.width, fmt->format.height);
+
+ fmt->format.width = mode->width;
+ fmt->format.height = mode->height;
+ fmt->format.field = V4L2_FIELD_NONE;
+ fmt->format.colorspace = V4L2_COLORSPACE_RAW;
+ fmt->format.ycbcr_enc = V4L2_YCBCR_ENC_601;
+ fmt->format.quantization = V4L2_QUANTIZATION_FULL_RANGE;
+ fmt->format.xfer_func = V4L2_XFER_FUNC_NONE;
+
+ format = v4l2_subdev_state_get_format(sd_state, 0);
+
+ if (fmt->which == V4L2_SUBDEV_FORMAT_ACTIVE)
+ imx283_set_framing_limits(imx283, mode);
+
+ *format = fmt->format;
+
+ return 0;
+}
+
+static int imx283_standby_cancel(struct imx283 *imx283)
+{
+ unsigned int link_freq_idx;
+ int ret = 0;
+
+ cci_write(imx283->cci, IMX283_REG_STANDBY,
+ IMX283_STBLOGIC | IMX283_STBDV, &ret);
+
+ /* Configure PLL clocks based on the xclk */
+ cci_multi_reg_write(imx283->cci, imx283->freq->regs,
+ imx283->freq->reg_count, &ret);
+
+ dev_dbg(imx283->dev, "Using clk freq %ld MHz",
+ imx283->freq->mhz / HZ_PER_MHZ);
+
+ /* Initialise communication */
+ cci_write(imx283->cci, IMX283_REG_PLSTMG08, IMX283_PLSTMG08_VAL, &ret);
+ cci_write(imx283->cci, IMX283_REG_PLSTMG02, IMX283_PLSTMG02_VAL, &ret);
+
+ /* Enable PLL */
+ cci_write(imx283->cci, IMX283_REG_STBPL, IMX283_STBPL_NORMAL, &ret);
+
+ /* Configure the MIPI link speed */
+ link_freq_idx = __ffs(imx283->link_freq_bitmap);
+ cci_multi_reg_write(imx283->cci, link_freq_reglist[link_freq_idx].regs,
+ link_freq_reglist[link_freq_idx].num_of_regs,
+ &ret);
+
+ /* 1st Stabilisation period of 1 ms or more */
+ usleep_range(1000, 2000);
+
+ /* Activate */
+ cci_write(imx283->cci, IMX283_REG_STANDBY, IMX283_ACTIVE, &ret);
+
+ /* 2nd Stabilisation period of 19ms or more */
+ usleep_range(19000, 20000);
+
+ cci_write(imx283->cci, IMX283_REG_CLAMP, IMX283_CLPSQRST, &ret);
+ cci_write(imx283->cci, IMX283_REG_XMSTA, 0, &ret);
+ cci_write(imx283->cci, IMX283_REG_SYNCDRV, IMX283_SYNCDRV_XHS_XVS, &ret);
+
+ return ret;
+}
+
+/* Start streaming */
+static int imx283_start_streaming(struct imx283 *imx283,
+ struct v4l2_subdev_state *state)
+{
+ const struct imx283_readout_mode *readout;
+ const struct imx283_mode *mode;
+ const struct v4l2_mbus_framefmt *fmt;
+ const struct imx283_mode *mode_list;
+ unsigned int num_modes;
+ u32 v_widcut;
+ s32 v_pos;
+ u32 write_v_size;
+ u32 y_out_size;
+ int ret = 0;
+
+ fmt = v4l2_subdev_state_get_format(state, 0);
+ get_mode_table(fmt->code, &mode_list, &num_modes);
+ mode = v4l2_find_nearest_size(mode_list, num_modes, width, height,
+ fmt->width, fmt->height);
+
+ ret = imx283_standby_cancel(imx283);
+ if (ret) {
+ dev_err(imx283->dev, "failed to cancel standby\n");
+ return ret;
+ }
+
+ /*
+ * Set the readout mode registers.
+ * MDSEL3 and MDSEL4 are updated to enable Arbitrary Vertical Cropping.
+ */
+ readout = &imx283_readout_modes[mode->mode];
+ cci_write(imx283->cci, IMX283_REG_MDSEL1, readout->mdsel1, &ret);
+ cci_write(imx283->cci, IMX283_REG_MDSEL2, readout->mdsel2, &ret);
+ cci_write(imx283->cci, IMX283_REG_MDSEL3,
+ readout->mdsel3 | IMX283_MDSEL3_VCROP_EN, &ret);
+ cci_write(imx283->cci, IMX283_REG_MDSEL4,
+ readout->mdsel4 | IMX283_MDSEL4_VCROP_EN, &ret);
+
+ /* Mode 1S specific entries from the Readout Drive Mode Tables */
+ if (mode->mode == IMX283_MODE_1S) {
+ cci_write(imx283->cci, IMX283_REG_MDSEL7, 0x01, &ret);
+ cci_write(imx283->cci, IMX283_REG_MDSEL18, 0x1098, &ret);
+ }
+
+ if (ret) {
+ dev_err(imx283->dev, "failed to set readout\n");
+ return ret;
+ }
+
+ /* Initialise SVR. Unsupported for now - Always 0 */
+ cci_write(imx283->cci, IMX283_REG_SVR, 0x00, &ret);
+
+ dev_dbg(imx283->dev, "Mode: Size %d x %d\n", mode->width, mode->height);
+ dev_dbg(imx283->dev, "Analogue Crop (in the mode) %d,%d %dx%d\n",
+ mode->crop.left,
+ mode->crop.top,
+ mode->crop.width,
+ mode->crop.height);
+
+ y_out_size = mode->crop.height / mode->vbin_ratio;
+ write_v_size = y_out_size + mode->vertical_ob;
+ /*
+ * cropping start position = (VWINPOS – Vst) × 2
+ * cropping width = Veff – (VWIDCUT – Vct) × 2
+ */
+ v_pos = imx283->vflip->val ?
+ ((-mode->crop.top / mode->vbin_ratio) / 2) + mode->vst :
+ ((mode->crop.top / mode->vbin_ratio) / 2) + mode->vst;
+ v_widcut = ((mode->veff - y_out_size) / 2) + mode->vct;
+
+ cci_write(imx283->cci, IMX283_REG_Y_OUT_SIZE, y_out_size, &ret);
+ cci_write(imx283->cci, IMX283_REG_WRITE_VSIZE, write_v_size, &ret);
+ cci_write(imx283->cci, IMX283_REG_VWIDCUT, v_widcut, &ret);
+ cci_write(imx283->cci, IMX283_REG_VWINPOS, v_pos, &ret);
+
+ cci_write(imx283->cci, IMX283_REG_OB_SIZE_V, mode->vertical_ob, &ret);
+
+ /* TODO: Validate mode->crop is fully contained within imx283_native_area */
+ cci_write(imx283->cci, IMX283_REG_HTRIMMING_START, mode->crop.left, &ret);
+ cci_write(imx283->cci, IMX283_REG_HTRIMMING_END,
+ mode->crop.left + mode->crop.width, &ret);
+
+ /* Disable embedded data */
+ cci_write(imx283->cci, IMX283_REG_EBD_X_OUT_SIZE, 0, &ret);
+
+ /* Apply customized values from controls (HMAX/VMAX/SHR) */
+ ret = __v4l2_ctrl_handler_setup(imx283->sd.ctrl_handler);
+
+ return ret;
+}
+
+static int imx283_enable_streams(struct v4l2_subdev *sd,
+ struct v4l2_subdev_state *state, u32 pad,
+ u64 streams_mask)
+{
+ struct imx283 *imx283 = to_imx283(sd);
+ int ret;
+
+ if (pad != IMAGE_PAD)
+ return -EINVAL;
+
+ ret = pm_runtime_get_sync(imx283->dev);
+ if (ret < 0) {
+ pm_runtime_put_noidle(imx283->dev);
+ return ret;
+ }
+
+ ret = imx283_start_streaming(imx283, state);
+ if (ret)
+ goto err_rpm_put;
+
+ return 0;
+
+err_rpm_put:
+ pm_runtime_mark_last_busy(imx283->dev);
+ pm_runtime_put_autosuspend(imx283->dev);
+
+ return ret;
+}
+
+static int imx283_disable_streams(struct v4l2_subdev *sd,
+ struct v4l2_subdev_state *state, u32 pad,
+ u64 streams_mask)
+{
+ struct imx283 *imx283 = to_imx283(sd);
+ int ret;
+
+ if (pad != IMAGE_PAD)
+ return -EINVAL;
+
+ ret = cci_write(imx283->cci, IMX283_REG_STANDBY, IMX283_STBLOGIC, NULL);
+ if (ret)
+ dev_err(imx283->dev, "Failed to stop stream\n");
+
+ pm_runtime_mark_last_busy(imx283->dev);
+ pm_runtime_put_autosuspend(imx283->dev);
+
+ return ret;
+}
+
+/* Power/clock management functions */
+static int imx283_power_on(struct imx283 *imx283)
+{
+ int ret;
+
+ ret = regulator_bulk_enable(ARRAY_SIZE(imx283_supply_name),
+ imx283->supplies);
+ if (ret) {
+ dev_err(imx283->dev, "failed to enable regulators\n");
+ return ret;
+ }
+
+ ret = clk_prepare_enable(imx283->xclk);
+ if (ret) {
+ dev_err(imx283->dev, "failed to enable clock\n");
+ goto reg_off;
+ }
+
+ gpiod_set_value_cansleep(imx283->reset_gpio, 0);
+
+ usleep_range(IMX283_XCLR_MIN_DELAY_US,
+ IMX283_XCLR_MIN_DELAY_US + IMX283_XCLR_DELAY_RANGE_US);
+
+ return 0;
+
+reg_off:
+ regulator_bulk_disable(ARRAY_SIZE(imx283_supply_name), imx283->supplies);
+ return ret;
+}
+
+static int imx283_power_off(struct imx283 *imx283)
+{
+ gpiod_set_value_cansleep(imx283->reset_gpio, 1);
+ regulator_bulk_disable(ARRAY_SIZE(imx283_supply_name), imx283->supplies);
+ clk_disable_unprepare(imx283->xclk);
+
+ return 0;
+}
+
+static int imx283_runtime_resume(struct device *dev)
+{
+ struct v4l2_subdev *sd = dev_get_drvdata(dev);
+ struct imx283 *imx283 = to_imx283(sd);
+
+ return imx283_power_on(imx283);
+}
+
+static int imx283_runtime_suspend(struct device *dev)
+{
+ struct v4l2_subdev *sd = dev_get_drvdata(dev);
+ struct imx283 *imx283 = to_imx283(sd);
+
+ imx283_power_off(imx283);
+
+ return 0;
+}
+
+static int imx283_get_regulators(struct imx283 *imx283)
+{
+ unsigned int i;
+
+ for (i = 0; i < ARRAY_SIZE(imx283_supply_name); i++)
+ imx283->supplies[i].supply = imx283_supply_name[i];
+
+ return devm_regulator_bulk_get(imx283->dev,
+ ARRAY_SIZE(imx283_supply_name),
+ imx283->supplies);
+}
+
+/* Verify chip ID */
+static int imx283_identify_module(struct imx283 *imx283)
+{
+ int ret;
+ u64 val;
+
+ ret = cci_read(imx283->cci, IMX283_REG_CHIP_ID, &val, NULL);
+ if (ret) {
+ dev_err(imx283->dev, "failed to read chip id %x, with error %d\n",
+ IMX283_CHIP_ID, ret);
+ return ret;
+ }
+
+ if (val != IMX283_CHIP_ID) {
+ dev_err(imx283->dev, "chip id mismatch: %x!=%llx\n",
+ IMX283_CHIP_ID, val);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static int imx283_get_selection(struct v4l2_subdev *sd,
+ struct v4l2_subdev_state *sd_state,
+ struct v4l2_subdev_selection *sel)
+{
+ switch (sel->target) {
+ case V4L2_SEL_TGT_CROP: {
+ sel->r = *v4l2_subdev_state_get_crop(sd_state, 0);
+ return 0;
+ }
+
+ case V4L2_SEL_TGT_NATIVE_SIZE:
+ sel->r = imx283_native_area;
+ return 0;
+
+ case V4L2_SEL_TGT_CROP_DEFAULT:
+ case V4L2_SEL_TGT_CROP_BOUNDS:
+ sel->r = imx283_active_area;
+ return 0;
+ default:
+ return -EINVAL;
+ }
+}
+
+static const struct v4l2_subdev_core_ops imx283_core_ops = {
+ .subscribe_event = v4l2_ctrl_subdev_subscribe_event,
+ .unsubscribe_event = v4l2_event_subdev_unsubscribe,
+};
+
+static const struct v4l2_subdev_video_ops imx283_video_ops = {
+ .s_stream = v4l2_subdev_s_stream_helper,
+};
+
+static const struct v4l2_subdev_pad_ops imx283_pad_ops = {
+ .enum_mbus_code = imx283_enum_mbus_code,
+ .get_fmt = v4l2_subdev_get_fmt,
+ .set_fmt = imx283_set_pad_format,
+ .get_selection = imx283_get_selection,
+ .enum_frame_size = imx283_enum_frame_size,
+ .enable_streams = imx283_enable_streams,
+ .disable_streams = imx283_disable_streams,
+};
+
+static const struct v4l2_subdev_internal_ops imx283_internal_ops = {
+ .init_state = imx283_init_state,
+};
+
+static const struct v4l2_subdev_ops imx283_subdev_ops = {
+ .core = &imx283_core_ops,
+ .video = &imx283_video_ops,
+ .pad = &imx283_pad_ops,
+};
+
+/* Initialize control handlers */
+static int imx283_init_controls(struct imx283 *imx283)
+{
+ struct v4l2_ctrl_handler *ctrl_hdlr;
+ struct v4l2_fwnode_device_properties props;
+ struct v4l2_ctrl *link_freq;
+ const struct imx283_mode *mode = &supported_modes_12bit[0];
+ u64 min_hblank, max_hblank, def_hblank;
+ u64 pixel_rate;
+ int ret;
+
+ ctrl_hdlr = &imx283->ctrl_handler;
+ ret = v4l2_ctrl_handler_init(ctrl_hdlr, 16);
+ if (ret)
+ return ret;
+
+ /*
+ * Create the controls here, but mode specific limits are setup
+ * in the imx283_set_framing_limits() call below.
+ */
+
+ /* By default, PIXEL_RATE is read only */
+ pixel_rate = imx283_pixel_rate(imx283, mode);
+ v4l2_ctrl_new_std(ctrl_hdlr, &imx283_ctrl_ops,
+ V4L2_CID_PIXEL_RATE, pixel_rate,
+ pixel_rate, 1, pixel_rate);
+
+ link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr, &imx283_ctrl_ops,
+ V4L2_CID_LINK_FREQ,
+ __fls(imx283->link_freq_bitmap),
+ __ffs(imx283->link_freq_bitmap),
+ link_frequencies);
+ if (link_freq)
+ link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
+
+ /* Initialise vblank/hblank/exposure based on the current mode. */
+ imx283->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &imx283_ctrl_ops,
+ V4L2_CID_VBLANK,
+ mode->min_vmax - mode->height,
+ IMX283_VMAX_MAX, 1,
+ mode->default_vmax - mode->height);
+
+ min_hblank = mode->min_hmax - mode->width;
+ max_hblank = imx283_iclk_to_pix(pixel_rate, IMX283_HMAX_MAX) - mode->width;
+ def_hblank = mode->default_hmax - mode->width;
+ imx283->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &imx283_ctrl_ops,
+ V4L2_CID_HBLANK, min_hblank, max_hblank,
+ 1, def_hblank);
+
+ imx283->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &imx283_ctrl_ops,
+ V4L2_CID_EXPOSURE,
+ IMX283_EXPOSURE_MIN,
+ IMX283_EXPOSURE_MAX,
+ IMX283_EXPOSURE_STEP,
+ IMX283_EXPOSURE_DEFAULT);
+
+ v4l2_ctrl_new_std(ctrl_hdlr, &imx283_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
+ IMX283_ANA_GAIN_MIN, IMX283_ANA_GAIN_MAX,
+ IMX283_ANA_GAIN_STEP, IMX283_ANA_GAIN_DEFAULT);
+
+ v4l2_ctrl_new_std(ctrl_hdlr, &imx283_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
+ IMX283_DGTL_GAIN_MIN, IMX283_DGTL_GAIN_MAX,
+ IMX283_DGTL_GAIN_STEP, IMX283_DGTL_GAIN_DEFAULT);
+
+ imx283->vflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx283_ctrl_ops, V4L2_CID_VFLIP,
+ 0, 1, 1, 0);
+ if (imx283->vflip)
+ imx283->vflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT;
+
+ v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &imx283_ctrl_ops,
+ V4L2_CID_TEST_PATTERN,
+ ARRAY_SIZE(imx283_tpg_menu) - 1,
+ 0, 0, imx283_tpg_menu);
+
+ if (ctrl_hdlr->error) {
+ ret = ctrl_hdlr->error;
+ dev_err(imx283->dev, "control init failed (%d)\n", ret);
+ goto error;
+ }
+
+ ret = v4l2_fwnode_device_parse(imx283->dev, &props);
+ if (ret)
+ goto error;
+
+ ret = v4l2_ctrl_new_fwnode_properties(ctrl_hdlr, &imx283_ctrl_ops,
+ &props);
+ if (ret)
+ goto error;
+
+ imx283->sd.ctrl_handler = ctrl_hdlr;
+
+ mutex_lock(imx283->ctrl_handler.lock);
+
+ /* Setup exposure and frame/line length limits. */
+ imx283_set_framing_limits(imx283, mode);
+
+ mutex_unlock(imx283->ctrl_handler.lock);
+
+ return 0;
+
+error:
+ v4l2_ctrl_handler_free(ctrl_hdlr);
+
+ return ret;
+}
+
+static int imx283_parse_endpoint(struct imx283 *imx283)
+{
+ struct fwnode_handle *fwnode;
+ struct v4l2_fwnode_endpoint bus_cfg = {
+ .bus_type = V4L2_MBUS_CSI2_DPHY
+ };
+ struct fwnode_handle *ep;
+ int ret;
+
+ fwnode = dev_fwnode(imx283->dev);
+ ep = fwnode_graph_get_next_endpoint(fwnode, NULL);
+ if (!ep) {
+ dev_err(imx283->dev, "Failed to get next endpoint\n");
+ return -ENXIO;
+ }
+
+ ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg);
+ fwnode_handle_put(ep);
+ if (ret)
+ return ret;
+
+ if (bus_cfg.bus.mipi_csi2.num_data_lanes != 4) {
+ dev_err(imx283->dev,
+ "number of CSI2 data lanes %d is not supported\n",
+ bus_cfg.bus.mipi_csi2.num_data_lanes);
+ ret = -EINVAL;
+ goto done_endpoint_free;
+ }
+
+ ret = v4l2_link_freq_to_bitmap(imx283->dev, bus_cfg.link_frequencies,
+ bus_cfg.nr_of_link_frequencies,
+ link_frequencies, ARRAY_SIZE(link_frequencies),
+ &imx283->link_freq_bitmap);
+
+done_endpoint_free:
+ v4l2_fwnode_endpoint_free(&bus_cfg);
+
+ return ret;
+};
+
+static int imx283_probe(struct i2c_client *client)
+{
+ struct imx283 *imx283;
+ unsigned int i;
+ unsigned int xclk_freq;
+ int ret;
+
+ imx283 = devm_kzalloc(&client->dev, sizeof(*imx283), GFP_KERNEL);
+ if (!imx283)
+ return -ENOMEM;
+
+ imx283->dev = &client->dev;
+
+ v4l2_i2c_subdev_init(&imx283->sd, client, &imx283_subdev_ops);
+
+ imx283->cci = devm_cci_regmap_init_i2c(client, 16);
+ if (IS_ERR(imx283->cci)) {
+ ret = PTR_ERR(imx283->cci);
+ dev_err(imx283->dev, "failed to initialize CCI: %d\n", ret);
+ return ret;
+ }
+
+ /* Get system clock (xclk) */
+ imx283->xclk = devm_clk_get(imx283->dev, NULL);
+ if (IS_ERR(imx283->xclk)) {
+ return dev_err_probe(imx283->dev, PTR_ERR(imx283->xclk),
+ "failed to get xclk\n");
+ }
+
+ xclk_freq = clk_get_rate(imx283->xclk);
+ for (i = 0; i < ARRAY_SIZE(imx283_frequencies); i++) {
+ if (xclk_freq == imx283_frequencies[i].mhz) {
+ imx283->freq = &imx283_frequencies[i];
+ break;
+ }
+ }
+ if (!imx283->freq) {
+ dev_err(imx283->dev, "xclk frequency unsupported: %d Hz\n", xclk_freq);
+ return -EINVAL;
+ }
+
+ ret = imx283_get_regulators(imx283);
+ if (ret) {
+ return dev_err_probe(imx283->dev, ret,
+ "failed to get regulators\n");
+ }
+
+ ret = imx283_parse_endpoint(imx283);
+ if (ret) {
+ dev_err(imx283->dev, "failed to parse endpoint configuration\n");
+ return ret;
+ }
+
+ /* Request optional enable pin */
+ imx283->reset_gpio = devm_gpiod_get_optional(imx283->dev, "reset",
+ GPIOD_OUT_LOW);
+ if (IS_ERR(imx283->reset_gpio))
+ return dev_err_probe(imx283->dev, PTR_ERR(imx283->reset_gpio),
+ "failed to get reset GPIO\n");
+
+ /*
+ * The sensor must be powered for imx283_identify_module()
+ * to be able to read the CHIP_ID register
+ */
+ ret = imx283_power_on(imx283);
+ if (ret)
+ return ret;
+
+ ret = imx283_identify_module(imx283);
+ if (ret)
+ goto error_power_off;
+
+ /*
+ * Enable runtime PM with autosuspend. As the device has been powered
+ * manually, mark it as active, and increase the usage count without
+ * resuming the device.
+ */
+ pm_runtime_set_active(imx283->dev);
+ pm_runtime_get_noresume(imx283->dev);
+ pm_runtime_enable(imx283->dev);
+ pm_runtime_set_autosuspend_delay(imx283->dev, 1000);
+ pm_runtime_use_autosuspend(imx283->dev);
+
+ /* This needs the pm runtime to be registered. */
+ ret = imx283_init_controls(imx283);
+ if (ret)
+ goto error_pm;
+
+ /* Initialize subdev */
+ imx283->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
+ V4L2_SUBDEV_FL_HAS_EVENTS;
+ imx283->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
+ imx283->sd.internal_ops = &imx283_internal_ops;
+
+ /* Initialize source pads */
+ imx283->pad.flags = MEDIA_PAD_FL_SOURCE;
+
+ ret = media_entity_pads_init(&imx283->sd.entity, 1, &imx283->pad);
+ if (ret) {
+ dev_err(imx283->dev, "failed to init entity pads: %d\n", ret);
+ goto error_handler_free;
+ }
+
+ imx283->sd.state_lock = imx283->ctrl_handler.lock;
+ ret = v4l2_subdev_init_finalize(&imx283->sd);
+ if (ret < 0) {
+ dev_err(imx283->dev, "subdev init error: %d\n", ret);
+ goto error_media_entity;
+ }
+
+ ret = v4l2_async_register_subdev_sensor(&imx283->sd);
+ if (ret < 0) {
+ dev_err(imx283->dev, "failed to register sensor sub-device: %d\n", ret);
+ goto error_subdev_cleanup;
+ }
+
+ /*
+ * Decrease the PM usage count. The device will get suspended after the
+ * autosuspend delay, turning the power off.
+ */
+ pm_runtime_mark_last_busy(imx283->dev);
+ pm_runtime_put_autosuspend(imx283->dev);
+
+ return 0;
+
+error_subdev_cleanup:
+ v4l2_subdev_cleanup(&imx283->sd);
+
+error_media_entity:
+ media_entity_cleanup(&imx283->sd.entity);
+
+error_handler_free:
+ v4l2_ctrl_handler_free(imx283->sd.ctrl_handler);
+
+error_pm:
+ pm_runtime_disable(imx283->dev);
+ pm_runtime_set_suspended(imx283->dev);
+error_power_off:
+ imx283_power_off(imx283);
+
+ return ret;
+}
+
+static void imx283_remove(struct i2c_client *client)
+{
+ struct v4l2_subdev *sd = i2c_get_clientdata(client);
+ struct imx283 *imx283 = to_imx283(sd);
+
+ v4l2_async_unregister_subdev(sd);
+ v4l2_subdev_cleanup(&imx283->sd);
+ media_entity_cleanup(&sd->entity);
+ v4l2_ctrl_handler_free(imx283->sd.ctrl_handler);
+
+ pm_runtime_disable(imx283->dev);
+ if (!pm_runtime_status_suspended(imx283->dev))
+ imx283_power_off(imx283);
+ pm_runtime_set_suspended(imx283->dev);
+}
+
+static DEFINE_RUNTIME_DEV_PM_OPS(imx283_pm_ops, imx283_runtime_suspend,
+ imx283_runtime_resume, NULL);
+
+static const struct of_device_id imx283_dt_ids[] = {
+ { .compatible = "sony,imx283" },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, imx283_dt_ids);
+
+static struct i2c_driver imx283_i2c_driver = {
+ .driver = {
+ .name = "imx283",
+ .pm = pm_ptr(&imx283_pm_ops),
+ .of_match_table = imx283_dt_ids,
+ },
+ .probe = imx283_probe,
+ .remove = imx283_remove,
+};
+module_i2c_driver(imx283_i2c_driver);
+
+MODULE_AUTHOR("Will Whang <will@willwhang.com>");
+MODULE_AUTHOR("Kieran Bingham <kieran.bingham@ideasonboard.com>");
+MODULE_AUTHOR("Umang Jain <umang.jain@ideasonboard.com>");
+MODULE_DESCRIPTION("Sony IMX283 Sensor Driver");
+MODULE_LICENSE("GPL");
--
2.43.0
^ permalink raw reply related
* [PATCH 1/3] media: dt-bindings: media: Add bindings for IMX283
From: Umang Jain @ 2024-04-02 8:29 UTC (permalink / raw)
To: Kieran Bingham, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
Sakari Ailus
Cc: linux-media, devicetree, linux-arm-kernel, linux-kernel,
Umang Jain, Rob Herring, Laurent Pinchart
In-Reply-To: <20240402-kernel-name-extraversion-v1-0-57bb38de841b@ideasonboard.com>
- Add dt-bindings documentation for Sony IMX283 sensor driver
- Add MAINTAINERS entry for Sony IMX283 binding documentation
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Umang Jain <umang.jain@ideasonboard.com>
---
| 107 +++++++++++++++++++++
MAINTAINERS | 8 ++
2 files changed, 115 insertions(+)
--git a/Documentation/devicetree/bindings/media/i2c/sony,imx283.yaml b/Documentation/devicetree/bindings/media/i2c/sony,imx283.yaml
new file mode 100644
index 000000000000..e4f49f1435a5
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/i2c/sony,imx283.yaml
@@ -0,0 +1,107 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (C) 2024 Ideas on Board Oy
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/i2c/sony,imx283.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Sony IMX283 Sensor
+
+maintainers:
+ - Kieran Bingham <kieran.bingham@ideasonboard.com>
+ - Umang Jain <umang.jain@ideasonboard.com>
+
+description:
+ IMX283 sensor is a Sony CMOS active pixel digital image sensor with an active
+ array size of 5472H x 3648V. It is programmable through I2C interface. The
+ I2C client address is fixed to 0x1a as per sensor data sheet. Image data is
+ sent through MIPI CSI-2.
+
+properties:
+ compatible:
+ const: sony,imx283
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ description: Clock frequency from 6 to 24 MHz.
+ maxItems: 1
+
+ vadd-supply:
+ description: Analog power supply (2.9V)
+
+ vdd1-supply:
+ description: Interface power supply (1.8V)
+
+ vdd2-supply:
+ description: Digital power supply (1.2V)
+
+ reset-gpios:
+ description: Sensor reset (XCLR) GPIO
+ maxItems: 1
+
+ port:
+ $ref: /schemas/graph.yaml#/$defs/port-base
+ additionalProperties: false
+
+ properties:
+ endpoint:
+ $ref: /schemas/media/video-interfaces.yaml#
+ unevaluatedProperties: false
+
+ properties:
+ data-lanes:
+ anyOf:
+ - items:
+ - const: 1
+ - const: 2
+ - const: 3
+ - const: 4
+
+ link-frequencies: true
+
+ required:
+ - data-lanes
+ - link-frequencies
+
+ required:
+ - endpoint
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - port
+
+additionalProperties: false
+
+examples:
+ - |
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ camera@1a {
+ compatible = "sony,imx283";
+ reg = <0x1a>;
+ clocks = <&imx283_clk>;
+
+ assigned-clocks = <&imx283_clk>;
+ assigned-clock-parents = <&imx283_clk_parent>;
+ assigned-clock-rates = <12000000>;
+
+ vadd-supply = <&camera_vadd_2v9>;
+ vdd1-supply = <&camera_vdd1_1v8>;
+ vdd2-supply = <&camera_vdd2_1v2>;
+
+ port {
+ imx283: endpoint {
+ remote-endpoint = <&cam>;
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <360000000>;
+ };
+ };
+ };
+ };
+...
diff --git a/MAINTAINERS b/MAINTAINERS
index 1a89e0d2ac61..a2e164131650 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -20367,6 +20367,14 @@ T: git git://linuxtv.org/media_tree.git
F: Documentation/devicetree/bindings/media/i2c/sony,imx274.yaml
F: drivers/media/i2c/imx274.c
+SONY IMX283 SENSOR DRIVER
+M: Kieran Bingham <kieran.bingham@ideasonboard.com>
+M: Umang Jain <umang.jain@ideasonboard.com>
+L: linux-media@vger.kernel.org
+S: Maintained
+T: git git://linuxtv.org/media_tree.git
+F: Documentation/devicetree/bindings/media/i2c/sony,imx283.yaml
+
SONY IMX290 SENSOR DRIVER
M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
L: linux-media@vger.kernel.org
--
2.43.0
^ permalink raw reply related
* [PATCH 0/3] media: i2c: Add imx283 camera sensor driver
From: Umang Jain @ 2024-04-02 8:29 UTC (permalink / raw)
To: Kieran Bingham, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
Sakari Ailus
Cc: linux-media, devicetree, linux-arm-kernel, linux-kernel,
Umang Jain, Rob Herring, Laurent Pinchart
Add a v4l2 subdevice driver for the Sony IMX283 image sensor.
The IMX283 is a 20MP Diagonal 15.86 mm (Type 1) CMOS Image Sensor with
Square Pixel for Color Cameras.
The following features are supported:
- Manual exposure an gain control support
- vblank/hblank/link freq control support
- Test pattern support control
- Arbitrary horizontal and vertical cropping
- Supported resolution:
- 5472x3648 @ 20fps (SRGGB12)
- 5472x3648 @ 25fps (SRGGB10)
- 2736x1824 @ 50fps (SRGGB12)
The driver is tested on mainline branch v6.8-rc2 on IMX8MP Debix-SOM-A.
Additional testing has been done on RPi5 with the downstream BSP.
Changes in v4:
- fix 32-bit build error around u64 divisions (use do_div)
- Fix hmax default and minimum values
Changes in v3:
- fix headers includes
- Improve #define(s) readability
- Drop __func__ from error logs
- Use HZ_PER_MHZ instead of MEGA
- mdsel* variables should be u8
- Use container_of_const() instead of container_of()
- Use clamp() used of clamp_t variant
- Use streams API imx283_{enable|disable}_streams (**NOTE**)
- Properly fix PM runtime handling
(pm_ptr(), DEFINE_RUNTIME_DEV_PM_OPS,
imx283_runtime_suspend, imx283_runtime_resume)
- Fix format modifiers, signed-ness at various places
changes in v2 (summary):
- Use u32 wherever possible
- Use MEGA macro instead of self defined MHZ() macro
- Properly refine regs using CCI
- Drop tracking of current mode. Shifted to infer from active state directly.
(Laurent's review)
- Cont. from above: Pass the struct imx283_mode to functions whereever required.
- Remove unused comments
- Remove custom mutex. Use control handler one instead.
- Drop imx283_reset_colorspace() and inline
- Set colorspace field properly (drop _DEFAULTS)
- Use __maybe_unused for imx283_power_on() and imx283_power_off()
- Store controls v4l2_ctrl handles for those required, not all.
- Drop imx283_free_controls(). Use v4l2_ctrl_handler_free
- fix reset-gpios handling and add it to DT schema
- fix data-lanes property in DT schema
- fix IMX283 Kconfig
- Remove unused macros
- Alphabetical case consistency
Signed-off-by: Umang Jain <umang.jain@ideasonboard.com>
---
Kieran Bingham (1):
media: i2c: Add imx283 camera sensor driver
Umang Jain (2):
media: dt-bindings: media: Add bindings for IMX283
fixups
.../devicetree/bindings/media/i2c/sony,imx283.yaml | 107 ++
MAINTAINERS | 9 +
drivers/media/i2c/Kconfig | 10 +
drivers/media/i2c/Makefile | 1 +
drivers/media/i2c/imx283.c | 1605 ++++++++++++++++++++
5 files changed, 1732 insertions(+)
---
base-commit: 54ee11761885407056f4ca60309739e2db6b02dc
change-id: 20240402-kernel-name-extraversion-2b08d441e08c
Best regards,
--
Umang Jain <umang.jain@ideasonboard.com>
^ permalink raw reply
* Re: [PATCH v7 6/6] spmi: pmic-arb: Add multi bus support
From: Neil Armstrong @ 2024-04-02 8:25 UTC (permalink / raw)
To: Abel Vesa, Stephen Boyd, Matthias Brugger, Bjorn Andersson,
Konrad Dybcio, Dmitry Baryshkov, AngeloGioacchino Del Regno,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: Srini Kandagatla, Johan Hovold, linux-kernel, linux-arm-kernel,
linux-arm-msm, linux-mediatek, devicetree
In-Reply-To: <20240329-spmi-multi-master-support-v7-6-7b902824246c@linaro.org>
Hi Abel,
On 29/03/2024 19:54, Abel Vesa wrote:
> Starting with HW version 7, there are actually two separate buses
> (with two separate sets of wires). So add support for the second bus.
> The first platform that needs this support for the second bus is the
> Qualcomm X1 Elite, so add the compatible for it as well.
>
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> ---
> drivers/spmi/spmi-pmic-arb.c | 138 +++++++++++++++++++++++++++++++++++++------
> 1 file changed, 120 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c
> index 19ff8665f3d9..56f2b3190d82 100644
> --- a/drivers/spmi/spmi-pmic-arb.c
> +++ b/drivers/spmi/spmi-pmic-arb.c
> @@ -13,6 +13,7 @@
> #include <linux/kernel.h>
> #include <linux/module.h>
> #include <linux/of.h>
> +#include <linux/of_address.h>
> #include <linux/of_irq.h>
> #include <linux/platform_device.h>
> #include <linux/slab.h>
> @@ -95,6 +96,8 @@ enum pmic_arb_channel {
> PMIC_ARB_CHANNEL_OBS,
> };
>
> +#define PMIC_ARB_MAX_BUSES 2
> +
> /* Maximum number of support PMIC peripherals */
> #define PMIC_ARB_MAX_PERIPHS 512
> #define PMIC_ARB_MAX_PERIPHS_V7 1024
> @@ -148,6 +151,7 @@ struct spmi_pmic_arb;
> * @min_apid: minimum APID (used for bounding IRQ search)
> * @max_apid: maximum APID
> * @irq: PMIC ARB interrupt.
> + * @id: unique ID of the bus
> */
> struct spmi_pmic_arb_bus {
> struct spmi_pmic_arb *pmic_arb;
> @@ -165,6 +169,7 @@ struct spmi_pmic_arb_bus {
> u16 min_apid;
> u16 max_apid;
> int irq;
> + u8 id;
> };
>
> /**
> @@ -179,7 +184,8 @@ struct spmi_pmic_arb_bus {
> * @ee: the current Execution Environment
> * @ver_ops: version dependent operations.
> * @max_periphs: Number of elements in apid_data[]
> - * @bus: per arbiter bus instance
> + * @buses: per arbiter buses instances
> + * @buses_available: number of buses registered
> */
> struct spmi_pmic_arb {
> void __iomem *rd_base;
> @@ -191,7 +197,8 @@ struct spmi_pmic_arb {
> u8 ee;
> const struct pmic_arb_ver_ops *ver_ops;
> int max_periphs;
> - struct spmi_pmic_arb_bus *bus;
> + struct spmi_pmic_arb_bus *buses[PMIC_ARB_MAX_BUSES];
> + int buses_available;
> };
>
> /**
> @@ -219,7 +226,7 @@ struct spmi_pmic_arb {
> struct pmic_arb_ver_ops {
> const char *ver_str;
> int (*get_core_resources)(struct platform_device *pdev, void __iomem *core);
> - int (*init_apid)(struct spmi_pmic_arb_bus *bus);
> + int (*init_apid)(struct spmi_pmic_arb_bus *bus, int index);
> int (*ppid_to_apid)(struct spmi_pmic_arb_bus *bus, u16 ppid);
> /* spmi commands (read_cmd, write_cmd, cmd) functionality */
> int (*offset)(struct spmi_pmic_arb_bus *bus, u8 sid, u16 addr,
> @@ -308,8 +315,8 @@ static int pmic_arb_wait_for_done(struct spmi_controller *ctrl,
> }
>
> if (status & PMIC_ARB_STATUS_FAILURE) {
> - dev_err(&ctrl->dev, "%s: %#x %#x: transaction failed (%#x)\n",
> - __func__, sid, addr, status);
> + dev_err(&ctrl->dev, "%s: %#x %#x: transaction failed (%#x) reg: 0x%x\n",
> + __func__, sid, addr, status, offset);
> WARN_ON(1);
> return -EIO;
> }
> @@ -325,8 +332,8 @@ static int pmic_arb_wait_for_done(struct spmi_controller *ctrl,
> udelay(1);
> }
>
> - dev_err(&ctrl->dev, "%s: %#x %#x: timeout, status %#x\n",
> - __func__, sid, addr, status);
> + dev_err(&ctrl->dev, "%s: %#x %#x %#x: timeout, status %#x\n",
> + __func__, bus->id, sid, addr, status);
> return -ETIMEDOUT;
> }
>
> @@ -1005,11 +1012,17 @@ static int pmic_arb_get_core_resources_v1(struct platform_device *pdev,
> return 0;
> }
>
> -static int pmic_arb_init_apid_v1(struct spmi_pmic_arb_bus *bus)
> +static int pmic_arb_init_apid_v1(struct spmi_pmic_arb_bus *bus, int index)
> {
> struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> u32 *mapping_table;
>
> + if (index) {
> + dev_err(&bus->spmic->dev, "Unsupported buses count %d detected\n",
> + index);
> + return -EINVAL;
> + }
Shouldn't be here
> +
> mapping_table = devm_kcalloc(&bus->spmic->dev, pmic_arb->max_periphs,
> sizeof(*mapping_table), GFP_KERNEL);
> if (!mapping_table)
> @@ -1252,11 +1265,17 @@ static int pmic_arb_offset_v2(struct spmi_pmic_arb_bus *bus, u8 sid, u16 addr,
> return 0x1000 * pmic_arb->ee + 0x8000 * apid;
> }
>
> -static int pmic_arb_init_apid_v5(struct spmi_pmic_arb_bus *bus)
> +static int pmic_arb_init_apid_v5(struct spmi_pmic_arb_bus *bus, int index)
> {
> struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> int ret;
>
> + if (index) {
> + dev_err(&bus->spmic->dev, "Unsupported buses count %d detected\n",
> + index);
> + return -EINVAL;
> + }
Shouldn't be here
> +
> bus->base_apid = 0;
> bus->apid_count = readl_relaxed(pmic_arb->core + PMIC_ARB_FEATURES) &
> PMIC_ARB_FEATURES_PERIPH_MASK;
> @@ -1328,6 +1347,50 @@ static int pmic_arb_get_core_resources_v7(struct platform_device *pdev,
> return pmic_arb_get_obsrvr_chnls_v2(pdev);
> }
>
> +/*
> + * Only v7 supports 2 buses. Each bus will get a different apid count, read
> + * from different registers.
> + */
> +static int pmic_arb_init_apid_v7(struct spmi_pmic_arb_bus *bus, int index)
> +{
> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> + int ret;
> +
> + if (index == 0) {
> + bus->base_apid = 0;
> + bus->apid_count = readl_relaxed(pmic_arb->core + PMIC_ARB_FEATURES) &
> + PMIC_ARB_FEATURES_PERIPH_MASK;
> + } else if (index == 1) {
> + bus->base_apid = readl_relaxed(pmic_arb->core + PMIC_ARB_FEATURES) &
> + PMIC_ARB_FEATURES_PERIPH_MASK;
> + bus->apid_count = readl_relaxed(pmic_arb->core + PMIC_ARB_FEATURES1) &
> + PMIC_ARB_FEATURES_PERIPH_MASK;
> + } else {
> + dev_err(&bus->spmic->dev, "Unsupported buses count %d detected\n",
> + bus->id);
> + return -EINVAL;
> + }
> +
> + if (bus->base_apid + bus->apid_count > pmic_arb->max_periphs) {
> + dev_err(&bus->spmic->dev, "Unsupported APID count %d detected\n",
> + bus->base_apid + bus->apid_count);
> + return -EINVAL;
> + }
> +
> + ret = pmic_arb_init_apid_min_max(bus);
> + if (ret)
> + return ret;
> +
> + ret = pmic_arb_read_apid_map_v5(bus);
> + if (ret) {
> + dev_err(&bus->spmic->dev, "could not read APID->PPID mapping table, rc= %d\n",
> + ret);
> + return ret;
> + }
> +
> + return 0;
> +}
Shouldn't be here
> +
> /*
> * v7 offset per ee and per apid for observer channels and per apid for
> * read/write channels.
> @@ -1580,7 +1643,7 @@ static const struct pmic_arb_ver_ops pmic_arb_v5 = {
> static const struct pmic_arb_ver_ops pmic_arb_v7 = {
> .ver_str = "v7",
> .get_core_resources = pmic_arb_get_core_resources_v7,
> - .init_apid = pmic_arb_init_apid_v5,
> + .init_apid = pmic_arb_init_apid_v7,
Shouldn't be here
> .ppid_to_apid = pmic_arb_ppid_to_apid_v5,
> .non_data_cmd = pmic_arb_non_data_cmd_v2,
> .offset = pmic_arb_offset_v7,
> @@ -1604,6 +1667,7 @@ static int spmi_pmic_arb_bus_init(struct platform_device *pdev,
> struct device_node *node,
> struct spmi_pmic_arb *pmic_arb)
> {
> + int bus_index = pmic_arb->buses_available;
> struct spmi_pmic_arb_bus *bus;
> struct device *dev = &pdev->dev;
> struct spmi_controller *ctrl;
> @@ -1622,7 +1686,7 @@ static int spmi_pmic_arb_bus_init(struct platform_device *pdev,
>
> bus = spmi_controller_get_drvdata(ctrl);
>
> - pmic_arb->bus = bus;
> + pmic_arb->buses[bus_index] = bus;
>
> bus->ppid_to_apid = devm_kcalloc(dev, PMIC_ARB_MAX_PPID,
> sizeof(*bus->ppid_to_apid),
> @@ -1665,12 +1729,13 @@ static int spmi_pmic_arb_bus_init(struct platform_device *pdev,
> bus->cnfg = cnfg;
> bus->irq = irq;
> bus->spmic = ctrl;
> + bus->id = bus_index;
>
> - ret = pmic_arb->ver_ops->init_apid(bus);
> + ret = pmic_arb->ver_ops->init_apid(bus, bus_index);
> if (ret)
> return ret;
>
> - dev_dbg(&pdev->dev, "adding irq domain\n");
> + dev_dbg(&pdev->dev, "adding irq domain for bus %d\n", bus_index);
>
> bus->domain = irq_domain_add_tree(dev->of_node,
> &pmic_arb_irq_domain_ops, bus);
> @@ -1683,14 +1748,53 @@ static int spmi_pmic_arb_bus_init(struct platform_device *pdev,
> pmic_arb_chained_irq, bus);
>
> ctrl->dev.of_node = node;
> + dev_set_name(&ctrl->dev, "spmi-%d", bus_index);
>
> ret = devm_spmi_controller_add(dev, ctrl);
> if (ret)
> return ret;
>
> + pmic_arb->buses_available++;
> +
> return 0;
> }
>
> +static int spmi_pmic_arb_register_buses(struct spmi_pmic_arb *pmic_arb,
> + struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct device_node *node = dev->of_node;
> + struct device_node *child;
> + int ret;
> +
> + /* legacy mode doesn't provide child node for the bus */
> + if (of_device_is_compatible(node, "qcom,spmi-pmic-arb"))
> + return spmi_pmic_arb_bus_init(pdev, node, pmic_arb);
> +
> + for_each_available_child_of_node(node, child) {
> + if (of_node_name_eq(child, "spmi")) {
> + ret = spmi_pmic_arb_bus_init(pdev, child, pmic_arb);
> + if (ret)
> + return ret;
> + }
> + }
> +
> + return ret;
> +}
> +
> +static void spmi_pmic_arb_deregister_buses(struct spmi_pmic_arb *pmic_arb)
> +{
> + int i;
> +
> + for (i = 0; i < PMIC_ARB_MAX_BUSES; i++) {
> + struct spmi_pmic_arb_bus *bus = pmic_arb->buses[i];
> +
> + irq_set_chained_handler_and_data(bus->irq,
> + NULL, NULL);
> + irq_domain_remove(bus->domain);
> + }
> +}
> +
> static int spmi_pmic_arb_probe(struct platform_device *pdev)
> {
> struct spmi_pmic_arb *pmic_arb;
> @@ -1761,21 +1865,19 @@ static int spmi_pmic_arb_probe(struct platform_device *pdev)
>
> pmic_arb->ee = ee;
>
> - return spmi_pmic_arb_bus_init(pdev, dev->of_node, pmic_arb);
> + return spmi_pmic_arb_register_buses(pmic_arb, pdev);
> }
>
> static void spmi_pmic_arb_remove(struct platform_device *pdev)
> {
> struct spmi_pmic_arb *pmic_arb = platform_get_drvdata(pdev);
> - struct spmi_pmic_arb_bus *bus = pmic_arb->bus;
>
> - irq_set_chained_handler_and_data(bus->irq,
> - NULL, NULL);
> - irq_domain_remove(bus->domain);
> + spmi_pmic_arb_deregister_buses(pmic_arb);
> }
>
> static const struct of_device_id spmi_pmic_arb_match_table[] = {
> { .compatible = "qcom,spmi-pmic-arb", },
> + { .compatible = "qcom,x1e80100-spmi-pmic-arb", },
> {},
> };
> MODULE_DEVICE_TABLE(of, spmi_pmic_arb_match_table);
>
With issues fixed, it looks fine.
Thanks,
Neil
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