* Re: [PATCH 2/5] iio: adc: Add ti-ads1262 driver
From: Krzysztof Kozlowski @ 2026-06-13 18:59 UTC (permalink / raw)
To: Kurt Borja
Cc: Jonathan Cameron, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Linus Walleij, Bartosz Golaszewski, David Lechner, Nuno Sá,
Andy Shevchenko, linux-iio, devicetree, linux-kernel, linux-gpio
In-Reply-To: <20260612-ads126x-v1-2-894c788d03ed@gmail.com>
On Fri, Jun 12, 2026 at 05:46:20PM -0500, Kurt Borja wrote:
> +
> + val = FIELD_PREP(ADS1262_IDACMAG_MAG1_MASK, idac_mags[0]);
> + val |= FIELD_PREP(ADS1262_IDACMAG_MAG2_MASK, idac_mags[1]);
> +
> + return regmap_update_bits(st->regmap, ADS1262_IDACMAG_REG,
> + ADS1262_IDACMAG_MAG1_MASK |
> + ADS1262_IDACMAG_MAG2_MASK, val);
> +}
> +
> +static int ads1262_gpio_setup(struct ads1262 *st)
> +{
> + struct device *dev = &st->spi->dev;
> + struct gpio_desc *gpiod;
> + const char *con_id;
> +
> + con_id = "start";
Nope, see further
> + gpiod = devm_gpiod_get_optional(dev, con_id, GPIOD_OUT_LOW);
> + if (IS_ERR(gpiod))
> + return dev_err_probe(dev, PTR_ERR(gpiod),
> + "Failed to get %s GPIO\n", con_id);
> + st->start_gpiod = gpiod;
> +
> + con_id = "reset";
Nope
> + gpiod = devm_gpiod_get_optional(dev, con_id, GPIOD_OUT_HIGH);
> + if (IS_ERR(gpiod))
> + return dev_err_probe(dev, PTR_ERR(gpiod),
> + "Failed to get %s GPIO\n", con_id);
> + st->reset_gpiod = gpiod;
> +
> + return 0;
> +}
> +
> +static int ads1262_clk_setup(struct ads1262 *st)
> +{
> + struct device *dev = &st->spi->dev;
> + struct clk *clk;
> + int ret;
> +
> + clk = devm_clk_get_optional_enabled(dev, NULL);
> + if (IS_ERR(clk))
> + return dev_err_probe(dev, PTR_ERR(clk),
> + "Failed to get external clock\n");
> +
> + /*
> + * The nominal clock frequency as indicated by the datasheet is
> + * 7372800.
> + */
> + ret = clk_set_rate(clk, 7372800);
> + if (ret)
> + return dev_err_probe(dev, PTR_ERR(clk),
> + "Failed to set the nominal clock frequency.\n");
> +
> + return 0;
> +}
> +
> +static int ads1262_regulator_setup(struct ads1262 *st)
> +{
> + struct device *dev = &st->spi->dev;
> + const char *reg_id, *prop;
> + u32 mux[2] = {};
> + int val, ret;
> +
> + reg_id = "dvdd";
> + ret = devm_regulator_get_enable(dev, reg_id);
> + if (ret)
> + goto err_regulator_get;
> +
> + reg_id = "avdd";
Nope.
> + ret = devm_regulator_get_enable(dev, reg_id);
> + if (ret)
> + goto err_regulator_get;
> +
> + prop = "ti,neg-refmux";
> + device_property_read_u32(dev, prop, &mux[0]);
> + if (mux[0] >= ADS1262_RMUX_COUNT)
> + return dev_err_probe(dev, -ENXIO, " %s out of range\n", prop);
> +
> + prop = "ti,pos-refmux";
Don't do such syntax. You make git grep unnecesssary difficult.
> + device_property_read_u32(dev, prop, &mux[1]);
And this shows in `git grep` as completely pointless code.
> + if (mux[1] >= ADS1262_RMUX_COUNT)
> + return dev_err_probe(dev, -ENXIO, " %s out of range\n", prop);
> +
> + if (mux[0] == ADS1262_RMUX_INTER && mux[1] == ADS1262_RMUX_INTER) {
> + /* The internal voltage reference is 2.5 V */
> + st->vref_uV = 2500000;
> + return 0;
> + }
> +
> + val = FIELD_PREP(ADS1262_REFMUX_RMUXN_MASK, mux[0]);
> + val |= FIELD_PREP(ADS1262_REFMUX_RMUXP_MASK, mux[1]);
> + ret = regmap_update_bits(st->regmap, ADS1262_REFMUX_REG,
> + ADS1262_REFMUX_RMUXN_MASK |
> + ADS1262_REFMUX_RMUXP_MASK, val);
> + if (ret)
> + return ret;
> +
> + reg_id = "vref";
Nope.
> + st->vref_uV = devm_regulator_get_enable_read_voltage(dev, reg_id);
> + if (st->vref_uV < 0)
> + goto err_regulator_get;
> +
> + return 0;
> +
> +err_regulator_get:
> + return dev_err_probe(dev, ret, "Failed to get regulator %s\n", reg_id);
> +}
> +
Functions used by probe() should be before probe(), not somewhere in the
middle of the code. IOW, entire probe is together.
...
> + return devm_iio_device_register(dev, indio_dev);
> +}
> +
> +static int ads1262_runtime_suspend(struct device *dev)
> +{
> + struct ads1262 *st = dev_get_drvdata(dev);
> +
> + if (!st->reset_gpiod)
> + return 0;
> +
> + regcache_cache_only(st->regmap, true);
> +
> + return ads1262_dev_power_off(st);
> +}
> +
> +static int ads1262_runtime_resume(struct device *dev)
> +{
> + struct ads1262 *st = dev_get_drvdata(dev);
> + int ret;
> +
> + if (!st->reset_gpiod)
> + return 0;
> +
> + ret = ads1262_dev_power_on(st);
> + if (ret)
> + return ret;
> +
> + regcache_cache_only(st->regmap, false);
> + regcache_mark_dirty(st->regmap);
> +
> + return regcache_sync(st->regmap);
> +}
> +
> +DEFINE_RUNTIME_DEV_PM_OPS(ads1262_runtime_pm, ads1262_runtime_suspend,
> + ads1262_runtime_resume, NULL);
> +
> +static const struct of_device_id ads1262_of_match[] = {
> + { .compatible = "ti,ads1262" },
> + { .compatible = "ti,ads1263" },
So devices are fully compatible? Then it should be expressed in the
binding and drop one entry here.
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH 1/5] dt-bindings: iio: adc: Add TI ADS126x ADC family
From: Krzysztof Kozlowski @ 2026-06-13 18:54 UTC (permalink / raw)
To: Kurt Borja
Cc: Jonathan Cameron, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Linus Walleij, Bartosz Golaszewski, David Lechner, Nuno Sá,
Andy Shevchenko, linux-iio, devicetree, linux-kernel, linux-gpio
In-Reply-To: <20260612-ads126x-v1-1-894c788d03ed@gmail.com>
On Fri, Jun 12, 2026 at 05:46:19PM -0500, Kurt Borja wrote:
> + ti,neg-refmux:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: |
> + Selects the negative voltage reference input:
> + 0: Internal 2.5 V reference
> + 1: AIN1 pin
> + 2: AIN3 pin
> + 3: AIN5 pin
> + 4: AVSS pin
> + minimum: 0
> + maximum: 4
> + default: 0
> +
> + ti,vbias:
> + $ref: /schemas/types.yaml#/definitions/flag
> + description: Enables the level-shift voltage on the AINCOM pin.
> + default: false
There is no such syntax, drop.
> +
> + ti,idac1-pin:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: |
> + Selects the analog input pin to connect IDAC1:
> + 0: AIN0
> + 1: AIN1
> + 2: AIN2
> + 3: AIN3
> + 4: AIN4
> + 5: AIN5
> + 6: AIN6
> + 7: AIN7
> + 8: AIN8
> + 9: AIN9
> + 10: AINCOM
> + 11: No Connection
> + minimum: 0
> + maximum: 11
> + default: 11
> +
> + ti,idac1-microamp:
> + description: Selects the current values of IDAC1.
> + enum: [0, 50, 100, 250, 500, 750, 1000, 1500, 2000, 2500, 3000]
> + default: 0
> +
> + ti,idac2-pin:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: |
> + Selects the analog input pin to connect IDAC2:
> + 0: AIN0
> + 1: AIN1
> + 2: AIN2
> + 3: AIN3
> + 4: AIN4
> + 5: AIN5
> + 6: AIN6
> + 7: AIN7
> + 8: AIN8
> + 9: AIN9
> + 10: AINCOM
> + 11: No Connection
> + minimum: 0
> + maximum: 11
> + default: 11
> +
> + ti,idac2-microamp:
> + description: Selects the current values of IDAC2.
> + enum: [0, 50, 100, 250, 500, 750, 1000, 1500, 2000, 2500, 3000]
> + default: 0
> +
> + clocks:
> + maxItems: 1
> +
> + '#io-channel-cells':
> + const: 1
> +
> + '#gpio-cells':
> + const: 2
> +
> + gpio-controller: true
> +
> + adc:
> + $ref: /schemas/iio/adc/ti,ads1263-adc2.yaml#
Not a separate device node. Fold into the parent... or explain in
commit msg. You have entire commit msg to explain odd things.
In that binding description you call it "independent", so it should have
its own SPI chip select? Why "independent" and part of this binding?
Maybe not independent, so basically part of this device?
> +
> +required:
> + - compatible
> + - reg
> + - avdd-supply
> + - dvdd-supply
> + - '#address-cells'
> + - '#size-cells'
> +
> +unevaluatedProperties: false
> +
> +patternProperties:
patternProps always follow properties. Please open example-schema for
template.
> + "^channel@[0-9]+$":
> + $ref: /schemas/iio/adc/adc.yaml#
> + additionalProperties: false
> +
> + properties:
> + reg:
> + maxItems: 1
> +
> + diff-channels:
> + description: |
> + Selects the analog input configuration for this channel. The first
> + value is the positive input and the second is the negative input.
> + The following values are available:
> + 0: AIN0 pin
> + 1: AIN1 pin
> + 2: AIN2 pin
> + 3: AIN3 pin
> + 4: AIN4 pin
> + 5: AIN5 pin
> + 6: AIN6 pin
> + 7: AIN7 pin
> + 8: AIN8 pin
> + 9: AIN9 pin
> + 10: AINCOM pin
> + 11: Temperature sensor monitor
> + 12: Analog power supply monitor
> + 13: Digital power supply monitor
> + 14: TDAC test signal
> + 15: Float (open connection)
> + items:
> + minimum: 0
> + maximum: 15
> +
> + ti,chop-mode:
> + $ref: /schemas/types.yaml#/definitions/flag
> + description:
> + When enabled, the ADC performs two internal conversions to cancel the
> + input offset voltage. The first conversion is taken with normal input
> + polarity. The ADC reverses the internal input polarity for the second
> + conversion. The difference of the two conversions is computed to yield
> + the final corrected result with the offset voltage removed.
> + default: false
> +
> + ti,idac-rotation-mode:
> + $ref: /schemas/types.yaml#/definitions/flag
> + description:
> + The rotation mode automatically swaps the IDAC1 and IDAC2 connections
> + of alternate conversions. The ADC averages the alternate conversions
> + to eliminate IDAC mismatch.
> + default: false
> +
> + ti,pga-bypass:
> + $ref: /schemas/types.yaml#/definitions/flag
> + description: Bypass the Programmable Gain Amplifier (PGA).
> + default: false
> +
> + ti,rev-vref-pol:
> + $ref: /schemas/types.yaml#/definitions/flag
> + description:
> + The reference polarity can be negative, but the ADC requires a
> + positive voltage reference. In this case, the reference
> + polarity-reversal switch changes the reference polarity from negative
> + to positive.
> + default: false
> +
> + ti,sbias-connection:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: |
> + Selects the sensor bias current source connection:
> + 0: Sensor bias connected to ADC1 mux out
> + 1: Sensor bias connected to ADC2 mux out
Use string enum.
> + minimum: 0
> + maximum: 1
> + default: 0
> +
> + ti,sbias-polarity:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: |
> + Selects the sensor bias current source polarity:
> + 0: Sensor bias pull-up
> + 1: Sensor bias pull-down
> + minimum: 0
> + maximum: 1
> + default: 0
Use string enum.
> +
> + ti,sbias-magnitude:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: |
> + Selects the sensor bias magnitude:
> + 0: No sensor bias current or resistor
> + 1: 0.5-uA sensor bias current
> + 2: 2-uA sensor bias current
> + 3: 10-uA sensor bias current
> + 4: 50-uA sensor bias current
> + 5: 200-uA sensor bias current
> + 6: 10-Mohm resistor
> + minimum: 0
> + maximum: 6
> + default: 0
> +
> + required:
> + - reg
> +
> +allOf:
> + - $ref: /schemas/spi/spi-peripheral-props.yaml#
> +
> +examples:
> + - |
> + #include <dt-bindings/gpio/gpio.h>
> +
> + spi {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + adc@0 {
> + compatible = "ti,ads1263";
> + reg = <0>;
> + spi-max-frequency = <8000000>;
> + spi-cpha;
> + avdd-supply = <&avdd>;
> + dvdd-supply = <&dvdd>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + reset-gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
> +
> + /* AINP: 0 - AINN: AINCOM */
> + channel@0 {
> + reg = <0>;
> + diff-channels = <0x0 0xA>;
> + };
> +
> + /* Temperature sensor monitor */
> + channel@1 {
> + reg = <1>;
> + diff-channels = <0xB 0xB>;
> + };
> +
> + adc {
> + compatible = "ti,ads1263-adc2";
Heavily incomplete... Drop the sub node.
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH net-next v5 4/4] net: dsa: initial support for MT7628 embedded switch
From: Daniel Golle @ 2026-06-13 18:52 UTC (permalink / raw)
To: Joris Vaisvila
Cc: netdev, horms, pabeni, kuba, edumazet, davem, olteanv,
Andrew Lunn, devicetree, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Arınç ÜNAL, Landen Chao,
DENG Qingfang, Sean Wang
In-Reply-To: <20260613181845.111877-5-joey@tinyisr.com>
On Sat, Jun 13, 2026 at 09:18:45PM +0300, Joris Vaisvila wrote:
> Add support for the MT7628 embedded switch.
>
> The switch has 5 built-in 100Mbps user ports (ports 0-4) and one 1Gbps
> port that is internally attached to the SoCs CPU MAC and serves as the
> CPU port.
>
> The switch hardware has a very limited 16 entry VLAN table. Configuring
> VLANs is the only way to control switch forwarding. Currently 6 entries
> are used by tag_8021q to isolate the ports. Double tag feature is
> enabled to force the switch to append the VLAN tag even if the incoming
> packet is already tagged, this simulates VLAN-unaware functionality and
> simplifies the tagger implementation.
>
> Signed-off-by: Joris Vaisvila <joey@tinyisr.com>
> [...]
> diff --git a/drivers/net/dsa/mt7628.c b/drivers/net/dsa/mt7628.c
> new file mode 100644
> index 000000000000..cedf063ad749
> --- /dev/null
> +++ b/drivers/net/dsa/mt7628.c
> [...]
> +
> +static const struct regmap_config mt7628_esw_regmap_cfg = {
> + .name = "mt7628-esw",
> + .reg_bits = 32,
> + .val_bits = 32,
> + .reg_stride = 4,
> + .fast_io = true,
> + .reg_format_endian = REGMAP_ENDIAN_LITTLE,
> + .val_format_endian = REGMAP_ENDIAN_LITTLE,
> +};
> +
> +struct mt7628_vlan {
> + bool active;
> + u8 members;
> + u8 untag;
> + u16 vid;
> +};
> +
> +struct mt7628_esw {
> + void __iomem *base;
Why even keep *base here if actual access all happens via the
regmap created for it?
Other than that lgtm
Reviewed-by: Daniel Golle <daniel@makrotopia.org>
^ permalink raw reply
* Re: [PATCH net-next v5 3/4] net: dsa: initial MT7628 tagging driver
From: Daniel Golle @ 2026-06-13 18:49 UTC (permalink / raw)
To: Joris Vaisvila
Cc: netdev, horms, pabeni, kuba, edumazet, davem, olteanv,
Andrew Lunn, devicetree, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Arınç ÜNAL, Landen Chao,
DENG Qingfang, Sean Wang
In-Reply-To: <20260613181845.111877-4-joey@tinyisr.com>
On Sat, Jun 13, 2026 at 09:18:44PM +0300, Joris Vaisvila wrote:
> Add support for the MT7628 embedded switch's tag.
>
> The MT7628 tag is merged with the VLAN TPID field when a VLAN is
> appended by the switch hardware. It is not installed if the VLAN tag is
> already there on ingress. Due to this hardware quirk the tag cannot be
> trusted for port 0 if we don't know that the VLAN was added by the
> hardware. As a workaround for this the switch is configured to always
> append the port PVID tag even if the incoming packet is already tagged.
> The tagging driver can then trust that the tag is always accurate and
> the whole VLAN tag can be removed on ingress as it's only metadata for
> the tagger.
>
> On egress the MT7628 tag allows precise TX, but the correct VLAN tag
> from tag_8021q is still appended or the switch will not forward the
> packet.
>
> Signed-off-by: Joris Vaisvila <joey@tinyisr.com>
> Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Daniel Golle <daniel@makrotopia.org>
^ permalink raw reply
* Re: [PATCH net-next v5 2/4] net: phy: mediatek: add phy driver for MT7628 built-in Fast Ethernet PHYs
From: Daniel Golle @ 2026-06-13 18:49 UTC (permalink / raw)
To: Joris Vaisvila
Cc: netdev, horms, pabeni, kuba, edumazet, davem, olteanv,
Andrew Lunn, devicetree, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Arınç ÜNAL, Landen Chao,
DENG Qingfang, Sean Wang
In-Reply-To: <20260613181845.111877-3-joey@tinyisr.com>
On Sat, Jun 13, 2026 at 09:18:43PM +0300, Joris Vaisvila wrote:
> The Fast Ethernet PHYs present in the MT7628 SoCs require an
> undocumented bit to be set before they can establish 100mbps links.
>
> This commit adds the Kconfig option MEDIATEK_FE_SOC_PHY and the
> corresponding driver mtk-fe-soc.c.
>
> Signed-off-by: Joris Vaisvila <joey@tinyisr.com>
> Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Daniel Golle <daniel@makrotopia.org>
> [...]
> diff --git a/drivers/net/phy/mediatek/mtk-fe-soc.c b/drivers/net/phy/mediatek/mtk-fe-soc.c
> new file mode 100644
> index 000000000000..9eb4960bcaad
> --- /dev/null
> +++ b/drivers/net/phy/mediatek/mtk-fe-soc.c
> @@ -0,0 +1,50 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Driver for MT7628 Embedded Switch internal Fast Ethernet PHYs
> + */
> +#include <linux/module.h>
> +#include <linux/phy.h>
> +
> +#define MTK_FPHY_ID_MT7628 0x03a29410
> +#define MTK_EXT_PAGE_ACCESS 0x1f
> +
> +static int mt7628_phy_read_page(struct phy_device *phydev)
> +{
> + return __phy_read(phydev, MTK_EXT_PAGE_ACCESS);
> +}
> +
> +static int mt7628_phy_write_page(struct phy_device *phydev, int page)
> +{
> + return __phy_write(phydev, MTK_EXT_PAGE_ACCESS, page);
> +}
> +
> +static int mt7628_phy_config_init(struct phy_device *phydev)
> +{
> + /*
> + * This undocumented bit is required for the PHYs to be able to
> + * establish 100mbps links.
> + */
> + return phy_modify_paged(phydev, 0x8000, 30, BIT(13), BIT(13));
As there is only that single use I don't think it justifies introducing
a phy_set_bits_paged helper just for that, but that's my opinion...
^ permalink raw reply
* Re: [PATCH] ASoC: dt-bindings: Fix RT5677 "realtek,gpio-config" type
From: Krzysztof Kozlowski @ 2026-06-13 18:44 UTC (permalink / raw)
To: Rob Herring (Arm)
Cc: Liam Girdwood, Mark Brown, Krzysztof Kozlowski, Conor Dooley,
Animesh Agarwal, linux-sound, devicetree, linux-kernel
In-Reply-To: <20260612214911.1883234-1-robh@kernel.org>
On Fri, Jun 12, 2026 at 04:49:11PM -0500, Rob Herring (Arm) wrote:
> "realtek,gpio-config" is described as six 8-bit GPIO configuration
> values, and the RT5677 driver stores and reads those values as bytes.
> The binding incorrectly documented the property as a uint32 array.
>
> Document "realtek,gpio-config" as a uint8-array so the generated
> schema matches the hardware definition and the existing driver helper.
>
> Assisted-by: Codex:gpt-5-5
> Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
> ---
> Documentation/devicetree/bindings/sound/realtek,rt5677.yaml | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH v1 4/4] media: qcom: jpeg: Add Qualcomm JPEG V4L2 encoder
From: Krzysztof Kozlowski @ 2026-06-13 18:43 UTC (permalink / raw)
To: Atanas Filipov
Cc: linux-media, mchehab, bod, robh, krzk+dt, conor+dt, andersson,
konradybcio, linux-arm-msm, devicetree, linux-kernel
In-Reply-To: <20260612194417.1737009-5-atanas.filipov@oss.qualcomm.com>
On Fri, Jun 12, 2026 at 10:44:17PM +0300, Atanas Filipov wrote:
> Add a Qualcomm JPEG encoder driver implemented on top of the
> V4L2 mem2mem framework.
>
> The driver wires vb2 queue handling, format negotiation, JPEG header
> handling, interrupt-driven job completion, and runtime PM/clock/ICC
> integration for the standalone JPEG encode hardware block.
>
> Initial support in this series targets SM8250, QCM6490, and SM8550
> class platforms.
>
> Signed-off-by: Atanas Filipov <atanas.filipov@oss.qualcomm.com>
> ---
> drivers/media/platform/qcom/Kconfig | 1 +
> drivers/media/platform/qcom/Makefile | 1 +
> drivers/media/platform/qcom/jpeg/Kconfig | 18 +
> drivers/media/platform/qcom/jpeg/Makefile | 9 +
> .../media/platform/qcom/jpeg/qcom_jenc_defs.h | 244 +++
> .../media/platform/qcom/jpeg/qcom_jenc_dev.c | 336 ++++
> .../media/platform/qcom/jpeg/qcom_jenc_dev.h | 107 ++
> .../media/platform/qcom/jpeg/qcom_jenc_hdr.c | 360 ++++
> .../media/platform/qcom/jpeg/qcom_jenc_hdr.h | 119 ++
> .../media/platform/qcom/jpeg/qcom_jenc_ops.c | 1658 +++++++++++++++++
> .../media/platform/qcom/jpeg/qcom_jenc_ops.h | 52 +
> .../media/platform/qcom/jpeg/qcom_jenc_res.c | 226 +++
> .../media/platform/qcom/jpeg/qcom_jenc_res.h | 54 +
> .../qcom/jpeg/qcom_jenc_v420_hw_info.h | 529 ++++++
> .../media/platform/qcom/jpeg/qcom_jenc_v4l2.c | 1109 +++++++++++
> .../media/platform/qcom/jpeg/qcom_jenc_v4l2.h | 25 +
> 16 files changed, 4848 insertions(+)
> create mode 100644 drivers/media/platform/qcom/jpeg/Kconfig
> create mode 100644 drivers/media/platform/qcom/jpeg/Makefile
> create mode 100644 drivers/media/platform/qcom/jpeg/qcom_jenc_defs.h
> create mode 100644 drivers/media/platform/qcom/jpeg/qcom_jenc_dev.c
> create mode 100644 drivers/media/platform/qcom/jpeg/qcom_jenc_dev.h
> create mode 100644 drivers/media/platform/qcom/jpeg/qcom_jenc_hdr.c
> create mode 100644 drivers/media/platform/qcom/jpeg/qcom_jenc_hdr.h
> create mode 100644 drivers/media/platform/qcom/jpeg/qcom_jenc_ops.c
> create mode 100644 drivers/media/platform/qcom/jpeg/qcom_jenc_ops.h
> create mode 100644 drivers/media/platform/qcom/jpeg/qcom_jenc_res.c
> create mode 100644 drivers/media/platform/qcom/jpeg/qcom_jenc_res.h
> create mode 100644 drivers/media/platform/qcom/jpeg/qcom_jenc_v420_hw_info.h
> create mode 100644 drivers/media/platform/qcom/jpeg/qcom_jenc_v4l2.c
> create mode 100644 drivers/media/platform/qcom/jpeg/qcom_jenc_v4l2.h
>
> diff --git a/drivers/media/platform/qcom/Kconfig b/drivers/media/platform/qcom/Kconfig
> index 4f4d3a68e6e5..f33d53a754a0 100644
> --- a/drivers/media/platform/qcom/Kconfig
> +++ b/drivers/media/platform/qcom/Kconfig
> @@ -5,3 +5,4 @@ comment "Qualcomm media platform drivers"
> source "drivers/media/platform/qcom/camss/Kconfig"
> source "drivers/media/platform/qcom/iris/Kconfig"
> source "drivers/media/platform/qcom/venus/Kconfig"
> +source "drivers/media/platform/qcom/jpeg/Kconfig"
> diff --git a/drivers/media/platform/qcom/Makefile b/drivers/media/platform/qcom/Makefile
> index ea2221a202c0..30c94949e9de 100644
> --- a/drivers/media/platform/qcom/Makefile
> +++ b/drivers/media/platform/qcom/Makefile
> @@ -2,3 +2,4 @@
> obj-y += camss/
> obj-y += iris/
> obj-y += venus/
> +obj-y += jpeg/
Same comments.
It seems you ignored entire v1 review and just ask us to do the same
work twice.
NAK, please address review you received.
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH v1 1/4] dt-bindings: media: qcom: Add JPEG encoder binding
From: Krzysztof Kozlowski @ 2026-06-13 18:42 UTC (permalink / raw)
To: Atanas Filipov
Cc: linux-media, mchehab, bod, robh, krzk+dt, conor+dt, andersson,
konradybcio, linux-arm-msm, devicetree, linux-kernel
In-Reply-To: <20260612194417.1737009-2-atanas.filipov@oss.qualcomm.com>
On Fri, Jun 12, 2026 at 10:44:14PM +0300, Atanas Filipov wrote:
> Add device-tree binding for the standalone Qualcomm JPEG encoder
> hardware block (separate from CAMSS media pipelines).
>
> Document required resources briefly and scope initial support to
> currently used compatibles in this series, including SM8250,
> QCM6490, and SM8550 class platforms.
>
> Signed-off-by: Atanas Filipov <atanas.filipov@oss.qualcomm.com>
> ---
> .../bindings/media/qcom,jpeg-encoder.yaml | 142 ++++++++++++++++++
You already sent v1 and you received review. Quite a lot of comments.
Please do not send duplicated work, but address the feedback.
Then version your patches correctly, so the toolset will work. Sending
duplicated work is not making the review easy. I am dropping this from
DT patchwork.
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH 1/4] dt-bindings: phy: qcom,qusb2: Straighten out SM6125 and MSM8996
From: Krzysztof Kozlowski @ 2026-06-13 18:36 UTC (permalink / raw)
To: Konrad Dybcio
Cc: Vinod Koul, Neil Armstrong, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Wesley Cheng, Iskren Chernev, Greg Kroah-Hartman,
Bjorn Andersson, linux-arm-msm, linux-phy, devicetree,
linux-kernel, Konrad Dybcio
In-Reply-To: <20260610-topic-8996_61x5_qusb2phy-v1-1-d7135980e78f@oss.qualcomm.com>
On Wed, Jun 10, 2026 at 02:04:14PM +0200, Konrad Dybcio wrote:
> From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>
> SM6125 DT currently uses just the MSM8996 compatible (without a primary
> SM6125-specific one). This is not only wrong for the reasons of
> violating guidelines, but also happens to not be valid.
>
> The MSM8996 PHY is quite similar, although it requies a different init
> sequence (for arch reasons). MSM8996 also needs different power
> plumbing, as the VDD supply is fed through VDD_MX (which we define as
> a power domain rather than a regulator), unlike on SM6125.
>
> The init sequence seems to have been "good enough", but now that the
> bindings clearly diverge, add a new compatible for SM6125 with a SM6115
> fallback (as they seem to be an exact match from the SW interface POV).
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> ---
> .../devicetree/bindings/phy/qcom,qusb2-phy.yaml | 31 ++++++++++++++++++++--
> 1 file changed, 29 insertions(+), 2 deletions(-)
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH v2 3/3] dt-bindings: perf: marvell: add CN20K TAD PMU support
From: Krzysztof Kozlowski @ 2026-06-13 18:29 UTC (permalink / raw)
To: Geetha sowjanya
Cc: linux-perf-users, linux-kernel, linux-arm-kernel, devicetree,
mark.rutland, will, krzk+dt
In-Reply-To: <20260612095746.19679-4-gakula@marvell.com>
On Fri, Jun 12, 2026 at 03:27:46PM +0530, Geetha sowjanya wrote:
> Marvell CN20K SoCs integrate a Performance Monitoring Unit (PMU)
> associated with the LLC Tag-and-Data (TAD) blocks. The PMU provides
> hardware counters to monitor cache traffic and performance events
> via a dedicated MMIO region.
>
> The CN20K LLC-TAD PMU is largely similar to CN10K, but differs in the
> layout of PFC/PRF register offsets relative to each TAD base. These
> offsets are derived from the compatible string in the driver and are
> not described through Devicetree properties.
>
> Because of this, using "marvell,cn10k-tad-pmu" as a fallback for CN20K
> would result in incorrect register programming. Therefore, add a
> separate compatible string:
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH v4 1/2] arm: dts: st: align node patterns with established convention
From: Krzysztof Kozlowski @ 2026-06-13 18:26 UTC (permalink / raw)
To: sashiko-reviews; +Cc: Charan Pedumuru, conor+dt, devicetree, robh
In-Reply-To: <20260613094844.EEA7D1F000E9@smtp.kernel.org>
On Sat, Jun 13, 2026 at 09:48:44AM +0000, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [High] Renaming 'sdhci@...' nodes to 'mmc@...' in the base dtsi file leaves overrides in derived dtsi and dts files orphaned, causing node duplication and completely breaking MMC functionality.
How many times Sashiko needs to provide the same feedback before you
address it?
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH v4 1/2] arm: dts: st: align node patterns with established convention
From: Krzysztof Kozlowski @ 2026-06-13 18:25 UTC (permalink / raw)
To: Charan Pedumuru
Cc: Ulf Hansson, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Peter Griffin, Patrice Chotard, linux-mmc, devicetree,
linux-kernel, linux-arm-kernel
In-Reply-To: <20260613-wondrous-shapeless-pelican-6b927d@quoll>
On 13/06/2026 20:23, Krzysztof Kozlowski wrote:
> On Sat, Jun 13, 2026 at 09:39:39AM +0000, Charan Pedumuru wrote:
>> Update ST MMC DTS node patterns to match established convention.
>>
>> Signed-off-by: Charan Pedumuru <charan.pedumuru@gmail.com>
>> ---
>> arch/arm/boot/dts/st/stih407-family.dtsi | 4 ++--
>
> Thanks, but please fix all the files of stih in one commit, not file by
> file. git grep gives more instances of it.
>
Heh, no it isn't only that. You actually broke other users! And you
received that comment already at v3 which you completely ignored.
This looks like introducing real bugs.
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH v4 1/2] arm: dts: st: align node patterns with established convention
From: Krzysztof Kozlowski @ 2026-06-13 18:23 UTC (permalink / raw)
To: Charan Pedumuru
Cc: Ulf Hansson, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Peter Griffin, Patrice Chotard, linux-mmc, devicetree,
linux-kernel, linux-arm-kernel
In-Reply-To: <20260613-st-mmc-v4-1-b3c385617c16@gmail.com>
On Sat, Jun 13, 2026 at 09:39:39AM +0000, Charan Pedumuru wrote:
> Update ST MMC DTS node patterns to match established convention.
>
> Signed-off-by: Charan Pedumuru <charan.pedumuru@gmail.com>
> ---
> arch/arm/boot/dts/st/stih407-family.dtsi | 4 ++--
Thanks, but please fix all the files of stih in one commit, not file by
file. git grep gives more instances of it.
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/st/stih407-family.dtsi b/arch/arm/boot/dts/st/stih407-family.dtsi
> index 3e6a0542e3ae..08acba209c56 100644
> --- a/arch/arm/boot/dts/st/stih407-family.dtsi
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH v10 4/6] dt-bindings: sun6i-a31-mipi-dphy: Add V3s SoC compatible entry
From: Krzysztof Kozlowski @ 2026-06-13 18:22 UTC (permalink / raw)
To: Paul Kocialkowski
Cc: linux-media, devicetree, linux-arm-kernel, linux-sunxi,
linux-kernel, Yong Deng, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Chen-Yu Tsai, Jernej Skrabec,
Samuel Holland, Michael Turquette, Stephen Boyd, Brian Masney,
Maxime Ripard
In-Reply-To: <20260613152655.212490-5-paulk@sys-base.io>
On Sat, Jun 13, 2026 at 05:26:53PM +0200, Paul Kocialkowski wrote:
> The V3s/V3/S3 comes with a rx-only D-PHY paired with the MIPI CSI-2
> controller. It is compatible with the D-PHY found on the A31.
>
> Add an entry with a new compatible and the A31 compatible as fallback.
>
> Signed-off-by: Paul Kocialkowski <paulk@sys-base.io>
> ---
> .../devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml
> index 6a4fd4929959..3ca1a1c47032 100644
> --- a/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml
> +++ b/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml
> @@ -21,6 +21,9 @@ properties:
> - items:
> - const: allwinner,sun50i-a64-mipi-dphy
> - const: allwinner,sun6i-a31-mipi-dphy
> + - items:
> + - const: allwinner,sun8i-v3s-mipi-dphy
So that's enum with previous first entry (50i-a64) - same fallback.
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH v10 1/6] dt-bindings: sun8i-v3s-ccu: Export MBUS and DRAM clocks to the public header
From: Krzysztof Kozlowski @ 2026-06-13 18:20 UTC (permalink / raw)
To: Paul Kocialkowski
Cc: linux-media, devicetree, linux-arm-kernel, linux-sunxi,
linux-kernel, Yong Deng, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Chen-Yu Tsai, Jernej Skrabec,
Samuel Holland, Michael Turquette, Stephen Boyd, Brian Masney,
Maxime Ripard
In-Reply-To: <20260613152655.212490-2-paulk@sys-base.io>
On Sat, Jun 13, 2026 at 05:26:50PM +0200, Paul Kocialkowski wrote:
> In order to declare a mbus node for the V3s, expose its associated
> clocks to the public header.
>
> Signed-off-by: Paul Kocialkowski <paulk@sys-base.io>
> ---
> include/dt-bindings/clock/sun8i-v3s-ccu.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Best regards,
Krzysztof
^ permalink raw reply
* [PATCH net-next v5 4/4] net: dsa: initial support for MT7628 embedded switch
From: Joris Vaisvila @ 2026-06-13 18:18 UTC (permalink / raw)
To: netdev
Cc: horms, pabeni, kuba, edumazet, davem, olteanv, Andrew Lunn,
devicetree, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Arınç ÜNAL, Landen Chao, DENG Qingfang, Sean Wang,
Daniel Golle, Joris Vaisvila
In-Reply-To: <20260613181845.111877-1-joey@tinyisr.com>
Add support for the MT7628 embedded switch.
The switch has 5 built-in 100Mbps user ports (ports 0-4) and one 1Gbps
port that is internally attached to the SoCs CPU MAC and serves as the
CPU port.
The switch hardware has a very limited 16 entry VLAN table. Configuring
VLANs is the only way to control switch forwarding. Currently 6 entries
are used by tag_8021q to isolate the ports. Double tag feature is
enabled to force the switch to append the VLAN tag even if the incoming
packet is already tagged, this simulates VLAN-unaware functionality and
simplifies the tagger implementation.
Signed-off-by: Joris Vaisvila <joey@tinyisr.com>
---
drivers/net/dsa/Kconfig | 8 +
drivers/net/dsa/Makefile | 1 +
drivers/net/dsa/mt7628.c | 649 +++++++++++++++++++++++++++++++++++++++
3 files changed, 658 insertions(+)
create mode 100644 drivers/net/dsa/mt7628.c
diff --git a/drivers/net/dsa/Kconfig b/drivers/net/dsa/Kconfig
index 4ab567c5bbaf..daa1d3d4ba60 100644
--- a/drivers/net/dsa/Kconfig
+++ b/drivers/net/dsa/Kconfig
@@ -63,6 +63,14 @@ config NET_DSA_MT7530_MMIO
are directly mapped into the SoCs register space rather than being
accessible via MDIO.
+config NET_DSA_MT7628
+ tristate "MediaTek MT7628 Embedded Ethernet switch support"
+ select NET_DSA_TAG_MT7628
+ select MEDIATEK_FE_SOC_PHY
+ help
+ This enables support for the built-in Ethernet switch found
+ in the MT7628 SoC.
+
config NET_DSA_MV88E6060
tristate "Marvell 88E6060 ethernet switch chip support"
select NET_DSA_TAG_TRAILER
diff --git a/drivers/net/dsa/Makefile b/drivers/net/dsa/Makefile
index d2975badffc0..6ceb78a755d7 100644
--- a/drivers/net/dsa/Makefile
+++ b/drivers/net/dsa/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_NET_DSA_KS8995) += ks8995.o
obj-$(CONFIG_NET_DSA_MT7530) += mt7530.o
obj-$(CONFIG_NET_DSA_MT7530_MDIO) += mt7530-mdio.o
obj-$(CONFIG_NET_DSA_MT7530_MMIO) += mt7530-mmio.o
+obj-$(CONFIG_NET_DSA_MT7628) += mt7628.o
obj-$(CONFIG_NET_DSA_MV88E6060) += mv88e6060.o
obj-$(CONFIG_NET_DSA_RZN1_A5PSW) += rzn1_a5psw.o
obj-$(CONFIG_NET_DSA_SMSC_LAN9303) += lan9303-core.o
diff --git a/drivers/net/dsa/mt7628.c b/drivers/net/dsa/mt7628.c
new file mode 100644
index 000000000000..cedf063ad749
--- /dev/null
+++ b/drivers/net/dsa/mt7628.c
@@ -0,0 +1,649 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Mediatek MT7628 Embedded Switch (ESW) DSA driver
+ * Copyright (C) 2026 Joris Vaisvila <joey@tinyisr.com>
+ *
+ * Portions derived from OpenWRT esw_rt3050 driver:
+ * Copyright (C) 2009-2015 John Crispin <blogic@openwrt.org>
+ * Copyright (C) 2009-2015 Felix Fietkau <nbd@nbd.name>
+ * Copyright (C) 2013-2015 Michael Lee <igvtee@gmail.com>
+ * Copyright (C) 2016 Vittorio Gambaletta <openwrt@vittgam.net>
+ */
+
+#include <linux/platform_device.h>
+#include <linux/etherdevice.h>
+#include <linux/netdevice.h>
+#include <linux/dsa/8021q.h>
+#include <linux/if_bridge.h>
+#include <linux/module.h>
+#include <linux/mdio.h>
+#include <linux/of.h>
+#include <linux/of_mdio.h>
+#include <linux/of_net.h>
+#include <linux/kernel.h>
+#include <linux/regmap.h>
+#include <linux/reset.h>
+#include <net/dsa.h>
+
+#define MT7628_ESW_REG_IMR 0x04
+#define MT7628_ESW_REG_FCT0 0x08
+#define MT7628_ESW_REG_PFC1 0x14
+#define MT7628_ESW_REG_PVIDC(port) (0x40 + 4 * ((port) / 2))
+#define MT7628_ESW_REG_VLANI(vlan) (0x50 + 4 * ((vlan) / 2))
+#define MT7628_ESW_REG_VMSC(vlan) (0x70 + 4 * ((vlan) / 4))
+#define MT7628_ESW_REG_VUB(vlan) (0x100 + 4 * ((vlan) / 4))
+#define MT7628_ESW_REG_SOCPC 0x8c
+#define MT7628_ESW_REG_POC0 0x90
+#define MT7628_ESW_REG_POC2 0x98
+#define MT7628_ESW_REG_SGC 0x9c
+#define MT7628_ESW_REG_PCR0 0xc0
+#define MT7628_ESW_REG_PCR1 0xc4
+#define MT7628_ESW_REG_FPA2 0xc8
+#define MT7628_ESW_REG_FCT2 0xcc
+#define MT7628_ESW_REG_SGC2 0xe4
+
+#define MT7628_ESW_FCT0_DROP_SET_TH GENMASK(7, 0)
+#define MT7628_ESW_FCT0_DROP_RLS_TH GENMASK(15, 8)
+#define MT7628_ESW_FCT0_FC_SET_TH GENMASK(23, 16)
+#define MT7628_ESW_FCT0_FC_RLS_TH GENMASK(31, 24)
+
+#define MT7628_ESW_PFC1_EN_VLAN GENMASK(22, 16)
+
+#define MT7628_ESW_PVID_S 12
+#define MT7628_ESW_PVID_M GENMASK(11, 0)
+#define MT7628_ESW_PVID_SHIFT(port) \
+ (MT7628_ESW_PVID_S * ((port) % 2))
+#define MT7628_ESW_PVID_MASK(port) \
+ (MT7628_ESW_PVID_M << MT7628_ESW_PVID_SHIFT(port))
+#define MT7628_ESW_PVID_PREP(port, pvid) \
+ (((pvid) & MT7628_ESW_PVID_M) << MT7628_ESW_PVID_SHIFT(port))
+
+#define MT7628_ESW_VID_S 12
+#define MT7628_ESW_VID_M GENMASK(11, 0)
+#define MT7628_ESW_VID_SHIFT(vlan) \
+ (MT7628_ESW_VID_S * ((vlan) % 2))
+#define MT7628_ESW_VID_MASK(vlan) \
+ (MT7628_ESW_VID_M << MT7628_ESW_VID_SHIFT(vlan))
+#define MT7628_ESW_VID_PREP(vlan, vid) \
+ (((vid) & MT7628_ESW_VID_M) << MT7628_ESW_VID_SHIFT(vlan))
+
+#define MT7628_ESW_VMSC_S 8
+#define MT7628_ESW_VMSC_M GENMASK(7, 0)
+#define MT7628_ESW_VMSC_SHIFT(vlan) \
+ (MT7628_ESW_VMSC_S * ((vlan) % 4))
+#define MT7628_ESW_VMSC_MASK(vlan) \
+ (MT7628_ESW_VMSC_M << MT7628_ESW_VMSC_SHIFT(vlan))
+#define MT7628_ESW_VMSC_PREP(vlan, vmsc) \
+ (((vmsc) & MT7628_ESW_VMSC_M) << MT7628_ESW_VMSC_SHIFT(vlan))
+
+#define MT7628_ESW_VUB_S 7
+#define MT7628_ESW_VUB_M GENMASK(6, 0)
+#define MT7628_ESW_VUB_SHIFT(vlan) \
+ (MT7628_ESW_VUB_S * ((vlan) % 4))
+#define MT7628_ESW_VUB_MASK(vlan) \
+ (MT7628_ESW_VUB_M << MT7628_ESW_VUB_SHIFT(vlan))
+#define MT7628_ESW_VUB_PREP(vlan, vub) \
+ (((vub) & MT7628_ESW_VUB_M) << MT7628_ESW_VUB_SHIFT(vlan))
+
+#define MT7628_ESW_SOCPC_CRC_PADDING BIT(25)
+#define MT7628_ESW_SOCPC_DISBC2CPU GENMASK(22, 16)
+#define MT7628_ESW_SOCPC_DISMC2CPU GENMASK(14, 8)
+#define MT7628_ESW_SOCPC_DISUN2CPU GENMASK(6, 0)
+
+#define MT7628_ESW_POC0_PORT_DISABLE GENMASK(29, 23)
+
+#define MT7628_ESW_POC2_PER_VLAN_UNTAG_EN BIT(15)
+
+#define MT7628_ESW_SGC_AGING_INTERVAL GENMASK(3, 0)
+#define MT7628_ESW_BC_STORM_PROT GENMASK(5, 4)
+#define MT7628_ESW_PKT_MAX_LEN GENMASK(7, 6)
+#define MT7628_ESW_DIS_PKT_ABORT BIT(8)
+#define MT7628_ESW_ADDRESS_HASH_ALG GENMASK(10, 9)
+#define MT7628_ESW_DISABLE_TX_BACKOFF BIT(11)
+#define MT7628_ESW_BP_JAM_CNT GENMASK(15, 12)
+#define MT7628_ESW_DISMIIPORT_WASTX GENMASK(17, 16)
+#define MT7628_ESW_BP_MODE GENMASK(19, 18)
+#define MT7628_ESW_BISH_DIS BIT(20)
+#define MT7628_ESW_BISH_TH GENMASK(22, 21)
+#define MT7628_ESW_LED_FLASH_TIME GENMASK(24, 23)
+#define MT7628_ESW_RMC_RULE GENMASK(26, 25)
+#define MT7628_ESW_IP_MULT_RULE GENMASK(28, 27)
+#define MT7628_ESW_LEN_ERR_CHK BIT(29)
+#define MT7628_ESW_BKOFF_ALG BIT(30)
+
+#define MT7628_ESW_PCR0_WT_NWAY_DATA GENMASK(31, 16)
+#define MT7628_ESW_PCR0_RD_PHY_CMD BIT(14)
+#define MT7628_ESW_PCR0_WT_PHY_CMD BIT(13)
+#define MT7628_ESW_PCR0_CPU_PHY_REG GENMASK(12, 8)
+#define MT7628_ESW_PCR0_CPU_PHY_ADDR GENMASK(4, 0)
+
+#define MT7628_ESW_PCR1_RD_DATA GENMASK(31, 16)
+#define MT7628_ESW_PCR1_RD_DONE BIT(1)
+#define MT7628_ESW_PCR1_WT_DONE BIT(0)
+
+#define MT7628_ESW_FPA2_AP_EN BIT(29)
+#define MT7628_ESW_FPA2_EXT_PHY_ADDR_BASE GENMASK(28, 24)
+#define MT7628_ESW_FPA2_FORCE_RGMII_LINK1 BIT(13)
+#define MT7628_ESW_FPA2_FORCE_RGMII_EN1 BIT(11)
+
+#define MT7628_ESW_FCT2_MUST_DROP_RLS_TH GENMASK(17, 13)
+#define MT7628_ESW_FCT2_MUST_DROP_SET_TH GENMASK(12, 8)
+#define MT7628_ESW_FCT2_MC_PER_PORT_TH GENMASK(5, 0)
+
+#define MT7628_ESW_SGC2_SPECIAL_TAG_EN BIT(23)
+#define MT7628_ESW_SGC2_TX_CPU_TPID_BIT_MAP GENMASK(22, 16)
+#define MT7628_ESW_SGC2_DOUBLE_TAG_EN GENMASK(6, 0)
+
+#define MT7628_ESW_PORTS_NOCPU GENMASK(5, 0)
+#define MT7628_ESW_PORTS_CPU BIT(6)
+#define MT7628_ESW_PORTS_ALL GENMASK(6, 0)
+
+#define MT7628_ESW_NUM_PORTS 7
+#define MT7628_NUM_VLANS 16
+
+static const struct regmap_config mt7628_esw_regmap_cfg = {
+ .name = "mt7628-esw",
+ .reg_bits = 32,
+ .val_bits = 32,
+ .reg_stride = 4,
+ .fast_io = true,
+ .reg_format_endian = REGMAP_ENDIAN_LITTLE,
+ .val_format_endian = REGMAP_ENDIAN_LITTLE,
+};
+
+struct mt7628_vlan {
+ bool active;
+ u8 members;
+ u8 untag;
+ u16 vid;
+};
+
+struct mt7628_esw {
+ void __iomem *base;
+ struct reset_control *rst_ephy;
+ struct reset_control *rst_esw;
+ struct regmap *regmap;
+ struct dsa_switch *ds;
+ u16 tag_8021q_pvid[MT7628_ESW_NUM_PORTS];
+ struct mt7628_vlan vlans[MT7628_NUM_VLANS];
+ struct device *dev;
+};
+
+static int mt7628_mii_read(struct mii_bus *bus, int port, int regnum)
+{
+ struct mt7628_esw *esw = bus->priv;
+ int ret;
+ u32 val;
+
+ /*
+ * RD_DONE bit is read to clear. Read PCR1 once to acknowledge any
+ * stale completion indicator before starting a new transaction.
+ */
+ ret = regmap_read(esw->regmap, MT7628_ESW_REG_PCR1, &val);
+ if (ret)
+ goto out;
+
+ ret = regmap_write(esw->regmap, MT7628_ESW_REG_PCR0,
+ FIELD_PREP(MT7628_ESW_PCR0_CPU_PHY_REG,
+ regnum) |
+ FIELD_PREP(MT7628_ESW_PCR0_CPU_PHY_ADDR,
+ port) | MT7628_ESW_PCR0_RD_PHY_CMD);
+ if (ret)
+ goto out;
+
+ ret = regmap_read_poll_timeout(esw->regmap, MT7628_ESW_REG_PCR1, val,
+ (val & MT7628_ESW_PCR1_RD_DONE), 10,
+ 5000);
+ if (ret)
+ goto out;
+
+ return FIELD_GET(MT7628_ESW_PCR1_RD_DATA, val);
+
+out:
+ dev_err(&bus->dev, "read failed. MDIO timeout?\n");
+ return ret;
+}
+
+static int mt7628_mii_write(struct mii_bus *bus, int port, int regnum, u16 dat)
+{
+ struct mt7628_esw *esw = bus->priv;
+ u32 val;
+ int ret;
+
+ /*
+ * WT_DONE bit is read to clear. Read PCR1 once to acknowledge any
+ * stale completion indicator before starting a new transaction.
+ */
+ ret = regmap_read(esw->regmap, MT7628_ESW_REG_PCR1, &val);
+ if (ret)
+ goto out;
+
+ ret = regmap_write(esw->regmap, MT7628_ESW_REG_PCR0,
+ FIELD_PREP(MT7628_ESW_PCR0_WT_NWAY_DATA, dat) |
+ FIELD_PREP(MT7628_ESW_PCR0_CPU_PHY_REG,
+ regnum) |
+ FIELD_PREP(MT7628_ESW_PCR0_CPU_PHY_ADDR,
+ port) | MT7628_ESW_PCR0_WT_PHY_CMD);
+ if (ret)
+ goto out;
+
+ ret = regmap_read_poll_timeout(esw->regmap, MT7628_ESW_REG_PCR1, val,
+ (val & MT7628_ESW_PCR1_WT_DONE), 10,
+ 5000);
+ if (ret)
+ goto out;
+
+ return 0;
+
+out:
+ dev_err(&bus->dev, "write failed. MDIO timeout?\n");
+ return ret;
+}
+
+static int mt7628_setup_internal_mdio(struct dsa_switch *ds)
+{
+ struct mt7628_esw *esw = ds->priv;
+ struct device *dev = ds->dev;
+ struct mii_bus *bus;
+
+ bus = devm_mdiobus_alloc(dev);
+ if (!bus)
+ return -ENOMEM;
+
+ bus->name = "MT7628 internal MDIO bus";
+ snprintf(bus->id, MII_BUS_ID_SIZE, "%s-mii", dev_name(dev));
+ bus->priv = esw;
+ bus->read = mt7628_mii_read;
+ bus->write = mt7628_mii_write;
+ bus->parent = dev;
+
+ ds->user_mii_bus = bus;
+ bus->phy_mask = ~ds->phys_mii_mask;
+
+ return devm_mdiobus_register(dev, bus);
+}
+
+static void mt7628_switch_init(struct dsa_switch *ds)
+{
+ struct mt7628_esw *esw = ds->priv;
+
+ regmap_write(esw->regmap, MT7628_ESW_REG_FCT0,
+ FIELD_PREP(MT7628_ESW_FCT0_DROP_SET_TH, 0x50) |
+ FIELD_PREP(MT7628_ESW_FCT0_DROP_RLS_TH, 0x78) |
+ FIELD_PREP(MT7628_ESW_FCT0_FC_SET_TH, 0xa0) |
+ FIELD_PREP(MT7628_ESW_FCT0_FC_RLS_TH, 0xc8));
+
+ regmap_write(esw->regmap, MT7628_ESW_REG_FCT2,
+ FIELD_PREP(MT7628_ESW_FCT2_MC_PER_PORT_TH, 0xc) |
+ FIELD_PREP(MT7628_ESW_FCT2_MUST_DROP_SET_TH, 0x10) |
+ FIELD_PREP(MT7628_ESW_FCT2_MUST_DROP_RLS_TH, 0x12));
+
+ /*
+ * general switch configuration:
+ * 300s aging interval
+ * broadcast storm prevention disabled
+ * max packet length 1536 bytes
+ * disable collision 16 packet abort and late collision abort
+ * use xor48 for address hashing
+ * disable tx backoff
+ * 10 packet back pressure jam
+ * disable was_transmit
+ * jam until BP condition released
+ * 30ms LED flash
+ * rmc tb fault to all ports
+ * unmatched IGMP as broadcast
+ */
+ regmap_write(esw->regmap, MT7628_ESW_REG_SGC,
+ FIELD_PREP(MT7628_ESW_SGC_AGING_INTERVAL, 1) |
+ FIELD_PREP(MT7628_ESW_BC_STORM_PROT, 0) |
+ FIELD_PREP(MT7628_ESW_PKT_MAX_LEN, 0) |
+ MT7628_ESW_DIS_PKT_ABORT |
+ FIELD_PREP(MT7628_ESW_ADDRESS_HASH_ALG, 1) |
+ MT7628_ESW_DISABLE_TX_BACKOFF |
+ FIELD_PREP(MT7628_ESW_BP_JAM_CNT, 10) |
+ FIELD_PREP(MT7628_ESW_DISMIIPORT_WASTX, 0) |
+ FIELD_PREP(MT7628_ESW_BP_MODE, 0b10) |
+ FIELD_PREP(MT7628_ESW_LED_FLASH_TIME, 0) |
+ FIELD_PREP(MT7628_ESW_RMC_RULE, 0) |
+ FIELD_PREP(MT7628_ESW_IP_MULT_RULE, 0));
+
+ regmap_write(esw->regmap, MT7628_ESW_REG_SOCPC,
+ MT7628_ESW_SOCPC_CRC_PADDING |
+ FIELD_PREP(MT7628_ESW_SOCPC_DISUN2CPU,
+ MT7628_ESW_PORTS_CPU) |
+ FIELD_PREP(MT7628_ESW_SOCPC_DISMC2CPU,
+ MT7628_ESW_PORTS_CPU) |
+ FIELD_PREP(MT7628_ESW_SOCPC_DISBC2CPU,
+ MT7628_ESW_PORTS_CPU));
+
+ regmap_set_bits(esw->regmap, MT7628_ESW_REG_FPA2,
+ MT7628_ESW_FPA2_FORCE_RGMII_EN1 |
+ MT7628_ESW_FPA2_FORCE_RGMII_LINK1 |
+ MT7628_ESW_FPA2_AP_EN);
+
+ regmap_update_bits(esw->regmap, MT7628_ESW_REG_FPA2,
+ MT7628_ESW_FPA2_EXT_PHY_ADDR_BASE,
+ FIELD_PREP(MT7628_ESW_FPA2_EXT_PHY_ADDR_BASE, 31));
+
+ /* disable all interrupts */
+ regmap_write(esw->regmap, MT7628_ESW_REG_IMR, 0);
+
+ /* enable MT7628 DSA tag on CPU port */
+ regmap_write(esw->regmap, MT7628_ESW_REG_SGC2,
+ MT7628_ESW_SGC2_SPECIAL_TAG_EN |
+ FIELD_PREP(MT7628_ESW_SGC2_TX_CPU_TPID_BIT_MAP,
+ MT7628_ESW_PORTS_CPU));
+
+ /*
+ * Double tag feature allows switch to always append the port PVID VLAN tag
+ * regardless of if the incoming packet already has a VLAN tag.
+ * This is enabled to simulate VLAN unawareness.
+ */
+ regmap_set_bits(esw->regmap, MT7628_ESW_REG_SGC2,
+ FIELD_PREP(MT7628_ESW_SGC2_DOUBLE_TAG_EN,
+ MT7628_ESW_PORTS_NOCPU));
+
+ regmap_set_bits(esw->regmap, MT7628_ESW_REG_POC2,
+ MT7628_ESW_POC2_PER_VLAN_UNTAG_EN);
+
+ regmap_update_bits(esw->regmap, MT7628_ESW_REG_PFC1,
+ MT7628_ESW_PFC1_EN_VLAN,
+ FIELD_PREP(MT7628_ESW_PFC1_EN_VLAN,
+ MT7628_ESW_PORTS_ALL));
+}
+
+static void mt7628_esw_set_pvid(struct mt7628_esw *esw, unsigned int port,
+ unsigned int pvid)
+{
+ regmap_update_bits(esw->regmap, MT7628_ESW_REG_PVIDC(port),
+ MT7628_ESW_PVID_MASK(port),
+ MT7628_ESW_PVID_PREP(port, pvid));
+}
+
+static void mt7628_esw_set_vlan_id(struct mt7628_esw *esw, unsigned int vlan,
+ unsigned int vid)
+{
+ regmap_update_bits(esw->regmap, MT7628_ESW_REG_VLANI(vlan),
+ MT7628_ESW_VID_MASK(vlan),
+ MT7628_ESW_VID_PREP(vlan, vid));
+}
+
+static void mt7628_esw_set_vmsc(struct mt7628_esw *esw, unsigned int vlan,
+ unsigned int msc)
+{
+ regmap_update_bits(esw->regmap, MT7628_ESW_REG_VMSC(vlan),
+ MT7628_ESW_VMSC_MASK(vlan),
+ MT7628_ESW_VMSC_PREP(vlan, msc));
+}
+
+static void mt7628_esw_set_vub(struct mt7628_esw *esw, unsigned int vlan,
+ unsigned int vub)
+{
+ regmap_update_bits(esw->regmap, MT7628_ESW_REG_VUB(vlan),
+ MT7628_ESW_VUB_MASK(vlan),
+ MT7628_ESW_VUB_PREP(vlan, vub));
+}
+
+static void mt7628_vlan_sync(struct dsa_switch *ds)
+{
+ struct mt7628_esw *esw = ds->priv;
+ int i;
+
+ for (i = 0; i < MT7628_NUM_VLANS; i++) {
+ struct mt7628_vlan *vlan = &esw->vlans[i];
+
+ mt7628_esw_set_vmsc(esw, i, vlan->members);
+ mt7628_esw_set_vlan_id(esw, i, vlan->vid);
+ mt7628_esw_set_vub(esw, i, vlan->untag);
+ }
+
+ for (i = 0; i < ds->num_ports; i++)
+ mt7628_esw_set_pvid(esw, i, esw->tag_8021q_pvid[i]);
+}
+
+static int mt7628_setup(struct dsa_switch *ds)
+{
+ struct mt7628_esw *esw = ds->priv;
+ int ret;
+
+ ret = reset_control_reset(esw->rst_esw);
+ if (ret)
+ return ret;
+ usleep_range(1000, 2000);
+
+ ret = reset_control_reset(esw->rst_ephy);
+ if (ret)
+ return ret;
+ usleep_range(1000, 2000);
+ /*
+ * all MMIO reads hang if esw is not out of reset
+ * ephy needs extra time to get out of reset or it ends up misconfigured
+ */
+
+ mt7628_switch_init(ds);
+
+ ret = mt7628_setup_internal_mdio(ds);
+ if (ret)
+ return ret;
+
+ rtnl_lock();
+ ret = dsa_tag_8021q_register(ds, htons(ETH_P_8021Q));
+ rtnl_unlock();
+
+ return ret;
+}
+
+static int mt7628_port_enable(struct dsa_switch *ds, int port,
+ struct phy_device *phy)
+{
+ struct mt7628_esw *esw = ds->priv;
+
+ regmap_clear_bits(esw->regmap, MT7628_ESW_REG_POC0,
+ FIELD_PREP(MT7628_ESW_POC0_PORT_DISABLE, BIT(port)));
+ return 0;
+}
+
+static void mt7628_port_disable(struct dsa_switch *ds, int port)
+{
+ struct mt7628_esw *esw = ds->priv;
+
+ regmap_set_bits(esw->regmap, MT7628_ESW_REG_POC0,
+ FIELD_PREP(MT7628_ESW_POC0_PORT_DISABLE, BIT(port)));
+}
+
+static enum dsa_tag_protocol
+mt7628_get_tag_proto(struct dsa_switch *ds, int port, enum dsa_tag_protocol mp)
+{
+ return DSA_TAG_PROTO_MT7628;
+}
+
+static void mt7628_phylink_get_caps(struct dsa_switch *ds, int port,
+ struct phylink_config *config)
+{
+ switch (port) {
+ case 6:
+ config->mac_capabilities |= MAC_1000;
+ fallthrough;
+ case 0 ... 4:
+ config->mac_capabilities |= MAC_100 | MAC_10;
+ __set_bit(PHY_INTERFACE_MODE_INTERNAL,
+ config->supported_interfaces);
+ break;
+ default:
+ break; /* port 5 does not exist on MT7628 */
+ }
+}
+
+static int mt7628_dsa_8021q_vlan_add(struct dsa_switch *ds, int port,
+ u16 vid, u16 flags)
+{
+ struct mt7628_esw *esw = ds->priv;
+ struct mt7628_vlan *vlan = NULL;
+ int i;
+
+ for (i = 0; i < MT7628_NUM_VLANS; i++) {
+ struct mt7628_vlan *check_vlan = &esw->vlans[i];
+
+ if (!check_vlan->active && !vlan)
+ vlan = check_vlan;
+
+ if (check_vlan->active && check_vlan->vid == vid) {
+ vlan = check_vlan;
+ break;
+ }
+ }
+
+ if (!vlan)
+ return -ENOSPC;
+
+ vlan->vid = vid;
+ vlan->active = true;
+ vlan->members |= BIT(port);
+
+ if (flags & BRIDGE_VLAN_INFO_PVID)
+ esw->tag_8021q_pvid[port] = vid;
+
+ if (flags & BRIDGE_VLAN_INFO_UNTAGGED)
+ vlan->untag |= BIT(port);
+
+ mt7628_vlan_sync(ds);
+ return 0;
+}
+
+static int mt7628_dsa_8021q_vlan_del(struct dsa_switch *ds, int port, u16 vid)
+{
+ struct mt7628_esw *esw = ds->priv;
+ struct mt7628_vlan *vlan = NULL;
+ int i;
+
+ for (i = 0; i < MT7628_NUM_VLANS; i++) {
+ struct mt7628_vlan *check_vlan = &esw->vlans[i];
+
+ if (!check_vlan->active || check_vlan->vid != vid)
+ continue;
+ vlan = check_vlan;
+ break;
+ }
+ if (!vlan)
+ return -ENOENT;
+
+ if (esw->tag_8021q_pvid[port] == vid)
+ esw->tag_8021q_pvid[port] = 0;
+
+ vlan->members &= ~BIT(port);
+ vlan->untag &= ~BIT(port);
+
+ if (!vlan->members) {
+ vlan->active = false;
+ vlan->vid = 0;
+ }
+
+ mt7628_vlan_sync(ds);
+ return 0;
+}
+
+static void mt7628_teardown(struct dsa_switch *ds)
+{
+ rtnl_lock();
+ dsa_tag_8021q_unregister(ds);
+ rtnl_unlock();
+}
+
+static const struct dsa_switch_ops mt7628_switch_ops = {
+ .get_tag_protocol = mt7628_get_tag_proto,
+ .setup = mt7628_setup,
+ .teardown = mt7628_teardown,
+ .port_enable = mt7628_port_enable,
+ .port_disable = mt7628_port_disable,
+ .phylink_get_caps = mt7628_phylink_get_caps,
+ .tag_8021q_vlan_add = mt7628_dsa_8021q_vlan_add,
+ .tag_8021q_vlan_del = mt7628_dsa_8021q_vlan_del,
+};
+
+static int mt7628_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct mt7628_esw *esw;
+ struct dsa_switch *ds;
+
+ ds = devm_kzalloc(&pdev->dev, sizeof(*ds), GFP_KERNEL);
+ if (!ds)
+ return -ENOMEM;
+
+ esw = devm_kzalloc(&pdev->dev, sizeof(*esw), GFP_KERNEL);
+ if (!esw)
+ return -ENOMEM;
+
+ esw->base = devm_platform_ioremap_resource(pdev, 0);
+ if (IS_ERR(esw->base))
+ return PTR_ERR(esw->base);
+
+ esw->regmap = devm_regmap_init_mmio(&pdev->dev, esw->base,
+ &mt7628_esw_regmap_cfg);
+ if (IS_ERR(esw->regmap))
+ return PTR_ERR(esw->regmap);
+
+ esw->rst_ephy = devm_reset_control_get_exclusive(&pdev->dev, "ephy");
+ if (IS_ERR(esw->rst_ephy))
+ return dev_err_probe(dev, PTR_ERR(esw->rst_ephy),
+ "failed to get EPHY reset\n");
+
+ esw->rst_esw = devm_reset_control_get_exclusive(&pdev->dev, "esw");
+ if (IS_ERR(esw->rst_esw))
+ return dev_err_probe(dev, PTR_ERR(esw->rst_esw),
+ "failed to get ESW reset\n");
+
+ ds->dev = dev;
+ ds->num_ports = MT7628_ESW_NUM_PORTS;
+ ds->ops = &mt7628_switch_ops;
+ ds->priv = esw;
+ esw->ds = ds;
+ esw->dev = dev;
+ dev_set_drvdata(dev, esw);
+
+ return dsa_register_switch(ds);
+}
+
+static void mt7628_remove(struct platform_device *pdev)
+{
+ struct mt7628_esw *esw = platform_get_drvdata(pdev);
+
+ if (!esw)
+ return;
+
+ dsa_unregister_switch(esw->ds);
+}
+
+static void mt7628_shutdown(struct platform_device *pdev)
+{
+ struct mt7628_esw *esw = platform_get_drvdata(pdev);
+
+ if (!esw)
+ return;
+
+ dsa_switch_shutdown(esw->ds);
+ dev_set_drvdata(&pdev->dev, NULL);
+}
+
+static const struct of_device_id mt7628_of_match[] = {
+ { .compatible = "mediatek,mt7628-esw" },
+ {}
+};
+
+MODULE_DEVICE_TABLE(of, mt7628_of_match);
+
+static struct platform_driver mt7628_driver = {
+ .driver = {
+ .name = "mt7628-esw",
+ .of_match_table = mt7628_of_match,
+ },
+ .probe = mt7628_probe,
+ .remove = mt7628_remove,
+ .shutdown = mt7628_shutdown,
+};
+
+module_platform_driver(mt7628_driver);
+
+MODULE_AUTHOR("Joris Vaisvila <joey@tinyisr.com>");
+MODULE_DESCRIPTION("Driver for Mediatek MT7628 embedded switch");
+MODULE_LICENSE("GPL");
--
2.54.0
^ permalink raw reply related
* [PATCH net-next v5 3/4] net: dsa: initial MT7628 tagging driver
From: Joris Vaisvila @ 2026-06-13 18:18 UTC (permalink / raw)
To: netdev
Cc: horms, pabeni, kuba, edumazet, davem, olteanv, Andrew Lunn,
devicetree, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Arınç ÜNAL, Landen Chao, DENG Qingfang, Sean Wang,
Daniel Golle, Joris Vaisvila
In-Reply-To: <20260613181845.111877-1-joey@tinyisr.com>
Add support for the MT7628 embedded switch's tag.
The MT7628 tag is merged with the VLAN TPID field when a VLAN is
appended by the switch hardware. It is not installed if the VLAN tag is
already there on ingress. Due to this hardware quirk the tag cannot be
trusted for port 0 if we don't know that the VLAN was added by the
hardware. As a workaround for this the switch is configured to always
append the port PVID tag even if the incoming packet is already tagged.
The tagging driver can then trust that the tag is always accurate and
the whole VLAN tag can be removed on ingress as it's only metadata for
the tagger.
On egress the MT7628 tag allows precise TX, but the correct VLAN tag
from tag_8021q is still appended or the switch will not forward the
packet.
Signed-off-by: Joris Vaisvila <joey@tinyisr.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
---
include/net/dsa.h | 2 +
net/dsa/Kconfig | 6 +++
net/dsa/Makefile | 1 +
net/dsa/tag_mt7628.c | 89 ++++++++++++++++++++++++++++++++++++++++++++
4 files changed, 98 insertions(+)
create mode 100644 net/dsa/tag_mt7628.c
diff --git a/include/net/dsa.h b/include/net/dsa.h
index 8c16ef23cc10..913d1f71e3db 100644
--- a/include/net/dsa.h
+++ b/include/net/dsa.h
@@ -59,6 +59,7 @@ struct tc_action;
#define DSA_TAG_PROTO_MXL_GSW1XX_VALUE 31
#define DSA_TAG_PROTO_MXL862_VALUE 32
#define DSA_TAG_PROTO_NETC_VALUE 33
+#define DSA_TAG_PROTO_MT7628_VALUE 34
enum dsa_tag_protocol {
DSA_TAG_PROTO_NONE = DSA_TAG_PROTO_NONE_VALUE,
@@ -95,6 +96,7 @@ enum dsa_tag_protocol {
DSA_TAG_PROTO_MXL_GSW1XX = DSA_TAG_PROTO_MXL_GSW1XX_VALUE,
DSA_TAG_PROTO_MXL862 = DSA_TAG_PROTO_MXL862_VALUE,
DSA_TAG_PROTO_NETC = DSA_TAG_PROTO_NETC_VALUE,
+ DSA_TAG_PROTO_MT7628 = DSA_TAG_PROTO_MT7628_VALUE,
};
struct dsa_switch;
diff --git a/net/dsa/Kconfig b/net/dsa/Kconfig
index d5e725b90d78..23b4b74004ed 100644
--- a/net/dsa/Kconfig
+++ b/net/dsa/Kconfig
@@ -98,6 +98,12 @@ config NET_DSA_TAG_EDSA
Say Y or M if you want to enable support for tagging frames for the
Marvell switches which use EtherType DSA headers.
+config NET_DSA_TAG_MT7628
+ tristate "Tag driver for the MT7628 embedded switch"
+ help
+ Say Y or M if you want to enable support for tagging frames for the
+ switch embedded in the MT7628 SoC.
+
config NET_DSA_TAG_MTK
tristate "Tag driver for Mediatek switches"
help
diff --git a/net/dsa/Makefile b/net/dsa/Makefile
index b8c2667cd14a..d15bcf5c68f0 100644
--- a/net/dsa/Makefile
+++ b/net/dsa/Makefile
@@ -27,6 +27,7 @@ obj-$(CONFIG_NET_DSA_TAG_GSWIP) += tag_gswip.o
obj-$(CONFIG_NET_DSA_TAG_HELLCREEK) += tag_hellcreek.o
obj-$(CONFIG_NET_DSA_TAG_KSZ) += tag_ksz.o
obj-$(CONFIG_NET_DSA_TAG_LAN9303) += tag_lan9303.o
+obj-$(CONFIG_NET_DSA_TAG_MT7628) += tag_mt7628.o
obj-$(CONFIG_NET_DSA_TAG_MTK) += tag_mtk.o
obj-$(CONFIG_NET_DSA_TAG_MXL_862XX) += tag_mxl862xx.o
obj-$(CONFIG_NET_DSA_TAG_MXL_GSW1XX) += tag_mxl-gsw1xx.o
diff --git a/net/dsa/tag_mt7628.c b/net/dsa/tag_mt7628.c
new file mode 100644
index 000000000000..f0e346595f30
--- /dev/null
+++ b/net/dsa/tag_mt7628.c
@@ -0,0 +1,89 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2026, Joris Vaisvila <joey@tinyisr.com>
+ * MT7628 switch tag support
+ */
+
+#include <linux/etherdevice.h>
+#include <linux/dsa/8021q.h>
+#include <net/dsa.h>
+
+#include "tag.h"
+
+/*
+ * The MT7628 tag is encoded in the VLAN TPID field.
+ * On TX the lower 6 bits encode the destination port bitmask.
+ * On RX the lower 3 bits encode the source port number.
+ *
+ * The switch hardware will not modify the TPID of an incoming packet if it is
+ * already VLAN tagged. To work around this the switch is configured to always
+ * append a tag_8021q standalone VLAN tag for each port. That means we can
+ * safely strip the outer VLAN tag after parsing it.
+ *
+ * A VLAN tag is constructed on egress to target the standalone VLAN and
+ * destination port.
+ */
+
+#define MT7628_TAG_NAME "mt7628"
+
+#define MT7628_TAG_TX_PORT GENMASK(5, 0)
+#define MT7628_TAG_RX_PORT GENMASK(2, 0)
+#define MT7628_TAG_LEN 4
+
+static struct sk_buff *mt7628_tag_xmit(struct sk_buff *skb,
+ struct net_device *dev)
+{
+ struct dsa_port *dp;
+ u16 xmit_vlan;
+ __be16 *tag;
+
+ dp = dsa_user_to_port(dev);
+ xmit_vlan = dsa_tag_8021q_standalone_vid(dp);
+
+ skb_push(skb, MT7628_TAG_LEN);
+ dsa_alloc_etype_header(skb, MT7628_TAG_LEN);
+
+ tag = dsa_etype_header_pos_tx(skb);
+
+ tag[0] = htons(ETH_P_8021Q |
+ FIELD_PREP(MT7628_TAG_TX_PORT,
+ dsa_xmit_port_mask(skb, dev)));
+ tag[1] = htons(xmit_vlan);
+
+ return skb;
+}
+
+static struct sk_buff *mt7628_tag_rcv(struct sk_buff *skb,
+ struct net_device *dev)
+{
+ __be16 *phdr;
+
+ if (unlikely(!pskb_may_pull(skb, MT7628_TAG_LEN)))
+ return NULL;
+
+ phdr = dsa_etype_header_pos_rx(skb);
+ skb->dev =
+ dsa_conduit_find_user(dev, 0,
+ FIELD_GET(MT7628_TAG_RX_PORT, ntohs(*phdr)));
+ if (!skb->dev)
+ return NULL;
+
+ skb_pull_rcsum(skb, MT7628_TAG_LEN);
+ dsa_strip_etype_header(skb, MT7628_TAG_LEN);
+ dsa_default_offload_fwd_mark(skb);
+ return skb;
+}
+
+static const struct dsa_device_ops mt7628_tag_ops = {
+ .name = MT7628_TAG_NAME,
+ .proto = DSA_TAG_PROTO_MT7628,
+ .xmit = mt7628_tag_xmit,
+ .rcv = mt7628_tag_rcv,
+ .needed_headroom = MT7628_TAG_LEN,
+};
+
+module_dsa_tag_driver(mt7628_tag_ops);
+
+MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_MT7628, MT7628_TAG_NAME);
+MODULE_DESCRIPTION("DSA tag driver for MT7628 switch");
+MODULE_LICENSE("GPL");
--
2.54.0
^ permalink raw reply related
* [PATCH net-next v5 1/4] dt-bindings: net: dsa: add MT7628 ESW
From: Joris Vaisvila @ 2026-06-13 18:18 UTC (permalink / raw)
To: netdev
Cc: horms, pabeni, kuba, edumazet, davem, olteanv, Andrew Lunn,
devicetree, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Arınç ÜNAL, Landen Chao, DENG Qingfang, Sean Wang,
Daniel Golle, Joris Vaisvila, Krzysztof Kozlowski
In-Reply-To: <20260613181845.111877-1-joey@tinyisr.com>
Add device tree bindings for the MediaTek MT7628 embedded Ethernet
Switch.
The Switch provides 5 external user ports and 1 internal CPU port, with
integrated 10/100 PHYs and fixed port to PHY mapping.
The CPU port is internally connected and uses port index 6.
Signed-off-by: Joris Vaisvila <joey@tinyisr.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
---
.../bindings/net/dsa/mediatek,mt7628-esw.yaml | 96 +++++++++++++++++++
1 file changed, 96 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/dsa/mediatek,mt7628-esw.yaml
diff --git a/Documentation/devicetree/bindings/net/dsa/mediatek,mt7628-esw.yaml b/Documentation/devicetree/bindings/net/dsa/mediatek,mt7628-esw.yaml
new file mode 100644
index 000000000000..e0e7ffef6648
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/dsa/mediatek,mt7628-esw.yaml
@@ -0,0 +1,96 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/dsa/mediatek,mt7628-esw.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Mediatek MT7628 Embedded Ethernet Switch
+
+maintainers:
+ - Joris Vaisvila <joey@tinyisr.com>
+
+description:
+ The MT7628 SoC's built-in Ethernet Switch has five user ports and one
+ internally connected CPU port. The user ports are all connected to the SoC's
+ integrated Fast Ethernet PHYs. The switch registers are directly mapped in
+ the SoC's memory.
+
+allOf:
+ - $ref: dsa.yaml#/$defs/ethernet-ports
+
+properties:
+ compatible:
+ const: mediatek,mt7628-esw
+
+ reg:
+ maxItems: 1
+
+ resets:
+ items:
+ - description: internal switch block reset
+ - description: internal phy package reset
+
+ reset-names:
+ items:
+ - const: esw
+ - const: ephy
+
+required:
+ - compatible
+ - reg
+ - resets
+ - reset-names
+ - ethernet-ports
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ switch@10110000 {
+ compatible = "mediatek,mt7628-esw";
+ reg = <0x10110000 0x8000>;
+
+ resets = <&sysc 23>, <&sysc 24>;
+ reset-names = "esw", "ephy";
+
+ ethernet-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethernet-port@0 {
+ reg = <0>;
+ phy-mode = "internal";
+ };
+
+ ethernet-port@1 {
+ reg = <1>;
+ phy-mode = "internal";
+ };
+
+ ethernet-port@2 {
+ reg = <2>;
+ phy-mode = "internal";
+ };
+
+ ethernet-port@3 {
+ reg = <3>;
+ phy-mode = "internal";
+ };
+
+ ethernet-port@4 {
+ reg = <4>;
+ phy-mode = "internal";
+ };
+
+ ethernet-port@6 {
+ reg = <6>;
+ phy-mode = "internal";
+ ethernet = <ðernet>;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+ };
--
2.54.0
^ permalink raw reply related
* [PATCH net-next v5 0/4] net: dsa: mt7628 embedded switch initial support
From: Joris Vaisvila @ 2026-06-13 18:18 UTC (permalink / raw)
To: netdev
Cc: horms, pabeni, kuba, edumazet, davem, olteanv, Andrew Lunn,
devicetree, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Arınç ÜNAL, Landen Chao, DENG Qingfang, Sean Wang,
Daniel Golle, Joris Vaisvila
This patch series adds initial support for the MediaTek MT7628 Embedded
Switch.
The driver implements the basic functionality required to operate the
switch using DSA. The hardware provides five internal Fast Ethernet user
ports and one Gigabit port connected internally to the CPU MAC.
Bridge offloading is not yet supported.
Tested on an MT7628NN-based board.
Changes since v4:
mt7628 dsa driver:
- fixed mdiobus allocation tied to platform device while
being initialized in DSA switch setup
mt7628 phy driver:
- replaced phy_write() with phy_modify() when setting PHY init
bit (no functional change)
mt7628 dt binding:
- moved unevaluatedProperties after required block
- removed blank line between compatible and reg in example
Link: https://lore.kernel.org/netdev/20260608192948.289745-1-joey@tinyisr.com/t/#u
Changes since v3:
- rebased on latest net-next
mt7628 dsa driver:
- simplified vlan_add hardware vlan slot search
- fixed vlan_del not removing vid from port pvid
- separated mii_read/mii_write error handling from return
value parsing. Updated RD_DONE/WT_DONE bit checking
with clearer logic and a comment.
- moved NET_DSA_MT7628 after NET_DSA_MT7530 in Kconfig
- added missing reset return value checks in probe
- fixed mt7628_switch_ops missing const specifier
- removed mdio node parsing from of, as there is nothing
to configure
mt7628 dt binding:
- updated description to be more clear about port count
- dropped optional mdio subnode. the switch does not
expose an external MDIO bus and all integrated PHY
access is handled by the driver.
- removed unused switch0 label in example
Link: https://lore.kernel.org/netdev/20260428185510.261521-1-joey@tinyisr.com/t/#u
Changes since v2:
- fix binding issues found in review
- fix ignored dsa_tag_8021q_register return value
- add switch teardown to clean up tag_8021q
- fix ordering issue where mdio probe fail would leak tag_8021q
Link: https://lore.kernel.org/netdev/20260330184017.766200-1-joey@tinyisr.com/t/#u
Changes since v1:
- changed port 6 phy-mode to internal
- cleaned up tag_mt7628 rcv function and mask defines
- fixed sorting error in drivers/net/dsa/ Kconfig and Makefile
- fixed sorting error in net/dsa/ Kconfig and Makefile
- fixed mt7628_mii_read/write return values on error
Link: https://lore.kernel.org/netdev/20260326204413.3317584-1-joey@tinyisr.com/t/#u
Thanks,
Joris
Joris Vaisvila (4):
dt-bindings: net: dsa: add MT7628 ESW
net: phy: mediatek: add phy driver for MT7628 built-in Fast Ethernet
PHYs
net: dsa: initial MT7628 tagging driver
net: dsa: initial support for MT7628 embedded switch
.../bindings/net/dsa/mediatek,mt7628-esw.yaml | 96 +++
drivers/net/dsa/Kconfig | 8 +
drivers/net/dsa/Makefile | 1 +
drivers/net/dsa/mt7628.c | 649 ++++++++++++++++++
drivers/net/phy/mediatek/Kconfig | 10 +-
drivers/net/phy/mediatek/Makefile | 1 +
drivers/net/phy/mediatek/mtk-fe-soc.c | 50 ++
include/net/dsa.h | 2 +
net/dsa/Kconfig | 6 +
net/dsa/Makefile | 1 +
net/dsa/tag_mt7628.c | 89 +++
11 files changed, 912 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/net/dsa/mediatek,mt7628-esw.yaml
create mode 100644 drivers/net/dsa/mt7628.c
create mode 100644 drivers/net/phy/mediatek/mtk-fe-soc.c
create mode 100644 net/dsa/tag_mt7628.c
--
2.54.0
^ permalink raw reply
* [PATCH net-next v5 2/4] net: phy: mediatek: add phy driver for MT7628 built-in Fast Ethernet PHYs
From: Joris Vaisvila @ 2026-06-13 18:18 UTC (permalink / raw)
To: netdev
Cc: horms, pabeni, kuba, edumazet, davem, olteanv, Andrew Lunn,
devicetree, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Arınç ÜNAL, Landen Chao, DENG Qingfang, Sean Wang,
Daniel Golle, Joris Vaisvila
In-Reply-To: <20260613181845.111877-1-joey@tinyisr.com>
The Fast Ethernet PHYs present in the MT7628 SoCs require an
undocumented bit to be set before they can establish 100mbps links.
This commit adds the Kconfig option MEDIATEK_FE_SOC_PHY and the
corresponding driver mtk-fe-soc.c.
Signed-off-by: Joris Vaisvila <joey@tinyisr.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
---
drivers/net/phy/mediatek/Kconfig | 10 +++++-
drivers/net/phy/mediatek/Makefile | 1 +
drivers/net/phy/mediatek/mtk-fe-soc.c | 50 +++++++++++++++++++++++++++
3 files changed, 60 insertions(+), 1 deletion(-)
create mode 100644 drivers/net/phy/mediatek/mtk-fe-soc.c
diff --git a/drivers/net/phy/mediatek/Kconfig b/drivers/net/phy/mediatek/Kconfig
index bb7dc876271e..b6a51f38c358 100644
--- a/drivers/net/phy/mediatek/Kconfig
+++ b/drivers/net/phy/mediatek/Kconfig
@@ -21,8 +21,16 @@ config MEDIATEK_GE_PHY
common operations with MediaTek SoC built-in Gigabit
Ethernet PHYs.
+config MEDIATEK_FE_SOC_PHY
+ tristate "MediaTek SoC Fast Ethernet PHYs"
+ help
+ Support for MediaTek MT7628 built-in Fast Ethernet PHYs.
+ This driver only sets an initialization bit required for the PHY
+ to establish 100 Mbps links. All other PHY operations are handled
+ by the kernel's generic PHY code.
+
config MEDIATEK_GE_SOC_PHY
- tristate "MediaTek SoC Ethernet PHYs"
+ tristate "MediaTek SoC Gigabit Ethernet PHYs"
depends on ARM64 || COMPILE_TEST
depends on ARCH_AIROHA || (ARCH_MEDIATEK && NVMEM_MTK_EFUSE) || \
COMPILE_TEST
diff --git a/drivers/net/phy/mediatek/Makefile b/drivers/net/phy/mediatek/Makefile
index ac57ecc799fc..6f9cacf7f906 100644
--- a/drivers/net/phy/mediatek/Makefile
+++ b/drivers/net/phy/mediatek/Makefile
@@ -1,5 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_MEDIATEK_2P5GE_PHY) += mtk-2p5ge.o
+obj-$(CONFIG_MEDIATEK_FE_SOC_PHY) += mtk-fe-soc.o
obj-$(CONFIG_MEDIATEK_GE_PHY) += mtk-ge.o
obj-$(CONFIG_MEDIATEK_GE_SOC_PHY) += mtk-ge-soc.o
obj-$(CONFIG_MTK_NET_PHYLIB) += mtk-phy-lib.o
diff --git a/drivers/net/phy/mediatek/mtk-fe-soc.c b/drivers/net/phy/mediatek/mtk-fe-soc.c
new file mode 100644
index 000000000000..9eb4960bcaad
--- /dev/null
+++ b/drivers/net/phy/mediatek/mtk-fe-soc.c
@@ -0,0 +1,50 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Driver for MT7628 Embedded Switch internal Fast Ethernet PHYs
+ */
+#include <linux/module.h>
+#include <linux/phy.h>
+
+#define MTK_FPHY_ID_MT7628 0x03a29410
+#define MTK_EXT_PAGE_ACCESS 0x1f
+
+static int mt7628_phy_read_page(struct phy_device *phydev)
+{
+ return __phy_read(phydev, MTK_EXT_PAGE_ACCESS);
+}
+
+static int mt7628_phy_write_page(struct phy_device *phydev, int page)
+{
+ return __phy_write(phydev, MTK_EXT_PAGE_ACCESS, page);
+}
+
+static int mt7628_phy_config_init(struct phy_device *phydev)
+{
+ /*
+ * This undocumented bit is required for the PHYs to be able to
+ * establish 100mbps links.
+ */
+ return phy_modify_paged(phydev, 0x8000, 30, BIT(13), BIT(13));
+}
+
+static struct phy_driver mtk_soc_fe_phy_driver[] = {
+ {
+ PHY_ID_MATCH_EXACT(MTK_FPHY_ID_MT7628),
+ .name = "MediaTek MT7628 PHY",
+ .config_init = mt7628_phy_config_init,
+ .read_page = mt7628_phy_read_page,
+ .write_page = mt7628_phy_write_page,
+ },
+};
+
+module_phy_driver(mtk_soc_fe_phy_driver);
+static const struct mdio_device_id __maybe_unused mtk_soc_fe_phy_tbl[] = {
+ { PHY_ID_MATCH_EXACT(MTK_FPHY_ID_MT7628) },
+ { }
+};
+
+MODULE_DESCRIPTION("MediaTek SoC Fast Ethernet PHY driver");
+MODULE_AUTHOR("Joris Vaisvila <joey@tinyisr.com>");
+MODULE_LICENSE("GPL");
+
+MODULE_DEVICE_TABLE(mdio, mtk_soc_fe_phy_tbl);
--
2.54.0
^ permalink raw reply related
* Re: [PATCH v5 2/4] scripts/jobserver-exec: propagate child exit status
From: Nicolas Schier @ 2026-06-13 17:39 UTC (permalink / raw)
To: Daniel Golle
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Nathan Chancellor,
Saravana Kannan, Ping-Ke Shih, Andy Shevchenko, David Sterba,
Bryan O'Donoghue, Hariharan Basuthkar, Jeff Hugo,
Filipe Manana, Bitterblue Smith, Wei Yang, Takashi Iwai,
Aurabindo Pillai, Chih-Kang Chang, David Lechner, Miguel Ojeda,
Gary Guo, Tamir Duberstein, Thomas Weißschuh,
Pagadala Yesu Anjaneyulu, Bartosz Golaszewski,
Jorge Ramirez-Ortiz, Masahiro Yamada, Guenter Roeck,
Aleksander Jan Bajkowski, Boris Burkov, Blake Jones,
Jonathan Corbet, Mauro Carvalho Chehab, devicetree, linux-kernel,
linux-kbuild
In-Reply-To: <660368ca16e2d3845577a9fd157d2f37f0e09e85.1779908995.git.daniel@makrotopia.org>
On Wed, May 27, 2026 at 08:32:18PM +0100, Daniel Golle wrote:
> main() called JobserverExec().run() and discarded its return value,
> then the script exited with the implicit status 0. As a result, any
> Makefile that wired a build step through jobserver-exec saw the step
> silently succeed even when the wrapped command had failed.
>
> Two in-tree callers were affected:
>
> Documentation/devicetree/bindings/Makefile
> cmd_chk_style runs a python checker via jobserver-exec and uses
> "&& touch $@ || true" so failures leave the stamp file untouched
> and the next make rerun reports them again. The swallowed exit
> code made the stamp file get created even on failure, caching the
> failed run and hiding the reported issues until the inputs change.
>
> scripts/Makefile.vmlinux_o
> cmd_gen_initcalls_lds runs scripts/generate_initcall_order.pl via
> jobserver-exec; a perl failure was masked by the wrapper.
>
> Return the subprocess exit code from main() and pass it to sys.exit()
> so the wrapped command's status reaches make.
>
> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
> ---
> v5: new patch; prereq for chk_style in 3/4 so style failures
> leave the stamp file untouched instead of being cached
>
> scripts/jobserver-exec | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/scripts/jobserver-exec b/scripts/jobserver-exec
> index 758e947a6fb9..21b319e6c9a5 100755
> --- a/scripts/jobserver-exec
> +++ b/scripts/jobserver-exec
> @@ -28,8 +28,8 @@ def main():
> sys.exit("usage: " + name +" command [args ...]\n" + __doc__)
>
> with JobserverExec() as jobserver:
> - jobserver.run(sys.argv[1:])
> + return jobserver.run(sys.argv[1:])
>
>
> if __name__ == "__main__":
> - main()
> + sys.exit(main())
> --
> 2.54.0
Good catch, thanks!
For kbuild:
Reviewed-by: Nicolas Schier <nsc@kernel.org>
--
Nicolas
^ permalink raw reply
* Re: [PATCH v10 6/6] ARM: dts: sun8i: v3s: Add support for the ISP
From: sashiko-bot @ 2026-06-13 17:39 UTC (permalink / raw)
To: Paul Kocialkowski; +Cc: conor+dt, devicetree, linux-sunxi, robh
In-Reply-To: <20260613152655.212490-7-paulk@sys-base.io>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] The device tree nodes `isp` and `csi0` include `interconnects` and `interconnect-names` properties that are not documented in their respective YAML binding schemas (`Documentation/devicetree/bindings/media/allwinner,sun6i-a31-isp.yaml` and `Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml`). Because these schemas specify `additionalProperties: false`, this causes schema validation failures during `make dtbs_check`.
--
commit 299a0d91b22100c87010de21ec5908b8fed75e39
Author: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
ARM: dts: sun8i: v3s: Add support for the ISP
This commit adds support for the ISP on V3s and related platforms by
introducing a dedicated compatible string and device tree node. It links the
ISP to the CSI bus, module and ram clocks, resets, and adds a port connection
to CSI0. The interconnects property is also used to inherit the proper DMA
offset.
> diff --git a/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi b/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi
> --- a/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi
> +++ b/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi
[ ... ]
> @@ -755,5 +763,32 @@ csi1: camera@1cb4000 {
> resets = <&ccu RST_BUS_CSI>;
> status = "disabled";
> };
> +
> + isp: isp@1cb8000 {
> + compatible = "allwinner,sun8i-v3s-isp";
> + reg = <0x01cb8000 0x1000>;
[ ... ]
> + resets = <&ccu RST_BUS_CSI>;
> + interconnects = <&mbus 5>;
> + interconnect-names = "dma-mem";
[Severity: Low]
Are these interconnect properties documented in the corresponding YAML binding
schemas (like Documentation/devicetree/bindings/media/allwinner,sun6i-a31-isp.yaml
and similarly for csi0)?
Since device tree schemas typically specify additionalProperties: false,
leaving interconnects and interconnect-names undocumented will cause
make dtbs_check to report schema validation failures for these nodes.
> + status = "disabled";
[ ... ]
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260613152655.212490-1-paulk@sys-base.io?part=6
^ permalink raw reply
* Re: [PATCH] ARM: dts: exynos: Add bluetooth support to manta
From: Lukas Timmermann @ 2026-06-13 17:11 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Alim Akhtar
Cc: devicetree, linux-arm-kernel, linux-samsung-soc, linux-kernel,
Alexandre Marquet
In-Reply-To: <653b640e-8b61-4c60-a455-63a400b308e7@kernel.org>
#include <atomic>
On Mon, Apr 27, 2026 at 03:49:34PM +0200, Krzysztof Kozlowski wrote:
> On 08/04/2026 13:56, Lukas Timmermann wrote:
> > Enable the bcm4330-bt device for manta boards on serial0.
> > Also adds the necessary pin definitions and interrupt handling for
> > wakeup.
> >
> > Signed-off-by: Lukas Timmermann <linux@timmermann.space>
> > Co-developed-by: Alexandre Marquet <tb@a-marquet.fr>
> > Signed-off-by: Alexandre Marquet <tb@a-marquet.fr>
>
> Incomplete/incorrect DCO chain. Please do not reorder tags. Git does
> them correctly, so you HAD to change them manually.
>
> You send the patch or you apply the patch so you must commit with sign off.
I developed the actual patch based on his findings. We both don't really
care about who is mentioned first or anything.
Sorry. Yes I rearranged stuff. So it should be:
co-dev: alex
sign-off: alex
co-dev: me
sign-off: me
Correct?
>
> Best regards,
> Krzysztof
>
Best regards,
Lukas
^ permalink raw reply
* Re: [PATCH net-next v6 3/5] net: dsa: tag_ks8995: Add the KS8995 tag handling
From: Linus Walleij @ 2026-06-13 16:56 UTC (permalink / raw)
To: Jakub Kicinski
Cc: woojung.huh, UNGLinuxDriver, andrew, olteanv, davem, edumazet,
pabeni, robh, krzk+dt, conor+dt, marex, horms, linux, netdev,
devicetree, nb
In-Reply-To: <20260610153952.1685895-1-kuba@kernel.org>
DSA maintainers, look into this analysis a bit below,
the conclusion is that taggers can't re-use vlan_* helpers
because they free the SKB:s on error, so maybe I need
to create new derivative functions to reuse these.
On Wed, Jun 10, 2026 at 5:39 PM Jakub Kicinski <kuba@kernel.org> wrote:
> This is an AI-generated review of your patch. The human sending this
> email has considered the AI review valid, or at least plausible.
Fair enough.
> > +static struct sk_buff *ks8995_xmit(struct sk_buff *skb, struct net_device *dev)
> > +{
> > + struct vlan_ethhdr *hdr = vlan_eth_hdr(skb);
> > + bool have_hwaccel_tag = false;
> > + u16 tci = 0, portmask;
> > +
> > + /* Prepare the special KS8995 tags */
> > + portmask = dsa_xmit_port_mask(skb, dev);
> > +
> > + if (skb_vlan_tag_present(skb) && skb->vlan_proto == htons(ETH_P_8021Q)) {
> > + tci = skb_vlan_tag_get(skb);
> > + __vlan_hwaccel_clear_tag(skb);
> > + have_hwaccel_tag = true;
> > + }
>
> [Low]
> What is intended to happen if the skb arrives with both a hwaccel VLAN
> tag and an in-head 0x8100 tag, or with a hwaccel tag whose vlan_proto
> is something other than 0x8100 (for example 0x88a8 service tag)?
>
> In those cases this branch leaves the hwaccel tag alone or only consumes
> it conditionally, and the second branch below either inserts a fresh
> in-head tag while keeping a pre-existing in-head 0x8100, or modifies the
> in-head 0x8100 while a non-8021Q hwaccel tag is still attached. Should
> this path either reject such frames or normalise them first?
I have no idea what "normalise" means in this context.
What happens to e.g. a 88a8 service tag is that it gets forwarded
to the target port using the modified vlan tag added by vlan_insert_tag()
below, I think part of the AI confusion here is coming from the
fact that we are using modified "vlan tags" and the semantics
does not fit the common pattern, and the statistics that are used
in the training data become irrelevant.
The whole point of the code is to modify pre-existing
ETH_P_8021Q tags in-place rather than adding a second one,
which means that everything else will get a second tag, the sole
function of which is to direct the packet to the right port, where it
will be stripped by the hardware.
> > + if (have_hwaccel_tag || hdr->h_vlan_proto != htons(ETH_P_8021Q)) {
> > + skb = vlan_insert_tag(skb, KS8995M_STPID(portmask), tci);
> > + if (!skb)
> > + return NULL;
>
> [High]
> Is returning NULL here safe?
>
> include/linux/if_vlan.h documents that vlan_insert_tag() calls
> dev_kfree_skb_any(skb) on failure (e.g. when skb_cow_head() fails under
> memory pressure) and returns NULL. The caller in net/dsa/user.c does:
>
> nskb = p->xmit(skb, dev);
> if (!nskb) {
> kfree_skb(skb);
> return NETDEV_TX_OK;
> }
>
> so on the NULL return dsa_user_xmit() runs kfree_skb() on its local
> pointer that vlan_insert_tag() has already freed.
vlan_insert_tag()
vlan_insert_inner_tag() <- returns NULL on error
__vlan_insert_inner_tag()
> Doesn't that produce a
> use-after-free on skb->users plus a double free?
>
> Should this path swallow the free done by vlan_insert_tag() (e.g. by
> returning a sentinel handled by the caller) so dsa_user_xmit() does not
> re-free the skb?
I looked into this.
The fact that several taggers do this in ->xmit() such as here in tag_8021q.c:
struct sk_buff *dsa_8021q_xmit(struct sk_buff *skb, struct net_device *netdev,
u16 tpid, u16 tci)
{
/* skb->data points at the MAC header, which is fine
* for vlan_insert_tag().
*/
return vlan_insert_tag(skb, htons(tpid), tci);
}
should be a sign that this is OK in xmit:
return vlan_insert_tag(skb,...);
which is equivalent to:
skb = vlan_insert_tag(skb,...);
if (!skb)
return skb;
which is equivalent to:
skb = vlan_insert_tag(skb,...);
if (!skb)
return NULL;
Which is what I do.
So yeah. skb_free() will be free:ed twice. The code in tag_8021q.c will
also do that. But what do you expect ->xmit() to return on error if
not NULL?
When user.c does this:
/* Transmit function may have to reallocate the original SKB,
* in which case it must have freed it. Only free it here on error.
*/
nskb = p->xmit(skb, dev);
if (!nskb) {
kfree_skb(skb);
return NETDEV_TX_OK;
}
return dsa_enqueue_skb(nskb, dev);
The only way to get clean out of this branch if you run
into an error in ->xmit() is to return NULL!
Now let's look at ->rcv():
> > + /* Move the custom DSA+VLAN tag into the hwaccel area and strip
> > + * it from the skb head
> > + */
> > + skb = skb_vlan_untag(skb);
> > + if (!skb) {
> > + netdev_err(dev, "%s: unable to untag skb\n", __func__);
> > + return NULL;
> > + }
>
> [High]
> Is the NULL return here compatible with the cpu_dp->rcv contract?
>
> skb_vlan_untag() can take its err_free path (e.g. when the
> pskb_may_pull(VLAN_HLEN + sizeof(unsigned short)) inside it fails, or
> skb_reorder_vlan_header() fails) which calls kfree_skb(skb) and returns
> NULL.
>
> The caller in net/dsa/tag.c is:
>
> skb = skb_unshare(skb, GFP_ATOMIC);
> ...
> nskb = cpu_dp->rcv(skb, dev);
> ...
> if (!nskb) {
> kfree_skb(skb);
> return 0;
> }
>
> so when ks8995_rcv() returns NULL after skb_vlan_untag() has already
> freed its argument, dsa_switch_rcv() ends up calling kfree_skb() on a
> freed skb. Wouldn't that be a use-after-free on skb->users plus a
> double free?
>
> Other cpu_dp->rcv handlers appear to assume that returning NULL means
> the skb was not freed. Should this handler do something equivalent so
> the contract still holds?
Yes skb_vlan_untag() will free the skb on error and then this will
free the tag again.
But how do you signal to the caller in net/dsa/tag.c
that "things went sidewise and the SKB is already free:ed"?
So these semantics around ->xmit() and ->rcv() free:in the skb on
a NULL return basically challenges Vladimir's request that I
reuse these functions in the first place. They are not made
for this kind of reuse.
What I *CAN* do is go and create wrappers in skbuff.h/c
that will not free the skb on error just return NULL anyway,
intended for this one user (to begin with), such as
vlan_insert_tag_no_free_skb_on_error();
skb_vlan_untag_no_free_skb_on_errror()
I honestly think these are good names because there is
no risk to misunderstand them...
But then I want some buy-in from the maintainers that this is the
way to go.
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH v4 2/2] pinctrl: ultrarisc: Add UltraRISC DP1000 pinctrl driver
From: Nathan Chancellor @ 2026-06-13 16:48 UTC (permalink / raw)
To: Jia Wang, Linus Walleij
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bartosz Golaszewski, linux-gpio, devicetree, linux-kernel
In-Reply-To: <20260610-ultrarisc-pinctrl-v4-2-b7e9b2a8ed84@ultrarisc.com>
On Wed, Jun 10, 2026 at 01:29:56PM +0800, Jia Wang wrote:
> diff --git a/drivers/pinctrl/ultrarisc/pinctrl-ultrarisc.c b/drivers/pinctrl/ultrarisc/pinctrl-ultrarisc.c
> new file mode 100644
> index 000000000000..8fb5b0ea5b93
> --- /dev/null
> +++ b/drivers/pinctrl/ultrarisc/pinctrl-ultrarisc.c
...
> +static bool ur_function_is_gpio(struct pinctrl_dev *pctldev,
> + unsigned int selector)
> +{
> + const struct function_desc *function;
> +
> + function = pinmux_generic_get_function(pctldev, selector);
> + if (!function)
> + return false;
> +
> + for (u32 i = 0; i < function->func->ngroups; i++) {
> + const char *func_name;
> + int group_selector;
> +
> + group_selector = pinctrl_get_group_selector(pctldev,
> + function->func->groups[i]);
> + if (group_selector < 0)
> + return false;
> +
> + func_name = ur_get_group_function(pctldev, group_selector, 0);
> + if (!func_name || strcmp(func_name, "gpio"))
> + return false;
> + }
> +
> + return true;
> +}
The usage of pinctrl_get_group_selector() in this function breaks the
build when this driver is a module because pinctrl_get_group_selector()
is not exported for modules:
ERROR: modpost: "pinctrl_get_group_selector" [drivers/pinctrl/ultrarisc/pinctrl-ultrarisc.ko] undefined!
Also reported by the robots:
https://lore.kernel.org/202606130210.ytVPxHlm-lkp@intel.com/
--
Cheers,
Nathan
^ permalink raw reply
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