* Re: [PATCH v2 5/8] dt-bindings: iio: adc: add ti,ads122c14
From: Conor Dooley @ 2026-06-26 16:18 UTC (permalink / raw)
To: David Lechner (TI)
Cc: Jonathan Cameron, Nuno Sá, Andy Shevchenko, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Chris Hall, Patrick Edwards,
Kurt Borja, Nguyen Minh Tien, linux-iio, devicetree, linux-kernel
In-Reply-To: <20260625-iio-adc-ti-ads122c14-v2-5-ceb9b0b561cb@baylibre.com>
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On Thu, Jun 25, 2026 at 04:55:07PM -0500, David Lechner (TI) wrote:
> Add new bindings for ti,ads122c14 and similar devices.
>
> This is an ADC that is primarily intended for use with temperature
> sensors. There are a few unusual properties because of this. In
> particular, the reference voltage source and current output requirements
> can be different for each measurement, so these are included in the
> channel bindings.
>
> The REFP/REFN reference voltage is usually just connected to a resistor
> that is being driven by the ADC's current outputs, so there is special
> property for this case rather than requiring a regulator to be defined
> to represent that.
>
> ti,vref-source is reused from ti,tlv320adcx140.yaml (otherwise might
> have preferred an enum of strings).
>
> Signed-off-by: David Lechner (TI) <dlechner@baylibre.com>
> ---
>
> v2 changes:
> * Added ti, vendor prefix when appropriate.
> * Others are now standardized properties from adc.yaml.
> * Moved top-level unevaluatedProperties.
> * Fixed some issues with the channel@ matching and reg property.
> * Dropped description on bipolar property.
> * Renamed currnet-chopping to input-channel-rotation.
> * Drop header file and use string enum instead for reference-sources.
> * Added burn-out-current-nanoamp property.
> * Drop allOf: and just use oneOf: directly.
> * Fix inconsistent indentation in the examples.
> ---
> .../devicetree/bindings/iio/adc/ti,ads112c14.yaml | 205 +++++++++++++++++++++
> MAINTAINERS | 6 +
> 2 files changed, 211 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/iio/adc/ti,ads112c14.yaml b/Documentation/devicetree/bindings/iio/adc/ti,ads112c14.yaml
> new file mode 100644
> index 000000000000..59ee4d652a08
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/adc/ti,ads112c14.yaml
> @@ -0,0 +1,205 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/iio/adc/ti,ads112c14.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Texas Instruments' ADS112C14 and similar ADC chips
> +
> +description: |
> + Supports the following Texas Instruments' ADC chips:
> + - ADS112C14 (16-bit)
> + - ADS122C14 (24-bit)
> +
> + https://www.ti.com/lit/ds/symlink/ads122c14.pdf
> +
> + These chips are primarily designed for use with temperature sensors such as
> + RTDs and thermocouples. The channel bindings reflect this in that each channel
> + represents the conditions required to make a measurement rather than strictly
> + just the physical input channels.
> +
> +maintainers:
> + - David Lechner <dlechner@baylibre.com>
> +
> +properties:
> + compatible:
> + enum:
> + - ti,ads112c14
> + - ti,ads122c14
> +
> + reg:
> + items:
> + - minimum: 0x40
> + maximum: 0x47
> +
> + clocks:
> + maxItems: 1
> + description: Optional external clock connected to GPIO3 pin.
> +
> + avdd-supply: true
> + dvdd-supply: true
> +
> + refp-supply: true
> + refn-supply: true
> +
> + ti,refp-refn-resistor-ohms:
> + description:
> + The resistance of the external resistor between REFP and REFN when using
> + resistor bridge driven by current outputs for RTD measurements.
> +
> + interrupts:
> + minItems: 1
> + items:
> + - description: FAULT interrupt (GPIO2 pin)
> + - description: DRDY interrupt (GPIO3 pin)
> +
> + interrupt-names:
> + minItems: 1
> + maxItems: 2
> + items:
> + enum: [fault, drdy]
> +
> + gpio-controller: true
> + '#gpio-cells':
> + const: 2
> +
> + '#address-cells':
> + const: 1
> +
> + '#size-cells':
> + const: 0
> +
> +patternProperties:
> + ^channel@[0-7a-f]$:
How does this work/what's the intention here?
0-7 I get, why a-f but not 8 or 9?
> + $ref: adc.yaml
> +
> + unevaluatedProperties: false
> +
> + properties:
> + reg:
> + items:
> + - maximum: 15 # arbitrary limit, channel@ can be any combination of AIN0-AIN7
> +
> + single-channel:
> + maximum: 7
> +
> + diff-channels:
> + items:
> + maximum: 7
> +
> + bipolar: true
> +
> + input-channel-rotation: true
> +
> + excitation-channels:
> + maxItems: 2
> + items:
> + maximum: 7
> +
> + excitation-current-nanoamp:
> + maxItems: 2
> + items:
> + enum: [1000, 10000, 20000, 30000, 40000, 50000, 60000, 70000, 80000,
> + 90000, 100000, 200000, 300000, 400000, 500000, 600000, 700000,
> + 800000, 900000, 1000000]
> +
> + burn-out-current-nanoamp:
> + enum: [200, 1000, 10000]
> +
> + reference-sources:
> + items:
> + - enum: [internal-2.5v, internal-1.25v, external, avdd]
> + default: internal-2.5v
> +
> + dependencies:
> + excitation-channels: [ excitation-current-nanoamp ]
> + excitation-current-nanoamp: [ excitation-channels ]
> +
> + oneOf:
> + - required: [ single-channel ]
> + - required: [ diff-channels ]
> +
> +unevaluatedProperties: false
> +
> +required:
> + - compatible
reg?
> + - avdd-supply
> + - dvdd-supply
> +
> +dependencies:
> + refn-supply: [ refp-supply ]
> +
> +oneOf:
> + - required: [ refp-supply ]
> + - required: [ "ti,refp-refn-resistor-ohms" ]
> + - properties:
> + refp-supply: false
> + refn-supply: false
> + ti,refp-refn-resistor-ohms: false
I assume you've tested this to make sure it enforces the behaviour that
you want?
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^ permalink raw reply
* Re: [PATCH v2 2/2] arm64: dts: ti: Add support for the phyCORE-AM67x
From: Andrew Davis @ 2026-06-26 16:21 UTC (permalink / raw)
To: Nathan Morrisson, nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: sashiko-reviews, linux-arm-kernel, devicetree, linux-kernel,
upstream
In-Reply-To: <20260626161014.1146128-2-nmorrisson@phytec.com>
On 6/26/26 11:10 AM, Nathan Morrisson wrote:
> Add support for the PHYTEC phyCORE-AM67x SoM [1] and the
> corresponding phyBOARD-Rigel carrier board [2]. The phyCORE-AM67x SoM
> uses the TI AM67x SoC and can come with different sizes and models of
> DDR, eMMC, and SPI NOR Flash.
>
> Supported features:
> * Audio playback and recording
> * CAN
> * Debug UART
> * eMMC
> * Ethernet
> * GPIO buttons
> * Heartbeat LED
> * I2C Current sensor
> * I2C EEPROM
> * I2C Light sensor
> * I2C RTC
> * Micro SD card
> * PCIe
> * SPI NOR flash
> * USB
>
> [1] https://www.phytec.com/product/phycore-am67x/
> [2] https://www.phytec.com/product/phyboard-am67x-development-kit/
>
> Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com>
> ---
Reviewed-by: Andrew Davis <afd@ti.com>
> Changes in v2:
> * Move k3-j722s.dtsi include from the phyboard to phycore dts
> * Remove cpsw_port2 node because it was already disabled
> * Remove mcasp1 because it is used by HDMI, and HDMI is not included in this dts
> * Fix typo in audio codec properties ai3xx-micbias-vg -> ai31xx-micbias-vg
> * Use IRQ_TYPE_EDGE_FALLING instead of IRQ_TYPE_LEVEL_LOW for gpio expanders
>
> arch/arm64/boot/dts/ti/Makefile | 1 +
> .../boot/dts/ti/k3-am67-phycore-som.dtsi | 325 ++++++++++++
> .../boot/dts/ti/k3-am6754-phyboard-rigel.dts | 478 ++++++++++++++++++
> 3 files changed, 804 insertions(+)
> create mode 100644 arch/arm64/boot/dts/ti/k3-am67-phycore-som.dtsi
> create mode 100644 arch/arm64/boot/dts/ti/k3-am6754-phyboard-rigel.dts
>
> diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
> index 371f9a043fe5..623ee2369132 100644
> --- a/arch/arm64/boot/dts/ti/Makefile
> +++ b/arch/arm64/boot/dts/ti/Makefile
> @@ -184,6 +184,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-pcie1-ep.dtbo
> dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-usb0-type-a.dtbo
>
> # Boards with J722s SoC
> +dtb-$(CONFIG_ARCH_K3) += k3-am6754-phyboard-rigel.dtb
> dtb-$(CONFIG_ARCH_K3) += k3-am67a-beagley-ai.dtb
> dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm.dtb
> dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo
> diff --git a/arch/arm64/boot/dts/ti/k3-am67-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am67-phycore-som.dtsi
> new file mode 100644
> index 000000000000..1bbd6d024c60
> --- /dev/null
> +++ b/arch/arm64/boot/dts/ti/k3-am67-phycore-som.dtsi
> @@ -0,0 +1,325 @@
> +// SPDX-License-Identifier: GPL-2.0-only OR MIT
> +/*
> + * Copyright (C) 2026 PHYTEC America LLC
> + * Author: Nathan Morrisson <nmorrisson@phytec.com>
> + */
> +
> +#include <dt-bindings/net/ti-dp83867.h>
> +#include <dt-bindings/leds/common.h>
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include "k3-j722s.dtsi"
> +
> +/ {
> + compatible = "phytec,am67-phycore-som", "ti,j722s";
> + model = "PHYTEC phyCORE-AM67";
> +
> + aliases {
> + ethernet0 = &cpsw_port1;
> + gpio0 = &main_gpio0;
> + mmc0 = &sdhci0;
> + rtc0 = &i2c_som_rtc;
> + rtc1 = &wkup_rtc0;
> + spi0 = &ospi0;
> + };
> +
> + memory@80000000 {
> + /* 4G RAM */
> + reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
> + <0x00000008 0x80000000 0x00000000 0x80000000>;
> + device_type = "memory";
> + bootph-all;
> + };
> +
> + reserved_memory: reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + secure_tfa_ddr: tfa@9e780000 {
> + reg = <0x00 0x9e780000 0x00 0x80000>;
> + no-map;
> + };
> +
> + secure_ddr: optee@9e800000 {
> + reg = <0x00 0x9e800000 0x00 0x01800000>;
> + no-map;
> + };
> +
> + wkup_r5fss0_core0_dma_memory_region: memory@a0000000 {
> + compatible = "shared-dma-pool";
> + reg = <0x00 0xa0000000 0x00 0x100000>;
> + no-map;
> + };
> +
> + wkup_r5fss0_core0_memory_region: memory@a0100000 {
> + compatible = "shared-dma-pool";
> + reg = <0x00 0xa0100000 0x00 0xf00000>;
> + no-map;
> + };
> + };
> +
> + vcc_5v0_som: regulator-vcc-5v0-som {
> + compatible = "regulator-fixed";
> + regulator-name = "VCC_5V0_SOM";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> + pinctrl-names = "default";
> + pinctrl-0 = <&leds_pins_default>;
> +
> + led-0 {
> + color = <LED_COLOR_ID_GREEN>;
> + gpios = <&main_gpio0 13 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "heartbeat";
> + function = LED_FUNCTION_HEARTBEAT;
> + };
> + };
> +};
> +
> +&main_pmx0 {
> + leds_pins_default: leds-default-pins {
> + pinctrl-single,pins = <
> + J722S_IOPAD(0x034, PIN_OUTPUT, 7) /* (K22) OSPI0_CSN2.GPIO0_13 */
> + >;
> + };
> +
> + mdio_pins_default: mdio-default-pins {
> + pinctrl-single,pins = <
> + J722S_IOPAD(0x0160, PIN_OUTPUT, 0) /* (AC24) MDIO0_MDC */
> + J722S_IOPAD(0x015c, PIN_INPUT, 0) /* (AD25) MDIO0_MDIO */
> + >;
> + bootph-all;
> + };
> +
> + ospi0_pins_default: ospi0-default-pins {
> + pinctrl-single,pins = <
> + J722S_IOPAD(0x000, PIN_OUTPUT, 0) /* (L24) OSPI0_CLK */
> + J722S_IOPAD(0x02c, PIN_OUTPUT, 0) /* (K26) OSPI0_CSn0 */
> + J722S_IOPAD(0x00c, PIN_INPUT, 0) /* (K27) OSPI0_D0 */
> + J722S_IOPAD(0x010, PIN_INPUT, 0) /* (L27) OSPI0_D1 */
> + J722S_IOPAD(0x014, PIN_INPUT, 0) /* (L26) OSPI0_D2 */
> + J722S_IOPAD(0x018, PIN_INPUT, 0) /* (L25) OSPI0_D3 */
> + J722S_IOPAD(0x01c, PIN_INPUT, 0) /* (L21) OSPI0_D4 */
> + J722S_IOPAD(0x020, PIN_INPUT, 0) /* (M26) OSPI0_D5 */
> + J722S_IOPAD(0x024, PIN_INPUT, 0) /* (N27) OSPI0_D6 */
> + J722S_IOPAD(0x028, PIN_INPUT, 0) /* (M27) OSPI0_D7 */
> + J722S_IOPAD(0x008, PIN_INPUT, 0) /* (L22) OSPI0_DQS */
> + J722S_IOPAD(0x038, PIN_INPUT, 7) /* (J22) OSPI0_CSn3.GPIO0_14 */
> + >;
> + bootph-all;
> + };
> +
> + pmic_irq_pins_default: pmic-irq-default-pins {
> + pinctrl-single,pins = <
> + J722S_IOPAD(0x030, PIN_INPUT, 7) /* (K23) OSPI0_CSN1.GPIO0_12 */
> + >;
> + };
> +
> + rgmii1_pins_default: rgmii1-default-pins {
> + pinctrl-single,pins = <
> + J722S_IOPAD(0x014c, PIN_INPUT, 0) /* (AC25) RGMII1_RD0 */
> + J722S_IOPAD(0x0150, PIN_INPUT, 0) /* (AD27) RGMII1_RD1 */
> + J722S_IOPAD(0x0154, PIN_INPUT, 0) /* (AE24) RGMII1_RD2 */
> + J722S_IOPAD(0x0158, PIN_INPUT, 0) /* (AE26) RGMII1_RD3 */
> + J722S_IOPAD(0x0148, PIN_INPUT, 0) /* (AE27) RGMII1_RXC */
> + J722S_IOPAD(0x0144, PIN_INPUT, 0) /* (AD23) RGMII1_RX_CTL */
> + J722S_IOPAD(0x0134, PIN_OUTPUT, 0) /* (AF27) RGMII1_TD0 */
> + J722S_IOPAD(0x0138, PIN_OUTPUT, 0) /* (AE23) RGMII1_TD1 */
> + J722S_IOPAD(0x013c, PIN_OUTPUT, 0) /* (AG25) RGMII1_TD2 */
> + J722S_IOPAD(0x0140, PIN_OUTPUT, 0) /* (AF24) RGMII1_TD3 */
> + J722S_IOPAD(0x0130, PIN_OUTPUT, 0) /* (AG26) RGMII1_TXC */
> + J722S_IOPAD(0x012c, PIN_OUTPUT, 0) /* (AF25) RGMII1_TX_CTL */
> + >;
> + bootph-all;
> + };
> +};
> +
> +&mcu_pmx0 {
> + wkup_i2c0_pins_default: wkup-i2c0-default-pins {
> + pinctrl-single,pins = <
> + J722S_MCU_IOPAD(0x04c, PIN_INPUT_PULLUP, 0) /* (B9) WKUP_I2C0_SCL */
> + J722S_MCU_IOPAD(0x050, PIN_INPUT_PULLUP, 0) /* (D11) WKUP_I2C0_SDA */
> + >;
> + bootph-all;
> + };
> +};
> +
> +&cpsw3g {
> + pinctrl-names = "default";
> + pinctrl-0 = <&rgmii1_pins_default>;
> + bootph-all;
> + status = "okay";
> +};
> +
> +&cpsw3g_mdio {
> + pinctrl-names = "default";
> + pinctrl-0 = <&mdio_pins_default>;
> + status = "okay";
> +
> + cpsw3g_phy1: ethernet-phy@1 {
> + compatible = "ethernet-phy-ieee802.3-c22";
> + reg = <1>;
> + ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
> + tx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
> + ti,min-output-impedance;
> + };
> +};
> +
> +&cpsw_port1 {
> + phy-mode = "rgmii-id";
> + phy-handle = <&cpsw3g_phy1>;
> + status = "okay";
> +};
> +
> +&ospi0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&ospi0_pins_default>;
> + bootph-all;
> + status = "okay";
> +
> + serial_flash: flash@0 {
> + compatible = "jedec,spi-nor";
> + reg = <0x0>;
> + spi-tx-bus-width = <8>;
> + spi-rx-bus-width = <8>;
> + spi-max-frequency = <25000000>;
> + vcc-supply = <&vdd_1v8>;
> + cdns,tshsl-ns = <60>;
> + cdns,tsd2d-ns = <60>;
> + cdns,tchsh-ns = <60>;
> + cdns,tslch-ns = <60>;
> + cdns,read-delay = <0>;
> + };
> +};
> +
> +&sdhci0 {
> + non-removable;
> + bootph-all;
> + ti,driver-strength-ohm = <50>;
> + status = "okay";
> +};
> +
> +&wkup_i2c0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&wkup_i2c0_pins_default>;
> + clock-frequency = <400000>;
> + bootph-all;
> + status = "okay";
> +
> + pmic@30 {
> + compatible = "ti,tps65219";
> + reg = <0x30>;
> + buck1-supply = <&vcc_5v0_som>;
> + buck2-supply = <&vcc_5v0_som>;
> + buck3-supply = <&vcc_5v0_som>;
> + ldo1-supply = <&vdd_3v3>;
> + ldo2-supply = <&vdd_1v8>;
> + ldo3-supply = <&vdd_3v3>;
> + ldo4-supply = <&vdd_3v3>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pmic_irq_pins_default>;
> + interrupt-parent = <&main_gpio0>;
> + interrupts = <12 IRQ_TYPE_EDGE_FALLING>;
> + interrupt-controller;
> + #interrupt-cells = <1>;
> +
> + system-power-controller;
> + ti,power-button;
> +
> + regulators {
> + vdd_3v3: buck1 {
> + regulator-name = "VDD_3V3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + vdd_1v8: buck2 {
> + regulator-name = "VDD_1V8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + vdd_lpddr4: buck3 {
> + regulator-name = "VDD_LPDDR4";
> + regulator-min-microvolt = <1100000>;
> + regulator-max-microvolt = <1100000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + vddshv_sdio: ldo1 {
> + regulator-name = "VDDSHV_SDIO";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-allow-bypass;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + vdd_1v2: ldo2 {
> + regulator-name = "VDD_1V2";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + vdda_1v8_phy: ldo3 {
> + regulator-name = "VDDA_1V8_PHY";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + vdd_1v8_pll: ldo4 {
> + regulator-name = "VDD_1V8_PLL";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> + };
> + };
> +
> + vdd_core: regulator-vdd-core@44 {
> + compatible = "ti,tps62873";
> + reg = <0x44>;
> + bootph-pre-ram;
> + regulator-name = "VDD_CORE";
> + regulator-min-microvolt = <850000>;
> + regulator-max-microvolt = <850000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + eeprom@50 {
> + compatible = "atmel,24c32";
> + reg = <0x50>;
> + pagesize = <32>;
> + };
> +
> + som_eeprom_opt: eeprom@51 {
> + compatible = "atmel,24c32";
> + reg = <0x51>;
> + pagesize = <32>;
> + };
> +
> + i2c_som_rtc: rtc@52 {
> + compatible = "microcrystal,rv3028";
> + reg = <0x52>;
> + };
> +};
> +
> +#include "k3-j722s-ti-ipc-firmware.dtsi"
> diff --git a/arch/arm64/boot/dts/ti/k3-am6754-phyboard-rigel.dts b/arch/arm64/boot/dts/ti/k3-am6754-phyboard-rigel.dts
> new file mode 100644
> index 000000000000..e6e74910e0bb
> --- /dev/null
> +++ b/arch/arm64/boot/dts/ti/k3-am6754-phyboard-rigel.dts
> @@ -0,0 +1,478 @@
> +// SPDX-License-Identifier: GPL-2.0-only OR MIT
> +/*
> + * Copyright (C) 2026 PHYTEC America LLC
> + * Author: Nathan Morrisson <nmorrisson@phytec.com>
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/phy/phy.h>
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include "k3-serdes.h"
> +#include "k3-am67-phycore-som.dtsi"
> +
> +/ {
> + compatible = "phytec,am6754-phyboard-rigel",
> + "phytec,am67-phycore-som", "ti,j722s";
> + model = "PHYTEC phyBOARD-Rigel AM67";
> +
> + aliases {
> + gpio1 = &main_gpio1;
> + mmc1 = &sdhci1;
> + serial2 = &main_uart0;
> + usb0 = &usb0;
> + usb1 = &usb1;
> + };
> +
> + can_tc0: can-phy0 {
> + compatible = "ti,tcan1042";
> + #phy-cells = <0>;
> + max-bitrate = <8000000>;
> + standby-gpios = <&gpio_exp1 1 GPIO_ACTIVE_HIGH>;
> + };
> +
> + usb0_connector: connector {
> + compatible = "gpio-usb-b-connector", "usb-b-connector";
> + label = "USB-C";
> + data-role = "dual";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&main_usbc_power_pins_default>;
> +
> + id-gpios = <&main_gpio1 15 GPIO_ACTIVE_HIGH>;
> +
> + port {
> + usb0_con: endpoint {
> + remote-endpoint = <&usb0_ep>;
> + };
> + };
> + };
> +
> + keys {
> + compatible = "gpio-keys";
> + autorepeat;
> + pinctrl-names = "default";
> + pinctrl-0 = <&gpio_keys_pins_default>;
> +
> + key-home {
> + label = "home";
> + linux,code = <KEY_HOME>;
> + gpios = <&main_gpio1 23 GPIO_ACTIVE_HIGH>;
> + };
> +
> + key-menu {
> + label = "menu";
> + linux,code = <KEY_MENU>;
> + gpios = <&gpio_exp1 4 GPIO_ACTIVE_HIGH>;
> + };
> + };
> +
> + pcie_refclk0: pcie-refclk0 {
> + compatible = "gpio-gate-clock";
> + pinctrl-names = "default";
> + pinctrl-0 = <&main_pcie_usb_sel_pins_default>;
> + clocks = <&serdes_refclk>;
> + #clock-cells = <0>;
> + enable-gpios = <&main_gpio0 22 GPIO_ACTIVE_LOW>;
> + };
> +
> + vcc_1v8: regulator-vcc-1v8 {
> + compatible = "regulator-fixed";
> + regulator-name = "VCC_1V8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + vcc_3v3_aud: regulator-vcc-3v3-aud {
> + compatible = "regulator-fixed";
> + regulator-name = "VCC_3V3_AUD";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + vcc_3v3_mmc: regulator-vcc-3v3-mmc {
> + /* TPS22963C OUTPUT */
> + compatible = "regulator-fixed";
> + regulator-name = "VCC_3V3_MMC";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + vcc_3v3_sw: regulator-vcc-3v3-sw {
> + compatible = "regulator-fixed";
> + regulator-name = "VCC_3V3_SW";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + vcc_speaker: regulator-vcc-speaker {
> + compatible = "regulator-fixed";
> + regulator-name = "VCC_SPEAKER";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + sound {
> + compatible = "simple-audio-card";
> + simple-audio-card,widgets =
> + "Microphone", "Mic Jack",
> + "Headphone", "Headphone Jack",
> + "Line", "Stereo Jack",
> + "Speaker", "L SPKR",
> + "Speaker", "R SPKR";
> + simple-audio-card,routing =
> + "MIC1RP", "Mic Jack",
> + "Mic Jack", "MICBIAS",
> + "Headphone Jack", "HPL",
> + "Headphone Jack", "HPR",
> + "MIC1LM", "Stereo Jack",
> + "MIC1LP", "Stereo Jack",
> + "SPL", "L SPKR",
> + "SPR", "R SPKR";
> + simple-audio-card,name = "phyBOARD-Rigel";
> + simple-audio-card,format = "dsp_b";
> + simple-audio-card,bitclock-master = <&sound_master>;
> + simple-audio-card,frame-master = <&sound_master>;
> + simple-audio-card,bitclock-inversion;
> +
> + simple-audio-card,cpu {
> + sound-dai = <&mcasp0>;
> + };
> +
> + sound_master: simple-audio-card,codec {
> + sound-dai = <&audio_codec>;
> + clocks = <&audio_refclk1>;
> + };
> + };
> +};
> +
> +&main_pmx0 {
> + audio_ext_refclk1_pins_default: audio-ext-refclk1-default-pins {
> + pinctrl-single,pins = <
> + J722S_IOPAD(0x0a0, PIN_OUTPUT, 1) /* (N24) GPMC0_WPn.AUDIO_EXT_REFCLK1 */
> + >;
> + };
> +
> + gpio_exp0_int_pins_default: gpio-exp0-int-default-pins {
> + pinctrl-single,pins = <
> + J722S_IOPAD(0x0054, PIN_INPUT, 7) /* (T21) GPMC0_AD6.GPIO0_21 */
> + >;
> + };
> +
> + gpio_exp1_int_pins_default: gpio-exp1-int-default-pins {
> + pinctrl-single,pins = <
> + J722S_IOPAD(0x0244, PIN_INPUT, 7) /* (A24) MMC1_SDWP.GPIO1_49 */
> + >;
> + };
> +
> + gpio_exp2_int_pins_default: gpio-exp2-int-default-pins {
> + pinctrl-single,pins = <
> + J722S_IOPAD(0x0050, PIN_INPUT, 7) /* (T24) GPMC0_AD5.GPIO0_20 */
> + >;
> + };
> +
> + gpio_keys_pins_default: gpio-keys-default-pins {
> + pinctrl-single,pins = <
> + J722S_IOPAD(0x01d4, PIN_INPUT, 7) /* (B21) UART0_RTSn.GPIO1_23 */
> + >;
> + };
> +
> + main_i2c0_pins_default: main-i2c0-default-pins {
> + pinctrl-single,pins = <
> + J722S_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (D23) I2C0_SCL */
> + J722S_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (B22) I2C0_SDA */
> + >;
> + bootph-all;
> + };
> +
> + main_i2c1_pins_default: main-i2c1-default-pins {
> + pinctrl-single,pins = <
> + J722S_IOPAD(0x01e8, PIN_INPUT_PULLUP, 0) /* (C24) I2C1_SCL */
> + J722S_IOPAD(0x01ec, PIN_INPUT_PULLUP, 0) /* (A22) I2C1_SDA */
> + >;
> + bootph-all;
> + };
> +
> + main_mcan0_pins_default: main-mcan0-default-pins {
> + pinctrl-single,pins = <
> + J722S_IOPAD(0x1dc, PIN_INPUT, 0) /* (C22) MCAN0_RX */
> + J722S_IOPAD(0x1d8, PIN_OUTPUT, 0) /* (D22) MCAN0_TX */
> + >;
> + };
> +
> + main_mcasp0_pins_default: main-mcasp0-default-pins {
> + pinctrl-single,pins = <
> + J722S_IOPAD(0x1a8, PIN_INPUT, 0) /* (C26) MCASP0_AFSX */
> + J722S_IOPAD(0x1a4, PIN_INPUT, 0) /* (D25) MCASP0_ACLKX */
> + J722S_IOPAD(0x198, PIN_OUTPUT, 0) /* (A26) MCASP0_AXR2 */
> + J722S_IOPAD(0x194, PIN_INPUT, 0) /* (A25) MCASP0_AXR3 */
> + >;
> + };
> +
> + main_mmc1_pins_default: main-mmc1-default-pins {
> + pinctrl-single,pins = <
> + J722S_IOPAD(0x023c, PIN_INPUT, 0) /* (H22) MMC1_CMD */
> + J722S_IOPAD(0x0234, PIN_INPUT, 0) /* (H24) MMC1_CLK */
> + J722S_IOPAD(0x0230, PIN_INPUT, 0) /* (H23) MMC1_DAT0 */
> + J722S_IOPAD(0x022c, PIN_INPUT, 0) /* (H20) MMC1_DAT1 */
> + J722S_IOPAD(0x0228, PIN_INPUT, 0) /* (J23) MMC1_DAT2 */
> + J722S_IOPAD(0x0224, PIN_INPUT, 0) /* (H25) MMC1_DAT3 */
> + J722S_IOPAD(0x0240, PIN_INPUT, 0) /* (B24) MMC1_SDCD */
> + >;
> + bootph-all;
> + };
> +
> + main_pcie_pins_default: main-pcie-default-pins {
> + pinctrl-single,pins = <
> + J722S_IOPAD(0x07c, PIN_INPUT, 7) /* (T23) GPMC0_CLK.GPIO0_31 */
> + >;
> + };
> +
> + main_pcie_usb_sel_pins_default: main-pcie-usb-sel-default-pins {
> + pinctrl-single,pins = <
> + J722S_IOPAD(0x058, PIN_INPUT, 7) /* (T22) GPMC0_AD7.GPIO0_22 */
> + >;
> + };
> +
> + main_uart0_pins_default: main-uart0-default-pins {
> + pinctrl-single,pins = <
> + J722S_IOPAD(0x01c8, PIN_INPUT, 0) /* (F19) UART0_RXD */
> + J722S_IOPAD(0x01cc, PIN_OUTPUT, 0) /* (F20) UART0_TXD */
> + >;
> + bootph-all;
> + };
> +
> + main_usbc_power_pins_default: main-usbc-power-default-pins {
> + pinctrl-single,pins = <
> + J722S_IOPAD(0x1b4, PIN_INPUT, 7) /* (B20) SPI0_CS0.GPIO1_15 */
> + >;
> + };
> +};
> +
> +&audio_refclk1 {
> + assigned-clock-rates = <25000000>;
> +};
> +
> +&main_i2c0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&main_i2c0_pins_default>;
> + clock-frequency = <400000>;
> + status = "okay";
> +
> + veml6030: light-sensor@10 {
> + compatible = "vishay,veml6030";
> + reg = <0x10>;
> + vdd-supply = <&vcc_3v3_sw>;
> + };
> +};
> +
> +&main_i2c1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&main_i2c1_pins_default>;
> + clock-frequency = <100000>;
> + status = "okay";
> +
> + audio_codec: audio-codec@18 {
> + compatible = "ti,tlv320aic3110";
> + reg = <0x18>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&audio_ext_refclk1_pins_default>;
> + #sound-dai-cells = <0>;
> + ai31xx-micbias-vg = <2>;
> + reset-gpios = <&gpio_exp1 7 GPIO_ACTIVE_LOW>;
> +
> + HPVDD-supply = <&vcc_3v3_aud>;
> + SPRVDD-supply = <&vcc_speaker>;
> + SPLVDD-supply = <&vcc_speaker>;
> + AVDD-supply = <&vcc_3v3_aud>;
> + IOVDD-supply = <&vcc_3v3_aud>;
> + DVDD-supply = <&vcc_1v8>;
> + };
> +
> + gpio_exp0: gpio@20 {
> + compatible = "nxp,pcf8574";
> + reg = <0x20>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&gpio_exp0_int_pins_default>;
> + interrupt-parent = <&main_gpio0>;
> + interrupts = <21 IRQ_TYPE_EDGE_FALLING>;
> + gpio-line-names = "CSI3_STROBE", "CSI3_TRIGGER",
> + "CSI3_SHUTTER", "CSI3_OE",
> + "CSI2_STROBE", "CSI2_TRIGGER",
> + "CSI2_SHUTTER", "CSI2_OE";
> + };
> +
> + gpio_exp1: gpio@21 {
> + compatible = "nxp,pcf8574";
> + reg = <0x21>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&gpio_exp1_int_pins_default>;
> + interrupt-parent = <&main_gpio1>;
> + interrupts = <49 IRQ_TYPE_EDGE_FALLING>;
> + gpio-line-names = "GPIO0_HDMI_RST", "GPIO1_CAN_nEN",
> + "GPIO2_LED", "GPIO3_MCU_CAN0_nEN",
> + "GPIO4_BUT2", "GPIO5_MCU_CAN1_nEN",
> + "GPIO6_AUDIO_GPIO", "GPIO7_AUDIO_USER_RESET";
> + };
> +
> + gpio_exp2: gpio@23 {
> + compatible = "nxp,pcf8574";
> + reg = <0x23>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&gpio_exp2_int_pins_default>;
> + interrupt-parent = <&main_gpio0>;
> + interrupts = <20 IRQ_TYPE_EDGE_FALLING>;
> + gpio-line-names = "CSI1_STROBE", "CSI1_TRIGGER",
> + "CSI1_SHUTTER", "CSI1_OE",
> + "CSI0_STROBE", "CSI0_TRIGGER",
> + "CSI0_SHUTTER", "CSI0_OE";
> + };
> +
> + current-sensor@40 {
> + compatible = "ti,ina233";
> + reg = <0x40>;
> + shunt-resistor = <18000>;
> + };
> +
> + eeprom@51 {
> + compatible = "atmel,24c02";
> + reg = <0x51>;
> + pagesize = <16>;
> + };
> +};
> +
> +&main_mcan0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&main_mcan0_pins_default>;
> + phys = <&can_tc0>;
> + status = "okay";
> +};
> +
> +&main_uart0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&main_uart0_pins_default>;
> + bootph-all;
> + status = "okay";
> +};
> +
> +&mcasp0 {
> + #sound-dai-cells = <0>;
> + op-mode = <0>; /* MCASP_IIS_MODE */
> + pinctrl-names = "default";
> + pinctrl-0 = <&main_mcasp0_pins_default>;
> + tdm-slots = <2>;
> + serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
> + 0 0 1 2
> + 0 0 0 0
> + 0 0 0 0
> + 0 0 0 0
> + >;
> + status = "okay";
> +};
> +
> +&pcie0_rc {
> + pinctrl-names = "default";
> + pinctrl-0 = <&main_pcie_pins_default>;
> + num-lanes = <1>;
> + phys = <&serdes1_pcie_link>;
> + phy-names = "pcie-phy";
> + reset-gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>;
> + status = "okay";
> +};
> +
> +&sdhci1 {
> + /* SD/MMC */
> + vmmc-supply = <&vcc_3v3_mmc>;
> + vqmmc-supply = <&vddshv_sdio>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&main_mmc1_pins_default>;
> + disable-wp;
> + no-1-8-v;
> + bootph-all;
> + status = "okay";
> +};
> +
> +&serdes_ln_ctrl {
> + idle-states = <J722S_SERDES0_LANE0_USB>,
> + <J722S_SERDES1_LANE0_PCIE0_LANE0>;
> +};
> +
> +&serdes0 {
> + status = "okay";
> +
> + serdes0_usb_link: phy@0 {
> + reg = <0>;
> + cdns,num-lanes = <1>;
> + #phy-cells = <0>;
> + cdns,phy-type = <PHY_TYPE_USB3>;
> + resets = <&serdes_wiz0 1>;
> + };
> +};
> +
> +&serdes_wiz0 {
> + status = "okay";
> +};
> +
> +&serdes1 {
> + status = "okay";
> +
> + serdes1_pcie_link: phy@0 {
> + reg = <0>;
> + cdns,num-lanes = <1>;
> + #phy-cells = <0>;
> + cdns,phy-type = <PHY_TYPE_PCIE>;
> + resets = <&serdes_wiz1 1>;
> + };
> +};
> +
> +&serdes_wiz1 {
> + clocks = <&k3_clks 280 0>, <&k3_clks 280 1>, <&pcie_refclk0>;
> + status = "okay";
> +};
> +
> +&usbss0 {
> + ti,vbus-divider;
> + status = "okay";
> +};
> +
> +&usb0 {
> + dr_mode = "otg";
> + usb-role-switch;
> + maximum-speed = "high-speed";
> +
> + port {
> + usb0_ep: endpoint {
> + remote-endpoint = <&usb0_con>;
> + };
> + };
> +};
> +
> +&usbss1 {
> + ti,vbus-divider;
> + status = "okay";
> +};
> +
> +&usb1 {
> + dr_mode = "host";
> + phys = <&serdes0_usb_link>;
> + phy-names = "cdns3,usb3-phy";
> + maximum-speed = "super-speed";
> +};
^ permalink raw reply
* Re: [PATCH v2 2/2] arm64: dts: ti: Add support for the phyCORE-AM67x
From: sashiko-bot @ 2026-06-26 16:26 UTC (permalink / raw)
To: Nathan Morrisson; +Cc: robh, devicetree, conor+dt
In-Reply-To: <20260626161014.1146128-2-nmorrisson@phytec.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The external PCIe reference clock generator `pcie_refclk0` is never selected as a clock parent, leaving the oscillator permanently disabled.
--
commit d9846b20b72a17d0a0d8f41ab892c88f00f2de4e
Author: Nathan Morrisson <nmorrisson@phytec.com>
arm64: dts: ti: Add support for the phyCORE-AM67x
Add support for the PHYTEC phyCORE-AM67x SoM and the corresponding
phyBOARD-Rigel carrier board. Features include audio playback, CAN,
PCIe, USB, eMMC, Ethernet, and various sensors.
[1] https://www.phytec.com/product/phycore-am67x/
[2] https://www.phytec.com/product/phyboard-am67x-development-kit/
> diff --git a/arch/arm64/boot/dts/ti/k3-am6754-phyboard-rigel.dts b/arch/arm64/boot/dts/ti/k3-am6754-phyboard-rigel.dts
> new file mode 100644
> --- /dev/null
> +++ b/arch/arm64/boot/dts/ti/k3-am6754-phyboard-rigel.dts
[ ... ]
> +&serdes1 {
> + status = "okay";
> +
> + serdes1_pcie_link: phy@0 {
[Severity: High]
Will pcie_refclk0 remain disabled here since assigned-clock-parents isn't
overridden?
The base SoC device tree configures the serdes1 node with
assigned-clock-parents = <&k3_clks 280 1> (the internal core_ref_clk).
While the board DTS provides pcie_refclk0 in the serdes_wiz1 clocks array
below, it doesn't appear to override assigned-clock-parents on &serdes1 to
actually select it.
Because the clock framework might retain the SoC's default internal clock,
the physical PCIe reference clock oscillator's GPIO gate is never asserted,
which could cause PCIe link training to fail.
> + reg = <0>;
> + cdns,num-lanes = <1>;
> + #phy-cells = <0>;
> + cdns,phy-type = <PHY_TYPE_PCIE>;
> + resets = <&serdes_wiz1 1>;
> + };
> +};
> +
> +&serdes_wiz1 {
> + clocks = <&k3_clks 280 0>, <&k3_clks 280 1>, <&pcie_refclk0>;
> + status = "okay";
> +};
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260626161014.1146128-1-nmorrisson@phytec.com?part=2
^ permalink raw reply
* Re: [PATCH V15 7/9] iio: imu: inv_icm42607: Add Gyroscope to icm42607
From: sashiko-bot @ 2026-06-26 16:28 UTC (permalink / raw)
To: Chris Morgan; +Cc: robh, conor+dt, devicetree
In-Reply-To: <20260626161230.93069-8-macroalpha82@gmail.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Temperature channel rejects `SAMP_FREQ` read_avail and write requests despite sharing it.
--
commit 44a4695bd590583ad4160f9a70b38ed7f1470dfa
Author: Chris Morgan <macromorgan@hotmail.com>
iio: imu: inv_icm42607: Add Gyroscope to icm42607
Add gyroscope functions to the icm42607 driver.
> diff --git a/drivers/iio/imu/inv_icm42607/inv_icm42607_gyro.c b/drivers/iio/imu/inv_icm42607/inv_icm42607_gyro.c
> new file mode 100644
> index 0000000000000..c7215b3826adc
> --- /dev/null
> +++ b/drivers/iio/imu/inv_icm42607/inv_icm42607_gyro.c
[ ... ]
> +static int inv_icm42607_gyro_read_avail(struct iio_dev *indio_dev,
> + struct iio_chan_spec const *chan,
> + const int **vals,
> + int *type, int *length, long mask)
> +{
> + if (chan->type != IIO_ANGL_VEL)
> + return -EINVAL;
[Severity: Medium]
Does this strict check reject the IIO_TEMP channel for available value queries?
Since the temperature channel shares the SAMP_FREQ attribute with other
channels, in-kernel consumers attempting to read available sampling frequencies
might receive an unexpected -EINVAL error.
[ ... ]
> +static int inv_icm42607_gyro_write_raw(struct iio_dev *indio_dev,
> + struct iio_chan_spec const *chan,
> + int val, int val2, long mask)
> +{
> + int ret;
> +
> + if (chan->type != IIO_ANGL_VEL)
> + return -EINVAL;
[Severity: Medium]
Will this similarly reject write requests for the temperature channel,
preventing updates to the shared SAMP_FREQ attribute? (The same behavior
appears to exist in the accelerometer driver's inv_icm42607_accel_write_raw()
function).
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260626161230.93069-1-macroalpha82@gmail.com?part=7
^ permalink raw reply
* Re: [PATCH V15 8/9] iio: imu: inv_icm42607: Add Temp Support in icm42607
From: sashiko-bot @ 2026-06-26 16:29 UTC (permalink / raw)
To: Chris Morgan; +Cc: devicetree, robh, conor+dt
In-Reply-To: <20260626161230.93069-9-macroalpha82@gmail.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The IIO temperature channel advertises support for `IIO_CHAN_INFO_SAMP_FREQ` (for read, write, and read_avail), but the `read_avail`, `write_raw`, and `write_raw_get_fmt` callbacks incorrectly reject the `IIO_TEMP` channel.
--
commit 0961338c1e88a743de08d3a1a83292daf58d5ceb
Author: Chris Morgan <macromorgan@hotmail.com>
iio: imu: inv_icm42607: Add Temp Support in icm42607
Add functions for reading temperature sensor data.
> diff --git a/drivers/iio/imu/inv_icm42607/inv_icm42607_accel.c b/drivers/iio/imu/inv_icm42607/inv_icm42607_accel.c
> index 8ef9fdae1bc84..5ff6756b95154 100644
> --- a/drivers/iio/imu/inv_icm42607/inv_icm42607_accel.c
> +++ b/drivers/iio/imu/inv_icm42607/inv_icm42607_accel.c
[ ... ]
> @@ -54,6 +56,7 @@ static const struct iio_chan_spec inv_icm42607_accel_channels[] = {
> inv_icm42607_accel_ext_infos),
> INV_ICM42607_ACCEL_CHAN(IIO_MOD_Z, INV_ICM42607_ACCEL_SCAN_Z,
> inv_icm42607_accel_ext_infos),
> + INV_ICM42607_TEMP_CHAN(INV_ICM42607_ACCEL_SCAN_TEMP),
> };
[Severity: Medium]
Since INV_ICM42607_TEMP_CHAN advertises support for IIO_CHAN_INFO_SAMP_FREQ,
will accessing the sampling frequency attributes for the temperature channel
fail?
For example, when reading available frequencies,
inv_icm42607_accel_read_avail() unconditionally rejects non-acceleration
channels:
if (chan->type != IIO_ACCEL)
return -EINVAL;
Will the same issue happen for writing SAMP_FREQ in
inv_icm42607_accel_write_raw() and inv_icm42607_accel_write_raw_get_fmt(), as
they also check for IIO_ACCEL only?
> diff --git a/drivers/iio/imu/inv_icm42607/inv_icm42607_gyro.c b/drivers/iio/imu/inv_icm42607/inv_icm42607_gyro.c
> index c7215b3826adc..4e5db5e19e9f3 100644
> --- a/drivers/iio/imu/inv_icm42607/inv_icm42607_gyro.c
> +++ b/drivers/iio/imu/inv_icm42607/inv_icm42607_gyro.c
[ ... ]
> @@ -54,6 +56,7 @@ static const struct iio_chan_spec inv_icm42607_gyro_channels[] = {
> inv_icm42607_gyro_ext_infos),
> INV_ICM42607_GYRO_CHAN(IIO_MOD_Z, INV_ICM42607_GYRO_SCAN_Z,
> inv_icm42607_gyro_ext_infos),
> + INV_ICM42607_TEMP_CHAN(INV_ICM42607_GYRO_SCAN_TEMP),
> };
[Severity: Medium]
Similar to the acceleration channels above, will the temperature channel fail
when reading or writing SAMP_FREQ here, since inv_icm42607_gyro_read_avail()
and inv_icm42607_gyro_write_raw() unconditionally return -EINVAL if the
channel type is not IIO_ANGL_VEL?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260626161230.93069-1-macroalpha82@gmail.com?part=8
^ permalink raw reply
* Re: [PATCH V15 6/9] iio: imu: inv_icm42607: Add Accelerometer for icm42607
From: sashiko-bot @ 2026-06-26 16:29 UTC (permalink / raw)
To: Chris Morgan; +Cc: conor+dt, robh, devicetree
In-Reply-To: <20260626161230.93069-7-macroalpha82@gmail.com>
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] The driver fails to update the cached sensor mode (`st->conf.accel.mode` and `st->conf.gyro.mode`) in `inv_icm42607_set_sensor_conf()`, causing active sensors to be inadvertently powered down during subsequent operations on other channels.
- [Low] Comment mismatch regarding reserved values in ODR arrays.
--
commit 21180a0d12af14de0e8d6f0ad4323cd153c83b4d
Author: Chris Morgan <macromorgan@hotmail.com>
iio: imu: inv_icm42607: Add Accelerometer for icm42607
Add icm42607 accelerometer sensor for icm42607.
> diff --git a/drivers/iio/imu/inv_icm42607/inv_icm42607_accel.c b/drivers/iio/imu/inv_icm42607/inv_icm42607_accel.c
> new file mode 100644
> index 0000000000000..8ef9fdae1bc84
> --- /dev/null
> +++ b/drivers/iio/imu/inv_icm42607/inv_icm42607_accel.c
[ ... ]
> +static int inv_icm42607_accel_write_scale(struct iio_dev *indio_dev,
> + int val, int val2)
> +{
[ ... ]
> + return inv_icm42607_set_sensor_conf(st, &conf, IIO_ACCEL);
> +}
> +
> +/* IIO format int + micro , values 0-5 reserved. */
> +static const int inv_icm42607_accel_odr[][2] = {
> + [INV_ICM42607_ODR_1600HZ] = { 1600, 0 },
> + [INV_ICM42607_ODR_800HZ] = { 800, 0 },
[Severity: Low]
This isn't a bug, but the comment states values 0-5 are reserved.
However, the array defines index 5 (INV_ICM42607_ODR_1600HZ) and the iteration
logic later starts at index 5. Should this say values 0-4 are reserved
instead?
[ ... ]
> diff --git a/drivers/iio/imu/inv_icm42607/inv_icm42607_core.c b/drivers/iio/imu/inv_icm42607/inv_icm42607_core.c
> index 738970ed5c66f..300c583aba81d 100644
> --- a/drivers/iio/imu/inv_icm42607/inv_icm42607_core.c
> +++ b/drivers/iio/imu/inv_icm42607/inv_icm42607_core.c
[ ... ]
> +int inv_icm42607_set_sensor_conf(struct inv_icm42607_state *st,
> + struct inv_icm42607_sensor_conf *conf,
> + enum iio_chan_type chan_type)
> +{
> + struct inv_icm42607_sensor_conf *oldconf;
> + bool config0, config1;
> + unsigned int val;
> + int ret;
[ ... ]
> + if (config1) {
> + if (chan_type == IIO_ANGL_VEL) {
> + val = FIELD_PREP(INV_ICM42607_GYRO_CONFIG1_FILTER_MASK,
> + conf->filter);
> + ret = regmap_update_bits(st->map, INV_ICM42607_REG_GYRO_CONFIG1,
> + INV_ICM42607_GYRO_CONFIG1_FILTER_MASK, val);
> + } else {
> + val = FIELD_PREP(INV_ICM42607_ACCEL_CONFIG1_FILTER_MASK,
> + conf->filter);
> + ret = regmap_update_bits(st->map, INV_ICM42607_REG_ACCEL_CONFIG1,
> + INV_ICM42607_ACCEL_CONFIG1_FILTER_MASK, val);
> + }
> + if (ret)
> + return ret;
> +
> + oldconf->filter = conf->filter;
> + }
> +
[Severity: High]
Should conf->mode be saved to oldconf->mode before updating the power
management state?
Since oldconf->mode is never updated here, the software state permanently
tracks both sensors as OFF. When reading one sensor, the stale OFF state
for the other sensor is passed to inv_icm42607_set_pwr_mgmt0(), which
inadvertently powers it down. This can cause the driver to ping-pong power
states and incur 45ms delays on alternating reads.
> + if (chan_type == IIO_ANGL_VEL)
> + return inv_icm42607_set_pwr_mgmt0(st, conf->mode, st->conf.accel.mode);
> +
> + return inv_icm42607_set_pwr_mgmt0(st, st->conf.gyro.mode, conf->mode);
> +}
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260626161230.93069-1-macroalpha82@gmail.com?part=6
^ permalink raw reply
* Re: [PATCH v5 2/4] drm/dp: Add helper to validate DP lane counts
From: Luca Ceresoli @ 2026-06-26 16:29 UTC (permalink / raw)
To: Damon Ding
Cc: hjc, heiko, andy.yan, maarten.lankhorst, mripard, tzimmermann,
airlied, simona, robh, krzk+dt, conor+dt, andrzej.hajda,
neil.armstrong, rfoss, Laurent.pinchart, jonas, jernej.skrabec,
nicolas.frattaroli, cristian.ciocaltea, sebastian.reichel,
dmitry.baryshkov, luca.ceresoli, dianders, m.szyprowski,
dri-devel, devicetree, linux-arm-kernel, linux-rockchip,
linux-kernel
In-Reply-To: <20260604085220.2862986-3-damon.ding@rock-chips.com>
On Thu, 04 Jun 2026 16:52:18 +0800, Damon Ding <damon.ding@rock-chips.com> wrote:
> Add a generic helper function drm_dp_lane_count_is_valid() to check
> if a DisplayPort lane count is valid. According to the DP specification,
> only 1, 2, or 4 lanes are supported.
>
> This helper avoids duplicating DP lane count validation logic across
> individual DisplayPort drivers.
>
> [...]
Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
--
Luca Ceresoli, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply
* Re: [PATCH v5 3/4] drm/bridge: analogix_dp: Add validation for samsung,lane-count property
From: Luca Ceresoli @ 2026-06-26 16:29 UTC (permalink / raw)
To: Damon Ding
Cc: hjc, heiko, andy.yan, maarten.lankhorst, mripard, tzimmermann,
airlied, simona, robh, krzk+dt, conor+dt, andrzej.hajda,
neil.armstrong, rfoss, Laurent.pinchart, jonas, jernej.skrabec,
nicolas.frattaroli, cristian.ciocaltea, sebastian.reichel,
dmitry.baryshkov, luca.ceresoli, dianders, m.szyprowski,
dri-devel, devicetree, linux-arm-kernel, linux-rockchip,
linux-kernel
In-Reply-To: <20260604085220.2862986-4-damon.ding@rock-chips.com>
On Thu, 04 Jun 2026 16:52:19 +0800, Damon Ding <damon.ding@rock-chips.com> wrote:
Hello Damon,
>
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> index 7a85774aaac1..e120ef3320c1 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> @@ -1261,8 +1262,11 @@ static int analogix_dp_dt_parse_pdata(struct analogix_dp_device *dp)
> */
> of_property_read_u32(dp_node, "samsung,link-rate",
> &video_info->max_link_rate);
> - of_property_read_u32(dp_node, "samsung,lane-count",
> - &video_info->max_lane_count);
> + ret = of_property_read_u32(dp_node, "samsung,lane-count",
> + &video_info->max_lane_count);
> + if (ret || !drm_dp_lane_count_is_valid(video_info->max_lane_count))
> + return dev_err_probe(dp->dev, ret ? ret : -EINVAL,
> + "failed to parse samsung,lane-count\n");
I think this report by sashiko makes sense:
> sashiko-bot@kernel.org <sashiko-bot@kernel.org>:
>
> [Severity: High]
> Does this make the optional and deprecated samsung,lane-count property a
> strict requirement?
>
> If samsung,lane-count is absent from the device tree, of_property_read_u32()
> returns -EINVAL. This causes the condition to evaluate to true, aborting the
> probe with an error.
>
> According to the device tree bindings
> (Documentation/devicetree/bindings/display/samsung/samsung,exynos5-dp.yaml),
> this property is marked as deprecated and explicitly optional because the
> lane count can be read from the monitor. Does this patch break compatibility
> with device trees that rightfully omit this deprecated property?
(via: https://patch.msgid.link/20260604090935.7FC051F00898@smtp.kernel.org)
Can you comment on this?
Luca
--
Luca Ceresoli, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply
* Re: [PATCH v2 1/8] dt-bindings: media: Add macros for video interface devices
From: Frank Li @ 2026-06-26 16:47 UTC (permalink / raw)
To: Kieran Bingham
Cc: Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jacopo Mondi, Sakari Ailus, Jimmy Su, Matthias Fend,
Mikhail Rudenko, Daniel Scally, Jacopo Mondi, Michael Riesch,
Benjamin Mugnier, Sylvain Petinot, Laurent Pinchart, Paul Elder,
Martin Kepplinger, Quentin Schulz, Tommaso Merciai,
Svyatoslav Ryhel, Richard Acayan, Thierry Reding, Jonathan Hunter,
Frank Li, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
Bjorn Andersson, Konrad Dybcio, Geert Uytterhoeven, Magnus Damm,
Heiko Stuebner, linux-kernel, linux-media, devicetree,
linux-tegra, linux, imx, linux-arm-kernel, linux-arm-msm,
linux-renesas-soc, linux-rockchip, Conor Dooley
In-Reply-To: <20260626-kbingham-orientation-v2-1-47178be927b4@ideasonboard.com>
On Fri, Jun 26, 2026 at 01:07:53PM +0100, Kieran Bingham wrote:
> Add a new dt-bindings/media/video-interface-devices.h header that
> defines macros corresponding to the orientation enumeration types from
> media/video-interface-devices.yaml.
>
> This allows avoiding hardcoded constants in device tree sources.
>
> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com>
> Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
> ---
Reviewed-by: Frank Li <Frank.Li@nxp.com>
> include/dt-bindings/media/video-interface-devices.h | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/include/dt-bindings/media/video-interface-devices.h b/include/dt-bindings/media/video-interface-devices.h
> new file mode 100644
> index 000000000000..d2340b457292
> --- /dev/null
> +++ b/include/dt-bindings/media/video-interface-devices.h
> @@ -0,0 +1,13 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
> +/*
> + * Copyright (C) 2026 Kieran Bingham <kieran.bingham@ideasonboard.com>
> + */
> +
> +#ifndef __DT_BINDINGS_MEDIA_VIDEO_INTERFACE_DEVICES_H__
> +#define __DT_BINDINGS_MEDIA_VIDEO_INTERFACE_DEVICES_H__
> +
> +#define MEDIA_ORIENTATION_FRONT 0
> +#define MEDIA_ORIENTATION_BACK 1
> +#define MEDIA_ORIENTATION_EXTERNAL 2
> +
> +#endif /* __DT_BINDINGS_MEDIA_VIDEO_INTERFACE_DEVICES_H__ */
>
> --
> 2.52.0
>
>
^ permalink raw reply
* Re: [PATCH v2 2/8] media: dt-bindings: video-interface-devices: add video-interface-devices.h references
From: Frank Li @ 2026-06-26 16:47 UTC (permalink / raw)
To: Kieran Bingham
Cc: Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jacopo Mondi, Sakari Ailus, Jimmy Su, Matthias Fend,
Mikhail Rudenko, Daniel Scally, Jacopo Mondi, Michael Riesch,
Benjamin Mugnier, Sylvain Petinot, Laurent Pinchart, Paul Elder,
Martin Kepplinger, Quentin Schulz, Tommaso Merciai,
Svyatoslav Ryhel, Richard Acayan, Thierry Reding, Jonathan Hunter,
Frank Li, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
Bjorn Andersson, Konrad Dybcio, Geert Uytterhoeven, Magnus Damm,
Heiko Stuebner, linux-kernel, linux-media, devicetree,
linux-tegra, linux, imx, linux-arm-kernel, linux-arm-msm,
linux-renesas-soc, linux-rockchip
In-Reply-To: <20260626-kbingham-orientation-v2-2-47178be927b4@ideasonboard.com>
On Fri, Jun 26, 2026 at 01:07:54PM +0100, Kieran Bingham wrote:
> Expand the documentation of the video-interface-devices orientation to
> reference the include/dt-bindings/media/video-interface-devices.h header
> which provides human readable defines for the orientation enum, to help
> avoid hardcoding values in dts.
>
> Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
> ---
Reviewed-by: Frank Li <Frank.Li@nxp.com>
> .../bindings/media/video-interface-devices.yaml | 17 +++++++++++------
> 1 file changed, 11 insertions(+), 6 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/media/video-interface-devices.yaml b/Documentation/devicetree/bindings/media/video-interface-devices.yaml
> index a81d2a155fe6..c9c3f4f16719 100644
> --- a/Documentation/devicetree/bindings/media/video-interface-devices.yaml
> +++ b/Documentation/devicetree/bindings/media/video-interface-devices.yaml
> @@ -392,17 +392,22 @@ properties:
> The orientation of a device (typically an image sensor or a flash LED)
> describing its mounting position relative to the usage orientation of the
> system where the device is installed on.
> + See include/dt-bindings/media/video-interface-devices.h.
> +
> $ref: /schemas/types.yaml#/definitions/uint32
> enum:
> - # Front. The device is mounted on the front facing side of the system. For
> - # mobile devices such as smartphones, tablets and laptops the front side
> - # is the user facing side.
> + # MEDIA_ORIENTATION_FRONT
> + # The device is mounted on the front facing side of the system. For
> + # mobile devices such as smartphones, tablets and laptops the front
> + # side is the user facing side.
> - 0
> - # Back. The device is mounted on the back side of the system, which is
> + # MEDIA_ORIENTATION_BACK
> + # The device is mounted on the back side of the system, which is
> # defined as the opposite side of the front facing one.
> - 1
> - # External. The device is not attached directly to the system but is
> - # attached in a way that allows it to move freely.
> + # MEDIA_ORIENTATION_EXTERNAL
> + # The device is not attached directly to the system but is attached in
> + # a way that allows it to move freely.
> - 2
>
> additionalProperties: true
>
> --
> 2.52.0
>
>
^ permalink raw reply
* Re: [PATCH v2 4/8] ARM: tegra: Convert to new media orientation definitions
From: Kieran Bingham @ 2026-06-26 16:58 UTC (permalink / raw)
To: Laurent Pinchart
Cc: Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jacopo Mondi, Sakari Ailus, Jimmy Su, Matthias Fend,
Mikhail Rudenko, Daniel Scally, Jacopo Mondi, Michael Riesch,
Benjamin Mugnier, Sylvain Petinot, Paul Elder, Martin Kepplinger,
Quentin Schulz, Tommaso Merciai, Svyatoslav Ryhel, Richard Acayan,
Thierry Reding, Jonathan Hunter, Frank Li, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, Bjorn Andersson,
Konrad Dybcio, Geert Uytterhoeven, Magnus Damm, Heiko Stuebner,
linux-kernel, linux-media, devicetree, linux-tegra, linux, imx,
linux-arm-kernel, linux-arm-msm, linux-renesas-soc,
linux-rockchip
In-Reply-To: <20260626143310.GF2363897@killaraus.ideasonboard.com>
Quoting Laurent Pinchart (2026-06-26 15:33:10)
> On Fri, Jun 26, 2026 at 01:07:56PM +0100, Kieran Bingham wrote:
> > The orientation property for video interface devices now has definitions
> > to prevent hardcoded integer values for the enum options.
> >
> > Update the users throughout the nvidia device trees to use the new
> > definitions.
> >
> > Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
> > ---
> > arch/arm/boot/dts/nvidia/tegra30-asus-nexus7-grouper-common.dtsi | 3 ++-
> > arch/arm/boot/dts/nvidia/tegra30-asus-transformer-common.dtsi | 3 ++-
> > arch/arm/boot/dts/nvidia/tegra30-lg-p895.dts | 4 +++-
> > arch/arm/boot/dts/nvidia/tegra30-lg-x3.dtsi | 3 ++-
> > 4 files changed, 9 insertions(+), 4 deletions(-)
> >
<snip>
> > diff --git a/arch/arm/boot/dts/nvidia/tegra30-lg-x3.dtsi b/arch/arm/boot/dts/nvidia/tegra30-lg-x3.dtsi
> > index 60e8a19aa70e..c58e3026a115 100644
> > --- a/arch/arm/boot/dts/nvidia/tegra30-lg-x3.dtsi
> > +++ b/arch/arm/boot/dts/nvidia/tegra30-lg-x3.dtsi
> > @@ -4,6 +4,7 @@
> > #include <dt-bindings/input/input.h>
> > #include <dt-bindings/leds/common.h>
> > #include <dt-bindings/media/video-interfaces.h>
> > +#include <dt-bindings/media/video-interface-devices.h>
> > #include <dt-bindings/mfd/max77620.h>
> > #include <dt-bindings/thermal/thermal.h>
> >
> > @@ -1216,7 +1217,7 @@ rear-camera@10 {
> > dvdd-supply = <&vdd_1v2_rear>;
> > avdd-supply = <&vdd_2v7_rear>;
> >
> > - orientation = <1>; /* Rear camera */
> > + orientation = <MEDIA_ORIENTATION_REAR>;
>
It must have been hot when I typed that one out...
> This should be MEDIA_ORIENTATION_BACK. And you should compile all the
> device trees the series touch.
Indeed, I got caught out by these being in arm, with the others in arm64
even though I explicitly pulled these out to a separate patch!
Fixed up and now I have compiled also with:
make O=arm32 ARCH=arm multi_v7_defconfig
make O=arm32 ARCH=arm dtbs -j32
which looks clean.
> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Thanks
Kieran
>
> > rotation = <90>;
> >
> > nvmem = <&m24c08>;
>
> --
> Regards,
>
> Laurent Pinchart
^ permalink raw reply
* Re: [PATCH v5 1/3] dt-bindings: pwm: Add Raspberry Pi RP1 PWM controller
From: Andrea della Porta @ 2026-06-26 17:09 UTC (permalink / raw)
To: Stanimir Varbanov
Cc: Andrea della Porta, Uwe Kleine-König, linux-pwm, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Florian Fainelli,
Broadcom internal kernel review list, devicetree,
linux-rpi-kernel, linux-arm-kernel, linux-kernel, Naushir Patuck,
mbrugger, Krzysztof Kozlowski
In-Reply-To: <5b167316-ed50-448c-aa05-6a041a6544d5@suse.de>
Hi Stan,
On 18:24 Fri 12 Jun , Stanimir Varbanov wrote:
>
>
> On 6/12/26 5:01 PM, Andrea della Porta wrote:
> > From: Naushir Patuck <naush@raspberrypi.com>
> >
> > Add the devicetree binding documentation for the PWM
> > controller found in the Raspberry Pi RP1 chipset.
> >
> > Signed-off-by: Naushir Patuck <naush@raspberrypi.com>
> > Co-developed-by: Stanimir Varbanov <svarbanov@suse.de>
> > Signed-off-by: Stanimir Varbanov <svarbanov@suse.de>
> > Signed-off-by: Andrea della Porta <andrea.porta@suse.com>
> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
> > ---
> > .../bindings/pwm/raspberrypi,rp1-pwm.yaml | 54 +++++++++++++++++++
> > 1 file changed, 54 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/pwm/raspberrypi,rp1-pwm.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/pwm/raspberrypi,rp1-pwm.yaml b/Documentation/devicetree/bindings/pwm/raspberrypi,rp1-pwm.yaml
> > new file mode 100644
> > index 0000000000000..6f8461d0454f7
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/pwm/raspberrypi,rp1-pwm.yaml
> > @@ -0,0 +1,54 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/pwm/raspberrypi,rp1-pwm.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Raspberry Pi RP1 PWM controller
> > +
> > +maintainers:
> > + - Naushir Patuck <naush@raspberrypi.com>
>
> Could you add you or me as a maintainer as well. I'm not sure Naushir
> had agreed to maintain the bindings in mainline.
>
Sure, will do.
Thanks,
Andrea
> ~Stan
^ permalink raw reply
* Re: [PATCH 01/19] dt-bindings: crypto: add Rambus CryptoManager Hub
From: Krishnamoorthy, Saravanakrishnan @ 2026-06-26 17:15 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Albert Ou, Ousherovitch, Alex, Conor Dooley, David S. Miller,
Herbert Xu, Jonathan Corbet, Krzysztof Kozlowski, Palmer Dabbelt,
Paul Walmsley, Rob Herring, Shuah Khan, Alexandre Ghiti,
devicetree@vger.kernel.org, Wittenauer, Joel,
linux-api@vger.kernel.org, linux-crypto@vger.kernel.org,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-kselftest@vger.kernel.org, linux-riscv@lists.infradead.org,
Shuah Khan, SIPSupport, Nguyen, Thi
In-Reply-To: <20260626-radiant-affable-raccoon-f48b9a@quoll>
Hi Krzysztof,
Understood, and apologies. The confidentiality footer was auto-appended by our corporate mail gateway, not something we intended on an open-source submission. We've had IT disable it, so it won't be on future mail. We'll resend the series as v2 without the disclaimer.
Sorry for the noise.
Krishnan (Saravanakrishnan Krishnamoorthy)
________________________________________
From: Krzysztof Kozlowski <krzk@kernel.org>
Sent: Friday, June 26, 2026 3:55 AM
To: Krishnamoorthy, Saravanakrishnan
Cc: Albert Ou; Ousherovitch, Alex; Conor Dooley; David S. Miller; Herbert Xu; Jonathan Corbet; Krzysztof Kozlowski; Palmer Dabbelt; Paul Walmsley; Rob Herring; Shuah Khan; Alexandre Ghiti; devicetree@vger.kernel.org; Wittenauer, Joel; linux-api@vger.kernel.org; linux-crypto@vger.kernel.org; linux-doc@vger.kernel.org; linux-kernel@vger.kernel.org; linux-kselftest@vger.kernel.org; linux-riscv@lists.infradead.org; Shuah Khan; SIPSupport; Nguyen, Thi
Subject: Re: [PATCH 01/19] dt-bindings: crypto: add Rambus CryptoManager Hub
[Some people who received this message don't often get email from krzk@kernel.org. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
Caution: < External Email >
On Thu, Jun 25, 2026 at 10:33:09AM -0700, Saravanakrishnan Krishnamoorthy wrote:
> From: Alex Ousherovitch <aousherovitch@rambus.com>
>
> Add device tree binding schema for the CRI CryptoManager Hub (CMH)
> hardware crypto accelerator. The binding covers the parent SoC-level
> node with register region, interrupt, DMA properties, and per-core
> child nodes identified by compatible string and unit address.
...
>
> ** This message and any attachments are for the sole use of the intended recipient(s). It may contain information that is confidential and privileged. If you are not the intended recipient of this message, you are prohibited from printing, copying, forwarding or saving it. Please delete the message and attachments and notify the sender immediately. **
OK, we are done. I am removing your posting from Patchwork.
Best regards,
Krzysztof
^ permalink raw reply
* (no subject)
From: Daniel Palmer @ 2026-06-26 17:17 UTC (permalink / raw)
To: robh, saravanak; +Cc: devicetree, linux-kernel, Daniel Palmer
From 1a75d7c1077cf785b479cb975e42e09fff2839cd Mon Sep 17 00:00:00 2001
From: Daniel Palmer <daniel@thingy.jp>
Date: Fri, 18 Apr 2025 18:28:26 +0900
Subject: [PATCH] of/address: Drop ISA parts when !CONFIG_ISA
The PCI parts are already wrapped in #ifdef CONFIG_PCI
so it seems sensible to add #ifdef CONFIG_ISA around the ISA
parts.
This reduces the code/data size a bit on configs with !CONFIG_ISA.
Signed-off-by: Daniel Palmer <daniel@thingy.jp>
---
I thought about making this RFC as I'm a bit unsure if machines
that need this ISA stuff actually select CONFIG_ISA or not.
The only in-kernel devicetrees that seem to use this are 4 old powerpc
ones and I couldn't work out if those boards do end up with CONFIG_ISA.
But then again it seems odd for everyone to get this code for 4 old
boards.
drivers/of/address.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/of/address.c b/drivers/of/address.c
index cf4aab11e9b1..9b2f0d462fb5 100644
--- a/drivers/of/address.c
+++ b/drivers/of/address.c
@@ -277,6 +277,7 @@ int of_range_to_resource(struct device_node *np, int index, struct resource *res
}
EXPORT_SYMBOL(of_range_to_resource);
+#ifdef CONFIG_ISA
/*
* ISA bus specific translator
*/
@@ -316,6 +317,7 @@ static unsigned int of_bus_isa_get_flags(const __be32 *addr)
flags |= IORESOURCE_MEM;
return flags;
}
+#endif
static int of_bus_default_flags_match(struct device_node *np)
{
@@ -349,6 +351,7 @@ static const struct of_bus of_busses[] = {
.get_flags = of_bus_pci_get_flags,
},
#endif /* CONFIG_PCI */
+#ifdef CONFIG_ISA
/* ISA */
{
.name = "isa",
@@ -360,6 +363,7 @@ static const struct of_bus of_busses[] = {
.flag_cells = 1,
.get_flags = of_bus_isa_get_flags,
},
+#endif /* CONFIG_ISA */
/* Default with flags cell */
{
.name = "default-flags",
--
2.53.0
^ permalink raw reply related
* [PATCH] of/address: Drop ISA parts when !CONFIG_ISA
From: Daniel Palmer @ 2026-06-26 17:19 UTC (permalink / raw)
To: robh, saravanak; +Cc: devicetree, linux-kernel, Daniel Palmer
The PCI parts are already wrapped in #ifdef CONFIG_PCI
so it seems sensible to add #ifdef CONFIG_ISA around the ISA
parts.
This reduces the code/data size a bit on configs with !CONFIG_ISA.
Signed-off-by: Daniel Palmer <daniel@thingy.jp>
---
Sorry for the spam, somehow I botched sending a patch..
I thought about making this RFC as I'm a bit unsure if machines
that need this ISA stuff actually select CONFIG_ISA or not.
The only in-kernel devicetrees that seem to use this are 4 old powerpc
ones and I couldn't work out if those boards do end up with CONFIG_ISA.
But then again it seems odd for everyone to get this code for 4 old
boards.
drivers/of/address.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/of/address.c b/drivers/of/address.c
index cf4aab11e9b1..9b2f0d462fb5 100644
--- a/drivers/of/address.c
+++ b/drivers/of/address.c
@@ -277,6 +277,7 @@ int of_range_to_resource(struct device_node *np, int index, struct resource *res
}
EXPORT_SYMBOL(of_range_to_resource);
+#ifdef CONFIG_ISA
/*
* ISA bus specific translator
*/
@@ -316,6 +317,7 @@ static unsigned int of_bus_isa_get_flags(const __be32 *addr)
flags |= IORESOURCE_MEM;
return flags;
}
+#endif
static int of_bus_default_flags_match(struct device_node *np)
{
@@ -349,6 +351,7 @@ static const struct of_bus of_busses[] = {
.get_flags = of_bus_pci_get_flags,
},
#endif /* CONFIG_PCI */
+#ifdef CONFIG_ISA
/* ISA */
{
.name = "isa",
@@ -360,6 +363,7 @@ static const struct of_bus of_busses[] = {
.flag_cells = 1,
.get_flags = of_bus_isa_get_flags,
},
+#endif /* CONFIG_ISA */
/* Default with flags cell */
{
.name = "default-flags",
--
2.53.0
^ permalink raw reply related
* Re: [PATCH 19/19] MAINTAINERS: add Rambus CryptoManager Hub (CMH)
From: Krishnamoorthy, Saravanakrishnan @ 2026-06-26 17:22 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Albert Ou, Ousherovitch, Alex, Conor Dooley, David S. Miller,
Herbert Xu, Jonathan Corbet, Krzysztof Kozlowski, Palmer Dabbelt,
Paul Walmsley, Rob Herring, Shuah Khan, Alexandre Ghiti,
devicetree@vger.kernel.org, Wittenauer, Joel,
linux-api@vger.kernel.org, linux-crypto@vger.kernel.org,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-kselftest@vger.kernel.org, linux-riscv@lists.infradead.org,
Shuah Khan, SIPSupport, Nguyen, Thi
In-Reply-To: <20260626-lush-eel-of-election-5fcbde@quoll>
Hi Krzysztof,
Thanks for the review - all fair, and we'll fix them in v2:
Drop L: sipsupport@rambus.com (keeping only linux-crypto).
Drop the T: line - we don't maintain a tree; the driver will go through the crypto tree.
Yes, Joel and Thi reviewed and acknowledged with the statement of oversight.
Krishnan
________________________________________
From: Krzysztof Kozlowski <krzk@kernel.org>
Sent: Friday, June 26, 2026 3:57 AM
To: Krishnamoorthy, Saravanakrishnan
Cc: Albert Ou; Ousherovitch, Alex; Conor Dooley; David S. Miller; Herbert Xu; Jonathan Corbet; Krzysztof Kozlowski; Palmer Dabbelt; Paul Walmsley; Rob Herring; Shuah Khan; Alexandre Ghiti; devicetree@vger.kernel.org; Wittenauer, Joel; linux-api@vger.kernel.org; linux-crypto@vger.kernel.org; linux-doc@vger.kernel.org; linux-kernel@vger.kernel.org; linux-kselftest@vger.kernel.org; linux-riscv@lists.infradead.org; Shuah Khan; SIPSupport; Nguyen, Thi
Subject: Re: [PATCH 19/19] MAINTAINERS: add Rambus CryptoManager Hub (CMH)
[Some people who received this message don't often get email from krzk@kernel.org. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
Caution: < External Email >
On Thu, Jun 25, 2026 at 10:33:27AM -0700, Saravanakrishnan Krishnamoorthy wrote:
> From: Alex Ousherovitch <aousherovitch@rambus.com>
>
> Add MAINTAINERS entry for the CRI CryptoManager Hub (CMH) hardware
> crypto accelerator driver under drivers/crypto/cmh/.
>
> Co-developed-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com>
> Signed-off-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com>
> Signed-off-by: Alex Ousherovitch <aousherovitch@rambus.com>
> Reviewed-by: Joel Wittenauer <Joel.Wittenauer@cryptography.com>
> Reviewed-by: Thi Nguyen <thin@rambus.com>
Are these people really provided you with Reviewer's statement of
oversight? Do they understand what does it mean?
> ---
> MAINTAINERS | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 90034eb7874e..ecb389795e3d 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -6797,6 +6797,25 @@ F: kernel/cred.c
> F: rust/kernel/cred.rs
> F: Documentation/security/credentials.rst
>
> +CRI CRYPTOMANAGER HUB (CMH) HARDWARE CRYPTO ACCELERATOR
> +M: Alex Ousherovitch <aousherovitch@rambus.com>
> +M: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com>
> +R: Joel Wittenauer <Joel.Wittenauer@cryptography.com>
> +R: Thi Nguyen <thin@rambus.com>
> +L: linux-crypto@vger.kernel.org
> +L: sipsupport@rambus.com (moderated for non-subscribers)
NAK, drop. You are not allowed to add here internal moderated mailing
lists. We are not going to participate in your corporate dances.
> +S: Maintained
> +T: git https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git
Drop, you do not have commit rights there.
> +F: Documentation/ABI/testing/cmh-mgmt
> +F: Documentation/ABI/testing/debugfs-driver-cmh
> +F: Documentation/ABI/testing/sysfs-driver-cmh
> +F: Documentation/crypto/device_drivers/cmh.rst
> +F: Documentation/devicetree/bindings/crypto/cri,cmh.yaml
> +F: Documentation/userspace-api/ioctl/cmh_mgmt.rst
> +F: drivers/crypto/cmh/
> +F: include/uapi/linux/cmh_mgmt_ioctl.h
> +F: tools/testing/selftests/drivers/crypto/cmh/
> +
> INTEL CRPS COMMON REDUNDANT PSU DRIVER
> M: Ninad Palsule <ninad@linux.ibm.com>
> L: linux-hwmon@vger.kernel.org
> --
> 2.43.7
>
>
> ** This message and any attachments are for the sole use of the intended recipient(s). It may contain information that is confidential and privileged. If you are not the intended recipient of this message, you are prohibited from printing, copying, forwarding or saving it. Please delete the message and attachments and notify the sender immediately. **
Heh, I should have ignored your message...
Best regards,
Krzysztof
^ permalink raw reply
* Re: (no subject)
From: sashiko-bot @ 2026-06-26 17:33 UTC (permalink / raw)
To: Daniel Palmer; +Cc: conor+dt, devicetree, robh
In-Reply-To: <20260626171747.202269-1-daniel@thingy.jp>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Conditionally compiling the OF 'isa' bus translator based on `CONFIG_ISA` breaks device tree address translation for non-ISA architectures (e.g., ARM64) that use 'isa' nodes for LPC or legacy I/O bridges.
--
commit 3f535ae9ca6c863a12c1d6dbcfcb4358a6f6ed4b
Author: Daniel Palmer <daniel@thingy.jp>
of/address: Drop ISA parts when !CONFIG_ISA
This patch conditionally compiles the ISA parts of the Open Firmware address
translator based on CONFIG_ISA to reduce code size.
> diff --git a/drivers/of/address.c b/drivers/of/address.c
> index cf4aab11e9b1f..9b2f0d462fb59 100644
> --- a/drivers/of/address.c
> +++ b/drivers/of/address.c
[ ... ]
> @@ -349,6 +351,7 @@ static const struct of_bus of_busses[] = {
> .get_flags = of_bus_pci_get_flags,
> },
> #endif /* CONFIG_PCI */
> +#ifdef CONFIG_ISA
> /* ISA */
> {
> .name = "isa",
> @@ -360,6 +363,7 @@ static const struct of_bus of_busses[] = {
> .flag_cells = 1,
> .get_flags = of_bus_isa_get_flags,
> },
> +#endif /* CONFIG_ISA */
[Severity: High]
Does this break device tree address translation for non-ISA architectures (like
ARM64) that use 'isa' nodes for LPC or legacy I/O bridges?
Platforms like Hisilicon hip06/hip07 don't have CONFIG_ISA defined but still
use 'isa' nodes. If this bus entry is compiled out, they will fall back to the
'default' OF bus translator.
The 'default' bus translator's get_flags method (of_bus_default_get_flags)
unconditionally returns IORESOURCE_MEM. This causes __of_address_to_resource()
to misclassify the I/O port and call of_translate_address() instead of
of_translate_ioport().
Because Hisilicon LPC registers an indirect I/O host, of_translate_address()
then fails with OF_BAD_ADDR (-EINVAL), causing probe failures for devices like
UART and IPMI.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260626171747.202269-1-daniel@thingy.jp?part=1
^ permalink raw reply
* Re: [PATCH v5 0/8] can: flexcan: Add NXP S32N79 SoC support
From: Ciprian Marian Costea @ 2026-06-26 17:34 UTC (permalink / raw)
To: Marc Kleine-Budde
Cc: Pengutronix Kernel Team, linux-can, devicetree, linux-kernel, imx,
linux-arm-kernel, NXP S32 Linux Team, Christophe Lizzi,
Alberto Ruiz, Enric Balletbo, Eric Chanudet, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Frank Li, Sascha Hauer,
Fabio Estevam, Vincent Mailhol
In-Reply-To: <20260609142954.1807421-1-ciprianmarian.costea@oss.nxp.com>
On 6/9/2026 5:29 PM, Ciprian Costea wrote:
> From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
Hello Marc,
I just want to ping for the status of this series.
Please let me know if you expect any more changes.
Best Regards,
Ciprian
>
> This patch series adds FlexCAN support for the NXP S32N79 SoC.
>
> The S32N79 is an automotive-grade processor from NXP with multiple
> FlexCAN instances. The FlexCAN IP integration on S32N79 differs from
> other SoCs in the interrupt routing - it uses two separate interrupt
> lines:
> - one interrupt for mailboxes 0-127
> - one interrupt for bus error detection and device state changes
>
> The CAN controllers are connected through an irqsteer interrupt
> controller in the RCU (Resource Control Unit) domain.
>
> This series:
> 1. Splits flexcan_irq() into dedicated handlers for multi-IRQ platforms
> 2. Adds dt-bindings documentation for S32N79 FlexCAN
> 3. Introduces FLEXCAN_QUIRK_IRQ_BERR to handle the two-interrupt
> configuration
> 4. Adds S32N79 device data and compatible string to the driver
> 5. Adds FlexCAN device tree nodes for S32N79 SoC
> 6. Enables FlexCAN devices on the S32N79-RDB board
>
> Tested on S32N79-RDB board with CAN and CAN FD communication.
>
> v5 -> v4
> - Simplified splitting rx/tx masks per mailbox IRQ line
>
> v4 -> v3
> - flexcan_chip_interrupts_enable(): disable/enable all IRQ lines
> (not just dev->irq) during IMASK register writes
> - Split rx/tx masks per mailbox IRQ line (struct flexcan_mb_irq) so
> each handler on S32G2 only processes its own MB range
> - Added received Acked-by tag on DT bindings patch
>
> v3 -> v2
> - Split flexcan_irq() into dedicated handlers (flexcan_irq_mb,
> flexcan_irq_boff, flexcan_irq_berr) to fix duplicate event
> processing when multiple IRQ lines run concurrently (new patch).
> - Added flexcan_irq_esr() handler composing state + berr for S32N79
> - Ordered quirks used by s32n devtype data by value.
>
> v2 -> v1
> - Renamed FLEXCAN_QUIRK_NR_IRQ_2 to FLEXCAN_QUIRK_IRQ_BERR to better
> describe the actual hardware feature
> - Appended new quirk at the end
> - Switched from platform_get_irq to platform_get_irq_byname usage
> - Updated interrupt description in dt-bindings
>
> Ciprian Marian Costea (8):
> can: flexcan: use dedicated IRQ handlers for multi-IRQ platforms
> can: flexcan: disable all IRQ lines in
> flexcan_chip_interrupts_enable()
> can: flexcan: split rx/tx masks per mailbox IRQ line
> dt-bindings: can: fsl,flexcan: add NXP S32N79 SoC support
> can: flexcan: add FLEXCAN_QUIRK_IRQ_BERR quirk
> can: flexcan: add NXP S32N79 SoC support
> arm64: dts: s32n79: add FlexCAN nodes
> arm64: dts: s32n79: enable FlexCAN devices
>
> .../bindings/net/can/fsl,flexcan.yaml | 30 ++-
> arch/arm64/boot/dts/freescale/s32n79-rdb.dts | 12 +
> arch/arm64/boot/dts/freescale/s32n79.dtsi | 50 ++++
> drivers/net/can/flexcan/flexcan-core.c | 227 +++++++++++++++---
> drivers/net/can/flexcan/flexcan.h | 2 +
> 5 files changed, 292 insertions(+), 29 deletions(-)
>
^ permalink raw reply
* Re: [PATCH] of/address: Drop ISA parts when !CONFIG_ISA
From: sashiko-bot @ 2026-06-26 17:35 UTC (permalink / raw)
To: Daniel Palmer; +Cc: conor+dt, robh, devicetree
In-Reply-To: <20260626171906.476688-1-daniel@thingy.jp>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Wrapping the 'isa' OF bus translator in `#ifdef CONFIG_ISA` breaks I/O address translation for LPC/ISA bridges on architectures that do not enable `CONFIG_ISA`.
--
commit 2b56de0432a2e0bc839872a80da8947f0a3d2b72
Author: Daniel Palmer <daniel@thingy.jp>
of/address: Drop ISA parts when !CONFIG_ISA
This commit wraps the ISA-specific address translation code in of/address.c
with #ifdef CONFIG_ISA. This is intended to reduce code and data size on
configurations that do not enable CONFIG_ISA.
> diff --git a/drivers/of/address.c b/drivers/of/address.c
> index cf4aab11e9b1f..9b2f0d462fb59 100644
> --- a/drivers/of/address.c
> +++ b/drivers/of/address.c
[ ... ]
> @@ -349,6 +351,7 @@ static const struct of_bus of_busses[] = {
> .get_flags = of_bus_pci_get_flags,
> },
> #endif /* CONFIG_PCI */
> +#ifdef CONFIG_ISA
> /* ISA */
> {
> .name = "isa",
> .addresses = "reg",
> .match = of_bus_isa_match,
> .count_cells = of_bus_isa_count_cells,
> .map = of_bus_isa_map,
> .translate = of_bus_default_flags_translate,
> .flag_cells = 1,
> .get_flags = of_bus_isa_get_flags,
> },
> +#endif /* CONFIG_ISA */
[Severity: High]
Will this break I/O address translation for LPC/ISA bridges on architectures
that do not enable CONFIG_ISA?
While the architecture itself might not have CONFIG_ISA enabled (such as
ARM64, PowerPC, or MIPS), they often still use LPC bridges in their device
trees for devices like RTC, UART, or IPMI nodes.
If this "isa" translator is completely disabled, the bus mapping will fall
back to the "default" translator. The default translator will incorrectly
parse these resources as IORESOURCE_MEM instead of IORESOURCE_IO.
Could this prevent drivers relying on I/O space access from probing or
mapping resources correctly on those platforms?
> /* Default with flags cell */
> {
> .name = "default-flags",
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260626171906.476688-1-daniel@thingy.jp?part=1
^ permalink raw reply
* [PATCH v2 00/17] mod_devicetable.h: Split into per subsystem headers
From: Uwe Kleine-König (The Capable Hub) @ 2026-06-26 18:00 UTC (permalink / raw)
To: Linus Torvalds, Greg Kroah-Hartman, Mark Brown
Cc: Nathan Chancellor, Nick Desaulniers, Bill Wendling, Justin Stitt,
Raag Jadav, Sohil Mehta, Dave Hansen, Rob Herring,
Saravana Kannan, Bjorn Helgaas, Rafael J. Wysocki, Len Brown,
Andi Shyti, linux-kernel, Yemike Abhilash Chandra,
Mauro Carvalho Chehab, linux-media, Nicolas Frattaroli,
Liam Girdwood, Jaroslav Kysela, Takashi Iwai, Heiko Stuebner,
linux-rockchip, linux-sound, linux-arm-kernel, Danilo Krummrich,
driver-core, Jonathan Cameron, Dmitry Torokhov,
Bartosz Golaszewski, Pei Xiao, Shashank Balaji, Ben Horgan,
Johan Hovold, linux-usb, Nikita Kravets, Hans de Goede,
Ilpo Järvinen, platform-driver-x86, devicetree, linux-i2c,
Daniel Scally, Sakari Ailus, Minas Harutyunyan, Tianrui Zhao,
Bibo Mao, Huacai Chen, WANG Xuerui, kvm, loongarch
Hello,
this is v2 of
https://lore.kernel.org/lkml/20260622210733.1743063-2-u.kleine-koenig@baylibre.com
which only consisted of the patch that is the first in this series.
Changes to this first patch are mostly cosmetic (whitespace cleanups)
and I renamed tee.h to tee_client.h to match tee_client_device_id.
The following 14 patches are preparations for patch #16 that replaces
the include of <linux/mod_devicetable.h> in several key header files by
a subset of the split headers that are needed for these. As there are
some drivers that rely on e.g. <linux/i2c.h> pulling in the definition
for usb_device_id, these must be prepared before <linux/i2c.h> stops
providing this definition.
patch #17 adapts various .c files to stop including
<linux/mod_devicetable.h>. These are easier as the device_ids that have
to be provided are only those used in that .c file. This last patch was
created by the Python script below. That also checks if the needed
headers are present for the files that don't explicitly include
<linux/mod_devicetable.h>. There are 131 files where the script was
unable to prove the includes to be sufficient. Most of them are covered
by build testing, the few remaining ones (12 .c files, 36 headers) were
checked semi-manually.
This series was compile tested for alpha, arc, arm64, loongarch, m68k,
mips, powerpc, riscv, s390, sh, sparc, and x86_64 using an allmodconfig
configuration.
There are a few remaining usages of <linux/mod_devicetable.h>, I plan to
tackle them for the next merge window. These also shouldn't affect so
many files any more and so these changes will annoy less (i.e. result in
less recompilation during bisection and/or development).
Preparing this series took me longer than I hoped, so it's too late to
get it into next before -rc1. I will push this series to
https://git.kernel.org/pub/scm/linux/kernel/git/ukleinek/linux.git device-id-rework
Given that there are a few merge conflicts with what is in Linus's tree
in the meantime, my plan is to rebase this branch to v7.2-rc1, retest
and then hopefully consider it ready for v7.2-rc2 after cooking in next
for a few days. This has the advantage that hardly any new conflicts
should get introduced in Linus's tree then.
Sounds like a sensible plan?
@Mark: I hope to have the rebase ready before you start working on
next-20260629. If not, just drop this branch from your list for this
day.
Best regards
Uwe
------->8--------
#!/usr/bin/env python3
import re
import os
# Maps a struct name to a set of headers that are enough to provide that struct.
symbol_header_map = {
'acpi_device_id': (
'linux/mod_device_id/acpi.h',
'linux/acpi.h', # includes <linux/mod_devicetable.h>
'linux/i2c.h', # includes <linux/acpi.h>
'linux/device.h', # includes <linux/device/driver.h> which includes linux/mod_device_id/acpi.h
'linux/spi/spi.h', # includes <linux/device.h>
'linux/backlight.h', # includes <linux/device.h>
'linux/pci.h', # includes <linux/device.h>
'linux/platform_device.h', # includes <linux/device.h>
'linux/auxiliary_bus.h', # includes <linux/device.h>
'sound/soc.h', # includes <linux/platform_device.h>
'sound/sof.h', # includes <linux/device.h>
),
'amba_id': (
'linux/mod_device_id/amba.h',
'linux/amba/bus.h', # includes <linux/mod_devicetable.h>
),
'ap_device_id': (
'linux/mod_device_id/ap.h',
),
'apr_device_id': (
'linux/mod_device_id/apr.h',
'linux/soc/qcom/apr.h', # includes <linux/mod_devicetable.h>
),
'auxiliary_device_id': (
'linux/mod_device_id/auxiliary.h',
'linux/auxiliary_bus.h', # includes <linux/mod_devicetable.h>
'linux/misc/keba.h', # includes <linux/auxiliary_bus.h>
'linux/mlx4/driver.h', # includes <linux/auxiliary_bus.h>
'linux/soc/cirrus/ep93xx.h', # includes <linux/auxiliary_bus.h>
),
'bcma_device_id': (
'linux/mod_device_id/bcma.h',
'linux/bcma/bcma.h', # includes <linux/mod_devicetable.h>
),
'ccw_device_id': (
'linux/mod_device_id/ccw.h',
'asm/ccwdev.h', # includes <linux/mod_devicetable.h>
),
'cdx_device_id': (
'linux/mod_device_id/cdx.h',
'linux/cdx/cdx_bus.h', # includes <linux/mod_devicetable.h>
),
'coreboot_device_id': (
'linux/mod_device_id/coreboot.h',
),
'css_device_id': (
'linux/mod_device_id/css.h',
'css.h',
),
'dfl_device_id': (
'linux/mod_device_id/dfl.h',
'linux/dfl.h', # includes <linux/mod_devicetable.h>
),
'dmi_(device|system)_id': (
'linux/mod_device_id/dmi.h',
'linux/dmi.h', # includes <linux/mod_devicetable.h>
),
'eisa_device_id': (
'linux/mod_device_id/eisa.h',
'linux/eisa.h', # includes <linux/mod_devicetable.h>
),
'fsl_mc_device_id': (
'linux/mod_device_id/fsl_mc.h',
'linux/fsl/mc.h', # includes <linux/mod_devicetable.h>
),
'hda_device_id': (
'linux/mod_device_id/hda.h',
'sound/hda_codec.h', # includes <linux/mod_devicetable.h>
),
'hid_device_id': (
'linux/mod_device_id/hid.h',
'linux/hid.h', # includes <linux/mod_devicetable.h>
'linux/hidraw.h', # includes <linux/hid.h> transitively
),
'hv_vmbus_device_id': (
'linux/mod_device_id/hv_vmbus.h',
'linux/hyperv.h', # includes linux/mod_devicetable.h>
'hyperv_net.h', # includes linux/hyperv.h
),
'i2c_device_id': (
'linux/mod_device_id/i2c.h',
'linux/i2c.h', # includes <linux/mod_devicetable.h>
'linux/mfd/lp873x.h', # includes <linux/i2c.h>
'media/dvb_frontend.h', # includes <linux/i2c.h>
),
'i3c_device_id': (
'linux/mod_device_id/i3c.h',
'linux/i3c/device.h', # includes <linux/mod_devicetable.h>
'linux/i3c/master.h', # includes <linux/i3c/device.h>
),
'ieee1394_device_id': (
'linux/mod_device_id/ieee1394.h',
'linux/firewire.h', # should include <linux/mod_device_id/ieee1394.h>, instead of fwd decl
),
'input_device_id': (
'linux/mod_device_id/input.h',
'linux/input.h', # includes <linux/mod_devicetable.h>
),
'ipack_device_id': (
'linux/mod_device_id/ipack.h',
'linux/ipack.h', # includes <linux/mod_devicetable.h>
),
'isapnp_device_id': (
'linux/mod_device_id/isapnp.h',
'linux/isapnp.h', # includes <linux/mod_devicetable.h>
),
'ishtp_device_id': (
'linux/mod_device_id/ishtp.h',
'linux/intel-ish-client-if.h', # includes <linux/mod_devicetable.h>
),
'mcb_device_id': (
'linux/mod_device_id/mcb.h',
'linux/mcb.h', # includes <linux/mod_devicetable.h>
),
'mdio_device_id': (
'linux/mod_device_id/mdio.h',
'linux/phy.h', # includes <linux/mod_devicetable.h>
),
'mei_cl_device_id': (
'linux/mod_device_id/mei_cl.h',
'linux/mei_cl_bus.h', # includes <linux/mod_devicetable.h>
),
'mhi_device_id': (
'linux/mod_device_id/mhi.h',
'linux/mhi.h', # should include <linux/mod_device_id/mhi.h>
),
'mips_cdmm_device_id': (
'linux/mod_device_id/mips_cdmm.h',
'asm/cdmm.h', # arch/mips/include/asm/cdmm.h includes mod_devicetable.h
),
'of_device_id': (
'linux/mod_device_id/of.h',
'linux/of.h', # includes <linux/mod_devicetable.h>
'linux/of_address.h', # includes <linux/of.h>
'linux/of_platform.h', # includes <linux/mod_devicetable.h>
'linux/device/driver.h', # includes <linux/mod_device_id/of.h>
'linux/device.h', # includes <linux/device/driver.h>
'linux/acpi.h', # includes <linux/device.h>
'linux/backlight.h', # includes <linux/device.h>
'linux/moxtet.h', # includes <linux/device.h>
'linux/greybus.h', # includes <linux/device.h>
'linux/platform_device.h', # includes <linux/device.h>
'linux/powercap.h', # includes <linux/device.h>
'linux/auxiliary_bus.h', # includes <linux/device.h>
'linux/i2c.h', # includes <linux/of.h>
'linux/reset.h', # includes <linux/of.h>
'linux/spi/spi.h', # includes <linux/device.h>
'asm/machine.h', # arch/mips/include/asm/machine.h includes <linux/of.h>
'asm/macio.h', # arch/powerpc/include/asm/macio.h includes <linux/of.h>
'sound/soc.h', # includes <linux/platform_device.h>
'sound/dmaengine_pcm.h', # includes <sound/soc.h>
'linux/pm_qos.h', # includes <linux/device.h>
'linux/clk-provider.h', # includes <linux/of.h>
),
'parisc_device_id': (
'linux/mod_device_id/parisc.h',
'asm/parisc-device.h', # should include <linux/mod_device_id/parisc.h>
'asm/hardware.h', # includes <linux/mod_devicetable.h>
),
'pci_device_id': (
'linux/mod_device_id/pci.h',
'linux/pci.h', # includes <linux/mod_devicetable.h>
'linux/comedi/comedi_pci.h', # includes <linux/pci.h>
'sound/hdaudio.h', # includes <linux/pci.h>
'sound/hdaudio_ext.h', # includes <sound/hdaudio.h>
),
'pci_epf_device_id': (
'linux/mod_device_id/pci.h',
'linux/pci-epf.h', # includes <linux/mod_devicetable.h>
),
'pcmcia_device_id': (
'linux/mod_device_id/pcmcia.h',
'pcmcia/ds.h', # includes <linux/mod_devicetable.h>
'linux/comedi/comedi_pcmcia.h', # includes <pcmcia/ds.h>
),
'platform_device_id': (
'linux/mod_device_id/platform.h',
'linux/platform_device.h', # includes <linux/mod_device_id/platform.h>
'linux/mfd/core.h', # includes <linux/platform_device.h>
'linux/ipmi_smi.h', # includes <linux/platform_device.h>
'sound/soc.h', # includes <linux/platform_device.h>
'sound/dmaengine_pcm.h', # includes <sound/soc.h>
),
'pnp_(card_)?device_id': (
'linux/mod_device_id/pnp.h',
'linux/pnp.h', # includes <linux/mod_devicetable.h>
'linux/isapnp.h', # includes <linux/pnp.h>
),
'rio_device_id': (
'linux/mod_device_id/rio.h',
'linux/rio.h', # includes <linux/mod_devicetable.h>
),
'rpmsg_device_id': (
'linux/mod_device_id/rpmsg.h',
'linux/rpmsg.h', # includes <linux/mod_devicetable.h>
),
'sdio_device_id': (
'linux/mod_device_id/sdio.h',
'linux/mmc/sdio_func.h', # includes <linux/mod_devicetable.h>
),
'sdw_device_id': (
'linux/mod_device_id/sdw.h',
'linux/soundwire/sdw.h', # includes <linux/mod_devicetable.h>
),
'serio_device_id': (
'linux/mod_device_id/serio.h',
'linux/serio.h', # includes <linux/mod_devicetable.h>
'linux/hil_mlc.h', # includes <linux/serio.h>
),
'slim_device_id': (
'linux/mod_device_id/slim.h',
'linux/slimbus.h', # includes <linux/mod_devicetable.h>
),
'spi_device_id': (
'linux/mod_device_id/spi.h',
'linux/spi/spi.h', # includes <linux/mod_devicetable.h>
),
'spmi_device_id': (
'linux/mod_device_id/spmi.h',
),
'ssam_device_id': (
'linux/mod_device_id/ssam.h',
'linux/surface_aggregator/device.h', # includes <linux/mod_devicetable.h>
),
'ssb_device_id': (
'linux/mod_device_id/ssb.h',
'linux/ssb/ssb.h', # includes <linux/mod_devicetable.h>
),
'tb_service_id': (
'linux/mod_device_id/tb.h',
'linux/thunderbolt.h', # includes <linux/mod_devicetable.h>
'tb.h', # drivers/thunderbolt/tb.h includes <linux/thunderbolt.h>
),
'tee_client_device_id': (
'linux/mod_device_id/tee_client.h',
'linux/tee_drv.h', # includes <linux/mod_devicetable.h>
'linux/tee_core.h', # includes <linux/tee_drv.h>
),
'typec_device_id': (
'linux/mod_device_id/typec.h',
'linux/usb/typec_altmode.h', # includes <linux/mod_devicetable.h>
'linux/usb/typec_dp.h', # includes <linux/usb/typec_altmode.h>
),
'ulpi_device_id': (
'linux/mod_device_id/ulpi.h',
'linux/ulpi/driver.h', # includes <linux/mod_devicetable.h>
),
'usb_device_id': (
'linux/mod_device_id/usb.h',
'linux/usb.h', # includes <linux/mod_devicetable.h>
'linux/comedi/comedi_usb.h', # includes <linux/usb.h>
'linux/usb/input.h', # includes <linux/usb.h>
),
'vchiq_device_id': (
'linux/mod_device_id/vchiq.h',
'linux/raspberrypi/vchiq_bus.h', # includes <linux/mod_devicetable.h>
),
'virtio_device_id': (
'linux/mod_device_id/virtio.h',
'linux/virtio.h', # includes <linux/mod_devicetable.h>
'linux/virtio_config.h', # includes <linux/virtio.h>
'uapi/linux/virtio_pmem.h', # includes <linux/virtio_config.h>
),
'wmi_device_id': (
'linux/mod_device_id/wmi.h',
'linux/wmi.h', # includes <linux/mod_devicetable.h>
),
'x86_(cpu|device)_id': (
'linux/mod_device_id/x86_cpu.h',
'linux/platform_data/x86/soc.h', # includes <linux/mod_devicetable.h>
'asm/cpu_device_id.h', # includes <linux/mod_devicetable.h>
),
'zorro_device_id': (
'linux/mod_device_id/zorro.h',
'linux/zorro.h', # includes <linux/mod_devicetable.h>
),
'cpu_feature': (
'linux/mod_devicetable.h',
'linux/cpufeature.h', # includes <linux/mod_devicetable.h>
),
}
for dirpath, dirnames, filenames in os.walk('.'):
for fn in (os.path.join(dirpath, f) for f in filenames if re.match(r'.*\.[ch]$', f)):
if fn in ('./scripts/mod/devicetable-offsets.c', './scripts/mod/file2alias.c'):
continue
with open(fn) as f:
try:
filecontent = f.read()
except Exception as e:
print(f"Error { e } while reading { fn }")
continue
# If the file has an include of the legacy header, drop it
if momdt := re.search(r'#[ \t]*include\s*[<"]linux/mod_devicetable.h[>"]([ \t]*/\*[^*]*\*/)?[ \t]*\n', filecontent):
filecontent = filecontent[:momdt.start()] + filecontent[momdt.end():]
for s, hs in symbol_header_map.items():
if re.search(fr'\bstruct\s*{ s }\b\s*;', filecontent):
# with a forward declaration assume we're fine (unsafe!)
continue
if re.search(fr'\bstruct\s*{ s }\b', filecontent):
if fn.endswith(tuple('/' + h for h in hs)):
break
# include local headers
seenheaders = set()
expanded_filecontent = filecontent
while mo := re.search(r'#\s*include\s*"([^"]*)"', expanded_filecontent):
start, end = mo.span(0)
lhn = mo.group(1)
if lhn in seenheaders:
expanded_filecontent = expanded_filecontent[:start] + expanded_filecontent[end:]
else:
seenheaders.add(lhn)
try:
with open(os.path.join(dirpath, lhn)) as lh:
lhcontent = lh.read()
expanded_filecontent = expanded_filecontent[:start] + lhcontent + expanded_filecontent[end:]
except Exception:
expanded_filecontent = expanded_filecontent[:start] + expanded_filecontent[end:]
for h in hs:
if re.search(fr'#\s*include\s*[<"]{ h }[>"]', expanded_filecontent):
break
else:
# only rewrite .c files, headers need more care
if momdt:
if fn.endswith('.c'):
filecontent = filecontent[:momdt.start()] + f'#include <{ hs[0] }>\n' + filecontent[momdt.start():]
else:
print(f"Header for { s } missing in { fn }")
if momdt and fn.endswith('.c'):
with open(fn, "w") as f:
f.write(filecontent)
------->8--------
Uwe Kleine-König (The Capable Hub) (17):
mod_devicetable.h: Split into per subsystem headers
media: ti: vpe: #include <linux/platform_device.h> explicitly
ASoC: rockchip: rockchip_sai: #include <linux/platform_device.h>
explicitly
driver: core: Include headers for acpi_device_id and of_device_id for
struct device_driver
driver core: platform: Include header for struct platform_device_id
usb: serial: Include <linux/usb.h> in <linux/usb/serial.h>
platform/x86: msi-ec: Ensure dmi_system_id is defined
of: Explicitly include <linux/types.h> and <linux/err.h>
i2c: Let i2c-core.h include <linux/i2c.h>
platform/x86: x86-android-tablets: Add include defining struct
dmi_system_id
platform/x86: int3472: Add include defining struct dmi_system_id
usb: dwc2: Add include defining struct pci_device_id
ALSA: hda/core: Add include defining struct hda_device_id
LoongArch: KVM: Add include defining struct cpu_feature
media: em28xx: Add include for struct usb_device_id
Replace <linux/mod_devicetable.h> by more specific
<linux/mod_device_id/*.h> (headers)
Replace <linux/mod_devicetable.h> by more specific
<linux/mod_device_id/*.h> (c files)
arch/arm/mach-omap2/board-generic.c | 1 -
arch/loongarch/kvm/main.c | 1 +
arch/mips/include/asm/cdmm.h | 2 +-
arch/mips/lantiq/xway/dcdc.c | 1 -
arch/mips/lantiq/xway/gptu.c | 1 -
arch/mips/lantiq/xway/vmmc.c | 1 -
arch/mips/pci/pci-rt2880.c | 1 -
arch/mips/ralink/timer.c | 1 -
arch/parisc/include/asm/hardware.h | 4 +-
arch/parisc/include/asm/parisc-device.h | 1 +
.../powerpc/platforms/83xx/mcu_mpc8349emitx.c | 1 -
arch/powerpc/platforms/86xx/common.c | 1 -
arch/powerpc/sysdev/fsl_lbc.c | 1 -
arch/powerpc/sysdev/fsl_pmc.c | 1 -
arch/s390/include/asm/ccwdev.h | 2 +-
arch/sh/drivers/platform_early.c | 2 +-
arch/sparc/crypto/crop_devid.c | 2 +-
arch/sparc/kernel/of_device_32.c | 1 -
arch/sparc/kernel/of_device_64.c | 1 -
arch/sparc/kernel/of_device_common.c | 1 -
arch/x86/include/asm/cpu_device_id.h | 5 +-
arch/x86/kvm/svm/svm.c | 1 -
arch/x86/kvm/vmx/vmx.c | 1 -
drivers/accel/ethosu/ethosu_drv.c | 1 -
drivers/accel/qaic/qaic_timesync.c | 1 -
drivers/accel/qaic/sahara.c | 1 -
drivers/ata/ahci_platform.c | 1 -
drivers/ata/ahci_sunxi.c | 1 -
drivers/ata/pata_buddha.c | 1 -
drivers/ata/pata_ep93xx.c | 1 -
drivers/ata/pata_imx.c | 1 -
drivers/auxdisplay/arm-charlcd.c | 1 -
drivers/auxdisplay/hd44780.c | 1 -
drivers/auxdisplay/lcd2s.c | 1 -
drivers/auxdisplay/max6959.c | 1 -
drivers/auxdisplay/seg-led-gpio.c | 1 -
drivers/block/floppy.c | 2 +-
drivers/bluetooth/hci_h5.c | 1 -
drivers/bluetooth/hci_qca.c | 1 -
drivers/bus/mhi/ep/main.c | 1 -
drivers/bus/mhi/host/init.c | 1 -
drivers/cache/hisi_soc_hha.c | 1 -
drivers/cdx/controller/cdx_controller.c | 1 -
drivers/char/hw_random/airoha-trng.c | 1 -
drivers/char/hw_random/atmel-rng.c | 1 -
drivers/char/hw_random/ba431-rng.c | 1 -
drivers/char/hw_random/bcm74110-rng.c | 1 -
drivers/char/hw_random/exynos-trng.c | 1 -
drivers/char/hw_random/histb-rng.c | 1 -
drivers/char/hw_random/imx-rngc.c | 1 -
drivers/char/hw_random/ingenic-trng.c | 1 -
drivers/char/hw_random/iproc-rng200.c | 1 -
drivers/char/hw_random/pasemi-rng.c | 1 -
drivers/char/hw_random/pic32-rng.c | 1 -
drivers/char/hw_random/powernv-rng.c | 1 -
drivers/char/hw_random/xgene-rng.c | 1 -
drivers/char/hw_random/xilinx-trng.c | 1 -
drivers/char/hw_random/xiphera-trng.c | 1 -
drivers/clk/aspeed/clk-ast2600.c | 1 -
drivers/clk/aspeed/clk-ast2700.c | 1 -
drivers/clk/clk-axi-clkgen.c | 1 -
drivers/clk/clk-bm1880.c | 1 -
drivers/clk/clk-cdce706.c | 1 -
drivers/clk/clk-eyeq.c | 1 -
drivers/clk/clk-renesas-pcie.c | 1 -
drivers/clk/clk-si521xx.c | 1 -
drivers/clk/clk-versaclock5.c | 1 -
drivers/clk/imx/clk-imx8mp-audiomix.c | 1 -
drivers/clk/mediatek/clk-mt2701-g3d.c | 1 -
drivers/clk/mediatek/clk-mt2701.c | 1 -
drivers/clk/mediatek/clk-mt2712.c | 1 -
drivers/clk/mediatek/clk-mt6765.c | 1 -
drivers/clk/mediatek/clk-mt6779-aud.c | 1 -
drivers/clk/mediatek/clk-mt7622-eth.c | 1 -
drivers/clk/mediatek/clk-mt7622-hif.c | 1 -
drivers/clk/mediatek/clk-mt7622.c | 1 -
drivers/clk/mediatek/clk-mt7629-hif.c | 1 -
drivers/clk/mediatek/clk-mt7981-apmixed.c | 1 -
drivers/clk/mediatek/clk-mt7981-eth.c | 1 -
drivers/clk/mediatek/clk-mt7981-infracfg.c | 1 -
drivers/clk/mediatek/clk-mt7981-topckgen.c | 1 -
drivers/clk/mediatek/clk-mt7986-apmixed.c | 1 -
drivers/clk/mediatek/clk-mt7986-eth.c | 1 -
drivers/clk/mediatek/clk-mt7986-infracfg.c | 1 -
drivers/clk/mediatek/clk-mt7986-topckgen.c | 1 -
drivers/clk/mediatek/clk-mt8167-aud.c | 1 -
drivers/clk/mediatek/clk-mt8167-img.c | 1 -
drivers/clk/mediatek/clk-mt8167-mfgcfg.c | 1 -
drivers/clk/mediatek/clk-mt8167-mm.c | 1 -
drivers/clk/mediatek/clk-mt8167-vdec.c | 1 -
drivers/clk/mediatek/clk-mt8173-mm.c | 1 -
drivers/clk/mediatek/clk-mt8183.c | 1 -
.../clk/mediatek/clk-mt8188-adsp_audio26m.c | 1 -
drivers/clk/mediatek/clk-mt8188-apmixedsys.c | 1 -
.../clk/mediatek/clk-mt8188-imp_iic_wrap.c | 1 -
drivers/clk/mediatek/clk-mt8188-topckgen.c | 1 -
drivers/clk/mediatek/clk-mt8188-vdo0.c | 1 -
drivers/clk/mediatek/clk-mt8188-vdo1.c | 1 -
drivers/clk/mediatek/clk-mt8188-venc.c | 1 -
drivers/clk/mediatek/clk-mt8188-wpe.c | 1 -
drivers/clk/mediatek/clk-mt8192-cam.c | 1 -
drivers/clk/mediatek/clk-mt8192-img.c | 1 -
.../clk/mediatek/clk-mt8192-imp_iic_wrap.c | 1 -
drivers/clk/mediatek/clk-mt8192-ipe.c | 1 -
drivers/clk/mediatek/clk-mt8192-mdp.c | 1 -
drivers/clk/mediatek/clk-mt8192-mfg.c | 1 -
drivers/clk/mediatek/clk-mt8192-msdc.c | 1 -
drivers/clk/mediatek/clk-mt8192-scp_adsp.c | 1 -
drivers/clk/mediatek/clk-mt8192-vdec.c | 1 -
drivers/clk/mediatek/clk-mt8192-venc.c | 1 -
drivers/clk/mediatek/clk-mt8192.c | 1 -
drivers/clk/mediatek/clk-mt8195-apmixedsys.c | 1 -
drivers/clk/mediatek/clk-mt8195-topckgen.c | 1 -
drivers/clk/mediatek/clk-mt8365.c | 1 -
drivers/clk/mediatek/clk-mt8516-aud.c | 1 -
drivers/clk/meson/a1-peripherals.c | 1 -
drivers/clk/meson/a1-pll.c | 1 -
drivers/clk/meson/axg.c | 1 -
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drivers/regulator/adp5055-regulator.c | 1 -
drivers/regulator/bd71828-regulator.c | 1 -
drivers/regulator/max77541-regulator.c | 1 -
drivers/regulator/max77675-regulator.c | 1 -
drivers/regulator/mt6370-regulator.c | 1 -
drivers/regulator/pv88080-regulator.c | 1 -
drivers/regulator/rt4803.c | 1 -
drivers/regulator/rt5739.c | 1 -
drivers/regulator/rt6190-regulator.c | 1 -
drivers/regulator/rt8092.c | 1 -
drivers/regulator/rtq2208-regulator.c | 1 -
drivers/regulator/tps6287x-regulator.c | 1 -
drivers/regulator/tps65218-regulator.c | 1 -
drivers/regulator/tps65912-regulator.c | 1 -
drivers/regulator/vexpress-regulator.c | 1 -
drivers/reset/reset-ath79.c | 1 -
drivers/reset/reset-axs10x.c | 1 -
drivers/reset/reset-bcm6345.c | 1 -
drivers/reset/reset-eyeq.c | 1 -
drivers/reset/reset-gpio.c | 1 -
drivers/reset/reset-sunplus.c | 1 -
drivers/reset/reset-tn48m.c | 1 -
.../reset/starfive/reset-starfive-jh7100.c | 1 -
drivers/rtc/rtc-88pm886.c | 1 -
drivers/rtc/rtc-cpcap.c | 1 -
drivers/rtc/rtc-cros-ec.c | 1 -
drivers/rtc/rtc-ds1307.c | 1 -
drivers/rtc/rtc-ep93xx.c | 1 -
drivers/rtc/rtc-fsl-ftm-alarm.c | 1 -
drivers/rtc/rtc-ftrtc010.c | 1 -
drivers/rtc/rtc-lpc24xx.c | 1 -
drivers/rtc/rtc-m48t86.c | 1 -
drivers/rtc/rtc-mc13xxx.c | 1 -
drivers/rtc/rtc-moxart.c | 1 -
drivers/rtc/rtc-msc313.c | 1 -
drivers/rtc/rtc-mt6397.c | 1 -
drivers/rtc/rtc-mt7622.c | 1 -
drivers/rtc/rtc-mxc_v2.c | 1 -
drivers/rtc/rtc-r7301.c | 1 -
drivers/rtc/rtc-rzn1.c | 1 -
drivers/rtc/rtc-sh.c | 1 -
drivers/rtc/rtc-ssd202d.c | 1 -
drivers/rtc/rtc-tegra.c | 1 -
drivers/rtc/rtc-ti-k3.c | 1 -
drivers/rtc/rtc-tps6594.c | 1 -
drivers/s390/crypto/ap_bus.c | 2 +-
drivers/s390/crypto/vfio_ap_drv.c | 2 +-
drivers/s390/crypto/zcrypt_cex4.c | 2 +-
drivers/siox/siox-bus-gpio.c | 1 -
drivers/soc/fsl/qe/qe.c | 1 -
drivers/soc/qcom/qcom_pd_mapper.c | 1 -
drivers/soc/renesas/rzn1_irqmux.c | 1 -
drivers/soc/sophgo/sg2044-topsys.c | 2 +-
drivers/soc/tegra/fuse/fuse-tegra.c | 1 -
drivers/soc/tegra/fuse/tegra-apbmisc.c | 1 -
drivers/soc/ti/smartreflex.c | 2 +-
drivers/soundwire/bus.c | 1 -
drivers/soundwire/bus_type.c | 1 -
drivers/soundwire/cadence_master.c | 1 -
drivers/soundwire/debugfs.c | 1 -
.../soundwire/generic_bandwidth_allocation.c | 1 -
drivers/soundwire/mipi_disco.c | 1 -
drivers/soundwire/stream.c | 1 -
drivers/soundwire/sysfs_slave.c | 1 -
drivers/soundwire/sysfs_slave_dpn.c | 1 -
drivers/spi/spi-atcspi200.c | 1 -
drivers/spi/spi-cs42l43.c | 1 -
drivers/spi/spi-gpio.c | 1 -
drivers/spi/spi-hisi-sfc-v3xx.c | 1 -
drivers/spi/spi-loongson-pci.c | 1 -
drivers/spi/spi-loongson-plat.c | 1 -
drivers/spi/spi-loopback-test.c | 1 -
...spi-offload-trigger-adi-util-sigma-delta.c | 1 -
drivers/spi/spi-offload-trigger-pwm.c | 1 -
drivers/spi/spi-pxa2xx-platform.c | 1 -
drivers/spi/spi-realtek-rtl-snand.c | 1 -
drivers/spi/spi-realtek-rtl.c | 1 -
drivers/spi/spi-sc18is602.c | 1 -
drivers/spi/spi-wpcm-fiu.c | 1 -
drivers/spi/spi.c | 1 -
drivers/spi/spidev.c | 1 -
drivers/spmi/spmi-apple-controller.c | 1 -
drivers/staging/greybus/arche-apb-ctrl.c | 1 -
drivers/thermal/loongson2_thermal.c | 1 -
drivers/thermal/renesas/rzg2l_thermal.c | 1 -
drivers/tty/goldfish.c | 1 -
drivers/tty/serial/8250/8250_dfl.c | 1 -
drivers/tty/serial/8250/8250_dw.c | 1 -
drivers/tty/serial/8250/8250_em.c | 1 -
drivers/tty/serial/8250/8250_keba.c | 1 -
drivers/tty/serial/8250/8250_loongson.c | 1 -
drivers/tty/serial/8250/8250_ni.c | 1 -
drivers/tty/serial/max3100.c | 1 -
drivers/tty/serial/max310x.c | 1 -
drivers/tty/serial/sc16is7xx.c | 1 -
drivers/tty/serial/sc16is7xx_i2c.c | 1 -
drivers/tty/serial/sc16is7xx_spi.c | 1 -
drivers/tty/serial/sccnxp.c | 1 -
drivers/tty/serial/tegra-utc.c | 1 -
drivers/uio/uio_pdrv_genirq.c | 1 -
drivers/usb/dwc2/core.h | 1 +
drivers/usb/gadget/udc/renesas_usbf.c | 1 -
drivers/usb/misc/usb-ljca.c | 1 -
drivers/usb/typec/mux/tusb1046.c | 1 -
drivers/usb/typec/tcpm/qcom/qcom_pmic_typec.c | 1 -
.../typec/tcpm/qcom/qcom_pmic_typec_pdphy.c | 1 -
.../tcpm/qcom/qcom_pmic_typec_pdphy_stub.c | 1 -
.../typec/tcpm/qcom/qcom_pmic_typec_port.c | 1 -
drivers/usb/typec/tcpm/tcpci_mt6370.c | 1 -
drivers/usb/typec/tcpm/tcpci_rt1711h.c | 1 -
drivers/usb/typec/ucsi/cros_ec_ucsi.c | 1 -
drivers/vdpa/vdpa.c | 1 -
drivers/vdpa/vdpa_user/vduse_dev.c | 1 -
drivers/video/backlight/apple_dwi_bl.c | 1 -
drivers/video/backlight/da9052_bl.c | 1 -
drivers/video/backlight/hx8357.c | 1 -
drivers/video/backlight/ktd2801-backlight.c | 1 -
drivers/video/backlight/mp3309c.c | 1 -
drivers/video/backlight/mt6370-backlight.c | 1 -
drivers/video/backlight/rave-sp-backlight.c | 1 -
drivers/video/backlight/rt4831-backlight.c | 1 -
.../omap2/omapfb/displays/encoder-opa362.c | 1 -
.../omap2/omapfb/displays/encoder-tfp410.c | 1 -
.../omap2/omapfb/displays/encoder-tpd12s015.c | 1 -
.../omap2/omapfb/displays/panel-dsi-cm.c | 1 -
.../virt/coco/arm-cca-guest/arm-cca-guest.c | 2 +-
drivers/virt/coco/tdx-guest/tdx-guest.c | 1 -
drivers/virt/coco/tdx-host/tdx-host.c | 1 -
drivers/w1/masters/amd_axi_w1.c | 1 -
drivers/w1/masters/ds2490.c | 1 -
drivers/w1/masters/mxc_w1.c | 1 -
drivers/w1/masters/sgi_w1.c | 1 -
drivers/w1/masters/w1-gpio.c | 1 -
drivers/watchdog/at91rm9200_wdt.c | 1 -
drivers/watchdog/cros_ec_wdt.c | 1 -
drivers/watchdog/davinci_wdt.c | 1 -
drivers/watchdog/ftwdt010_wdt.c | 1 -
drivers/watchdog/gpio_wdt.c | 1 -
drivers/watchdog/gunyah_wdt.c | 1 -
drivers/watchdog/imgpdc_wdt.c | 1 -
drivers/watchdog/keembay_wdt.c | 1 -
drivers/watchdog/max63xx_wdt.c | 1 -
drivers/watchdog/max77620_wdt.c | 1 -
drivers/watchdog/meson_wdt.c | 1 -
drivers/watchdog/moxart_wdt.c | 1 -
drivers/watchdog/msc313e_wdt.c | 1 -
drivers/watchdog/mt7621_wdt.c | 1 -
drivers/watchdog/nic7018_wdt.c | 1 -
drivers/watchdog/omap_wdt.c | 1 -
drivers/watchdog/pseries-wdt.c | 1 -
drivers/watchdog/realtek_otto_wdt.c | 1 -
drivers/watchdog/rt2880_wdt.c | 1 -
drivers/watchdog/rti_wdt.c | 1 -
drivers/watchdog/sbsa_gwdt.c | 1 -
drivers/watchdog/sl28cpld_wdt.c | 1 -
drivers/watchdog/sunplus_wdt.c | 1 -
drivers/watchdog/ts72xx_wdt.c | 1 -
drivers/watchdog/twl4030_wdt.c | 1 -
drivers/watchdog/xilinx_wwdt.c | 1 -
include/linux/acpi.h | 2 +-
include/linux/amba/bus.h | 2 +-
include/linux/auxiliary_bus.h | 2 +-
include/linux/bcma/bcma.h | 2 +-
include/linux/cdx/cdx_bus.h | 2 +-
include/linux/device/driver.h | 2 +
include/linux/dfl.h | 2 +-
include/linux/dmi.h | 2 +-
include/linux/eisa.h | 2 +-
include/linux/firewire.h | 3 +-
include/linux/fsl/mc.h | 2 +-
include/linux/hid.h | 2 +-
include/linux/hyperv.h | 2 +-
include/linux/i2c.h | 2 +-
include/linux/i3c/device.h | 2 +-
include/linux/input.h | 2 +-
include/linux/intel-ish-client-if.h | 2 +-
include/linux/ipack.h | 2 +-
include/linux/isapnp.h | 2 +-
include/linux/mcb.h | 2 +-
include/linux/mei_cl_bus.h | 2 +-
include/linux/mhi.h | 1 +
include/linux/mmc/sdio_func.h | 2 +-
include/linux/mod_device_id/acpi.h | 31 +
include/linux/mod_device_id/amba.h | 18 +
include/linux/mod_device_id/ap.h | 19 +
include/linux/mod_device_id/apr.h | 20 +
include/linux/mod_device_id/auxiliary.h | 16 +
include/linux/mod_device_id/bcma.h | 24 +
include/linux/mod_device_id/ccw.h | 26 +
include/linux/mod_device_id/cdx.h | 39 +
include/linux/mod_device_id/coreboot.h | 19 +
include/linux/mod_device_id/css.h | 16 +
include/linux/mod_device_id/dfl.h | 33 +
include/linux/mod_device_id/dmi.h | 57 +
include/linux/mod_device_id/eisa.h | 20 +
include/linux/mod_device_id/fsl_mc.h | 21 +
include/linux/mod_device_id/hda.h | 16 +
include/linux/mod_device_id/hid.h | 21 +
include/linux/mod_device_id/hv_vmbus.h | 17 +
include/linux/mod_device_id/i2c.h | 18 +
include/linux/mod_device_id/i3c.h | 25 +
include/linux/mod_device_id/ieee1394.h | 26 +
include/linux/mod_device_id/input.h | 61 +
include/linux/mod_device_id/ipack.h | 16 +
include/linux/mod_device_id/isapnp.h | 15 +
include/linux/mod_device_id/ishtp.h | 23 +
include/linux/mod_device_id/mcb.h | 14 +
include/linux/mod_device_id/mdio.h | 34 +
include/linux/mod_device_id/mei_cl.h | 30 +
include/linux/mod_device_id/mhi.h | 23 +
include/linux/mod_device_id/mips_cdmm.h | 16 +
include/linux/mod_device_id/of.h | 14 +
include/linux/mod_device_id/parisc.h | 20 +
include/linux/mod_device_id/pci.h | 53 +
include/linux/mod_device_id/pcmcia.h | 47 +
include/linux/mod_device_id/platform.h | 16 +
include/linux/mod_device_id/pnp.h | 25 +
include/linux/mod_device_id/rio.h | 27 +
include/linux/mod_device_id/rpmsg.h | 18 +
include/linux/mod_device_id/sdio.h | 20 +
include/linux/mod_device_id/sdw.h | 17 +
include/linux/mod_device_id/serio.h | 17 +
include/linux/mod_device_id/slim.h | 22 +
include/linux/mod_device_id/spi.h | 18 +
include/linux/mod_device_id/spmi.h | 16 +
include/linux/mod_device_id/ssam.h | 27 +
include/linux/mod_device_id/ssb.h | 23 +
include/linux/mod_device_id/tb.h | 36 +
include/linux/mod_device_id/tee_client.h | 17 +
include/linux/mod_device_id/typec.h | 25 +
include/linux/mod_device_id/ulpi.h | 15 +
include/linux/mod_device_id/usb.h | 110 ++
include/linux/mod_device_id/vchiq.h | 8 +
include/linux/mod_device_id/vio.h | 10 +
include/linux/mod_device_id/virtio.h | 15 +
include/linux/mod_device_id/wmi.h | 18 +
include/linux/mod_device_id/x86_cpu.h | 43 +
include/linux/mod_device_id/zorro.h | 18 +
include/linux/mod_devicetable.h | 1014 +----------------
include/linux/of.h | 2 +-
include/linux/of_platform.h | 4 +-
include/linux/pci-epf.h | 2 +-
include/linux/pci.h | 2 +-
include/linux/phy.h | 2 +-
include/linux/platform_data/x86/int3472.h | 2 +-
include/linux/platform_data/x86/soc.h | 2 +-
include/linux/platform_device.h | 2 +-
include/linux/pnp.h | 2 +-
include/linux/raspberrypi/vchiq_bus.h | 2 +-
include/linux/rio.h | 2 +-
include/linux/rpmsg.h | 2 +-
include/linux/serio.h | 2 +-
include/linux/slimbus.h | 2 +-
include/linux/soc/qcom/apr.h | 2 +-
include/linux/soundwire/sdw.h | 2 +-
include/linux/spi/spi.h | 4 +-
include/linux/ssb/ssb.h | 2 +-
include/linux/surface_aggregator/device.h | 2 +-
include/linux/tee_drv.h | 2 +-
include/linux/thunderbolt.h | 2 +-
include/linux/ulpi/driver.h | 2 +-
include/linux/usb.h | 2 +-
include/linux/usb/serial.h | 1 +
include/linux/usb/typec_altmode.h | 2 +-
include/linux/virtio.h | 2 +-
include/linux/wmi.h | 2 +-
include/linux/zorro.h | 2 +-
include/pcmcia/ds.h | 2 +-
include/sound/hda_codec.h | 2 +-
include/sound/hdaudio.h | 1 +
net/qrtr/mhi.c | 1 -
net/rfkill/rfkill-gpio.c | 1 -
sound/atmel/ac97c.c | 1 -
sound/firewire/isight.c | 1 -
.../hda/codecs/side-codecs/cs35l41_hda_i2c.c | 1 -
.../hda/codecs/side-codecs/cs35l41_hda_spi.c | 1 -
.../hda/codecs/side-codecs/tas2781_hda_i2c.c | 1 -
.../hda/codecs/side-codecs/tas2781_hda_spi.c | 1 -
sound/hda/core/hda_bus_type.c | 2 +-
sound/soc/atmel/sam9x5_wm8731.c | 1 -
sound/soc/codecs/adau1372-i2c.c | 1 -
sound/soc/codecs/adau1372-spi.c | 1 -
sound/soc/codecs/adau1372.c | 1 -
sound/soc/codecs/adau1761-i2c.c | 1 -
sound/soc/codecs/adau1761-spi.c | 1 -
sound/soc/codecs/adau1781-i2c.c | 1 -
sound/soc/codecs/adau1781-spi.c | 1 -
sound/soc/codecs/adau1977-i2c.c | 1 -
sound/soc/codecs/adau1977-spi.c | 1 -
sound/soc/codecs/adau7118-hw.c | 1 -
sound/soc/codecs/ak4104.c | 1 -
sound/soc/codecs/audio-iio-aux.c | 1 -
sound/soc/codecs/cs4234.c | 1 -
sound/soc/codecs/cs4270.c | 1 -
sound/soc/codecs/cs42l42-sdw.c | 1 -
sound/soc/codecs/cs42l43.c | 1 -
sound/soc/codecs/cs42xx8-i2c.c | 1 -
sound/soc/codecs/cs42xx8-spi.c | 1 -
sound/soc/codecs/cs4349.c | 1 -
sound/soc/codecs/es8316.c | 1 -
sound/soc/codecs/es8323.c | 1 -
sound/soc/codecs/es9356.c | 1 -
sound/soc/codecs/max98357a.c | 1 -
sound/soc/codecs/max98373-i2c.c | 1 -
sound/soc/codecs/max98373-sdw.c | 1 -
sound/soc/codecs/max98388.c | 1 -
sound/soc/codecs/mt6351.c | 1 -
sound/soc/codecs/mt6358.c | 1 -
sound/soc/codecs/pcm3168a-i2c.c | 1 -
sound/soc/codecs/rt1017-sdca-sdw.c | 1 -
sound/soc/codecs/rt1308-sdw.c | 1 -
sound/soc/codecs/rt1316-sdw.c | 1 -
sound/soc/codecs/rt1318-sdw.c | 1 -
sound/soc/codecs/rt1320-sdw.c | 1 -
sound/soc/codecs/rt700-sdw.c | 1 -
sound/soc/codecs/rt711-sdca-sdw.c | 1 -
sound/soc/codecs/rt711-sdw.c | 1 -
sound/soc/codecs/rt712-sdca-dmic.c | 1 -
sound/soc/codecs/rt712-sdca-sdw.c | 1 -
sound/soc/codecs/rt715-sdca-sdw.c | 1 -
sound/soc/codecs/rt715-sdw.c | 1 -
sound/soc/codecs/rt721-sdca-sdw.c | 1 -
sound/soc/codecs/rt722-sdca-sdw.c | 1 -
sound/soc/codecs/rt9123.c | 1 -
sound/soc/codecs/rt9123p.c | 1 -
sound/soc/codecs/rtq9124.c | 1 -
sound/soc/codecs/rtq9128.c | 1 -
sound/soc/codecs/sdw-mockup.c | 1 -
sound/soc/codecs/simple-amplifier.c | 1 -
sound/soc/codecs/sma1303.c | 1 -
sound/soc/codecs/src4xxx-i2c.c | 1 -
sound/soc/codecs/uda1334.c | 1 -
sound/soc/codecs/wm8510.c | 1 -
sound/soc/codecs/wm8523.c | 1 -
sound/soc/codecs/wm8524.c | 1 -
sound/soc/codecs/wm8580.c | 1 -
sound/soc/codecs/wm8711.c | 1 -
sound/soc/codecs/wm8728.c | 1 -
sound/soc/codecs/wm8731-i2c.c | 1 -
sound/soc/codecs/wm8731-spi.c | 1 -
sound/soc/codecs/wm8737.c | 1 -
sound/soc/codecs/wm8753.c | 1 -
sound/soc/codecs/wm8770.c | 1 -
sound/soc/codecs/wm8776.c | 1 -
sound/soc/fsl/fsl_aud2htx.c | 1 -
sound/soc/fsl/mpc5200_psc_ac97.c | 1 -
.../generic/audio-graph-card2-custom-sample.c | 1 -
sound/soc/jz4740/jz4740-i2s.c | 1 -
sound/soc/mediatek/mt8365/mt8365-mt6357.c | 1 -
sound/soc/qcom/apq8096.c | 1 -
sound/soc/qcom/sc7280.c | 1 -
sound/soc/qcom/storm.c | 1 -
sound/soc/rockchip/rockchip_sai.c | 1 +
sound/soc/sdca/sdca_class.c | 1 -
sound/soc/sof/sof-client-ipc-flood-test.c | 1 -
.../soc/sof/sof-client-ipc-kernel-injector.c | 1 -
sound/soc/sof/sof-client-ipc-msg-injector.c | 1 -
sound/soc/sunxi/sun50i-codec-analog.c | 1 -
sound/soc/sunxi/sun50i-dmic.c | 1 -
sound/soc/tegra/tegra186_asrc.c | 1 -
sound/soc/tegra/tegra186_dspk.c | 1 -
sound/soc/tegra/tegra20_spdif.c | 1 -
sound/soc/tegra/tegra210_adx.c | 1 -
sound/soc/tegra/tegra210_amx.c | 1 -
sound/soc/tegra/tegra210_dmic.c | 1 -
sound/soc/tegra/tegra210_i2s.c | 1 -
sound/soc/tegra/tegra210_mixer.c | 1 -
sound/soc/tegra/tegra210_mvc.c | 1 -
sound/soc/tegra/tegra210_ope.c | 1 -
sound/soc/ti/omap-dmic.c | 1 -
sound/soc/ti/omap-mcpdm.c | 1 -
tools/testing/cxl/test/mem.c | 1 -
1633 files changed, 1576 insertions(+), 2527 deletions(-)
create mode 100644 include/linux/mod_device_id/acpi.h
create mode 100644 include/linux/mod_device_id/amba.h
create mode 100644 include/linux/mod_device_id/ap.h
create mode 100644 include/linux/mod_device_id/apr.h
create mode 100644 include/linux/mod_device_id/auxiliary.h
create mode 100644 include/linux/mod_device_id/bcma.h
create mode 100644 include/linux/mod_device_id/ccw.h
create mode 100644 include/linux/mod_device_id/cdx.h
create mode 100644 include/linux/mod_device_id/coreboot.h
create mode 100644 include/linux/mod_device_id/css.h
create mode 100644 include/linux/mod_device_id/dfl.h
create mode 100644 include/linux/mod_device_id/dmi.h
create mode 100644 include/linux/mod_device_id/eisa.h
create mode 100644 include/linux/mod_device_id/fsl_mc.h
create mode 100644 include/linux/mod_device_id/hda.h
create mode 100644 include/linux/mod_device_id/hid.h
create mode 100644 include/linux/mod_device_id/hv_vmbus.h
create mode 100644 include/linux/mod_device_id/i2c.h
create mode 100644 include/linux/mod_device_id/i3c.h
create mode 100644 include/linux/mod_device_id/ieee1394.h
create mode 100644 include/linux/mod_device_id/input.h
create mode 100644 include/linux/mod_device_id/ipack.h
create mode 100644 include/linux/mod_device_id/isapnp.h
create mode 100644 include/linux/mod_device_id/ishtp.h
create mode 100644 include/linux/mod_device_id/mcb.h
create mode 100644 include/linux/mod_device_id/mdio.h
create mode 100644 include/linux/mod_device_id/mei_cl.h
create mode 100644 include/linux/mod_device_id/mhi.h
create mode 100644 include/linux/mod_device_id/mips_cdmm.h
create mode 100644 include/linux/mod_device_id/of.h
create mode 100644 include/linux/mod_device_id/parisc.h
create mode 100644 include/linux/mod_device_id/pci.h
create mode 100644 include/linux/mod_device_id/pcmcia.h
create mode 100644 include/linux/mod_device_id/platform.h
create mode 100644 include/linux/mod_device_id/pnp.h
create mode 100644 include/linux/mod_device_id/rio.h
create mode 100644 include/linux/mod_device_id/rpmsg.h
create mode 100644 include/linux/mod_device_id/sdio.h
create mode 100644 include/linux/mod_device_id/sdw.h
create mode 100644 include/linux/mod_device_id/serio.h
create mode 100644 include/linux/mod_device_id/slim.h
create mode 100644 include/linux/mod_device_id/spi.h
create mode 100644 include/linux/mod_device_id/spmi.h
create mode 100644 include/linux/mod_device_id/ssam.h
create mode 100644 include/linux/mod_device_id/ssb.h
create mode 100644 include/linux/mod_device_id/tb.h
create mode 100644 include/linux/mod_device_id/tee_client.h
create mode 100644 include/linux/mod_device_id/typec.h
create mode 100644 include/linux/mod_device_id/ulpi.h
create mode 100644 include/linux/mod_device_id/usb.h
create mode 100644 include/linux/mod_device_id/vchiq.h
create mode 100644 include/linux/mod_device_id/vio.h
create mode 100644 include/linux/mod_device_id/virtio.h
create mode 100644 include/linux/mod_device_id/wmi.h
create mode 100644 include/linux/mod_device_id/x86_cpu.h
create mode 100644 include/linux/mod_device_id/zorro.h
base-commit: ef0c9f75a19532d7675384708fc8621e10850104
--
2.47.3
^ permalink raw reply
* [PATCH v2 08/17] of: Explicitly include <linux/types.h> and <linux/err.h>
From: Uwe Kleine-König (The Capable Hub) @ 2026-06-26 18:00 UTC (permalink / raw)
To: Linus Torvalds, Greg Kroah-Hartman
Cc: Rob Herring, Saravana Kannan, devicetree, linux-kernel
In-Reply-To: <cover.1782490566.git.u.kleine-koenig@baylibre.com>
<linux/of_platform.h> uses resource_size_t and relies on the transitive
include <linux/mod_devicetable.h> -> <linux/types.h>. It also uses error
constants and thus relying on the include chain
<linux/mod_devicetable.h> -> <linux/uuid.h> -> <linux/string.h> ->
<linux/err.h>.
With the plan to split <linux/mod_devicetable.h> per subsystem and then
only letting of_platform.h include the of-specific bits (which don't
require these two headers), add the needed includes explicitly to keep
the header self-contained.
Signed-off-by: Uwe Kleine-König (The Capable Hub) <u.kleine-koenig@baylibre.com>
---
include/linux/of_platform.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/linux/of_platform.h b/include/linux/of_platform.h
index 17471ef8e092..48f73af88dd7 100644
--- a/include/linux/of_platform.h
+++ b/include/linux/of_platform.h
@@ -6,6 +6,8 @@
* <benh@kernel.crashing.org>
*/
+#include <linux/types.h>
+#include <linux/err.h>
#include <linux/mod_devicetable.h>
struct device;
--
2.47.3
^ permalink raw reply related
* [PATCH v4 1/4] spi: dt-bindings: snps,dw-apb-ssi: drop superfluous RZ/N1 entry
From: Wolfram Sang @ 2026-06-26 18:03 UTC (permalink / raw)
To: linux-renesas-soc
Cc: Wolfram Sang, Mark Brown, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Geert Uytterhoeven, Magnus Damm, linux-spi,
devicetree
In-Reply-To: <20260626180326.9593-1-wsa+renesas@sang-engineering.com>
Commit 164c05f03ffa ("spi: Convert DW SPI binding to DT schema") added
an RZ/N1 entry which was not in the original txt-file. It doesn't follow
the usual "<soc entry>, <soc family entry>" style for Renesas SoCs which
was properly added later with commit 029d32a892a8 ("spi: dw-apb-ssi:
Integrate Renesas RZ/N1 SPI controller"). In that commit, removing the
bogus entry was overlooked and is finally done now.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
Change since v3:
* new patch
Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml | 1 -
1 file changed, 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
index 8ebebcebca16..e0f249e82fa1 100644
--- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
+++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
@@ -50,7 +50,6 @@ properties:
- enum:
- mscc,ocelot-spi
- mscc,jaguar2-spi
- - renesas,rzn1-spi
- sophgo,sg2042-spi
- thead,th1520-spi
- const: snps,dw-apb-ssi
--
2.47.3
^ permalink raw reply related
* [PATCH v4 0/4] ARM: dts: renesas: r9a06g032-rzn1d400-eb: Enable SPI and FRAM
From: Wolfram Sang @ 2026-06-26 18:03 UTC (permalink / raw)
To: linux-renesas-soc
Cc: Wolfram Sang, Conor Dooley, devicetree, Geert Uytterhoeven,
Krzysztof Kozlowski, linux-spi, Magnus Damm, Mark Brown,
Rob Herring
Here are the patches to enable the SPI-FRAM with FIFO (no DMA yet, needs
more work) on the RZ/N1D Extension board.
Changes since v3 in the individual patches.
A branch is here:
git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git renesas/n1d/enablement
Wolfram Sang (4):
spi: dt-bindings: snps,dw-apb-ssi: drop superfluous RZ/N1 entry
spi: dt-bindings: snps,dw-apb-ssi: add 'power-domains' property
ARM: dts: renesas: r9a06g032: Describe SPI controllers
ARM: dts: renesas: r9a06g032-rzn1d400-eb: Enable SPI-FRAM
.../bindings/spi/snps,dw-apb-ssi.yaml | 4 +-
.../dts/renesas/r9a06g032-rzn1d400-eb.dts | 25 ++++++
arch/arm/boot/dts/renesas/r9a06g032.dtsi | 84 +++++++++++++++++++
3 files changed, 112 insertions(+), 1 deletion(-)
--
2.47.3
^ permalink raw reply
* [PATCH v4 2/4] spi: dt-bindings: snps,dw-apb-ssi: add 'power-domains' property
From: Wolfram Sang @ 2026-06-26 18:03 UTC (permalink / raw)
To: linux-renesas-soc
Cc: Wolfram Sang, Herve Codina, Mark Brown, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, linux-spi, devicetree
In-Reply-To: <20260626180326.9593-1-wsa+renesas@sang-engineering.com>
This SPI controller likely belongs to a power domain for all the SoCs
listed. For sure, it belongs to one on the Renesas RZ/N1 SoC, so
enable the property to be able to describe its power domain in DTs.
Suggested-by: Herve Codina <herve.codina@bootlin.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Herve Codina <herve.codina@bootlin.com>
---
Change since v3:
* reworded commit message to make clear other SoCs likely use a
power-domain, too (Krzysztof)
* change Reported-by to Suggested-by (Krzysztof)
* add Rev-by (Herve)
Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
index e0f249e82fa1..291cbd55862d 100644
--- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
+++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
@@ -87,6 +87,9 @@ properties:
- const: ssi_clk
- const: pclk
+ power-domains:
+ maxItems: 1
+
resets:
maxItems: 1
--
2.47.3
^ permalink raw reply related
* [PATCH v4 3/4] ARM: dts: renesas: r9a06g032: Describe SPI controllers
From: Wolfram Sang @ 2026-06-26 18:03 UTC (permalink / raw)
To: linux-renesas-soc
Cc: Wolfram Sang, Herve Codina, Geert Uytterhoeven, Magnus Damm,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, devicetree
In-Reply-To: <20260626180326.9593-1-wsa+renesas@sang-engineering.com>
Add nodes for the 6 SPI controllers of the Renesas RZ/N1D SoC. The first
4 can only be controllers, the latter 2 can only be targets. DMA nodes
are not added yet because DMA needs some extra code in the drivers and
cannot be tested yet. Basic FIFO mode works reliably, though.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Herve Codina <herve.codina@bootlin.com>
---
Change since v3:
* none
arch/arm/boot/dts/renesas/r9a06g032.dtsi | 84 ++++++++++++++++++++++++
1 file changed, 84 insertions(+)
diff --git a/arch/arm/boot/dts/renesas/r9a06g032.dtsi b/arch/arm/boot/dts/renesas/r9a06g032.dtsi
index 442ea26b40f5..19c9bce0a26d 100644
--- a/arch/arm/boot/dts/renesas/r9a06g032.dtsi
+++ b/arch/arm/boot/dts/renesas/r9a06g032.dtsi
@@ -563,6 +563,90 @@ gic: interrupt-controller@44101000 {
<GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
};
+ /* Controller only */
+ spi1: spi@50005000 {
+ compatible = "renesas,r9a06g032-spi", "renesas,rzn1-spi";
+ reg = <0x50005000 0x200>;
+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&sysctrl R9A06G032_CLK_SPI0>, <&sysctrl R9A06G032_HCLK_SPI0>;
+ clock-names = "ssi_clk", "pclk";
+ power-domains = <&sysctrl>;
+ num-cs = <4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ /* Controller only */
+ spi2: spi@50006000 {
+ compatible = "renesas,r9a06g032-spi", "renesas,rzn1-spi";
+ reg = <0x50006000 0x200>;
+ interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&sysctrl R9A06G032_CLK_SPI1>, <&sysctrl R9A06G032_HCLK_SPI1>;
+ clock-names = "ssi_clk", "pclk";
+ power-domains = <&sysctrl>;
+ num-cs = <4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ /* Controller only */
+ spi3: spi@50007000 {
+ compatible = "renesas,r9a06g032-spi", "renesas,rzn1-spi";
+ reg = <0x50007000 0x200>;
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&sysctrl R9A06G032_CLK_SPI2>, <&sysctrl R9A06G032_HCLK_SPI2>;
+ clock-names = "ssi_clk", "pclk";
+ power-domains = <&sysctrl>;
+ num-cs = <4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ /* Controller only */
+ spi4: spi@50008000 {
+ compatible = "renesas,r9a06g032-spi", "renesas,rzn1-spi";
+ reg = <0x50008000 0x200>;
+ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&sysctrl R9A06G032_CLK_SPI3>, <&sysctrl R9A06G032_HCLK_SPI3>;
+ clock-names = "ssi_clk", "pclk";
+ power-domains = <&sysctrl>;
+ num-cs = <4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ /* Target only */
+ spi5: spi@50009000 {
+ compatible = "renesas,r9a06g032-spi", "renesas,rzn1-spi";
+ reg = <0x50009000 0x200>;
+ interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&sysctrl R9A06G032_CLK_SPI4>, <&sysctrl R9A06G032_HCLK_SPI4>;
+ clock-names = "ssi_clk", "pclk";
+ power-domains = <&sysctrl>;
+ spi-slave;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ /* Target only */
+ spi6: spi@5000a000 {
+ compatible = "renesas,r9a06g032-spi", "renesas,rzn1-spi";
+ reg = <0x5000a000 0x200>;
+ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&sysctrl R9A06G032_CLK_SPI5>, <&sysctrl R9A06G032_HCLK_SPI5>;
+ clock-names = "ssi_clk", "pclk";
+ power-domains = <&sysctrl>;
+ spi-slave;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
/*
* The GPIO mapping to the corresponding pins is not obvious.
* See the hardware documentation for details.
--
2.47.3
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