From: <shiju.jose@huawei.com>
To: <linux-edac@vger.kernel.org>, <linux-cxl@vger.kernel.org>,
<mchehab@kernel.org>, <dave.jiang@intel.com>,
<dan.j.williams@intel.com>, <jonathan.cameron@huawei.com>,
<alison.schofield@intel.com>, <nifan.cxl@gmail.com>,
<vishal.l.verma@intel.com>, <ira.weiny@intel.com>,
<dave@stgolabs.net>
Cc: <linux-kernel@vger.kernel.org>, <linuxarm@huawei.com>,
<tanxiaofei@huawei.com>, <prime.zeng@hisilicon.com>,
<shiju.jose@huawei.com>
Subject: [PATCH v2 00/14] rasdaemon: cxl: Update CXL event logging and recording to CXL spec rev 3.1
Date: Fri, 10 Jan 2025 12:26:26 +0000 [thread overview]
Message-ID: <20250110122641.1668-1-shiju.jose@huawei.com> (raw)
From: Shiju Jose <shiju.jose@huawei.com>
1. Update CXL event logging and recording for CXL spec rev 3.1 and for the
following and corresponding kernel CXL trace events changes.
https://lore.kernel.org/all/20250110115556.1654-1-shiju.jose@huawei.com/
2. Add following fixes.
- Fix logging of memory event type field of DRAM trace event.
- Fix mismatch in 'region' field's name with that in kernel DRAM trace
event.
- Fix for parsing error when trace event's format file is
larger than PAGE_SIZE
Shiju Jose (14):
rasdaemon: Fix for parsing error when trace event's format file is
larger than PAGE_SIZE
rasdaemon: cxl: Fix logging of memory event type of DRAM trace event
rasdaemon: cxl: Fix mismatch in region field's name with kernel DRAM
trace event
rasdaemon: cxl: Add automatic indexing for storing CXL fields in
SQLite database
rasdaemon: cxl: Update common event to CXL spec rev 3.1
rasdaemon: cxl: Add Component Identifier formatting for CXL spec rev
3.1
rasdaemon: cxl: Update CXL general media event to CXL spec rev 3.1
rasdaemon: cxl: Update CXL DRAM event to CXL spec rev 3.1
rasdaemon: cxl: Update memory module event to CXL spec rev 3.1
rasdaemon: ras-mc-ctl: Fix logging of memory event type in CXL DRAM
error table
rasdaemon: ras-mc-ctl: Update logging of common event data to align
with CXL spec rev 3.1
rasdaemon: ras-mc-ctl: Update logging of CXL general media event data
to align with CXL spec rev 3.1
rasdaemon: ras-mc-ctl: Update logging of CXL DRAM event data to align
with CXL spec rev 3.1
rasdaemon: ras-mc-ctl: Update logging of CXL memory module data to
align with CXL spec rev 3.1
Changes
V1 -> V2
1. Fixed follwoing comments from Jonathan on V1,
- Return negative error code in the patch
rasdaemon: cxl: Add automatic indexing for storing CXL fields in SQLite database
- Removed line break in the patch description rasdaemon: cxl: Fix mismatch
in region field's name with kernel DRAM trace event.
2. Added fix for parsing error when trace event's format file is
larger than PAGE_SIZE.
3. Rebased to latest code.
ras-cxl-handler.c | 262 ++++++++++++++++++++++++++++++++++++++++++---
ras-events.c | 21 ++--
ras-record.c | 192 ++++++++++++++++++++++-----------
ras-record.h | 21 ++++
ras-report.c | 30 ++++--
util/ras-mc-ctl.in | 190 +++++++++++++++++++++++++++-----
6 files changed, 600 insertions(+), 116 deletions(-)
--
2.43.0
next reply other threads:[~2025-01-10 12:26 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-10 12:26 shiju.jose [this message]
2025-01-10 12:26 ` [PATCH v2 01/14] rasdaemon: Fix for parsing error when trace event's format file is larger than PAGE_SIZE shiju.jose
2025-01-10 16:02 ` Jonathan Cameron
2025-01-10 16:11 ` Shiju Jose
2025-01-10 12:26 ` [PATCH v2 02/14] rasdaemon: cxl: Fix logging of memory event type of DRAM trace event shiju.jose
2025-01-10 12:26 ` [PATCH v2 03/14] rasdaemon: cxl: Fix mismatch in region field's name with kernel " shiju.jose
2025-01-10 12:26 ` [PATCH v2 04/14] rasdaemon: cxl: Add automatic indexing for storing CXL fields in SQLite database shiju.jose
2025-01-10 12:26 ` [PATCH v2 05/14] rasdaemon: cxl: Update common event to CXL spec rev 3.1 shiju.jose
2025-01-10 12:26 ` [PATCH v2 06/14] rasdaemon: cxl: Add Component Identifier formatting for " shiju.jose
2025-01-10 12:26 ` [PATCH v2 07/14] rasdaemon: cxl: Update CXL general media event to " shiju.jose
2025-01-10 12:26 ` [PATCH v2 08/14] rasdaemon: cxl: Update CXL DRAM " shiju.jose
2025-01-10 12:26 ` [PATCH v2 09/14] rasdaemon: cxl: Update memory module " shiju.jose
2025-01-10 12:26 ` [PATCH v2 10/14] rasdaemon: ras-mc-ctl: Fix logging of memory event type in CXL DRAM error table shiju.jose
2025-01-10 12:26 ` [PATCH v2 11/14] rasdaemon: ras-mc-ctl: Update logging of common event data to align with CXL spec rev 3.1 shiju.jose
2025-01-10 12:26 ` [PATCH v2 12/14] rasdaemon: ras-mc-ctl: Update logging of CXL general media " shiju.jose
2025-01-10 12:26 ` [PATCH v2 13/14] rasdaemon: ras-mc-ctl: Update logging of CXL DRAM " shiju.jose
2025-01-10 12:26 ` [PATCH v2 14/14] rasdaemon: ras-mc-ctl: Update logging of CXL memory module " shiju.jose
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