From: Yazen Ghannam <yazen.ghannam@amd.com>
To: Borislav Petkov <bp@alien8.de>
Cc: x86@kernel.org, Tony Luck <tony.luck@intel.com>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Len Brown <lenb@kernel.org>,
linux-kernel@vger.kernel.org, linux-edac@vger.kernel.org,
Smita.KoralahalliChannabasappa@amd.com,
Qiuxu Zhuo <qiuxu.zhuo@intel.com>,
Nikolay Borisov <nik.borisov@suse.com>,
Bert Karwatzki <spasswolf@web.de>,
linux-acpi@vger.kernel.org
Subject: Re: [PATCH v7 2/8] x86/mce: Unify AMD DFR handler with MCA Polling
Date: Fri, 24 Oct 2025 16:30:12 -0400 [thread overview]
Message-ID: <20251024203012.GA251815@yaz-khff2.amd.com> (raw)
In-Reply-To: <20251024150333.GSaPuVRQYxH92zyrmO@fat_crate.local>
On Fri, Oct 24, 2025 at 05:03:33PM +0200, Borislav Petkov wrote:
> On Thu, Oct 16, 2025 at 04:37:47PM +0000, Yazen Ghannam wrote:
> > @@ -1878,6 +1924,9 @@ static void __mcheck_cpu_init_prepare_banks(void)
> >
> > bitmap_fill(all_banks, MAX_NR_BANKS);
> > machine_check_poll(MCP_UC | MCP_QUEUE_LOG, &all_banks);
> > +
> > + if (mce_flags.smca)
> > + machine_check_poll(MCP_DFR | MCP_QUEUE_LOG, &all_banks);
>
> So you're going to run the poll again just for DFR errors?!
>
> What for?
Yeah, I guess I went too far with trying to catch bogus errors.
>
> I think this is enough:
>
> diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
> index 1482648c8508..7d6588195d56 100644
> --- a/arch/x86/include/asm/mce.h
> +++ b/arch/x86/include/asm/mce.h
> @@ -299,7 +299,6 @@ enum mcp_flags {
> MCP_TIMESTAMP = BIT(0), /* log time stamp */
> MCP_UC = BIT(1), /* log uncorrected errors */
> MCP_QUEUE_LOG = BIT(2), /* only queue to genpool */
> - MCP_DFR = BIT(3), /* log deferred errors */
> };
>
> void machine_check_poll(enum mcp_flags flags, mce_banks_t *b);
> diff --git a/arch/x86/kernel/cpu/mce/amd.c b/arch/x86/kernel/cpu/mce/amd.c
> index 64aa7ecfd332..d9f9ee7db5c8 100644
> --- a/arch/x86/kernel/cpu/mce/amd.c
> +++ b/arch/x86/kernel/cpu/mce/amd.c
> @@ -807,7 +807,7 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_deferred_error)
> /* APIC interrupt handler for deferred errors */
> static void amd_deferred_error_interrupt(void)
> {
> - machine_check_poll(MCP_TIMESTAMP | MCP_DFR, &this_cpu_ptr(&mce_amd_data)->dfr_intr_banks);
> + machine_check_poll(MCP_TIMESTAMP, &this_cpu_ptr(&mce_amd_data)->dfr_intr_banks);
> }
>
> static void reset_block(struct threshold_block *block)
> diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
> index 39725df7d35c..7be062429ce3 100644
> --- a/arch/x86/kernel/cpu/mce/core.c
> +++ b/arch/x86/kernel/cpu/mce/core.c
> @@ -779,17 +779,13 @@ static bool should_log_poll_error(enum mcp_flags flags, struct mce_hw_err *err)
> {
> struct mce *m = &err->m;
>
> - if (flags & MCP_DFR)
> + if (mce_flags.smca)
> return smca_should_log_poll_error(flags, err);
>
> /* If this entry is not valid, ignore it. */
> if (!(m->status & MCI_STATUS_VAL))
> return false;
>
> - /* Ignore deferred errors if not looking for them (MCP_DFR not set). */
> - if (m->status & MCI_STATUS_DEFERRED)
> - return false;
> -
> /*
> * If we are logging everything (at CPU online) or this
> * is a corrected error, then we must log it.
> @@ -1924,9 +1920,6 @@ static void __mcheck_cpu_init_prepare_banks(void)
>
> bitmap_fill(all_banks, MAX_NR_BANKS);
> machine_check_poll(MCP_UC | MCP_QUEUE_LOG, &all_banks);
> -
> - if (mce_flags.smca)
> - machine_check_poll(MCP_DFR | MCP_QUEUE_LOG, &all_banks);
> }
>
> for (i = 0; i < this_cpu_read(mce_num_banks); i++) {
>
>
>
This looks good to me.
Should I send another revision?
Thanks,
Yazen
next prev parent reply other threads:[~2025-10-24 20:30 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-16 16:37 [PATCH v7 0/8] AMD MCA interrupts rework Yazen Ghannam
2025-10-16 16:37 ` [PATCH v7 1/8] x86/mce: Unify AMD THR handler with MCA Polling Yazen Ghannam
2025-10-16 16:37 ` [PATCH v7 2/8] x86/mce: Unify AMD DFR " Yazen Ghannam
2025-10-24 15:03 ` Borislav Petkov
2025-10-24 20:30 ` Yazen Ghannam [this message]
2025-10-24 21:27 ` Borislav Petkov
2025-10-25 15:03 ` Borislav Petkov
2025-10-27 13:35 ` Yazen Ghannam
2025-10-27 14:11 ` Yazen Ghannam
2025-10-28 15:22 ` Borislav Petkov
2025-10-28 15:42 ` Yazen Ghannam
2025-10-28 17:46 ` Borislav Petkov
2025-10-28 20:37 ` Yazen Ghannam
2025-10-28 23:18 ` Borislav Petkov
2025-10-29 15:09 ` Yazen Ghannam
2025-10-29 16:02 ` Borislav Petkov
2025-10-16 16:37 ` [PATCH v7 3/8] x86/mce/amd: Enable interrupt vectors once per-CPU on SMCA systems Yazen Ghannam
2025-10-16 16:37 ` [PATCH v7 4/8] x86/mce/amd: Support SMCA Corrected Error Interrupt Yazen Ghannam
2025-10-16 16:37 ` [PATCH v7 5/8] x86/mce/amd: Remove redundant reset_block() Yazen Ghannam
2025-10-16 16:37 ` [PATCH v7 6/8] x86/mce/amd: Define threshold restart function for banks Yazen Ghannam
2025-10-16 16:37 ` [PATCH v7 7/8] x86/mce: Handle AMD threshold interrupt storms Yazen Ghannam
2025-10-16 16:37 ` [PATCH v7 8/8] x86/mce: Save and use APEI corrected threshold limit Yazen Ghannam
2025-11-02 12:32 ` Borislav Petkov
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20251024203012.GA251815@yaz-khff2.amd.com \
--to=yazen.ghannam@amd.com \
--cc=Smita.KoralahalliChannabasappa@amd.com \
--cc=bp@alien8.de \
--cc=lenb@kernel.org \
--cc=linux-acpi@vger.kernel.org \
--cc=linux-edac@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=nik.borisov@suse.com \
--cc=qiuxu.zhuo@intel.com \
--cc=rafael@kernel.org \
--cc=spasswolf@web.de \
--cc=tony.luck@intel.com \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox