Linux EDAC development
 help / color / mirror / Atom feed
From: Yazen Ghannam <yazen.ghannam@amd.com>
To: Borislav Petkov <bp@alien8.de>
Cc: x86@kernel.org, Tony Luck <tony.luck@intel.com>,
	"Rafael J. Wysocki" <rafael@kernel.org>,
	Len Brown <lenb@kernel.org>,
	linux-kernel@vger.kernel.org, linux-edac@vger.kernel.org,
	Smita.KoralahalliChannabasappa@amd.com,
	Qiuxu Zhuo <qiuxu.zhuo@intel.com>,
	Nikolay Borisov <nik.borisov@suse.com>,
	Bert Karwatzki <spasswolf@web.de>,
	linux-acpi@vger.kernel.org
Subject: Re: [PATCH v7 2/8] x86/mce: Unify AMD DFR handler with MCA Polling
Date: Tue, 28 Oct 2025 16:37:19 -0400	[thread overview]
Message-ID: <20251028203719.GA655216@yaz-khff2.amd.com> (raw)
In-Reply-To: <20251028174656.GBaQEBkOErfNAJbJsf@fat_crate.local>

On Tue, Oct 28, 2025 at 06:46:56PM +0100, Borislav Petkov wrote:
> On Tue, Oct 28, 2025 at 11:42:58AM -0400, Yazen Ghannam wrote:
> > Yes, fair point. How about this?
> > 
> > 	/*
> > 	 * If MCA_STATUS has a valid error of any type, then use it.
> > 	 *
> > 	 * If the error happens to be a deferred error, then the copy
> > 	 * saved in MCA_DESTAT will be cleared at the end of the
> > 	 * handler.
> > 	 *
> > 	 * If MCA_STATUS does not have a valid error, then check
> > 	 * MCA_DESTAT for a valid deferred error.
> > 	 */
> 
> Well, we already have this at the top:
> 
> /* 
>  * We have three scenarios for checking for Deferred errors:
>  * 
>  * 1) Non-SMCA systems check MCA_STATUS and log error if found.
>  * 2) SMCA systems check MCA_STATUS. If error is found then log it and also
>  *    clear MCA_DESTAT.
>  * 3) SMCA systems check MCA_DESTAT, if error was not found in MCA_STATUS, and
>  *    log it.
>  */
> 
>  and that is good enough IMO. The rest people can read out from the code.

Okay, sounds good.

> 
> > Okay, agreed. I think this entire second comment can be removed.
> 
> Gone.
> 
> IOW, this:
> 
> /* 
>  * We have three scenarios for checking for Deferred errors:
>  * 
>  * 1) Non-SMCA systems check MCA_STATUS and log error if found.
>  * 2) SMCA systems check MCA_STATUS. If error is found then log it and also
>  *    clear MCA_DESTAT.
>  * 3) SMCA systems check MCA_DESTAT, if error was not found in MCA_STATUS, and
>  *    log it.
>  */
> static bool smca_should_log_poll_error(struct mce *m)
> {
>         if (m->status & MCI_STATUS_VAL)
>                 return true;
>  
>         m->status = mce_rdmsrq(MSR_AMD64_SMCA_MCx_DESTAT(m->bank));
>         if ((m->status & MCI_STATUS_VAL) && (m->status & MCI_STATUS_DEFERRED)) {
>                 m->kflags |= MCE_CHECK_DFR_REGS;
>                 return true;
>         }
>  
>         return false;
> }
> 

Yep, that's it. Much cleaner. :)

Thanks,
Yazen

  reply	other threads:[~2025-10-28 20:37 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-16 16:37 [PATCH v7 0/8] AMD MCA interrupts rework Yazen Ghannam
2025-10-16 16:37 ` [PATCH v7 1/8] x86/mce: Unify AMD THR handler with MCA Polling Yazen Ghannam
2025-10-16 16:37 ` [PATCH v7 2/8] x86/mce: Unify AMD DFR " Yazen Ghannam
2025-10-24 15:03   ` Borislav Petkov
2025-10-24 20:30     ` Yazen Ghannam
2025-10-24 21:27       ` Borislav Petkov
2025-10-25 15:03         ` Borislav Petkov
2025-10-27 13:35           ` Yazen Ghannam
2025-10-27 14:11             ` Yazen Ghannam
2025-10-28 15:22               ` Borislav Petkov
2025-10-28 15:42                 ` Yazen Ghannam
2025-10-28 17:46                   ` Borislav Petkov
2025-10-28 20:37                     ` Yazen Ghannam [this message]
2025-10-28 23:18                       ` Borislav Petkov
2025-10-29 15:09                         ` Yazen Ghannam
2025-10-29 16:02                           ` Borislav Petkov
2025-10-16 16:37 ` [PATCH v7 3/8] x86/mce/amd: Enable interrupt vectors once per-CPU on SMCA systems Yazen Ghannam
2025-10-16 16:37 ` [PATCH v7 4/8] x86/mce/amd: Support SMCA Corrected Error Interrupt Yazen Ghannam
2025-10-16 16:37 ` [PATCH v7 5/8] x86/mce/amd: Remove redundant reset_block() Yazen Ghannam
2025-10-16 16:37 ` [PATCH v7 6/8] x86/mce/amd: Define threshold restart function for banks Yazen Ghannam
2025-10-16 16:37 ` [PATCH v7 7/8] x86/mce: Handle AMD threshold interrupt storms Yazen Ghannam
2025-10-16 16:37 ` [PATCH v7 8/8] x86/mce: Save and use APEI corrected threshold limit Yazen Ghannam
2025-11-02 12:32   ` Borislav Petkov

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20251028203719.GA655216@yaz-khff2.amd.com \
    --to=yazen.ghannam@amd.com \
    --cc=Smita.KoralahalliChannabasappa@amd.com \
    --cc=bp@alien8.de \
    --cc=lenb@kernel.org \
    --cc=linux-acpi@vger.kernel.org \
    --cc=linux-edac@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=nik.borisov@suse.com \
    --cc=qiuxu.zhuo@intel.com \
    --cc=rafael@kernel.org \
    --cc=spasswolf@web.de \
    --cc=tony.luck@intel.com \
    --cc=x86@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox