* [PATCH v4] EDAC/altera: use ECC manager compatible to select A10/S10 IRQ layout
@ 2026-06-27 6:17 Rounak Das
2026-07-01 22:07 ` Dinh Nguyen
0 siblings, 1 reply; 9+ messages in thread
From: Rounak Das @ 2026-06-27 6:17 UTC (permalink / raw)
To: dinguyen; +Cc: bp, tony.luck, linux-edac, linux-kernel, Rounak Das
The SDMMC ECC IRQ layout selection uses CONFIG_64BIT to distinguish
between Arria10 and Stratix10 paths.
Detect the SoC once at probe via the device match table (.data),
store it in struct altr_arria10_edac, and use it instead of CONFIG_64BIT.
This keeps the decision correct for every ECC child device
(OCRAM, SD/MMC, etc.) and avoids any runtime compatible lookup.
Signed-off-by: Rounak Das <rounakdas2025@gmail.com>
---
v4:
- Carry the A10/S10 distinction in the device match table .data and read
it with device_get_match_data(), instead of of_device_is_compatible()
at runtime (Dinh).
v3: https://lore.kernel.org/lkml/20260617000711.60804-1-rounakdas2025@gmail.com/
- Use altr,socfpga-s10-ecc-manager and store it once as is_s10 (Dinh).
- Fix checkpatch alignment.
v2: https://lore.kernel.org/linux-edac/20260616081709.48774-1-rounakdas2025@gmail.com/
- Use legal name in Signed-off-by (Borislav).
drivers/edac/altera_edac.c | 107 +++++++++++++++++++------------------
drivers/edac/altera_edac.h | 1 +
2 files changed, 55 insertions(+), 53 deletions(-)
diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c
index 4edd2088c2db6..24bdf7f5bac63 100644
--- a/drivers/edac/altera_edac.c
+++ b/drivers/edac/altera_edac.c
@@ -1507,6 +1507,7 @@ static int altr_portb_setup(struct altr_edac_device_dev *device)
int edac_idx, rc;
struct device_node *np;
const struct edac_device_prv_data *prv = &a10_sdmmceccb_data;
+ bool is_s10 = device->edac->is_s10;
rc = altr_check_ecc_deps(device);
if (rc)
@@ -1548,15 +1549,14 @@ static int altr_portb_setup(struct altr_edac_device_dev *device)
/*
* Update the PortB IRQs - A10 has 4, S10 has 2, Index accordingly
- *
- * FIXME: Instead of ifdefs with different architectures the driver
- * should properly use compatibles.
*/
-#ifdef CONFIG_64BIT
- altdev->sb_irq = irq_of_parse_and_map(np, 1);
-#else
- altdev->sb_irq = irq_of_parse_and_map(np, 2);
-#endif
+
+ /* Using compatibles to determine the IRQ Index */
+ if (is_s10)
+ altdev->sb_irq = irq_of_parse_and_map(np, 1);
+ else
+ altdev->sb_irq = irq_of_parse_and_map(np, 2);
+
if (!altdev->sb_irq) {
edac_printk(KERN_ERR, EDAC_DEVICE, "Error PortB SBIRQ alloc\n");
rc = -ENODEV;
@@ -1570,29 +1570,28 @@ static int altr_portb_setup(struct altr_edac_device_dev *device)
goto err_release_group_1;
}
-#ifdef CONFIG_64BIT
- /* Use IRQ to determine SError origin instead of assigning IRQ */
- rc = of_property_read_u32_index(np, "interrupts", 1, &altdev->db_irq);
- if (rc) {
- edac_printk(KERN_ERR, EDAC_DEVICE,
- "Error PortB DBIRQ alloc\n");
- goto err_release_group_1;
- }
-#else
- altdev->db_irq = irq_of_parse_and_map(np, 3);
- if (!altdev->db_irq) {
- edac_printk(KERN_ERR, EDAC_DEVICE, "Error PortB DBIRQ alloc\n");
- rc = -ENODEV;
- goto err_release_group_1;
- }
- rc = devm_request_irq(&altdev->ddev, altdev->db_irq,
- prv->ecc_irq_handler, IRQF_TRIGGER_HIGH,
- ecc_name, altdev);
- if (rc) {
- edac_printk(KERN_ERR, EDAC_DEVICE, "PortB DBERR IRQ error\n");
- goto err_release_group_1;
+ if (is_s10) {
+ /* Use IRQ to determine SError origin instead of assigning IRQ */
+ rc = of_property_read_u32_index(np, "interrupts", 1, &altdev->db_irq);
+ if (rc) {
+ edac_printk(KERN_ERR, EDAC_DEVICE, "Error PortB DBIRQ alloc\n");
+ goto err_release_group_1;
+ }
+ } else {
+ altdev->db_irq = irq_of_parse_and_map(np, 3);
+ if (!altdev->db_irq) {
+ edac_printk(KERN_ERR, EDAC_DEVICE, "Error PortB DBIRQ alloc\n");
+ rc = -ENODEV;
+ goto err_release_group_1;
+ }
+ rc = devm_request_irq(&altdev->ddev, altdev->db_irq,
+ prv->ecc_irq_handler, IRQF_TRIGGER_HIGH,
+ ecc_name, altdev);
+ if (rc) {
+ edac_printk(KERN_ERR, EDAC_DEVICE, "PortB DBERR IRQ error\n");
+ goto err_release_group_1;
+ }
}
-#endif
rc = edac_device_add_device(dci);
if (rc) {
@@ -1974,29 +1973,29 @@ static int altr_edac_a10_device_add(struct altr_arria10_edac *edac,
goto err_release_group1;
}
-#ifdef CONFIG_64BIT
- /* Use IRQ to determine SError origin instead of assigning IRQ */
- rc = of_property_read_u32_index(np, "interrupts", 0, &altdev->db_irq);
- if (rc) {
- edac_printk(KERN_ERR, EDAC_DEVICE,
- "Unable to parse DB IRQ index\n");
- goto err_release_group1;
- }
-#else
- altdev->db_irq = irq_of_parse_and_map(np, 1);
- if (!altdev->db_irq) {
- edac_printk(KERN_ERR, EDAC_DEVICE, "Error allocating DBIRQ\n");
- rc = -ENODEV;
- goto err_release_group1;
- }
- rc = devm_request_irq(edac->dev, altdev->db_irq, prv->ecc_irq_handler,
- IRQF_TRIGGER_HIGH,
- ecc_name, altdev);
- if (rc) {
- edac_printk(KERN_ERR, EDAC_DEVICE, "No DBERR IRQ resource\n");
- goto err_release_group1;
+ if (edac->is_s10) {
+ /* Use IRQ to determine SError origin instead of assigning IRQ */
+ rc = of_property_read_u32_index(np, "interrupts", 0, &altdev->db_irq);
+ if (rc) {
+ edac_printk(KERN_ERR, EDAC_DEVICE,
+ "Unable to parse DB IRQ index\n");
+ goto err_release_group1;
+ }
+ } else {
+ altdev->db_irq = irq_of_parse_and_map(np, 1);
+ if (!altdev->db_irq) {
+ edac_printk(KERN_ERR, EDAC_DEVICE, "Error allocating DBIRQ\n");
+ rc = -ENODEV;
+ goto err_release_group1;
+ }
+ rc = devm_request_irq(edac->dev, altdev->db_irq, prv->ecc_irq_handler,
+ IRQF_TRIGGER_HIGH,
+ ecc_name, altdev);
+ if (rc) {
+ edac_printk(KERN_ERR, EDAC_DEVICE, "No DBERR IRQ resource\n");
+ goto err_release_group1;
+ }
}
-#endif
rc = edac_device_add_device(dci);
if (rc) {
@@ -2122,6 +2121,8 @@ static int altr_edac_a10_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, edac);
INIT_LIST_HEAD(&edac->a10_ecc_devices);
+ edac->is_s10 = !!device_get_match_data(&pdev->dev);
+
edac->ecc_mgr_map =
altr_sysmgr_regmap_lookup_by_phandle(pdev->dev.of_node,
"altr,sysmgr-syscon");
@@ -2207,7 +2208,7 @@ static int altr_edac_a10_probe(struct platform_device *pdev)
static const struct of_device_id altr_edac_a10_of_match[] = {
{ .compatible = "altr,socfpga-a10-ecc-manager" },
- { .compatible = "altr,socfpga-s10-ecc-manager" },
+ { .compatible = "altr,socfpga-s10-ecc-manager", .data = (void *)1 },
{},
};
MODULE_DEVICE_TABLE(of, altr_edac_a10_of_match);
diff --git a/drivers/edac/altera_edac.h b/drivers/edac/altera_edac.h
index f3e84172caa9c..9387056fd65e3 100644
--- a/drivers/edac/altera_edac.h
+++ b/drivers/edac/altera_edac.h
@@ -394,6 +394,7 @@ struct altr_arria10_edac {
struct irq_chip irq_chip;
struct list_head a10_ecc_devices;
struct notifier_block panic_notifier;
+ bool is_s10;
};
#endif /* #ifndef _ALTERA_EDAC_H */
--
2.50.1 (Apple Git-155)
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH v4] EDAC/altera: use ECC manager compatible to select A10/S10 IRQ layout
2026-06-27 6:17 [PATCH v4] EDAC/altera: use ECC manager compatible to select A10/S10 IRQ layout Rounak Das
@ 2026-07-01 22:07 ` Dinh Nguyen
2026-07-02 15:53 ` Rounak Das
0 siblings, 1 reply; 9+ messages in thread
From: Dinh Nguyen @ 2026-07-01 22:07 UTC (permalink / raw)
To: Rounak Das; +Cc: bp, tony.luck, linux-edac, linux-kernel
Hi Rounak,
On 6/27/26 01:17, Rounak Das wrote:
> The SDMMC ECC IRQ layout selection uses CONFIG_64BIT to distinguish
> between Arria10 and Stratix10 paths.
>
> Detect the SoC once at probe via the device match table (.data),
> store it in struct altr_arria10_edac, and use it instead of CONFIG_64BIT.
>
> This keeps the decision correct for every ECC child device
> (OCRAM, SD/MMC, etc.) and avoids any runtime compatible lookup.
>
> Signed-off-by: Rounak Das <rounakdas2025@gmail.com>
> ---
> v4:
> - Carry the A10/S10 distinction in the device match table .data and read
> it with device_get_match_data(), instead of of_device_is_compatible()
> at runtime (Dinh).
>
I tested on both 32-bit and 64-bit platforms and it looks good. However,
did you want to go ahead and removed the 2 remaining CONFIG_64BIT ifdefs?
DInh
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v4] EDAC/altera: use ECC manager compatible to select A10/S10 IRQ layout
2026-07-01 22:07 ` Dinh Nguyen
@ 2026-07-02 15:53 ` Rounak Das
2026-07-06 12:34 ` Dinh Nguyen
0 siblings, 1 reply; 9+ messages in thread
From: Rounak Das @ 2026-07-02 15:53 UTC (permalink / raw)
To: Dinh Nguyen; +Cc: bp, tony.luck, linux-edac, linux-kernel
Hi Dinh,
Thank you. I am glad that v4 tested clean on both platforms.
On the two remaining ifdefs: I originally left them as-is because they
guard the double-bit-error path, where the SError handling and
arm_smccc_smc() reboot are arm64-specific. Converting to is_s10 would
compile s10_edac_dberr_handler() on 32-bit too, but that looks fine
since the symbols it needs (arm_smccc_smc, INTEL_SIP_SMC_ECC_DBE, the
S10 sysmgr defines) are all available on 32-bit socfpga.
I'd like your opinion before sending it. If you'd like them removed,
I'll do it as a separate commit, patch 2/2 in a v5 series, since the
DB-error path is a distinct change from the IRQ-index selection.
Thanks,
Rounak
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v4] EDAC/altera: use ECC manager compatible to select A10/S10 IRQ layout
2026-07-02 15:53 ` Rounak Das
@ 2026-07-06 12:34 ` Dinh Nguyen
2026-07-08 9:11 ` [PATCH v5 0/2] EDAC/altera: select A10/S10 behaviour by ECC manager compatible Rounak Das
0 siblings, 1 reply; 9+ messages in thread
From: Dinh Nguyen @ 2026-07-06 12:34 UTC (permalink / raw)
To: Rounak Das; +Cc: bp, tony.luck, linux-edac, linux-kernel
On 7/2/26 10:53, Rounak Das wrote:
> Hi Dinh,
>
> Thank you. I am glad that v4 tested clean on both platforms.
>
> On the two remaining ifdefs: I originally left them as-is because they
> guard the double-bit-error path, where the SError handling and
> arm_smccc_smc() reboot are arm64-specific. Converting to is_s10 would
> compile s10_edac_dberr_handler() on 32-bit too, but that looks fine
> since the symbols it needs (arm_smccc_smc, INTEL_SIP_SMC_ECC_DBE, the
> S10 sysmgr defines) are all available on 32-bit socfpga.
>
> I'd like your opinion before sending it. If you'd like them removed,
> I'll do it as a separate commit, patch 2/2 in a v5 series, since the
> DB-error path is a distinct change from the IRQ-index selection.
>
That sounds good. I actually tested with all the ifdefs removed and it
looks fine.
Thanks,
Dinh
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v5 0/2] EDAC/altera: select A10/S10 behaviour by ECC manager compatible
2026-07-06 12:34 ` Dinh Nguyen
@ 2026-07-08 9:11 ` Rounak Das
2026-07-08 9:11 ` [PATCH v5 1/2] EDAC/altera: use ECC manager compatible to select A10/S10 IRQ layout Rounak Das
2026-07-08 9:11 ` [PATCH v5 2/2] EDAC/altera: remove remaining CONFIG_64BIT ifdefs in the DB-error path Rounak Das
0 siblings, 2 replies; 9+ messages in thread
From: Rounak Das @ 2026-07-08 9:11 UTC (permalink / raw)
To: dinguyen; +Cc: bp, rounakdas2025, tony.luck, linux-edac, linux-kernel
Replace the CONFIG_64BIT-based A10/S10 selection in the Altera EDAC
driver with the ECC manager compatible. Patch 1 handles the IRQ-layout
selection; patch 2 removes the remaining ifdefs in the double-bit-error
path.
v5:
- New 2/2: remove the remaining CONFIG_64BIT ifdefs in the DB-error
path, converting them to is_s10 (Dinh; tested on 32/64-bit).
v4:
https://lore.kernel.org/lkml/20260627061723.43014-1-rounakdas2025@gmail.com/
- Carry the distinction in the match table .data, read via
device_get_match_data() (Dinh).
v3:
https://lore.kernel.org/lkml/20260617000711.60804-1-rounakdas2025@gmail.com/
- Use altr,socfpga-s10-ecc-manager, store once as is_s10 (Dinh).
- Fix checkpatch alignment.
v2:
https://lore.kernel.org/linux-edac/20260616081709.48774-1-rounakdas2025@gmail.com/
- Use legal name in Signed-off-by (Borislav).
Rounak Das (2):
EDAC/altera: use ECC manager compatible to select A10/S10 IRQ layout
EDAC/altera: remove remaining CONFIG_64BIT ifdefs in the DB-error path
drivers/edac/altera_edac.c | 127 ++++++++++++++++++-------------------
drivers/edac/altera_edac.h | 1 +
2 files changed, 63 insertions(+), 65 deletions(-)
--
2.50.1 (Apple Git-155)
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v5 1/2] EDAC/altera: use ECC manager compatible to select A10/S10 IRQ layout
2026-07-08 9:11 ` [PATCH v5 0/2] EDAC/altera: select A10/S10 behaviour by ECC manager compatible Rounak Das
@ 2026-07-08 9:11 ` Rounak Das
2026-07-08 20:48 ` Dinh Nguyen
2026-07-08 9:11 ` [PATCH v5 2/2] EDAC/altera: remove remaining CONFIG_64BIT ifdefs in the DB-error path Rounak Das
1 sibling, 1 reply; 9+ messages in thread
From: Rounak Das @ 2026-07-08 9:11 UTC (permalink / raw)
To: dinguyen; +Cc: bp, rounakdas2025, tony.luck, linux-edac, linux-kernel
The SDMMC ECC IRQ layout selection uses CONFIG_64BIT to distinguish
between Arria10 and Stratix10 paths.
Detect the SoC once at probe via the device match table (.data)
store it in struct altr_arria10_edac, and use it instead of CONFIG_64BIT.
This keeps the decision correct for every ECC child device
(OCRAM, SD/MMC, etc.) and avoids any runtime compatible lookup.
Signed-off-by: Rounak Das <rounakdas2025@gmail.com>
---
drivers/edac/altera_edac.c | 107 +++++++++++++++++++------------------
drivers/edac/altera_edac.h | 1 +
2 files changed, 55 insertions(+), 53 deletions(-)
diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c
index 4edd2088c2db6..24bdf7f5bac63 100644
--- a/drivers/edac/altera_edac.c
+++ b/drivers/edac/altera_edac.c
@@ -1507,6 +1507,7 @@ static int altr_portb_setup(struct altr_edac_device_dev *device)
int edac_idx, rc;
struct device_node *np;
const struct edac_device_prv_data *prv = &a10_sdmmceccb_data;
+ bool is_s10 = device->edac->is_s10;
rc = altr_check_ecc_deps(device);
if (rc)
@@ -1548,15 +1549,14 @@ static int altr_portb_setup(struct altr_edac_device_dev *device)
/*
* Update the PortB IRQs - A10 has 4, S10 has 2, Index accordingly
- *
- * FIXME: Instead of ifdefs with different architectures the driver
- * should properly use compatibles.
*/
-#ifdef CONFIG_64BIT
- altdev->sb_irq = irq_of_parse_and_map(np, 1);
-#else
- altdev->sb_irq = irq_of_parse_and_map(np, 2);
-#endif
+
+ /* Using compatibles to determine the IRQ Index */
+ if (is_s10)
+ altdev->sb_irq = irq_of_parse_and_map(np, 1);
+ else
+ altdev->sb_irq = irq_of_parse_and_map(np, 2);
+
if (!altdev->sb_irq) {
edac_printk(KERN_ERR, EDAC_DEVICE, "Error PortB SBIRQ alloc\n");
rc = -ENODEV;
@@ -1570,29 +1570,28 @@ static int altr_portb_setup(struct altr_edac_device_dev *device)
goto err_release_group_1;
}
-#ifdef CONFIG_64BIT
- /* Use IRQ to determine SError origin instead of assigning IRQ */
- rc = of_property_read_u32_index(np, "interrupts", 1, &altdev->db_irq);
- if (rc) {
- edac_printk(KERN_ERR, EDAC_DEVICE,
- "Error PortB DBIRQ alloc\n");
- goto err_release_group_1;
- }
-#else
- altdev->db_irq = irq_of_parse_and_map(np, 3);
- if (!altdev->db_irq) {
- edac_printk(KERN_ERR, EDAC_DEVICE, "Error PortB DBIRQ alloc\n");
- rc = -ENODEV;
- goto err_release_group_1;
- }
- rc = devm_request_irq(&altdev->ddev, altdev->db_irq,
- prv->ecc_irq_handler, IRQF_TRIGGER_HIGH,
- ecc_name, altdev);
- if (rc) {
- edac_printk(KERN_ERR, EDAC_DEVICE, "PortB DBERR IRQ error\n");
- goto err_release_group_1;
+ if (is_s10) {
+ /* Use IRQ to determine SError origin instead of assigning IRQ */
+ rc = of_property_read_u32_index(np, "interrupts", 1, &altdev->db_irq);
+ if (rc) {
+ edac_printk(KERN_ERR, EDAC_DEVICE, "Error PortB DBIRQ alloc\n");
+ goto err_release_group_1;
+ }
+ } else {
+ altdev->db_irq = irq_of_parse_and_map(np, 3);
+ if (!altdev->db_irq) {
+ edac_printk(KERN_ERR, EDAC_DEVICE, "Error PortB DBIRQ alloc\n");
+ rc = -ENODEV;
+ goto err_release_group_1;
+ }
+ rc = devm_request_irq(&altdev->ddev, altdev->db_irq,
+ prv->ecc_irq_handler, IRQF_TRIGGER_HIGH,
+ ecc_name, altdev);
+ if (rc) {
+ edac_printk(KERN_ERR, EDAC_DEVICE, "PortB DBERR IRQ error\n");
+ goto err_release_group_1;
+ }
}
-#endif
rc = edac_device_add_device(dci);
if (rc) {
@@ -1974,29 +1973,29 @@ static int altr_edac_a10_device_add(struct altr_arria10_edac *edac,
goto err_release_group1;
}
-#ifdef CONFIG_64BIT
- /* Use IRQ to determine SError origin instead of assigning IRQ */
- rc = of_property_read_u32_index(np, "interrupts", 0, &altdev->db_irq);
- if (rc) {
- edac_printk(KERN_ERR, EDAC_DEVICE,
- "Unable to parse DB IRQ index\n");
- goto err_release_group1;
- }
-#else
- altdev->db_irq = irq_of_parse_and_map(np, 1);
- if (!altdev->db_irq) {
- edac_printk(KERN_ERR, EDAC_DEVICE, "Error allocating DBIRQ\n");
- rc = -ENODEV;
- goto err_release_group1;
- }
- rc = devm_request_irq(edac->dev, altdev->db_irq, prv->ecc_irq_handler,
- IRQF_TRIGGER_HIGH,
- ecc_name, altdev);
- if (rc) {
- edac_printk(KERN_ERR, EDAC_DEVICE, "No DBERR IRQ resource\n");
- goto err_release_group1;
+ if (edac->is_s10) {
+ /* Use IRQ to determine SError origin instead of assigning IRQ */
+ rc = of_property_read_u32_index(np, "interrupts", 0, &altdev->db_irq);
+ if (rc) {
+ edac_printk(KERN_ERR, EDAC_DEVICE,
+ "Unable to parse DB IRQ index\n");
+ goto err_release_group1;
+ }
+ } else {
+ altdev->db_irq = irq_of_parse_and_map(np, 1);
+ if (!altdev->db_irq) {
+ edac_printk(KERN_ERR, EDAC_DEVICE, "Error allocating DBIRQ\n");
+ rc = -ENODEV;
+ goto err_release_group1;
+ }
+ rc = devm_request_irq(edac->dev, altdev->db_irq, prv->ecc_irq_handler,
+ IRQF_TRIGGER_HIGH,
+ ecc_name, altdev);
+ if (rc) {
+ edac_printk(KERN_ERR, EDAC_DEVICE, "No DBERR IRQ resource\n");
+ goto err_release_group1;
+ }
}
-#endif
rc = edac_device_add_device(dci);
if (rc) {
@@ -2122,6 +2121,8 @@ static int altr_edac_a10_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, edac);
INIT_LIST_HEAD(&edac->a10_ecc_devices);
+ edac->is_s10 = !!device_get_match_data(&pdev->dev);
+
edac->ecc_mgr_map =
altr_sysmgr_regmap_lookup_by_phandle(pdev->dev.of_node,
"altr,sysmgr-syscon");
@@ -2207,7 +2208,7 @@ static int altr_edac_a10_probe(struct platform_device *pdev)
static const struct of_device_id altr_edac_a10_of_match[] = {
{ .compatible = "altr,socfpga-a10-ecc-manager" },
- { .compatible = "altr,socfpga-s10-ecc-manager" },
+ { .compatible = "altr,socfpga-s10-ecc-manager", .data = (void *)1 },
{},
};
MODULE_DEVICE_TABLE(of, altr_edac_a10_of_match);
diff --git a/drivers/edac/altera_edac.h b/drivers/edac/altera_edac.h
index f3e84172caa9c..9387056fd65e3 100644
--- a/drivers/edac/altera_edac.h
+++ b/drivers/edac/altera_edac.h
@@ -394,6 +394,7 @@ struct altr_arria10_edac {
struct irq_chip irq_chip;
struct list_head a10_ecc_devices;
struct notifier_block panic_notifier;
+ bool is_s10;
};
#endif /* #ifndef _ALTERA_EDAC_H */
--
2.50.1 (Apple Git-155)
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH v5 1/2] EDAC/altera: use ECC manager compatible to select A10/S10 IRQ layout
2026-07-08 9:11 ` [PATCH v5 1/2] EDAC/altera: use ECC manager compatible to select A10/S10 IRQ layout Rounak Das
@ 2026-07-08 20:48 ` Dinh Nguyen
0 siblings, 0 replies; 9+ messages in thread
From: Dinh Nguyen @ 2026-07-08 20:48 UTC (permalink / raw)
To: Rounak Das; +Cc: bp, tony.luck, linux-edac, linux-kernel
On 7/8/26 04:11, Rounak Das wrote:
> The SDMMC ECC IRQ layout selection uses CONFIG_64BIT to distinguish
> between Arria10 and Stratix10 paths.
>
> Detect the SoC once at probe via the device match table (.data)
> store it in struct altr_arria10_edac, and use it instead of CONFIG_64BIT.
>
> This keeps the decision correct for every ECC child device
> (OCRAM, SD/MMC, etc.) and avoids any runtime compatible lookup.
>
> Signed-off-by: Rounak Das <rounakdas2025@gmail.com>
> ---
> drivers/edac/altera_edac.c | 107 +++++++++++++++++++------------------
> drivers/edac/altera_edac.h | 1 +
> 2 files changed, 55 insertions(+), 53 deletions(-)
>
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v5 2/2] EDAC/altera: remove remaining CONFIG_64BIT ifdefs in the DB-error path
2026-07-08 9:11 ` [PATCH v5 0/2] EDAC/altera: select A10/S10 behaviour by ECC manager compatible Rounak Das
2026-07-08 9:11 ` [PATCH v5 1/2] EDAC/altera: use ECC manager compatible to select A10/S10 IRQ layout Rounak Das
@ 2026-07-08 9:11 ` Rounak Das
2026-07-08 20:48 ` Dinh Nguyen
1 sibling, 1 reply; 9+ messages in thread
From: Rounak Das @ 2026-07-08 9:11 UTC (permalink / raw)
To: dinguyen; +Cc: bp, rounakdas2025, tony.luck, linux-edac, linux-kernel
Convert the last two CONFIG_64BIT ifdefs to the is_s10 flag, so the
whole driver selects behaviour from the ECC manager compatible.
s10_edac_dberr_handler() is now built on 32-bit too; the symbols it
uses are all available there. It only runs when is_s10 is true, so
Arria10 behaviour is unchanged.
Signed-off-by: Rounak Das <rounakdas2025@gmail.com>
---
drivers/edac/altera_edac.c | 20 ++++++++------------
1 file changed, 8 insertions(+), 12 deletions(-)
diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c
index 24bdf7f5bac63..1d1e2b5ca14c8 100644
--- a/drivers/edac/altera_edac.c
+++ b/drivers/edac/altera_edac.c
@@ -2058,7 +2058,6 @@ static const struct irq_domain_ops a10_eccmgr_ic_ops = {
/************** Stratix 10 EDAC Double Bit Error Handler ************/
#define to_a10edac(p, m) container_of(p, struct altr_arria10_edac, m)
-#ifdef CONFIG_64BIT
/* panic routine issues reboot on non-zero panic_timeout */
extern int panic_timeout;
@@ -2105,7 +2104,6 @@ static int s10_edac_dberr_handler(struct notifier_block *this,
return NOTIFY_DONE;
}
-#endif
/****************** Arria 10 EDAC Probe Function *********************/
static int altr_edac_a10_probe(struct platform_device *pdev)
@@ -2154,8 +2152,7 @@ static int altr_edac_a10_probe(struct platform_device *pdev)
irq_set_chained_handler_and_data(edac->sb_irq,
altr_edac_a10_irq_handler,
edac);
-
-#ifdef CONFIG_64BIT
+ if (edac->is_s10)
{
int dberror, err_addr;
@@ -2178,15 +2175,14 @@ static int altr_edac_a10_probe(struct platform_device *pdev)
regmap_write(edac->ecc_mgr_map,
S10_SYSMGR_UE_ADDR_OFST, 0);
}
- }
-#else
- edac->db_irq = platform_get_irq(pdev, 1);
- if (edac->db_irq < 0)
- return edac->db_irq;
+ } else {
+ edac->db_irq = platform_get_irq(pdev, 1);
+ if (edac->db_irq < 0)
+ return edac->db_irq;
- irq_set_chained_handler_and_data(edac->db_irq,
- altr_edac_a10_irq_handler, edac);
-#endif
+ irq_set_chained_handler_and_data(edac->db_irq,
+ altr_edac_a10_irq_handler, edac);
+ }
for_each_child_of_node(pdev->dev.of_node, child) {
if (!of_device_is_available(child))
--
2.50.1 (Apple Git-155)
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH v5 2/2] EDAC/altera: remove remaining CONFIG_64BIT ifdefs in the DB-error path
2026-07-08 9:11 ` [PATCH v5 2/2] EDAC/altera: remove remaining CONFIG_64BIT ifdefs in the DB-error path Rounak Das
@ 2026-07-08 20:48 ` Dinh Nguyen
0 siblings, 0 replies; 9+ messages in thread
From: Dinh Nguyen @ 2026-07-08 20:48 UTC (permalink / raw)
To: Rounak Das; +Cc: bp, tony.luck, linux-edac, linux-kernel
On 7/8/26 04:11, Rounak Das wrote:
> Convert the last two CONFIG_64BIT ifdefs to the is_s10 flag, so the
> whole driver selects behaviour from the ECC manager compatible.
>
> s10_edac_dberr_handler() is now built on 32-bit too; the symbols it
> uses are all available there. It only runs when is_s10 is true, so
> Arria10 behaviour is unchanged.
>
> Signed-off-by: Rounak Das <rounakdas2025@gmail.com>
> ---
> drivers/edac/altera_edac.c | 20 ++++++++------------
> 1 file changed, 8 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c
> index 24bdf7f5bac63..1d1e2b5ca14c8 100644
> --- a/drivers/edac/altera_edac.c
> +++ b/drivers/edac/altera_edac.c
> @@ -2058,7 +2058,6 @@ static const struct irq_domain_ops a10_eccmgr_ic_ops = {
> /************** Stratix 10 EDAC Double Bit Error Handler ************/
> #define to_a10edac(p, m) container_of(p, struct altr_arria10_edac, m)
>
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2026-07-08 20:48 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-06-27 6:17 [PATCH v4] EDAC/altera: use ECC manager compatible to select A10/S10 IRQ layout Rounak Das
2026-07-01 22:07 ` Dinh Nguyen
2026-07-02 15:53 ` Rounak Das
2026-07-06 12:34 ` Dinh Nguyen
2026-07-08 9:11 ` [PATCH v5 0/2] EDAC/altera: select A10/S10 behaviour by ECC manager compatible Rounak Das
2026-07-08 9:11 ` [PATCH v5 1/2] EDAC/altera: use ECC manager compatible to select A10/S10 IRQ layout Rounak Das
2026-07-08 20:48 ` Dinh Nguyen
2026-07-08 9:11 ` [PATCH v5 2/2] EDAC/altera: remove remaining CONFIG_64BIT ifdefs in the DB-error path Rounak Das
2026-07-08 20:48 ` Dinh Nguyen
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