From: Jarkko Nikula <jarkko.nikula@linux.intel.com>
To: Wolfram Sang <wsa@kernel.org>,
Jan Bottorff <janb@os.amperecomputing.com>,
Serge Semin <fancer.lancer@gmail.com>,
Yann Sionneau <ysionneau@kalrayinc.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Yann Sionneau <yann@sionneau.net>, Will Deacon <will@kernel.org>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Mika Westerberg <mika.westerberg@linux.intel.com>,
Jan Dabros <jsd@semihalf.com>, Andi Shyti <andi.shyti@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] i2c: designware: Fix corrupted memory seen in the ISR
Date: Fri, 29 Sep 2023 11:48:10 +0300 [thread overview]
Message-ID: <1d56ceef-6573-43b9-a050-124c341a0698@linux.intel.com> (raw)
In-Reply-To: <ZRSEntqne/1y1ozq@shikoro>
On 9/27/23 22:38, Wolfram Sang wrote:
>
>> So my next question, is the change to dw_reg_write something that I should
>> write and submit, or should someone else submit something more generalized,
>> like option 2 above? I don't own the i2c driver, I'm just trying to fix one
>> issue on one processor with minimal risk of breaking something. I don't have
>> the broader view of what's optimal for the whole DesignWare i2c driver. I
>> also don't have any way to test changes on other models of processors.
>
> Well, I guess this is a question for the designware maintainers: do we
> want this one conversion from *_relaxed to non-relaxed. Or are we
> playing safe by using non-relaxed all the time. I would suggest the
> latter because the drivers I look after hardly write registers in a hot
> path (and not many of them at a time). But you guys know your driver
> better...
>
Well I don't have any preference (read enough knowledge) either here and
I hardly think performance becomes issue in any configuration.
Not a showstopper to this fix nor necessarily need to cover either but
one another memory barrier case might be in i2c-slave flows:
1. I2C bus read/write from another host
2. Interrupt to i2c-designware IP
i2c-designware-slave.c: i2c_dw_isr_slave()
i2c-core-slave.c: i2c_slave_event()
-> irq handler goes to slave backend like i2c-slave-eeprom
i2c-slave-eeprom.c: i2c_slave_eeprom_slave_cb()
3. Shared data between irq handler and process context
struct eeprom_data is accessed both from irq handler via
i2c_slave_eeprom_slave_cb() and process context via sysfs node handlers
i2c_slave_eeprom_bin_read() and i2c_slave_eeprom_bin_write()
next prev parent reply other threads:[~2023-09-29 8:48 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-13 23:29 [PATCH v2] i2c: designware: Fix corrupted memory seen in the ISR Jan Bottorff
2023-09-14 18:46 ` Andy Shevchenko
2023-09-14 18:47 ` Andy Shevchenko
2023-09-14 20:52 ` Jan Bottorff
2023-09-15 12:44 ` Jarkko Nikula
2023-09-15 15:21 ` Serge Semin
2023-09-16 1:47 ` Jan Bottorff
2023-09-17 0:01 ` Serge Semin
2023-09-17 20:08 ` Yann Sionneau
2023-09-18 23:14 ` Serge Semin
2023-09-19 3:45 ` Jan Bottorff
2023-09-19 9:55 ` Catalin Marinas
2023-09-19 10:19 ` Wolfram Sang
2023-09-19 12:38 ` Yann Sionneau
2023-09-19 14:51 ` Catalin Marinas
2023-09-19 14:55 ` Wolfram Sang
2023-09-19 18:54 ` Jan Bottorff
2023-09-19 21:05 ` Serge Semin
2023-09-20 9:08 ` Wolfram Sang
2023-09-20 13:27 ` Yann Sionneau
2023-09-20 19:14 ` Jan Bottorff
2023-09-25 12:54 ` Serge Semin
2023-09-25 19:39 ` Jan Bottorff
2023-09-27 19:38 ` Wolfram Sang
2023-09-29 8:48 ` Jarkko Nikula [this message]
2023-10-26 11:18 ` Wolfram Sang
2023-10-31 0:12 ` Jan Bottorff
2023-10-31 5:51 ` Wolfram Sang
2023-10-31 8:44 ` Yann Sionneau
2023-10-31 12:10 ` Jarkko Nikula
2023-10-31 13:06 ` Serge Semin
2023-11-01 16:51 ` Jan Bottorff
2023-09-20 11:03 ` Catalin Marinas
2023-09-20 10:44 ` Catalin Marinas
2023-09-20 11:05 ` Catalin Marinas
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